Commit | Line | Data |
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00db8189 | 1 | /* |
00db8189 | 2 | * Framework and drivers for configuring and reading different PHYs |
d8de01b7 | 3 | * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c |
00db8189 AF |
4 | * |
5 | * Author: Andy Fleming | |
6 | * | |
7 | * Copyright (c) 2004 Freescale Semiconductor, Inc. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
13 | * | |
14 | */ | |
15 | ||
16 | #ifndef __PHY_H | |
17 | #define __PHY_H | |
18 | ||
2220943a | 19 | #include <linux/compiler.h> |
00db8189 | 20 | #include <linux/spinlock.h> |
13df29f6 | 21 | #include <linux/ethtool.h> |
b31cdffa | 22 | #include <linux/linkmode.h> |
bac83c65 | 23 | #include <linux/mdio.h> |
13df29f6 | 24 | #include <linux/mii.h> |
3e3aaf64 | 25 | #include <linux/module.h> |
13df29f6 MR |
26 | #include <linux/timer.h> |
27 | #include <linux/workqueue.h> | |
8626d3b4 | 28 | #include <linux/mod_devicetable.h> |
00db8189 | 29 | |
60063497 | 30 | #include <linux/atomic.h> |
0ac49527 | 31 | |
e9fbdf17 | 32 | #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ |
00db8189 AF |
33 | SUPPORTED_TP | \ |
34 | SUPPORTED_MII) | |
35 | ||
e9fbdf17 FF |
36 | #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ |
37 | SUPPORTED_10baseT_Full) | |
38 | ||
39 | #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ | |
40 | SUPPORTED_100baseT_Full) | |
41 | ||
42 | #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ | |
00db8189 AF |
43 | SUPPORTED_1000baseT_Full) |
44 | ||
719655a1 AL |
45 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; |
46 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; | |
47 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; | |
48 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; | |
49 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; | |
50 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; | |
9e857a40 | 51 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; |
719655a1 AL |
52 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; |
53 | ||
54 | #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) | |
55 | #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) | |
56 | #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) | |
57 | #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) | |
58 | #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) | |
59 | #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) | |
9e857a40 | 60 | #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) |
719655a1 | 61 | #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) |
e9fbdf17 | 62 | |
3c1bcc86 AL |
63 | extern const int phy_10_100_features_array[4]; |
64 | extern const int phy_basic_t1_features_array[2]; | |
65 | extern const int phy_gbit_features_array[2]; | |
66 | extern const int phy_10gbit_features_array[1]; | |
67 | ||
c5e38a94 AF |
68 | /* |
69 | * Set phydev->irq to PHY_POLL if interrupts are not supported, | |
00db8189 AF |
70 | * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if |
71 | * the attached driver handles the interrupt | |
72 | */ | |
73 | #define PHY_POLL -1 | |
74 | #define PHY_IGNORE_INTERRUPT -2 | |
75 | ||
a4307c0e HK |
76 | #define PHY_IS_INTERNAL 0x00000001 |
77 | #define PHY_RST_AFTER_CLK_EN 0x00000002 | |
a9049e0c | 78 | #define MDIO_DEVICE_IS_PHY 0x80000000 |
00db8189 | 79 | |
e8a2b6a4 AF |
80 | /* Interface Mode definitions */ |
81 | typedef enum { | |
4157ef1b | 82 | PHY_INTERFACE_MODE_NA, |
735d8a18 | 83 | PHY_INTERFACE_MODE_INTERNAL, |
e8a2b6a4 AF |
84 | PHY_INTERFACE_MODE_MII, |
85 | PHY_INTERFACE_MODE_GMII, | |
86 | PHY_INTERFACE_MODE_SGMII, | |
87 | PHY_INTERFACE_MODE_TBI, | |
2cc70ba4 | 88 | PHY_INTERFACE_MODE_REVMII, |
e8a2b6a4 AF |
89 | PHY_INTERFACE_MODE_RMII, |
90 | PHY_INTERFACE_MODE_RGMII, | |
a999589c | 91 | PHY_INTERFACE_MODE_RGMII_ID, |
7d400a4c KP |
92 | PHY_INTERFACE_MODE_RGMII_RXID, |
93 | PHY_INTERFACE_MODE_RGMII_TXID, | |
4157ef1b SG |
94 | PHY_INTERFACE_MODE_RTBI, |
95 | PHY_INTERFACE_MODE_SMII, | |
898dd0bd | 96 | PHY_INTERFACE_MODE_XGMII, |
fd70f72c | 97 | PHY_INTERFACE_MODE_MOCA, |
b9d12085 | 98 | PHY_INTERFACE_MODE_QSGMII, |
572de608 | 99 | PHY_INTERFACE_MODE_TRGMII, |
55601a88 AL |
100 | PHY_INTERFACE_MODE_1000BASEX, |
101 | PHY_INTERFACE_MODE_2500BASEX, | |
102 | PHY_INTERFACE_MODE_RXAUI, | |
c125ca09 RK |
103 | PHY_INTERFACE_MODE_XAUI, |
104 | /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */ | |
105 | PHY_INTERFACE_MODE_10GKR, | |
8a2fe56e | 106 | PHY_INTERFACE_MODE_MAX, |
e8a2b6a4 AF |
107 | } phy_interface_t; |
108 | ||
1f9127ca ZB |
109 | /** |
110 | * phy_supported_speeds - return all speeds currently supported by a phy device | |
111 | * @phy: The phy device to return supported speeds of. | |
112 | * @speeds: buffer to store supported speeds in. | |
113 | * @size: size of speeds buffer. | |
114 | * | |
d8de01b7 RD |
115 | * Description: Returns the number of supported speeds, and fills |
116 | * the speeds buffer with the supported speeds. If speeds buffer is | |
117 | * too small to contain all currently supported speeds, will return as | |
1f9127ca ZB |
118 | * many speeds as can fit. |
119 | */ | |
120 | unsigned int phy_supported_speeds(struct phy_device *phy, | |
121 | unsigned int *speeds, | |
122 | unsigned int size); | |
123 | ||
8a2fe56e | 124 | /** |
d8de01b7 RD |
125 | * phy_modes - map phy_interface_t enum to device tree binding of phy-mode |
126 | * @interface: enum phy_interface_t value | |
127 | * | |
128 | * Description: maps 'enum phy_interface_t' defined in this file | |
8a2fe56e FF |
129 | * into the device tree binding of 'phy-mode', so that Ethernet |
130 | * device driver can get phy interface from device tree. | |
131 | */ | |
132 | static inline const char *phy_modes(phy_interface_t interface) | |
133 | { | |
134 | switch (interface) { | |
135 | case PHY_INTERFACE_MODE_NA: | |
136 | return ""; | |
735d8a18 FF |
137 | case PHY_INTERFACE_MODE_INTERNAL: |
138 | return "internal"; | |
8a2fe56e FF |
139 | case PHY_INTERFACE_MODE_MII: |
140 | return "mii"; | |
141 | case PHY_INTERFACE_MODE_GMII: | |
142 | return "gmii"; | |
143 | case PHY_INTERFACE_MODE_SGMII: | |
144 | return "sgmii"; | |
145 | case PHY_INTERFACE_MODE_TBI: | |
146 | return "tbi"; | |
147 | case PHY_INTERFACE_MODE_REVMII: | |
148 | return "rev-mii"; | |
149 | case PHY_INTERFACE_MODE_RMII: | |
150 | return "rmii"; | |
151 | case PHY_INTERFACE_MODE_RGMII: | |
152 | return "rgmii"; | |
153 | case PHY_INTERFACE_MODE_RGMII_ID: | |
154 | return "rgmii-id"; | |
155 | case PHY_INTERFACE_MODE_RGMII_RXID: | |
156 | return "rgmii-rxid"; | |
157 | case PHY_INTERFACE_MODE_RGMII_TXID: | |
158 | return "rgmii-txid"; | |
159 | case PHY_INTERFACE_MODE_RTBI: | |
160 | return "rtbi"; | |
161 | case PHY_INTERFACE_MODE_SMII: | |
162 | return "smii"; | |
163 | case PHY_INTERFACE_MODE_XGMII: | |
164 | return "xgmii"; | |
fd70f72c FF |
165 | case PHY_INTERFACE_MODE_MOCA: |
166 | return "moca"; | |
b9d12085 TP |
167 | case PHY_INTERFACE_MODE_QSGMII: |
168 | return "qsgmii"; | |
572de608 SW |
169 | case PHY_INTERFACE_MODE_TRGMII: |
170 | return "trgmii"; | |
55601a88 AL |
171 | case PHY_INTERFACE_MODE_1000BASEX: |
172 | return "1000base-x"; | |
173 | case PHY_INTERFACE_MODE_2500BASEX: | |
174 | return "2500base-x"; | |
175 | case PHY_INTERFACE_MODE_RXAUI: | |
176 | return "rxaui"; | |
c125ca09 RK |
177 | case PHY_INTERFACE_MODE_XAUI: |
178 | return "xaui"; | |
179 | case PHY_INTERFACE_MODE_10GKR: | |
180 | return "10gbase-kr"; | |
8a2fe56e FF |
181 | default: |
182 | return "unknown"; | |
183 | } | |
184 | } | |
185 | ||
00db8189 | 186 | |
e8a2b6a4 | 187 | #define PHY_INIT_TIMEOUT 100000 |
00db8189 AF |
188 | #define PHY_STATE_TIME 1 |
189 | #define PHY_FORCE_TIMEOUT 10 | |
00db8189 | 190 | |
e8a2b6a4 | 191 | #define PHY_MAX_ADDR 32 |
00db8189 | 192 | |
a4d00f17 | 193 | /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ |
9d9326d3 AF |
194 | #define PHY_ID_FMT "%s:%02x" |
195 | ||
4567d686 | 196 | #define MII_BUS_ID_SIZE 61 |
a4d00f17 | 197 | |
abf35df2 JG |
198 | /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit |
199 | IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */ | |
200 | #define MII_ADDR_C45 (1<<30) | |
201 | ||
313162d0 | 202 | struct device; |
9525ae83 | 203 | struct phylink; |
313162d0 PG |
204 | struct sk_buff; |
205 | ||
c5e38a94 AF |
206 | /* |
207 | * The Bus class for PHYs. Devices which provide access to | |
208 | * PHYs should register using this structure | |
209 | */ | |
00db8189 | 210 | struct mii_bus { |
3e3aaf64 | 211 | struct module *owner; |
00db8189 | 212 | const char *name; |
9d9326d3 | 213 | char id[MII_BUS_ID_SIZE]; |
00db8189 | 214 | void *priv; |
ccaa953e AL |
215 | int (*read)(struct mii_bus *bus, int addr, int regnum); |
216 | int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); | |
00db8189 AF |
217 | int (*reset)(struct mii_bus *bus); |
218 | ||
c5e38a94 AF |
219 | /* |
220 | * A lock to ensure that only one thing can read/write | |
221 | * the MDIO bus at a time | |
222 | */ | |
35b5f6b1 | 223 | struct mutex mdio_lock; |
00db8189 | 224 | |
18ee49dd | 225 | struct device *parent; |
46abc021 LB |
226 | enum { |
227 | MDIOBUS_ALLOCATED = 1, | |
228 | MDIOBUS_REGISTERED, | |
229 | MDIOBUS_UNREGISTERED, | |
230 | MDIOBUS_RELEASED, | |
231 | } state; | |
232 | struct device dev; | |
00db8189 AF |
233 | |
234 | /* list of all PHYs on bus */ | |
7f854420 | 235 | struct mdio_device *mdio_map[PHY_MAX_ADDR]; |
00db8189 | 236 | |
c6883996 | 237 | /* PHY addresses to be ignored when probing */ |
f896424c MP |
238 | u32 phy_mask; |
239 | ||
922f2dd1 FF |
240 | /* PHY addresses to ignore the TA/read failure */ |
241 | u32 phy_ignore_ta_mask; | |
242 | ||
c5e38a94 | 243 | /* |
e7f4dc35 AL |
244 | * An array of interrupts, each PHY's interrupt at the index |
245 | * matching its address | |
c5e38a94 | 246 | */ |
e7f4dc35 | 247 | int irq[PHY_MAX_ADDR]; |
69226896 RQ |
248 | |
249 | /* GPIO reset pulse width in microseconds */ | |
250 | int reset_delay_us; | |
d396e84c SS |
251 | /* RESET GPIO descriptor pointer */ |
252 | struct gpio_desc *reset_gpiod; | |
00db8189 | 253 | }; |
46abc021 | 254 | #define to_mii_bus(d) container_of(d, struct mii_bus, dev) |
00db8189 | 255 | |
eb8a54a7 TT |
256 | struct mii_bus *mdiobus_alloc_size(size_t); |
257 | static inline struct mii_bus *mdiobus_alloc(void) | |
258 | { | |
259 | return mdiobus_alloc_size(0); | |
260 | } | |
261 | ||
3e3aaf64 RK |
262 | int __mdiobus_register(struct mii_bus *bus, struct module *owner); |
263 | #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) | |
2e888103 LB |
264 | void mdiobus_unregister(struct mii_bus *bus); |
265 | void mdiobus_free(struct mii_bus *bus); | |
6d48f44b GS |
266 | struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); |
267 | static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) | |
268 | { | |
269 | return devm_mdiobus_alloc_size(dev, 0); | |
270 | } | |
271 | ||
272 | void devm_mdiobus_free(struct device *dev, struct mii_bus *bus); | |
2e888103 | 273 | struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); |
2e888103 | 274 | |
695bce8f HK |
275 | #define PHY_INTERRUPT_DISABLED false |
276 | #define PHY_INTERRUPT_ENABLED true | |
00db8189 AF |
277 | |
278 | /* PHY state machine states: | |
279 | * | |
280 | * DOWN: PHY device and driver are not ready for anything. probe | |
281 | * should be called if and only if the PHY is in this state, | |
282 | * given that the PHY device exists. | |
899a3cbb | 283 | * - PHY driver probe function will set the state to READY |
00db8189 AF |
284 | * |
285 | * READY: PHY is ready to send and receive packets, but the | |
286 | * controller is not. By default, PHYs which do not implement | |
899a3cbb | 287 | * probe will be set to this state by phy_probe(). |
00db8189 AF |
288 | * - start will set the state to UP |
289 | * | |
00db8189 AF |
290 | * UP: The PHY and attached device are ready to do work. |
291 | * Interrupts should be started here. | |
85a1f31d | 292 | * - timer moves to NOLINK or RUNNING |
00db8189 AF |
293 | * |
294 | * NOLINK: PHY is up, but not currently plugged in. | |
8deeb630 | 295 | * - irq or timer will set RUNNING if link comes back |
00db8189 AF |
296 | * - phy_stop moves to HALTED |
297 | * | |
298 | * FORCING: PHY is being configured with forced settings | |
299 | * - if link is up, move to RUNNING | |
300 | * - If link is down, we drop to the next highest setting, and | |
301 | * retry (FORCING) after a timeout | |
302 | * - phy_stop moves to HALTED | |
303 | * | |
304 | * RUNNING: PHY is currently up, running, and possibly sending | |
305 | * and/or receiving packets | |
8deeb630 | 306 | * - irq or timer will set NOLINK if link goes down |
00db8189 AF |
307 | * - phy_stop moves to HALTED |
308 | * | |
00db8189 AF |
309 | * HALTED: PHY is up, but no polling or interrupts are done. Or |
310 | * PHY is in an error state. | |
311 | * | |
312 | * - phy_start moves to RESUMING | |
313 | * | |
314 | * RESUMING: PHY was halted, but now wants to run again. | |
315 | * - If we are forcing, or aneg is done, timer moves to RUNNING | |
316 | * - If aneg is not done, timer moves to AN | |
317 | * - phy_stop moves to HALTED | |
318 | */ | |
319 | enum phy_state { | |
4017b4d3 | 320 | PHY_DOWN = 0, |
00db8189 | 321 | PHY_READY, |
2b3e88ea | 322 | PHY_HALTED, |
00db8189 | 323 | PHY_UP, |
00db8189 AF |
324 | PHY_RUNNING, |
325 | PHY_NOLINK, | |
326 | PHY_FORCING, | |
00db8189 AF |
327 | PHY_RESUMING |
328 | }; | |
329 | ||
ac28b9f8 DD |
330 | /** |
331 | * struct phy_c45_device_ids - 802.3-c45 Device Identifiers | |
332 | * @devices_in_package: Bit vector of devices present. | |
333 | * @device_ids: The device identifer for each present device. | |
334 | */ | |
335 | struct phy_c45_device_ids { | |
336 | u32 devices_in_package; | |
337 | u32 device_ids[8]; | |
338 | }; | |
c1f19b51 | 339 | |
00db8189 AF |
340 | /* phy_device: An instance of a PHY |
341 | * | |
342 | * drv: Pointer to the driver for this PHY instance | |
00db8189 | 343 | * phy_id: UID for this device found during discovery |
ac28b9f8 DD |
344 | * c45_ids: 802.3-c45 Device Identifers if is_c45. |
345 | * is_c45: Set to true if this phy uses clause 45 addressing. | |
4284b6a5 | 346 | * is_internal: Set to true if this phy is internal to a MAC. |
5a11dd7d | 347 | * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc. |
aae88261 | 348 | * has_fixups: Set to true if this phy has fixups/quirks. |
8a477a6f | 349 | * suspended: Set to true if this phy has been suspended successfully. |
a3995460 | 350 | * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. |
f0f9b4ed | 351 | * loopback_enabled: Set true if this phy has been loopbacked successfully. |
00db8189 AF |
352 | * state: state of the PHY for management purposes |
353 | * dev_flags: Device-specific flags used by the PHY driver. | |
00db8189 AF |
354 | * link_timeout: The number of timer firings to wait before the |
355 | * giving up on the current attempt at acquiring a link | |
356 | * irq: IRQ number of the PHY's interrupt (-1 if none) | |
357 | * phy_timer: The timer for handling the state machine | |
00db8189 AF |
358 | * attached_dev: The attached enet driver's device instance ptr |
359 | * adjust_link: Callback for the enet controller to respond to | |
360 | * changes in the link state. | |
00db8189 | 361 | * |
114002bc FF |
362 | * speed, duplex, pause, supported, advertising, lp_advertising, |
363 | * and autoneg are used like in mii_if_info | |
00db8189 AF |
364 | * |
365 | * interrupts currently only supports enabled or disabled, | |
366 | * but could be changed in the future to support enabling | |
367 | * and disabling specific interrupts | |
368 | * | |
369 | * Contains some infrastructure for polling and interrupt | |
370 | * handling, as well as handling shifts in PHY hardware state | |
371 | */ | |
372 | struct phy_device { | |
e5a03bfd AL |
373 | struct mdio_device mdio; |
374 | ||
00db8189 AF |
375 | /* Information about the PHY type */ |
376 | /* And management functions */ | |
377 | struct phy_driver *drv; | |
378 | ||
00db8189 AF |
379 | u32 phy_id; |
380 | ||
ac28b9f8 | 381 | struct phy_c45_device_ids c45_ids; |
87e5808d HK |
382 | unsigned is_c45:1; |
383 | unsigned is_internal:1; | |
384 | unsigned is_pseudo_fixed_link:1; | |
385 | unsigned has_fixups:1; | |
386 | unsigned suspended:1; | |
387 | unsigned sysfs_links:1; | |
388 | unsigned loopback_enabled:1; | |
389 | ||
390 | unsigned autoneg:1; | |
391 | /* The most recently read link state */ | |
392 | unsigned link:1; | |
ac28b9f8 | 393 | |
695bce8f HK |
394 | /* Interrupts are enabled */ |
395 | unsigned interrupts:1; | |
396 | ||
00db8189 AF |
397 | enum phy_state state; |
398 | ||
399 | u32 dev_flags; | |
400 | ||
e8a2b6a4 AF |
401 | phy_interface_t interface; |
402 | ||
c5e38a94 AF |
403 | /* |
404 | * forced speed & duplex (no autoneg) | |
00db8189 AF |
405 | * partner speed & duplex & pause (autoneg) |
406 | */ | |
407 | int speed; | |
408 | int duplex; | |
409 | int pause; | |
410 | int asym_pause; | |
411 | ||
3c1bcc86 AL |
412 | /* Union of PHY and Attached devices' supported link modes */ |
413 | /* See ethtool.h for more info */ | |
414 | __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); | |
415 | __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); | |
c0ec3c27 | 416 | __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); |
00db8189 | 417 | |
d853d145 | 418 | /* Energy efficient ethernet modes which should be prohibited */ |
419 | u32 eee_broken_modes; | |
420 | ||
00db8189 AF |
421 | int link_timeout; |
422 | ||
2e0bc452 ZB |
423 | #ifdef CONFIG_LED_TRIGGER_PHY |
424 | struct phy_led_trigger *phy_led_triggers; | |
425 | unsigned int phy_num_led_triggers; | |
426 | struct phy_led_trigger *last_triggered; | |
3928ee64 MS |
427 | |
428 | struct phy_led_trigger *led_link_trigger; | |
2e0bc452 ZB |
429 | #endif |
430 | ||
c5e38a94 AF |
431 | /* |
432 | * Interrupt number for this PHY | |
433 | * -1 means no interrupt | |
434 | */ | |
00db8189 AF |
435 | int irq; |
436 | ||
437 | /* private data pointer */ | |
438 | /* For use by PHYs to maintain extra state */ | |
439 | void *priv; | |
440 | ||
441 | /* Interrupt and Polling infrastructure */ | |
a390d1f3 | 442 | struct delayed_work state_queue; |
00db8189 | 443 | |
35b5f6b1 | 444 | struct mutex lock; |
00db8189 | 445 | |
9525ae83 | 446 | struct phylink *phylink; |
00db8189 AF |
447 | struct net_device *attached_dev; |
448 | ||
634ec36c | 449 | u8 mdix; |
f4ed2fe3 | 450 | u8 mdix_ctrl; |
634ec36c | 451 | |
a81497be | 452 | void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier); |
00db8189 | 453 | void (*adjust_link)(struct net_device *dev); |
00db8189 | 454 | }; |
e5a03bfd AL |
455 | #define to_phy_device(d) container_of(to_mdio_device(d), \ |
456 | struct phy_device, mdio) | |
00db8189 AF |
457 | |
458 | /* struct phy_driver: Driver structure for a particular PHY type | |
459 | * | |
a9049e0c | 460 | * driver_data: static driver data |
00db8189 AF |
461 | * phy_id: The result of reading the UID registers of this PHY |
462 | * type, and ANDing them with the phy_id_mask. This driver | |
463 | * only works for PHYs with IDs which match this field | |
464 | * name: The friendly name of this PHY type | |
465 | * phy_id_mask: Defines the important bits of the phy_id | |
3e64cf7a CG |
466 | * features: A mandatory list of features (speed, duplex, etc) |
467 | * supported by this PHY | |
00db8189 AF |
468 | * flags: A bitfield defining certain other features this PHY |
469 | * supports (like interrupts) | |
470 | * | |
00fde795 HK |
471 | * All functions are optional. If config_aneg or read_status |
472 | * are not implemented, the phy core uses the genphy versions. | |
473 | * Note that none of these functions should be called from | |
474 | * interrupt time. The goal is for the bus read/write functions | |
475 | * to be able to block when the bus transaction is happening, | |
476 | * and be freed up by an interrupt (The MPC85xx has this ability, | |
477 | * though it is not currently supported in the driver). | |
00db8189 AF |
478 | */ |
479 | struct phy_driver { | |
a9049e0c | 480 | struct mdio_driver_common mdiodrv; |
00db8189 AF |
481 | u32 phy_id; |
482 | char *name; | |
511e3036 | 483 | u32 phy_id_mask; |
719655a1 | 484 | const unsigned long * const features; |
00db8189 | 485 | u32 flags; |
860f6e9e | 486 | const void *driver_data; |
00db8189 | 487 | |
c5e38a94 | 488 | /* |
9df81dd7 FF |
489 | * Called to issue a PHY software reset |
490 | */ | |
491 | int (*soft_reset)(struct phy_device *phydev); | |
492 | ||
493 | /* | |
c5e38a94 AF |
494 | * Called to initialize the PHY, |
495 | * including after a reset | |
496 | */ | |
00db8189 AF |
497 | int (*config_init)(struct phy_device *phydev); |
498 | ||
c5e38a94 AF |
499 | /* |
500 | * Called during discovery. Used to set | |
501 | * up device-specific structures, if any | |
502 | */ | |
00db8189 AF |
503 | int (*probe)(struct phy_device *phydev); |
504 | ||
505 | /* PHY Power Management */ | |
506 | int (*suspend)(struct phy_device *phydev); | |
507 | int (*resume)(struct phy_device *phydev); | |
508 | ||
c5e38a94 AF |
509 | /* |
510 | * Configures the advertisement and resets | |
00db8189 AF |
511 | * autonegotiation if phydev->autoneg is on, |
512 | * forces the speed to the current settings in phydev | |
c5e38a94 AF |
513 | * if phydev->autoneg is off |
514 | */ | |
00db8189 AF |
515 | int (*config_aneg)(struct phy_device *phydev); |
516 | ||
76a423a3 FF |
517 | /* Determines the auto negotiation result */ |
518 | int (*aneg_done)(struct phy_device *phydev); | |
519 | ||
00db8189 AF |
520 | /* Determines the negotiated speed and duplex */ |
521 | int (*read_status)(struct phy_device *phydev); | |
522 | ||
523 | /* Clears any pending interrupts */ | |
524 | int (*ack_interrupt)(struct phy_device *phydev); | |
525 | ||
526 | /* Enables or disables interrupts */ | |
527 | int (*config_intr)(struct phy_device *phydev); | |
528 | ||
a8729eb3 AG |
529 | /* |
530 | * Checks if the PHY generated an interrupt. | |
531 | * For multi-PHY devices with shared PHY interrupt pin | |
532 | */ | |
533 | int (*did_interrupt)(struct phy_device *phydev); | |
534 | ||
00db8189 AF |
535 | /* Clears up any memory if needed */ |
536 | void (*remove)(struct phy_device *phydev); | |
537 | ||
a30e2c18 DD |
538 | /* Returns true if this is a suitable driver for the given |
539 | * phydev. If NULL, matching is based on phy_id and | |
540 | * phy_id_mask. | |
541 | */ | |
542 | int (*match_phy_device)(struct phy_device *phydev); | |
543 | ||
c8f3a8c3 RC |
544 | /* Handles ethtool queries for hardware time stamping. */ |
545 | int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti); | |
546 | ||
c1f19b51 RC |
547 | /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */ |
548 | int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr); | |
549 | ||
550 | /* | |
551 | * Requests a Rx timestamp for 'skb'. If the skb is accepted, | |
552 | * the phy driver promises to deliver it using netif_rx() as | |
553 | * soon as a timestamp becomes available. One of the | |
554 | * PTP_CLASS_ values is passed in 'type'. The function must | |
555 | * return true if the skb is accepted for delivery. | |
556 | */ | |
557 | bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); | |
558 | ||
559 | /* | |
560 | * Requests a Tx timestamp for 'skb'. The phy driver promises | |
da92b194 | 561 | * to deliver it using skb_complete_tx_timestamp() as soon as a |
c1f19b51 RC |
562 | * timestamp becomes available. One of the PTP_CLASS_ values |
563 | * is passed in 'type'. | |
564 | */ | |
565 | void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); | |
566 | ||
42e836eb MS |
567 | /* Some devices (e.g. qnap TS-119P II) require PHY register changes to |
568 | * enable Wake on LAN, so set_wol is provided to be called in the | |
569 | * ethernet driver's set_wol function. */ | |
570 | int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); | |
571 | ||
572 | /* See set_wol, but for checking whether Wake on LAN is enabled. */ | |
573 | void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); | |
574 | ||
2b8f2a28 DM |
575 | /* |
576 | * Called to inform a PHY device driver when the core is about to | |
577 | * change the link state. This callback is supposed to be used as | |
578 | * fixup hook for drivers that need to take action when the link | |
579 | * state changes. Drivers are by no means allowed to mess with the | |
580 | * PHY device structure in their implementations. | |
581 | */ | |
582 | void (*link_change_notify)(struct phy_device *dev); | |
583 | ||
1ee6b9bc RK |
584 | /* |
585 | * Phy specific driver override for reading a MMD register. | |
586 | * This function is optional for PHY specific drivers. When | |
587 | * not provided, the default MMD read function will be used | |
588 | * by phy_read_mmd(), which will use either a direct read for | |
589 | * Clause 45 PHYs or an indirect read for Clause 22 PHYs. | |
590 | * devnum is the MMD device number within the PHY device, | |
591 | * regnum is the register within the selected MMD device. | |
592 | */ | |
593 | int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); | |
594 | ||
595 | /* | |
596 | * Phy specific driver override for writing a MMD register. | |
597 | * This function is optional for PHY specific drivers. When | |
598 | * not provided, the default MMD write function will be used | |
599 | * by phy_write_mmd(), which will use either a direct write for | |
600 | * Clause 45 PHYs, or an indirect write for Clause 22 PHYs. | |
601 | * devnum is the MMD device number within the PHY device, | |
602 | * regnum is the register within the selected MMD device. | |
603 | * val is the value to be written. | |
604 | */ | |
605 | int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, | |
606 | u16 val); | |
607 | ||
78ffc4ac RK |
608 | int (*read_page)(struct phy_device *dev); |
609 | int (*write_page)(struct phy_device *dev, int page); | |
610 | ||
2f438366 ES |
611 | /* Get the size and type of the eeprom contained within a plug-in |
612 | * module */ | |
613 | int (*module_info)(struct phy_device *dev, | |
614 | struct ethtool_modinfo *modinfo); | |
615 | ||
616 | /* Get the eeprom information from the plug-in module */ | |
617 | int (*module_eeprom)(struct phy_device *dev, | |
618 | struct ethtool_eeprom *ee, u8 *data); | |
619 | ||
f3a40945 AL |
620 | /* Get statistics from the phy using ethtool */ |
621 | int (*get_sset_count)(struct phy_device *dev); | |
622 | void (*get_strings)(struct phy_device *dev, u8 *data); | |
623 | void (*get_stats)(struct phy_device *dev, | |
624 | struct ethtool_stats *stats, u64 *data); | |
968ad9da RL |
625 | |
626 | /* Get and Set PHY tunables */ | |
627 | int (*get_tunable)(struct phy_device *dev, | |
628 | struct ethtool_tunable *tuna, void *data); | |
629 | int (*set_tunable)(struct phy_device *dev, | |
630 | struct ethtool_tunable *tuna, | |
631 | const void *data); | |
f0f9b4ed | 632 | int (*set_loopback)(struct phy_device *dev, bool enable); |
00db8189 | 633 | }; |
a9049e0c AL |
634 | #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ |
635 | struct phy_driver, mdiodrv) | |
00db8189 | 636 | |
f62220d3 AF |
637 | #define PHY_ANY_ID "MATCH ANY PHY" |
638 | #define PHY_ANY_UID 0xffffffff | |
639 | ||
aa2af2eb HK |
640 | #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) |
641 | #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) | |
642 | #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) | |
643 | ||
f62220d3 AF |
644 | /* A Structure for boards to register fixups with the PHY Lib */ |
645 | struct phy_fixup { | |
646 | struct list_head list; | |
4567d686 | 647 | char bus_id[MII_BUS_ID_SIZE + 3]; |
f62220d3 AF |
648 | u32 phy_uid; |
649 | u32 phy_uid_mask; | |
650 | int (*run)(struct phy_device *phydev); | |
651 | }; | |
652 | ||
da4625ac RK |
653 | const char *phy_speed_to_str(int speed); |
654 | const char *phy_duplex_to_str(unsigned int duplex); | |
655 | ||
0ccb4fc6 RK |
656 | /* A structure for mapping a particular speed and duplex |
657 | * combination to a particular SUPPORTED and ADVERTISED value | |
658 | */ | |
659 | struct phy_setting { | |
660 | u32 speed; | |
661 | u8 duplex; | |
662 | u8 bit; | |
663 | }; | |
664 | ||
665 | const struct phy_setting * | |
666 | phy_lookup_setting(int speed, int duplex, const unsigned long *mask, | |
3c1bcc86 | 667 | bool exact); |
0ccb4fc6 | 668 | size_t phy_speeds(unsigned int *speeds, size_t size, |
3c1bcc86 | 669 | unsigned long *mask); |
0ccb4fc6 | 670 | |
2b3e88ea HK |
671 | static inline bool __phy_is_started(struct phy_device *phydev) |
672 | { | |
673 | WARN_ON(!mutex_is_locked(&phydev->lock)); | |
674 | ||
675 | return phydev->state >= PHY_UP; | |
676 | } | |
677 | ||
678 | /** | |
679 | * phy_is_started - Convenience function to check whether PHY is started | |
680 | * @phydev: The phy_device struct | |
681 | */ | |
682 | static inline bool phy_is_started(struct phy_device *phydev) | |
683 | { | |
684 | bool started; | |
685 | ||
686 | mutex_lock(&phydev->lock); | |
687 | started = __phy_is_started(phydev); | |
688 | mutex_unlock(&phydev->lock); | |
689 | ||
690 | return started; | |
691 | } | |
692 | ||
8c5e850c RK |
693 | void phy_resolve_aneg_linkmode(struct phy_device *phydev); |
694 | ||
2e888103 LB |
695 | /** |
696 | * phy_read - Convenience function for reading a given PHY register | |
697 | * @phydev: the phy_device struct | |
698 | * @regnum: register number to read | |
699 | * | |
700 | * NOTE: MUST NOT be called from interrupt context, | |
701 | * because the bus read/write functions may wait for an interrupt | |
702 | * to conclude the operation. | |
703 | */ | |
abf35df2 | 704 | static inline int phy_read(struct phy_device *phydev, u32 regnum) |
2e888103 | 705 | { |
e5a03bfd | 706 | return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); |
2e888103 LB |
707 | } |
708 | ||
788f9933 RK |
709 | /** |
710 | * __phy_read - convenience function for reading a given PHY register | |
711 | * @phydev: the phy_device struct | |
712 | * @regnum: register number to read | |
713 | * | |
714 | * The caller must have taken the MDIO bus lock. | |
715 | */ | |
716 | static inline int __phy_read(struct phy_device *phydev, u32 regnum) | |
717 | { | |
718 | return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); | |
719 | } | |
720 | ||
2e888103 LB |
721 | /** |
722 | * phy_write - Convenience function for writing a given PHY register | |
723 | * @phydev: the phy_device struct | |
724 | * @regnum: register number to write | |
725 | * @val: value to write to @regnum | |
726 | * | |
727 | * NOTE: MUST NOT be called from interrupt context, | |
728 | * because the bus read/write functions may wait for an interrupt | |
729 | * to conclude the operation. | |
730 | */ | |
abf35df2 | 731 | static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) |
2e888103 | 732 | { |
e5a03bfd | 733 | return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); |
2e888103 LB |
734 | } |
735 | ||
788f9933 RK |
736 | /** |
737 | * __phy_write - Convenience function for writing a given PHY register | |
738 | * @phydev: the phy_device struct | |
739 | * @regnum: register number to write | |
740 | * @val: value to write to @regnum | |
741 | * | |
742 | * The caller must have taken the MDIO bus lock. | |
743 | */ | |
744 | static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) | |
745 | { | |
746 | return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, | |
747 | val); | |
748 | } | |
749 | ||
1878f0dc NY |
750 | /** |
751 | * phy_read_mmd - Convenience function for reading a register | |
752 | * from an MMD on a given PHY. | |
753 | * @phydev: The phy_device struct | |
754 | * @devad: The MMD to read from | |
755 | * @regnum: The register on the MMD to read | |
756 | * | |
757 | * Same rules as for phy_read(); | |
758 | */ | |
759 | int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); | |
760 | ||
761 | /** | |
762 | * __phy_read_mmd - Convenience function for reading a register | |
763 | * from an MMD on a given PHY. | |
764 | * @phydev: The phy_device struct | |
765 | * @devad: The MMD to read from | |
766 | * @regnum: The register on the MMD to read | |
767 | * | |
768 | * Same rules as for __phy_read(); | |
769 | */ | |
770 | int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); | |
771 | ||
772 | /** | |
773 | * phy_write_mmd - Convenience function for writing a register | |
774 | * on an MMD on a given PHY. | |
775 | * @phydev: The phy_device struct | |
776 | * @devad: The MMD to write to | |
777 | * @regnum: The register on the MMD to read | |
778 | * @val: value to write to @regnum | |
779 | * | |
780 | * Same rules as for phy_write(); | |
781 | */ | |
782 | int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); | |
783 | ||
784 | /** | |
785 | * __phy_write_mmd - Convenience function for writing a register | |
786 | * on an MMD on a given PHY. | |
787 | * @phydev: The phy_device struct | |
788 | * @devad: The MMD to write to | |
789 | * @regnum: The register on the MMD to read | |
790 | * @val: value to write to @regnum | |
791 | * | |
792 | * Same rules as for __phy_write(); | |
793 | */ | |
794 | int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); | |
795 | ||
788f9933 | 796 | int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); |
2b74e5be | 797 | int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); |
788f9933 | 798 | |
1878f0dc NY |
799 | int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, |
800 | u16 mask, u16 set); | |
801 | int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, | |
802 | u16 mask, u16 set); | |
803 | ||
ac8322d8 HK |
804 | /** |
805 | * __phy_set_bits - Convenience function for setting bits in a PHY register | |
806 | * @phydev: the phy_device struct | |
807 | * @regnum: register number to write | |
808 | * @val: bits to set | |
809 | * | |
810 | * The caller must have taken the MDIO bus lock. | |
811 | */ | |
812 | static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) | |
813 | { | |
814 | return __phy_modify(phydev, regnum, 0, val); | |
815 | } | |
816 | ||
817 | /** | |
818 | * __phy_clear_bits - Convenience function for clearing bits in a PHY register | |
819 | * @phydev: the phy_device struct | |
820 | * @regnum: register number to write | |
821 | * @val: bits to clear | |
822 | * | |
823 | * The caller must have taken the MDIO bus lock. | |
824 | */ | |
825 | static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, | |
826 | u16 val) | |
827 | { | |
828 | return __phy_modify(phydev, regnum, val, 0); | |
829 | } | |
830 | ||
831 | /** | |
832 | * phy_set_bits - Convenience function for setting bits in a PHY register | |
833 | * @phydev: the phy_device struct | |
834 | * @regnum: register number to write | |
835 | * @val: bits to set | |
836 | */ | |
837 | static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) | |
838 | { | |
839 | return phy_modify(phydev, regnum, 0, val); | |
840 | } | |
841 | ||
842 | /** | |
843 | * phy_clear_bits - Convenience function for clearing bits in a PHY register | |
844 | * @phydev: the phy_device struct | |
845 | * @regnum: register number to write | |
846 | * @val: bits to clear | |
847 | */ | |
848 | static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) | |
849 | { | |
850 | return phy_modify(phydev, regnum, val, 0); | |
851 | } | |
852 | ||
1878f0dc NY |
853 | /** |
854 | * __phy_set_bits_mmd - Convenience function for setting bits in a register | |
855 | * on MMD | |
856 | * @phydev: the phy_device struct | |
857 | * @devad: the MMD containing register to modify | |
858 | * @regnum: register number to modify | |
859 | * @val: bits to set | |
860 | * | |
861 | * The caller must have taken the MDIO bus lock. | |
862 | */ | |
863 | static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, | |
864 | u32 regnum, u16 val) | |
865 | { | |
866 | return __phy_modify_mmd(phydev, devad, regnum, 0, val); | |
867 | } | |
868 | ||
869 | /** | |
870 | * __phy_clear_bits_mmd - Convenience function for clearing bits in a register | |
871 | * on MMD | |
872 | * @phydev: the phy_device struct | |
873 | * @devad: the MMD containing register to modify | |
874 | * @regnum: register number to modify | |
875 | * @val: bits to clear | |
876 | * | |
877 | * The caller must have taken the MDIO bus lock. | |
878 | */ | |
879 | static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, | |
880 | u32 regnum, u16 val) | |
881 | { | |
882 | return __phy_modify_mmd(phydev, devad, regnum, val, 0); | |
883 | } | |
884 | ||
885 | /** | |
886 | * phy_set_bits_mmd - Convenience function for setting bits in a register | |
887 | * on MMD | |
888 | * @phydev: the phy_device struct | |
889 | * @devad: the MMD containing register to modify | |
890 | * @regnum: register number to modify | |
891 | * @val: bits to set | |
892 | */ | |
893 | static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, | |
894 | u32 regnum, u16 val) | |
895 | { | |
896 | return phy_modify_mmd(phydev, devad, regnum, 0, val); | |
897 | } | |
898 | ||
899 | /** | |
900 | * phy_clear_bits_mmd - Convenience function for clearing bits in a register | |
901 | * on MMD | |
902 | * @phydev: the phy_device struct | |
903 | * @devad: the MMD containing register to modify | |
904 | * @regnum: register number to modify | |
905 | * @val: bits to clear | |
906 | */ | |
907 | static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, | |
908 | u32 regnum, u16 val) | |
909 | { | |
910 | return phy_modify_mmd(phydev, devad, regnum, val, 0); | |
911 | } | |
912 | ||
2c7b4921 FF |
913 | /** |
914 | * phy_interrupt_is_valid - Convenience function for testing a given PHY irq | |
915 | * @phydev: the phy_device struct | |
916 | * | |
917 | * NOTE: must be kept in sync with addition/removal of PHY_POLL and | |
918 | * PHY_IGNORE_INTERRUPT | |
919 | */ | |
920 | static inline bool phy_interrupt_is_valid(struct phy_device *phydev) | |
921 | { | |
922 | return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT; | |
923 | } | |
924 | ||
3c507b8a HK |
925 | /** |
926 | * phy_polling_mode - Convenience function for testing whether polling is | |
927 | * used to detect PHY status changes | |
928 | * @phydev: the phy_device struct | |
929 | */ | |
930 | static inline bool phy_polling_mode(struct phy_device *phydev) | |
931 | { | |
932 | return phydev->irq == PHY_POLL; | |
933 | } | |
934 | ||
4284b6a5 FF |
935 | /** |
936 | * phy_is_internal - Convenience function for testing if a PHY is internal | |
937 | * @phydev: the phy_device struct | |
938 | */ | |
939 | static inline bool phy_is_internal(struct phy_device *phydev) | |
940 | { | |
941 | return phydev->is_internal; | |
942 | } | |
943 | ||
32d0f783 IS |
944 | /** |
945 | * phy_interface_mode_is_rgmii - Convenience function for testing if a | |
946 | * PHY interface mode is RGMII (all variants) | |
947 | * @mode: the phy_interface_t enum | |
948 | */ | |
949 | static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) | |
950 | { | |
951 | return mode >= PHY_INTERFACE_MODE_RGMII && | |
952 | mode <= PHY_INTERFACE_MODE_RGMII_TXID; | |
953 | }; | |
954 | ||
365c1e64 RK |
955 | /** |
956 | * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z | |
957 | * negotiation | |
958 | * @mode: one of &enum phy_interface_t | |
959 | * | |
960 | * Returns true if the phy interface mode uses the 16-bit negotiation | |
961 | * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) | |
962 | */ | |
963 | static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) | |
964 | { | |
965 | return mode == PHY_INTERFACE_MODE_1000BASEX || | |
966 | mode == PHY_INTERFACE_MODE_2500BASEX; | |
967 | } | |
968 | ||
e463d88c FF |
969 | /** |
970 | * phy_interface_is_rgmii - Convenience function for testing if a PHY interface | |
971 | * is RGMII (all variants) | |
972 | * @phydev: the phy_device struct | |
973 | */ | |
974 | static inline bool phy_interface_is_rgmii(struct phy_device *phydev) | |
975 | { | |
32d0f783 | 976 | return phy_interface_mode_is_rgmii(phydev->interface); |
5a11dd7d FF |
977 | }; |
978 | ||
979 | /* | |
980 | * phy_is_pseudo_fixed_link - Convenience function for testing if this | |
981 | * PHY is the CPU port facing side of an Ethernet switch, or similar. | |
982 | * @phydev: the phy_device struct | |
983 | */ | |
984 | static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) | |
985 | { | |
986 | return phydev->is_pseudo_fixed_link; | |
e463d88c FF |
987 | } |
988 | ||
78ffc4ac RK |
989 | int phy_save_page(struct phy_device *phydev); |
990 | int phy_select_page(struct phy_device *phydev, int page); | |
991 | int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); | |
992 | int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); | |
993 | int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); | |
994 | int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, | |
995 | u16 mask, u16 set); | |
996 | ||
ac28b9f8 | 997 | struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id, |
4017b4d3 SS |
998 | bool is_c45, |
999 | struct phy_c45_device_ids *c45_ids); | |
90eff909 | 1000 | #if IS_ENABLED(CONFIG_PHYLIB) |
ac28b9f8 | 1001 | struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); |
4dea547f | 1002 | int phy_device_register(struct phy_device *phy); |
90eff909 FF |
1003 | void phy_device_free(struct phy_device *phydev); |
1004 | #else | |
1005 | static inline | |
1006 | struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) | |
1007 | { | |
1008 | return NULL; | |
1009 | } | |
1010 | ||
1011 | static inline int phy_device_register(struct phy_device *phy) | |
1012 | { | |
1013 | return 0; | |
1014 | } | |
1015 | ||
1016 | static inline void phy_device_free(struct phy_device *phydev) { } | |
1017 | #endif /* CONFIG_PHYLIB */ | |
38737e49 | 1018 | void phy_device_remove(struct phy_device *phydev); |
2f5cb434 | 1019 | int phy_init_hw(struct phy_device *phydev); |
481b5d93 SH |
1020 | int phy_suspend(struct phy_device *phydev); |
1021 | int phy_resume(struct phy_device *phydev); | |
9c2c2e62 | 1022 | int __phy_resume(struct phy_device *phydev); |
f0f9b4ed | 1023 | int phy_loopback(struct phy_device *phydev, bool enable); |
4017b4d3 SS |
1024 | struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, |
1025 | phy_interface_t interface); | |
f8f76db1 | 1026 | struct phy_device *phy_find_first(struct mii_bus *bus); |
257184d7 AF |
1027 | int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, |
1028 | u32 flags, phy_interface_t interface); | |
fa94f6d9 | 1029 | int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, |
4017b4d3 SS |
1030 | void (*handler)(struct net_device *), |
1031 | phy_interface_t interface); | |
1032 | struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, | |
1033 | void (*handler)(struct net_device *), | |
1034 | phy_interface_t interface); | |
e1393456 AF |
1035 | void phy_disconnect(struct phy_device *phydev); |
1036 | void phy_detach(struct phy_device *phydev); | |
1037 | void phy_start(struct phy_device *phydev); | |
1038 | void phy_stop(struct phy_device *phydev); | |
1039 | int phy_start_aneg(struct phy_device *phydev); | |
372788f9 | 1040 | int phy_aneg_done(struct phy_device *phydev); |
2b9672dd HK |
1041 | int phy_speed_down(struct phy_device *phydev, bool sync); |
1042 | int phy_speed_up(struct phy_device *phydev); | |
e1393456 | 1043 | |
002ba705 | 1044 | int phy_restart_aneg(struct phy_device *phydev); |
a9668491 | 1045 | int phy_reset_after_clk_enable(struct phy_device *phydev); |
00db8189 | 1046 | |
bafbdd52 SS |
1047 | static inline void phy_device_reset(struct phy_device *phydev, int value) |
1048 | { | |
1049 | mdio_device_reset(&phydev->mdio, value); | |
1050 | } | |
1051 | ||
72ba48be | 1052 | #define phydev_err(_phydev, format, args...) \ |
e5a03bfd | 1053 | dev_err(&_phydev->mdio.dev, format, ##args) |
72ba48be | 1054 | |
c4fabb8b AL |
1055 | #define phydev_info(_phydev, format, args...) \ |
1056 | dev_info(&_phydev->mdio.dev, format, ##args) | |
1057 | ||
ab2a605f AL |
1058 | #define phydev_warn(_phydev, format, args...) \ |
1059 | dev_warn(&_phydev->mdio.dev, format, ##args) | |
1060 | ||
72ba48be | 1061 | #define phydev_dbg(_phydev, format, args...) \ |
2eaa38d9 | 1062 | dev_dbg(&_phydev->mdio.dev, format, ##args) |
72ba48be | 1063 | |
84eff6d1 AL |
1064 | static inline const char *phydev_name(const struct phy_device *phydev) |
1065 | { | |
e5a03bfd | 1066 | return dev_name(&phydev->mdio.dev); |
84eff6d1 AL |
1067 | } |
1068 | ||
2220943a AL |
1069 | void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) |
1070 | __printf(2, 3); | |
1071 | void phy_attached_info(struct phy_device *phydev); | |
5acde34a RK |
1072 | |
1073 | /* Clause 22 PHY */ | |
af6b6967 | 1074 | int genphy_config_init(struct phy_device *phydev); |
3fb69bca | 1075 | int genphy_setup_forced(struct phy_device *phydev); |
00db8189 AF |
1076 | int genphy_restart_aneg(struct phy_device *phydev); |
1077 | int genphy_config_aneg(struct phy_device *phydev); | |
a9fa6e6a | 1078 | int genphy_aneg_done(struct phy_device *phydev); |
00db8189 AF |
1079 | int genphy_update_link(struct phy_device *phydev); |
1080 | int genphy_read_status(struct phy_device *phydev); | |
0f0ca340 GC |
1081 | int genphy_suspend(struct phy_device *phydev); |
1082 | int genphy_resume(struct phy_device *phydev); | |
f0f9b4ed | 1083 | int genphy_loopback(struct phy_device *phydev, bool enable); |
797ac071 | 1084 | int genphy_soft_reset(struct phy_device *phydev); |
0878fff1 FF |
1085 | static inline int genphy_no_soft_reset(struct phy_device *phydev) |
1086 | { | |
1087 | return 0; | |
1088 | } | |
5df7af85 KH |
1089 | int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, |
1090 | u16 regnum); | |
1091 | int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, | |
1092 | u16 regnum, u16 val); | |
5acde34a RK |
1093 | |
1094 | /* Clause 45 PHY */ | |
1095 | int genphy_c45_restart_aneg(struct phy_device *phydev); | |
1096 | int genphy_c45_aneg_done(struct phy_device *phydev); | |
1097 | int genphy_c45_read_link(struct phy_device *phydev, u32 mmd_mask); | |
1098 | int genphy_c45_read_lpa(struct phy_device *phydev); | |
1099 | int genphy_c45_read_pma(struct phy_device *phydev); | |
1100 | int genphy_c45_pma_setup_forced(struct phy_device *phydev); | |
1101 | int genphy_c45_an_disable_aneg(struct phy_device *phydev); | |
ea4efe25 | 1102 | int genphy_c45_read_mdix(struct phy_device *phydev); |
5acde34a | 1103 | |
e8a714e0 FF |
1104 | /* The gen10g_* functions are the old Clause 45 stub */ |
1105 | int gen10g_config_aneg(struct phy_device *phydev); | |
1106 | int gen10g_read_status(struct phy_device *phydev); | |
1107 | int gen10g_no_soft_reset(struct phy_device *phydev); | |
1108 | int gen10g_config_init(struct phy_device *phydev); | |
1109 | int gen10g_suspend(struct phy_device *phydev); | |
1110 | int gen10g_resume(struct phy_device *phydev); | |
1111 | ||
00fde795 HK |
1112 | static inline int phy_read_status(struct phy_device *phydev) |
1113 | { | |
1114 | if (!phydev->drv) | |
1115 | return -EIO; | |
1116 | ||
1117 | if (phydev->drv->read_status) | |
1118 | return phydev->drv->read_status(phydev); | |
1119 | else | |
1120 | return genphy_read_status(phydev); | |
1121 | } | |
1122 | ||
00db8189 | 1123 | void phy_driver_unregister(struct phy_driver *drv); |
d5bf9071 | 1124 | void phy_drivers_unregister(struct phy_driver *drv, int n); |
be01da72 AL |
1125 | int phy_driver_register(struct phy_driver *new_driver, struct module *owner); |
1126 | int phy_drivers_register(struct phy_driver *new_driver, int n, | |
1127 | struct module *owner); | |
4f9c85a1 | 1128 | void phy_state_machine(struct work_struct *work); |
28b2e0d2 | 1129 | void phy_mac_interrupt(struct phy_device *phydev); |
29935aeb | 1130 | void phy_start_machine(struct phy_device *phydev); |
00db8189 AF |
1131 | void phy_stop_machine(struct phy_device *phydev); |
1132 | int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd); | |
5514174f | 1133 | void phy_ethtool_ksettings_get(struct phy_device *phydev, |
1134 | struct ethtool_link_ksettings *cmd); | |
2d55173e PR |
1135 | int phy_ethtool_ksettings_set(struct phy_device *phydev, |
1136 | const struct ethtool_link_ksettings *cmd); | |
4017b4d3 | 1137 | int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); |
434a4315 | 1138 | void phy_request_interrupt(struct phy_device *phydev); |
e1393456 | 1139 | void phy_print_status(struct phy_device *phydev); |
f3a6bd39 | 1140 | int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); |
41124fa6 | 1141 | void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); |
c306ad36 | 1142 | void phy_support_sym_pause(struct phy_device *phydev); |
af8d9bb2 | 1143 | void phy_support_asym_pause(struct phy_device *phydev); |
0c122405 AL |
1144 | void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, |
1145 | bool autoneg); | |
70814e81 | 1146 | void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); |
22b7d299 AL |
1147 | bool phy_validate_pause(struct phy_device *phydev, |
1148 | struct ethtool_pauseparam *pp); | |
00db8189 | 1149 | |
f62220d3 | 1150 | int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, |
4017b4d3 | 1151 | int (*run)(struct phy_device *)); |
f62220d3 | 1152 | int phy_register_fixup_for_id(const char *bus_id, |
4017b4d3 | 1153 | int (*run)(struct phy_device *)); |
f62220d3 | 1154 | int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, |
4017b4d3 | 1155 | int (*run)(struct phy_device *)); |
f62220d3 | 1156 | |
f38e7a32 WH |
1157 | int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); |
1158 | int phy_unregister_fixup_for_id(const char *bus_id); | |
1159 | int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); | |
1160 | ||
a59a4d19 GC |
1161 | int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); |
1162 | int phy_get_eee_err(struct phy_device *phydev); | |
1163 | int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); | |
1164 | int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); | |
42e836eb | 1165 | int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); |
4017b4d3 SS |
1166 | void phy_ethtool_get_wol(struct phy_device *phydev, |
1167 | struct ethtool_wolinfo *wol); | |
9d9a77ce PR |
1168 | int phy_ethtool_get_link_ksettings(struct net_device *ndev, |
1169 | struct ethtool_link_ksettings *cmd); | |
1170 | int phy_ethtool_set_link_ksettings(struct net_device *ndev, | |
1171 | const struct ethtool_link_ksettings *cmd); | |
e86a8987 | 1172 | int phy_ethtool_nway_reset(struct net_device *ndev); |
a59a4d19 | 1173 | |
90eff909 | 1174 | #if IS_ENABLED(CONFIG_PHYLIB) |
9b9a8bfc AF |
1175 | int __init mdio_bus_init(void); |
1176 | void mdio_bus_exit(void); | |
9e8d438e FF |
1177 | #endif |
1178 | ||
1179 | /* Inline function for use within net/core/ethtool.c (built-in) */ | |
1180 | static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data) | |
c59530d0 | 1181 | { |
9e8d438e FF |
1182 | if (!phydev->drv) |
1183 | return -EIO; | |
1184 | ||
1185 | mutex_lock(&phydev->lock); | |
1186 | phydev->drv->get_strings(phydev, data); | |
1187 | mutex_unlock(&phydev->lock); | |
1188 | ||
1189 | return 0; | |
c59530d0 FF |
1190 | } |
1191 | ||
9e8d438e | 1192 | static inline int phy_ethtool_get_sset_count(struct phy_device *phydev) |
c59530d0 | 1193 | { |
9e8d438e FF |
1194 | int ret; |
1195 | ||
1196 | if (!phydev->drv) | |
1197 | return -EIO; | |
1198 | ||
1199 | if (phydev->drv->get_sset_count && | |
1200 | phydev->drv->get_strings && | |
1201 | phydev->drv->get_stats) { | |
1202 | mutex_lock(&phydev->lock); | |
1203 | ret = phydev->drv->get_sset_count(phydev); | |
1204 | mutex_unlock(&phydev->lock); | |
1205 | ||
1206 | return ret; | |
1207 | } | |
1208 | ||
c59530d0 FF |
1209 | return -EOPNOTSUPP; |
1210 | } | |
1211 | ||
9e8d438e FF |
1212 | static inline int phy_ethtool_get_stats(struct phy_device *phydev, |
1213 | struct ethtool_stats *stats, u64 *data) | |
c59530d0 | 1214 | { |
9e8d438e FF |
1215 | if (!phydev->drv) |
1216 | return -EIO; | |
1217 | ||
1218 | mutex_lock(&phydev->lock); | |
1219 | phydev->drv->get_stats(phydev, stats, data); | |
1220 | mutex_unlock(&phydev->lock); | |
1221 | ||
1222 | return 0; | |
c59530d0 | 1223 | } |
9b9a8bfc | 1224 | |
00db8189 | 1225 | extern struct bus_type mdio_bus_type; |
c31accd1 | 1226 | |
648ea013 FF |
1227 | struct mdio_board_info { |
1228 | const char *bus_id; | |
1229 | char modalias[MDIO_NAME_SIZE]; | |
1230 | int mdio_addr; | |
1231 | const void *platform_data; | |
1232 | }; | |
1233 | ||
90eff909 | 1234 | #if IS_ENABLED(CONFIG_MDIO_DEVICE) |
648ea013 FF |
1235 | int mdiobus_register_board_info(const struct mdio_board_info *info, |
1236 | unsigned int n); | |
1237 | #else | |
1238 | static inline int mdiobus_register_board_info(const struct mdio_board_info *i, | |
1239 | unsigned int n) | |
1240 | { | |
1241 | return 0; | |
1242 | } | |
1243 | #endif | |
1244 | ||
1245 | ||
c31accd1 JH |
1246 | /** |
1247 | * module_phy_driver() - Helper macro for registering PHY drivers | |
1248 | * @__phy_drivers: array of PHY drivers to register | |
1249 | * | |
1250 | * Helper macro for PHY drivers which do not do anything special in module | |
1251 | * init/exit. Each module may only use this macro once, and calling it | |
1252 | * replaces module_init() and module_exit(). | |
1253 | */ | |
1254 | #define phy_module_driver(__phy_drivers, __count) \ | |
1255 | static int __init phy_module_init(void) \ | |
1256 | { \ | |
be01da72 | 1257 | return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ |
c31accd1 JH |
1258 | } \ |
1259 | module_init(phy_module_init); \ | |
1260 | static void __exit phy_module_exit(void) \ | |
1261 | { \ | |
1262 | phy_drivers_unregister(__phy_drivers, __count); \ | |
1263 | } \ | |
1264 | module_exit(phy_module_exit) | |
1265 | ||
1266 | #define module_phy_driver(__phy_drivers) \ | |
1267 | phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) | |
1268 | ||
5db5ea99 FF |
1269 | bool phy_driver_is_genphy(struct phy_device *phydev); |
1270 | bool phy_driver_is_genphy_10g(struct phy_device *phydev); | |
1271 | ||
00db8189 | 1272 | #endif /* __PHY_H */ |