Merge branch 'dsa-Split-platform-data-to-header-file'
[linux-block.git] / include / linux / phy.h
CommitLineData
00db8189 1/*
00db8189 2 * Framework and drivers for configuring and reading different PHYs
d8de01b7 3 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
00db8189
AF
4 *
5 * Author: Andy Fleming
6 *
7 * Copyright (c) 2004 Freescale Semiconductor, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#ifndef __PHY_H
17#define __PHY_H
18
2220943a 19#include <linux/compiler.h>
00db8189 20#include <linux/spinlock.h>
13df29f6 21#include <linux/ethtool.h>
b31cdffa 22#include <linux/linkmode.h>
bac83c65 23#include <linux/mdio.h>
13df29f6 24#include <linux/mii.h>
3e3aaf64 25#include <linux/module.h>
13df29f6
MR
26#include <linux/timer.h>
27#include <linux/workqueue.h>
8626d3b4 28#include <linux/mod_devicetable.h>
00db8189 29
60063497 30#include <linux/atomic.h>
0ac49527 31
e9fbdf17 32#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
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33 SUPPORTED_TP | \
34 SUPPORTED_MII)
35
e9fbdf17
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36#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
37 SUPPORTED_10baseT_Full)
38
39#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
40 SUPPORTED_100baseT_Full)
41
42#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
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43 SUPPORTED_1000baseT_Full)
44
719655a1
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45extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
46extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
47extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
48extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
49extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
50extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
51extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
52
53#define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
54#define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
55#define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
56#define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
57#define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
58#define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
59#define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
e9fbdf17 60
3c1bcc86
AL
61extern const int phy_10_100_features_array[4];
62extern const int phy_basic_t1_features_array[2];
63extern const int phy_gbit_features_array[2];
64extern const int phy_10gbit_features_array[1];
65
c5e38a94
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66/*
67 * Set phydev->irq to PHY_POLL if interrupts are not supported,
00db8189
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68 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
69 * the attached driver handles the interrupt
70 */
71#define PHY_POLL -1
72#define PHY_IGNORE_INTERRUPT -2
73
a4307c0e
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74#define PHY_IS_INTERNAL 0x00000001
75#define PHY_RST_AFTER_CLK_EN 0x00000002
a9049e0c 76#define MDIO_DEVICE_IS_PHY 0x80000000
00db8189 77
e8a2b6a4
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78/* Interface Mode definitions */
79typedef enum {
4157ef1b 80 PHY_INTERFACE_MODE_NA,
735d8a18 81 PHY_INTERFACE_MODE_INTERNAL,
e8a2b6a4
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82 PHY_INTERFACE_MODE_MII,
83 PHY_INTERFACE_MODE_GMII,
84 PHY_INTERFACE_MODE_SGMII,
85 PHY_INTERFACE_MODE_TBI,
2cc70ba4 86 PHY_INTERFACE_MODE_REVMII,
e8a2b6a4
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87 PHY_INTERFACE_MODE_RMII,
88 PHY_INTERFACE_MODE_RGMII,
a999589c 89 PHY_INTERFACE_MODE_RGMII_ID,
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90 PHY_INTERFACE_MODE_RGMII_RXID,
91 PHY_INTERFACE_MODE_RGMII_TXID,
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92 PHY_INTERFACE_MODE_RTBI,
93 PHY_INTERFACE_MODE_SMII,
898dd0bd 94 PHY_INTERFACE_MODE_XGMII,
fd70f72c 95 PHY_INTERFACE_MODE_MOCA,
b9d12085 96 PHY_INTERFACE_MODE_QSGMII,
572de608 97 PHY_INTERFACE_MODE_TRGMII,
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98 PHY_INTERFACE_MODE_1000BASEX,
99 PHY_INTERFACE_MODE_2500BASEX,
100 PHY_INTERFACE_MODE_RXAUI,
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101 PHY_INTERFACE_MODE_XAUI,
102 /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */
103 PHY_INTERFACE_MODE_10GKR,
8a2fe56e 104 PHY_INTERFACE_MODE_MAX,
e8a2b6a4
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105} phy_interface_t;
106
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107/**
108 * phy_supported_speeds - return all speeds currently supported by a phy device
109 * @phy: The phy device to return supported speeds of.
110 * @speeds: buffer to store supported speeds in.
111 * @size: size of speeds buffer.
112 *
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113 * Description: Returns the number of supported speeds, and fills
114 * the speeds buffer with the supported speeds. If speeds buffer is
115 * too small to contain all currently supported speeds, will return as
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116 * many speeds as can fit.
117 */
118unsigned int phy_supported_speeds(struct phy_device *phy,
119 unsigned int *speeds,
120 unsigned int size);
121
8a2fe56e 122/**
d8de01b7
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123 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
124 * @interface: enum phy_interface_t value
125 *
126 * Description: maps 'enum phy_interface_t' defined in this file
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127 * into the device tree binding of 'phy-mode', so that Ethernet
128 * device driver can get phy interface from device tree.
129 */
130static inline const char *phy_modes(phy_interface_t interface)
131{
132 switch (interface) {
133 case PHY_INTERFACE_MODE_NA:
134 return "";
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FF
135 case PHY_INTERFACE_MODE_INTERNAL:
136 return "internal";
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137 case PHY_INTERFACE_MODE_MII:
138 return "mii";
139 case PHY_INTERFACE_MODE_GMII:
140 return "gmii";
141 case PHY_INTERFACE_MODE_SGMII:
142 return "sgmii";
143 case PHY_INTERFACE_MODE_TBI:
144 return "tbi";
145 case PHY_INTERFACE_MODE_REVMII:
146 return "rev-mii";
147 case PHY_INTERFACE_MODE_RMII:
148 return "rmii";
149 case PHY_INTERFACE_MODE_RGMII:
150 return "rgmii";
151 case PHY_INTERFACE_MODE_RGMII_ID:
152 return "rgmii-id";
153 case PHY_INTERFACE_MODE_RGMII_RXID:
154 return "rgmii-rxid";
155 case PHY_INTERFACE_MODE_RGMII_TXID:
156 return "rgmii-txid";
157 case PHY_INTERFACE_MODE_RTBI:
158 return "rtbi";
159 case PHY_INTERFACE_MODE_SMII:
160 return "smii";
161 case PHY_INTERFACE_MODE_XGMII:
162 return "xgmii";
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163 case PHY_INTERFACE_MODE_MOCA:
164 return "moca";
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165 case PHY_INTERFACE_MODE_QSGMII:
166 return "qsgmii";
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167 case PHY_INTERFACE_MODE_TRGMII:
168 return "trgmii";
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169 case PHY_INTERFACE_MODE_1000BASEX:
170 return "1000base-x";
171 case PHY_INTERFACE_MODE_2500BASEX:
172 return "2500base-x";
173 case PHY_INTERFACE_MODE_RXAUI:
174 return "rxaui";
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175 case PHY_INTERFACE_MODE_XAUI:
176 return "xaui";
177 case PHY_INTERFACE_MODE_10GKR:
178 return "10gbase-kr";
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179 default:
180 return "unknown";
181 }
182}
183
00db8189 184
e8a2b6a4 185#define PHY_INIT_TIMEOUT 100000
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186#define PHY_STATE_TIME 1
187#define PHY_FORCE_TIMEOUT 10
00db8189 188
e8a2b6a4 189#define PHY_MAX_ADDR 32
00db8189 190
a4d00f17 191/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
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192#define PHY_ID_FMT "%s:%02x"
193
4567d686 194#define MII_BUS_ID_SIZE 61
a4d00f17 195
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196/* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
197 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
198#define MII_ADDR_C45 (1<<30)
199
313162d0 200struct device;
9525ae83 201struct phylink;
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202struct sk_buff;
203
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204/*
205 * The Bus class for PHYs. Devices which provide access to
206 * PHYs should register using this structure
207 */
00db8189 208struct mii_bus {
3e3aaf64 209 struct module *owner;
00db8189 210 const char *name;
9d9326d3 211 char id[MII_BUS_ID_SIZE];
00db8189 212 void *priv;
ccaa953e
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213 int (*read)(struct mii_bus *bus, int addr, int regnum);
214 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
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215 int (*reset)(struct mii_bus *bus);
216
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217 /*
218 * A lock to ensure that only one thing can read/write
219 * the MDIO bus at a time
220 */
35b5f6b1 221 struct mutex mdio_lock;
00db8189 222
18ee49dd 223 struct device *parent;
46abc021
LB
224 enum {
225 MDIOBUS_ALLOCATED = 1,
226 MDIOBUS_REGISTERED,
227 MDIOBUS_UNREGISTERED,
228 MDIOBUS_RELEASED,
229 } state;
230 struct device dev;
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231
232 /* list of all PHYs on bus */
7f854420 233 struct mdio_device *mdio_map[PHY_MAX_ADDR];
00db8189 234
c6883996 235 /* PHY addresses to be ignored when probing */
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236 u32 phy_mask;
237
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238 /* PHY addresses to ignore the TA/read failure */
239 u32 phy_ignore_ta_mask;
240
c5e38a94 241 /*
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242 * An array of interrupts, each PHY's interrupt at the index
243 * matching its address
c5e38a94 244 */
e7f4dc35 245 int irq[PHY_MAX_ADDR];
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246
247 /* GPIO reset pulse width in microseconds */
248 int reset_delay_us;
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249 /* RESET GPIO descriptor pointer */
250 struct gpio_desc *reset_gpiod;
00db8189 251};
46abc021 252#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
00db8189 253
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254struct mii_bus *mdiobus_alloc_size(size_t);
255static inline struct mii_bus *mdiobus_alloc(void)
256{
257 return mdiobus_alloc_size(0);
258}
259
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260int __mdiobus_register(struct mii_bus *bus, struct module *owner);
261#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
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262void mdiobus_unregister(struct mii_bus *bus);
263void mdiobus_free(struct mii_bus *bus);
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264struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
265static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
266{
267 return devm_mdiobus_alloc_size(dev, 0);
268}
269
270void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
2e888103 271struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
2e888103 272
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273#define PHY_INTERRUPT_DISABLED false
274#define PHY_INTERRUPT_ENABLED true
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275
276/* PHY state machine states:
277 *
278 * DOWN: PHY device and driver are not ready for anything. probe
279 * should be called if and only if the PHY is in this state,
280 * given that the PHY device exists.
899a3cbb 281 * - PHY driver probe function will set the state to READY
00db8189
AF
282 *
283 * READY: PHY is ready to send and receive packets, but the
284 * controller is not. By default, PHYs which do not implement
899a3cbb 285 * probe will be set to this state by phy_probe().
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286 * - start will set the state to UP
287 *
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288 * UP: The PHY and attached device are ready to do work.
289 * Interrupts should be started here.
85a1f31d 290 * - timer moves to NOLINK or RUNNING
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291 *
292 * NOLINK: PHY is up, but not currently plugged in.
8deeb630 293 * - irq or timer will set RUNNING if link comes back
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294 * - phy_stop moves to HALTED
295 *
296 * FORCING: PHY is being configured with forced settings
297 * - if link is up, move to RUNNING
298 * - If link is down, we drop to the next highest setting, and
299 * retry (FORCING) after a timeout
300 * - phy_stop moves to HALTED
301 *
302 * RUNNING: PHY is currently up, running, and possibly sending
303 * and/or receiving packets
8deeb630 304 * - irq or timer will set NOLINK if link goes down
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305 * - phy_stop moves to HALTED
306 *
307 * CHANGELINK: PHY experienced a change in link state
308 * - timer moves to RUNNING if link
309 * - timer moves to NOLINK if the link is down
310 * - phy_stop moves to HALTED
311 *
312 * HALTED: PHY is up, but no polling or interrupts are done. Or
313 * PHY is in an error state.
314 *
315 * - phy_start moves to RESUMING
316 *
317 * RESUMING: PHY was halted, but now wants to run again.
318 * - If we are forcing, or aneg is done, timer moves to RUNNING
319 * - If aneg is not done, timer moves to AN
320 * - phy_stop moves to HALTED
321 */
322enum phy_state {
4017b4d3 323 PHY_DOWN = 0,
00db8189 324 PHY_READY,
2b3e88ea 325 PHY_HALTED,
00db8189 326 PHY_UP,
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AF
327 PHY_RUNNING,
328 PHY_NOLINK,
329 PHY_FORCING,
330 PHY_CHANGELINK,
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331 PHY_RESUMING
332};
333
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DD
334/**
335 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
336 * @devices_in_package: Bit vector of devices present.
337 * @device_ids: The device identifer for each present device.
338 */
339struct phy_c45_device_ids {
340 u32 devices_in_package;
341 u32 device_ids[8];
342};
c1f19b51 343
00db8189
AF
344/* phy_device: An instance of a PHY
345 *
346 * drv: Pointer to the driver for this PHY instance
00db8189 347 * phy_id: UID for this device found during discovery
ac28b9f8
DD
348 * c45_ids: 802.3-c45 Device Identifers if is_c45.
349 * is_c45: Set to true if this phy uses clause 45 addressing.
4284b6a5 350 * is_internal: Set to true if this phy is internal to a MAC.
5a11dd7d 351 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc.
aae88261 352 * has_fixups: Set to true if this phy has fixups/quirks.
8a477a6f 353 * suspended: Set to true if this phy has been suspended successfully.
a3995460 354 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
f0f9b4ed 355 * loopback_enabled: Set true if this phy has been loopbacked successfully.
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356 * state: state of the PHY for management purposes
357 * dev_flags: Device-specific flags used by the PHY driver.
00db8189
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358 * link_timeout: The number of timer firings to wait before the
359 * giving up on the current attempt at acquiring a link
360 * irq: IRQ number of the PHY's interrupt (-1 if none)
361 * phy_timer: The timer for handling the state machine
00db8189
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362 * attached_dev: The attached enet driver's device instance ptr
363 * adjust_link: Callback for the enet controller to respond to
364 * changes in the link state.
00db8189 365 *
114002bc
FF
366 * speed, duplex, pause, supported, advertising, lp_advertising,
367 * and autoneg are used like in mii_if_info
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368 *
369 * interrupts currently only supports enabled or disabled,
370 * but could be changed in the future to support enabling
371 * and disabling specific interrupts
372 *
373 * Contains some infrastructure for polling and interrupt
374 * handling, as well as handling shifts in PHY hardware state
375 */
376struct phy_device {
e5a03bfd
AL
377 struct mdio_device mdio;
378
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379 /* Information about the PHY type */
380 /* And management functions */
381 struct phy_driver *drv;
382
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383 u32 phy_id;
384
ac28b9f8 385 struct phy_c45_device_ids c45_ids;
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386 unsigned is_c45:1;
387 unsigned is_internal:1;
388 unsigned is_pseudo_fixed_link:1;
389 unsigned has_fixups:1;
390 unsigned suspended:1;
391 unsigned sysfs_links:1;
392 unsigned loopback_enabled:1;
393
394 unsigned autoneg:1;
395 /* The most recently read link state */
396 unsigned link:1;
ac28b9f8 397
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398 /* Interrupts are enabled */
399 unsigned interrupts:1;
400
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401 enum phy_state state;
402
403 u32 dev_flags;
404
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405 phy_interface_t interface;
406
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407 /*
408 * forced speed & duplex (no autoneg)
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409 * partner speed & duplex & pause (autoneg)
410 */
411 int speed;
412 int duplex;
413 int pause;
414 int asym_pause;
415
3c1bcc86
AL
416 /* Union of PHY and Attached devices' supported link modes */
417 /* See ethtool.h for more info */
418 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
419 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
c0ec3c27 420 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
00db8189 421
d853d145 422 /* Energy efficient ethernet modes which should be prohibited */
423 u32 eee_broken_modes;
424
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425 int link_timeout;
426
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ZB
427#ifdef CONFIG_LED_TRIGGER_PHY
428 struct phy_led_trigger *phy_led_triggers;
429 unsigned int phy_num_led_triggers;
430 struct phy_led_trigger *last_triggered;
3928ee64
MS
431
432 struct phy_led_trigger *led_link_trigger;
2e0bc452
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433#endif
434
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435 /*
436 * Interrupt number for this PHY
437 * -1 means no interrupt
438 */
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439 int irq;
440
441 /* private data pointer */
442 /* For use by PHYs to maintain extra state */
443 void *priv;
444
445 /* Interrupt and Polling infrastructure */
a390d1f3 446 struct delayed_work state_queue;
00db8189 447
35b5f6b1 448 struct mutex lock;
00db8189 449
9525ae83 450 struct phylink *phylink;
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AF
451 struct net_device *attached_dev;
452
634ec36c 453 u8 mdix;
f4ed2fe3 454 u8 mdix_ctrl;
634ec36c 455
a81497be 456 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier);
00db8189 457 void (*adjust_link)(struct net_device *dev);
00db8189 458};
e5a03bfd
AL
459#define to_phy_device(d) container_of(to_mdio_device(d), \
460 struct phy_device, mdio)
00db8189
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461
462/* struct phy_driver: Driver structure for a particular PHY type
463 *
a9049e0c 464 * driver_data: static driver data
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465 * phy_id: The result of reading the UID registers of this PHY
466 * type, and ANDing them with the phy_id_mask. This driver
467 * only works for PHYs with IDs which match this field
468 * name: The friendly name of this PHY type
469 * phy_id_mask: Defines the important bits of the phy_id
470 * features: A list of features (speed, duplex, etc) supported
471 * by this PHY
472 * flags: A bitfield defining certain other features this PHY
473 * supports (like interrupts)
474 *
00fde795
HK
475 * All functions are optional. If config_aneg or read_status
476 * are not implemented, the phy core uses the genphy versions.
477 * Note that none of these functions should be called from
478 * interrupt time. The goal is for the bus read/write functions
479 * to be able to block when the bus transaction is happening,
480 * and be freed up by an interrupt (The MPC85xx has this ability,
481 * though it is not currently supported in the driver).
00db8189
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482 */
483struct phy_driver {
a9049e0c 484 struct mdio_driver_common mdiodrv;
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485 u32 phy_id;
486 char *name;
511e3036 487 u32 phy_id_mask;
719655a1 488 const unsigned long * const features;
00db8189 489 u32 flags;
860f6e9e 490 const void *driver_data;
00db8189 491
c5e38a94 492 /*
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FF
493 * Called to issue a PHY software reset
494 */
495 int (*soft_reset)(struct phy_device *phydev);
496
497 /*
c5e38a94
AF
498 * Called to initialize the PHY,
499 * including after a reset
500 */
00db8189
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501 int (*config_init)(struct phy_device *phydev);
502
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AF
503 /*
504 * Called during discovery. Used to set
505 * up device-specific structures, if any
506 */
00db8189
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507 int (*probe)(struct phy_device *phydev);
508
509 /* PHY Power Management */
510 int (*suspend)(struct phy_device *phydev);
511 int (*resume)(struct phy_device *phydev);
512
c5e38a94
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513 /*
514 * Configures the advertisement and resets
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515 * autonegotiation if phydev->autoneg is on,
516 * forces the speed to the current settings in phydev
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517 * if phydev->autoneg is off
518 */
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519 int (*config_aneg)(struct phy_device *phydev);
520
76a423a3
FF
521 /* Determines the auto negotiation result */
522 int (*aneg_done)(struct phy_device *phydev);
523
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524 /* Determines the negotiated speed and duplex */
525 int (*read_status)(struct phy_device *phydev);
526
527 /* Clears any pending interrupts */
528 int (*ack_interrupt)(struct phy_device *phydev);
529
530 /* Enables or disables interrupts */
531 int (*config_intr)(struct phy_device *phydev);
532
a8729eb3
AG
533 /*
534 * Checks if the PHY generated an interrupt.
535 * For multi-PHY devices with shared PHY interrupt pin
536 */
537 int (*did_interrupt)(struct phy_device *phydev);
538
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AF
539 /* Clears up any memory if needed */
540 void (*remove)(struct phy_device *phydev);
541
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DD
542 /* Returns true if this is a suitable driver for the given
543 * phydev. If NULL, matching is based on phy_id and
544 * phy_id_mask.
545 */
546 int (*match_phy_device)(struct phy_device *phydev);
547
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RC
548 /* Handles ethtool queries for hardware time stamping. */
549 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
550
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551 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
552 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
553
554 /*
555 * Requests a Rx timestamp for 'skb'. If the skb is accepted,
556 * the phy driver promises to deliver it using netif_rx() as
557 * soon as a timestamp becomes available. One of the
558 * PTP_CLASS_ values is passed in 'type'. The function must
559 * return true if the skb is accepted for delivery.
560 */
561 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
562
563 /*
564 * Requests a Tx timestamp for 'skb'. The phy driver promises
da92b194 565 * to deliver it using skb_complete_tx_timestamp() as soon as a
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RC
566 * timestamp becomes available. One of the PTP_CLASS_ values
567 * is passed in 'type'.
568 */
569 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
570
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571 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
572 * enable Wake on LAN, so set_wol is provided to be called in the
573 * ethernet driver's set_wol function. */
574 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
575
576 /* See set_wol, but for checking whether Wake on LAN is enabled. */
577 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
578
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DM
579 /*
580 * Called to inform a PHY device driver when the core is about to
581 * change the link state. This callback is supposed to be used as
582 * fixup hook for drivers that need to take action when the link
583 * state changes. Drivers are by no means allowed to mess with the
584 * PHY device structure in their implementations.
585 */
586 void (*link_change_notify)(struct phy_device *dev);
587
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588 /*
589 * Phy specific driver override for reading a MMD register.
590 * This function is optional for PHY specific drivers. When
591 * not provided, the default MMD read function will be used
592 * by phy_read_mmd(), which will use either a direct read for
593 * Clause 45 PHYs or an indirect read for Clause 22 PHYs.
594 * devnum is the MMD device number within the PHY device,
595 * regnum is the register within the selected MMD device.
596 */
597 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
598
599 /*
600 * Phy specific driver override for writing a MMD register.
601 * This function is optional for PHY specific drivers. When
602 * not provided, the default MMD write function will be used
603 * by phy_write_mmd(), which will use either a direct write for
604 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs.
605 * devnum is the MMD device number within the PHY device,
606 * regnum is the register within the selected MMD device.
607 * val is the value to be written.
608 */
609 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
610 u16 val);
611
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612 int (*read_page)(struct phy_device *dev);
613 int (*write_page)(struct phy_device *dev, int page);
614
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ES
615 /* Get the size and type of the eeprom contained within a plug-in
616 * module */
617 int (*module_info)(struct phy_device *dev,
618 struct ethtool_modinfo *modinfo);
619
620 /* Get the eeprom information from the plug-in module */
621 int (*module_eeprom)(struct phy_device *dev,
622 struct ethtool_eeprom *ee, u8 *data);
623
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AL
624 /* Get statistics from the phy using ethtool */
625 int (*get_sset_count)(struct phy_device *dev);
626 void (*get_strings)(struct phy_device *dev, u8 *data);
627 void (*get_stats)(struct phy_device *dev,
628 struct ethtool_stats *stats, u64 *data);
968ad9da
RL
629
630 /* Get and Set PHY tunables */
631 int (*get_tunable)(struct phy_device *dev,
632 struct ethtool_tunable *tuna, void *data);
633 int (*set_tunable)(struct phy_device *dev,
634 struct ethtool_tunable *tuna,
635 const void *data);
f0f9b4ed 636 int (*set_loopback)(struct phy_device *dev, bool enable);
00db8189 637};
a9049e0c
AL
638#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
639 struct phy_driver, mdiodrv)
00db8189 640
f62220d3
AF
641#define PHY_ANY_ID "MATCH ANY PHY"
642#define PHY_ANY_UID 0xffffffff
643
aa2af2eb
HK
644#define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
645#define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
646#define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
647
f62220d3
AF
648/* A Structure for boards to register fixups with the PHY Lib */
649struct phy_fixup {
650 struct list_head list;
4567d686 651 char bus_id[MII_BUS_ID_SIZE + 3];
f62220d3
AF
652 u32 phy_uid;
653 u32 phy_uid_mask;
654 int (*run)(struct phy_device *phydev);
655};
656
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RK
657const char *phy_speed_to_str(int speed);
658const char *phy_duplex_to_str(unsigned int duplex);
659
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RK
660/* A structure for mapping a particular speed and duplex
661 * combination to a particular SUPPORTED and ADVERTISED value
662 */
663struct phy_setting {
664 u32 speed;
665 u8 duplex;
666 u8 bit;
667};
668
669const struct phy_setting *
670phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
3c1bcc86 671 bool exact);
0ccb4fc6 672size_t phy_speeds(unsigned int *speeds, size_t size,
3c1bcc86 673 unsigned long *mask);
0ccb4fc6 674
2b3e88ea
HK
675static inline bool __phy_is_started(struct phy_device *phydev)
676{
677 WARN_ON(!mutex_is_locked(&phydev->lock));
678
679 return phydev->state >= PHY_UP;
680}
681
682/**
683 * phy_is_started - Convenience function to check whether PHY is started
684 * @phydev: The phy_device struct
685 */
686static inline bool phy_is_started(struct phy_device *phydev)
687{
688 bool started;
689
690 mutex_lock(&phydev->lock);
691 started = __phy_is_started(phydev);
692 mutex_unlock(&phydev->lock);
693
694 return started;
695}
696
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RK
697void phy_resolve_aneg_linkmode(struct phy_device *phydev);
698
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699/**
700 * phy_read_mmd - Convenience function for reading a register
701 * from an MMD on a given PHY.
702 * @phydev: The phy_device struct
703 * @devad: The MMD to read from
704 * @regnum: The register on the MMD to read
705 *
706 * Same rules as for phy_read();
707 */
9860118b 708int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
efabdfb9 709
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LB
710/**
711 * phy_read - Convenience function for reading a given PHY register
712 * @phydev: the phy_device struct
713 * @regnum: register number to read
714 *
715 * NOTE: MUST NOT be called from interrupt context,
716 * because the bus read/write functions may wait for an interrupt
717 * to conclude the operation.
718 */
abf35df2 719static inline int phy_read(struct phy_device *phydev, u32 regnum)
2e888103 720{
e5a03bfd 721 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
2e888103
LB
722}
723
788f9933
RK
724/**
725 * __phy_read - convenience function for reading a given PHY register
726 * @phydev: the phy_device struct
727 * @regnum: register number to read
728 *
729 * The caller must have taken the MDIO bus lock.
730 */
731static inline int __phy_read(struct phy_device *phydev, u32 regnum)
732{
733 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
734}
735
2e888103
LB
736/**
737 * phy_write - Convenience function for writing a given PHY register
738 * @phydev: the phy_device struct
739 * @regnum: register number to write
740 * @val: value to write to @regnum
741 *
742 * NOTE: MUST NOT be called from interrupt context,
743 * because the bus read/write functions may wait for an interrupt
744 * to conclude the operation.
745 */
abf35df2 746static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
2e888103 747{
e5a03bfd 748 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
2e888103
LB
749}
750
788f9933
RK
751/**
752 * __phy_write - Convenience function for writing a given PHY register
753 * @phydev: the phy_device struct
754 * @regnum: register number to write
755 * @val: value to write to @regnum
756 *
757 * The caller must have taken the MDIO bus lock.
758 */
759static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
760{
761 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
762 val);
763}
764
765int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
2b74e5be 766int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
788f9933 767
ac8322d8
HK
768/**
769 * __phy_set_bits - Convenience function for setting bits in a PHY register
770 * @phydev: the phy_device struct
771 * @regnum: register number to write
772 * @val: bits to set
773 *
774 * The caller must have taken the MDIO bus lock.
775 */
776static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
777{
778 return __phy_modify(phydev, regnum, 0, val);
779}
780
781/**
782 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
783 * @phydev: the phy_device struct
784 * @regnum: register number to write
785 * @val: bits to clear
786 *
787 * The caller must have taken the MDIO bus lock.
788 */
789static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
790 u16 val)
791{
792 return __phy_modify(phydev, regnum, val, 0);
793}
794
795/**
796 * phy_set_bits - Convenience function for setting bits in a PHY register
797 * @phydev: the phy_device struct
798 * @regnum: register number to write
799 * @val: bits to set
800 */
801static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
802{
803 return phy_modify(phydev, regnum, 0, val);
804}
805
806/**
807 * phy_clear_bits - Convenience function for clearing bits in a PHY register
808 * @phydev: the phy_device struct
809 * @regnum: register number to write
810 * @val: bits to clear
811 */
812static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
813{
814 return phy_modify(phydev, regnum, val, 0);
815}
816
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FF
817/**
818 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
819 * @phydev: the phy_device struct
820 *
821 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
822 * PHY_IGNORE_INTERRUPT
823 */
824static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
825{
826 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
827}
828
3c507b8a
HK
829/**
830 * phy_polling_mode - Convenience function for testing whether polling is
831 * used to detect PHY status changes
832 * @phydev: the phy_device struct
833 */
834static inline bool phy_polling_mode(struct phy_device *phydev)
835{
836 return phydev->irq == PHY_POLL;
837}
838
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FF
839/**
840 * phy_is_internal - Convenience function for testing if a PHY is internal
841 * @phydev: the phy_device struct
842 */
843static inline bool phy_is_internal(struct phy_device *phydev)
844{
845 return phydev->is_internal;
846}
847
32d0f783
IS
848/**
849 * phy_interface_mode_is_rgmii - Convenience function for testing if a
850 * PHY interface mode is RGMII (all variants)
851 * @mode: the phy_interface_t enum
852 */
853static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
854{
855 return mode >= PHY_INTERFACE_MODE_RGMII &&
856 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
857};
858
365c1e64
RK
859/**
860 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z
861 * negotiation
862 * @mode: one of &enum phy_interface_t
863 *
864 * Returns true if the phy interface mode uses the 16-bit negotiation
865 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
866 */
867static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
868{
869 return mode == PHY_INTERFACE_MODE_1000BASEX ||
870 mode == PHY_INTERFACE_MODE_2500BASEX;
871}
872
e463d88c
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873/**
874 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
875 * is RGMII (all variants)
876 * @phydev: the phy_device struct
877 */
878static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
879{
32d0f783 880 return phy_interface_mode_is_rgmii(phydev->interface);
5a11dd7d
FF
881};
882
883/*
884 * phy_is_pseudo_fixed_link - Convenience function for testing if this
885 * PHY is the CPU port facing side of an Ethernet switch, or similar.
886 * @phydev: the phy_device struct
887 */
888static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
889{
890 return phydev->is_pseudo_fixed_link;
e463d88c
FF
891}
892
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893/**
894 * phy_write_mmd - Convenience function for writing a register
895 * on an MMD on a given PHY.
896 * @phydev: The phy_device struct
897 * @devad: The MMD to read from
898 * @regnum: The register on the MMD to read
899 * @val: value to write to @regnum
900 *
901 * Same rules as for phy_write();
902 */
9860118b 903int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
efabdfb9 904
78ffc4ac
RK
905int phy_save_page(struct phy_device *phydev);
906int phy_select_page(struct phy_device *phydev, int page);
907int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
908int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
909int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
910int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
911 u16 mask, u16 set);
912
ac28b9f8 913struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
4017b4d3
SS
914 bool is_c45,
915 struct phy_c45_device_ids *c45_ids);
90eff909 916#if IS_ENABLED(CONFIG_PHYLIB)
ac28b9f8 917struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
4dea547f 918int phy_device_register(struct phy_device *phy);
90eff909
FF
919void phy_device_free(struct phy_device *phydev);
920#else
921static inline
922struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
923{
924 return NULL;
925}
926
927static inline int phy_device_register(struct phy_device *phy)
928{
929 return 0;
930}
931
932static inline void phy_device_free(struct phy_device *phydev) { }
933#endif /* CONFIG_PHYLIB */
38737e49 934void phy_device_remove(struct phy_device *phydev);
2f5cb434 935int phy_init_hw(struct phy_device *phydev);
481b5d93
SH
936int phy_suspend(struct phy_device *phydev);
937int phy_resume(struct phy_device *phydev);
9c2c2e62 938int __phy_resume(struct phy_device *phydev);
f0f9b4ed 939int phy_loopback(struct phy_device *phydev, bool enable);
4017b4d3
SS
940struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
941 phy_interface_t interface);
f8f76db1 942struct phy_device *phy_find_first(struct mii_bus *bus);
257184d7
AF
943int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
944 u32 flags, phy_interface_t interface);
fa94f6d9 945int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
4017b4d3
SS
946 void (*handler)(struct net_device *),
947 phy_interface_t interface);
948struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
949 void (*handler)(struct net_device *),
950 phy_interface_t interface);
e1393456
AF
951void phy_disconnect(struct phy_device *phydev);
952void phy_detach(struct phy_device *phydev);
953void phy_start(struct phy_device *phydev);
954void phy_stop(struct phy_device *phydev);
955int phy_start_aneg(struct phy_device *phydev);
372788f9 956int phy_aneg_done(struct phy_device *phydev);
2b9672dd
HK
957int phy_speed_down(struct phy_device *phydev, bool sync);
958int phy_speed_up(struct phy_device *phydev);
e1393456 959
e1393456 960int phy_stop_interrupts(struct phy_device *phydev);
002ba705 961int phy_restart_aneg(struct phy_device *phydev);
a9668491 962int phy_reset_after_clk_enable(struct phy_device *phydev);
00db8189 963
bafbdd52
SS
964static inline void phy_device_reset(struct phy_device *phydev, int value)
965{
966 mdio_device_reset(&phydev->mdio, value);
967}
968
72ba48be 969#define phydev_err(_phydev, format, args...) \
e5a03bfd 970 dev_err(&_phydev->mdio.dev, format, ##args)
72ba48be 971
c4fabb8b
AL
972#define phydev_info(_phydev, format, args...) \
973 dev_info(&_phydev->mdio.dev, format, ##args)
974
ab2a605f
AL
975#define phydev_warn(_phydev, format, args...) \
976 dev_warn(&_phydev->mdio.dev, format, ##args)
977
72ba48be 978#define phydev_dbg(_phydev, format, args...) \
2eaa38d9 979 dev_dbg(&_phydev->mdio.dev, format, ##args)
72ba48be 980
84eff6d1
AL
981static inline const char *phydev_name(const struct phy_device *phydev)
982{
e5a03bfd 983 return dev_name(&phydev->mdio.dev);
84eff6d1
AL
984}
985
2220943a
AL
986void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
987 __printf(2, 3);
988void phy_attached_info(struct phy_device *phydev);
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RK
989
990/* Clause 22 PHY */
af6b6967 991int genphy_config_init(struct phy_device *phydev);
3fb69bca 992int genphy_setup_forced(struct phy_device *phydev);
00db8189
AF
993int genphy_restart_aneg(struct phy_device *phydev);
994int genphy_config_aneg(struct phy_device *phydev);
a9fa6e6a 995int genphy_aneg_done(struct phy_device *phydev);
00db8189
AF
996int genphy_update_link(struct phy_device *phydev);
997int genphy_read_status(struct phy_device *phydev);
0f0ca340
GC
998int genphy_suspend(struct phy_device *phydev);
999int genphy_resume(struct phy_device *phydev);
f0f9b4ed 1000int genphy_loopback(struct phy_device *phydev, bool enable);
797ac071 1001int genphy_soft_reset(struct phy_device *phydev);
0878fff1
FF
1002static inline int genphy_no_soft_reset(struct phy_device *phydev)
1003{
1004 return 0;
1005}
5df7af85
KH
1006int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1007 u16 regnum);
1008int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1009 u16 regnum, u16 val);
5acde34a
RK
1010
1011/* Clause 45 PHY */
1012int genphy_c45_restart_aneg(struct phy_device *phydev);
1013int genphy_c45_aneg_done(struct phy_device *phydev);
1014int genphy_c45_read_link(struct phy_device *phydev, u32 mmd_mask);
1015int genphy_c45_read_lpa(struct phy_device *phydev);
1016int genphy_c45_read_pma(struct phy_device *phydev);
1017int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1018int genphy_c45_an_disable_aneg(struct phy_device *phydev);
ea4efe25 1019int genphy_c45_read_mdix(struct phy_device *phydev);
5acde34a 1020
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FF
1021/* The gen10g_* functions are the old Clause 45 stub */
1022int gen10g_config_aneg(struct phy_device *phydev);
1023int gen10g_read_status(struct phy_device *phydev);
1024int gen10g_no_soft_reset(struct phy_device *phydev);
1025int gen10g_config_init(struct phy_device *phydev);
1026int gen10g_suspend(struct phy_device *phydev);
1027int gen10g_resume(struct phy_device *phydev);
1028
00fde795
HK
1029static inline int phy_read_status(struct phy_device *phydev)
1030{
1031 if (!phydev->drv)
1032 return -EIO;
1033
1034 if (phydev->drv->read_status)
1035 return phydev->drv->read_status(phydev);
1036 else
1037 return genphy_read_status(phydev);
1038}
1039
00db8189 1040void phy_driver_unregister(struct phy_driver *drv);
d5bf9071 1041void phy_drivers_unregister(struct phy_driver *drv, int n);
be01da72
AL
1042int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1043int phy_drivers_register(struct phy_driver *new_driver, int n,
1044 struct module *owner);
4f9c85a1 1045void phy_state_machine(struct work_struct *work);
28b2e0d2 1046void phy_mac_interrupt(struct phy_device *phydev);
29935aeb 1047void phy_start_machine(struct phy_device *phydev);
00db8189
AF
1048void phy_stop_machine(struct phy_device *phydev);
1049int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
5514174f 1050void phy_ethtool_ksettings_get(struct phy_device *phydev,
1051 struct ethtool_link_ksettings *cmd);
2d55173e
PR
1052int phy_ethtool_ksettings_set(struct phy_device *phydev,
1053 const struct ethtool_link_ksettings *cmd);
4017b4d3 1054int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
e1393456
AF
1055int phy_start_interrupts(struct phy_device *phydev);
1056void phy_print_status(struct phy_device *phydev);
f3a6bd39 1057int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
41124fa6 1058void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
c306ad36 1059void phy_support_sym_pause(struct phy_device *phydev);
af8d9bb2 1060void phy_support_asym_pause(struct phy_device *phydev);
0c122405
AL
1061void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1062 bool autoneg);
70814e81 1063void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
22b7d299
AL
1064bool phy_validate_pause(struct phy_device *phydev,
1065 struct ethtool_pauseparam *pp);
00db8189 1066
f62220d3 1067int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1068 int (*run)(struct phy_device *));
f62220d3 1069int phy_register_fixup_for_id(const char *bus_id,
4017b4d3 1070 int (*run)(struct phy_device *));
f62220d3 1071int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1072 int (*run)(struct phy_device *));
f62220d3 1073
f38e7a32
WH
1074int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1075int phy_unregister_fixup_for_id(const char *bus_id);
1076int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1077
a59a4d19
GC
1078int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1079int phy_get_eee_err(struct phy_device *phydev);
1080int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1081int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
42e836eb 1082int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
4017b4d3
SS
1083void phy_ethtool_get_wol(struct phy_device *phydev,
1084 struct ethtool_wolinfo *wol);
9d9a77ce
PR
1085int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1086 struct ethtool_link_ksettings *cmd);
1087int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1088 const struct ethtool_link_ksettings *cmd);
e86a8987 1089int phy_ethtool_nway_reset(struct net_device *ndev);
a59a4d19 1090
90eff909 1091#if IS_ENABLED(CONFIG_PHYLIB)
9b9a8bfc
AF
1092int __init mdio_bus_init(void);
1093void mdio_bus_exit(void);
9e8d438e
FF
1094#endif
1095
1096/* Inline function for use within net/core/ethtool.c (built-in) */
1097static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data)
c59530d0 1098{
9e8d438e
FF
1099 if (!phydev->drv)
1100 return -EIO;
1101
1102 mutex_lock(&phydev->lock);
1103 phydev->drv->get_strings(phydev, data);
1104 mutex_unlock(&phydev->lock);
1105
1106 return 0;
c59530d0
FF
1107}
1108
9e8d438e 1109static inline int phy_ethtool_get_sset_count(struct phy_device *phydev)
c59530d0 1110{
9e8d438e
FF
1111 int ret;
1112
1113 if (!phydev->drv)
1114 return -EIO;
1115
1116 if (phydev->drv->get_sset_count &&
1117 phydev->drv->get_strings &&
1118 phydev->drv->get_stats) {
1119 mutex_lock(&phydev->lock);
1120 ret = phydev->drv->get_sset_count(phydev);
1121 mutex_unlock(&phydev->lock);
1122
1123 return ret;
1124 }
1125
c59530d0
FF
1126 return -EOPNOTSUPP;
1127}
1128
9e8d438e
FF
1129static inline int phy_ethtool_get_stats(struct phy_device *phydev,
1130 struct ethtool_stats *stats, u64 *data)
c59530d0 1131{
9e8d438e
FF
1132 if (!phydev->drv)
1133 return -EIO;
1134
1135 mutex_lock(&phydev->lock);
1136 phydev->drv->get_stats(phydev, stats, data);
1137 mutex_unlock(&phydev->lock);
1138
1139 return 0;
c59530d0 1140}
9b9a8bfc 1141
00db8189 1142extern struct bus_type mdio_bus_type;
c31accd1 1143
648ea013
FF
1144struct mdio_board_info {
1145 const char *bus_id;
1146 char modalias[MDIO_NAME_SIZE];
1147 int mdio_addr;
1148 const void *platform_data;
1149};
1150
90eff909 1151#if IS_ENABLED(CONFIG_MDIO_DEVICE)
648ea013
FF
1152int mdiobus_register_board_info(const struct mdio_board_info *info,
1153 unsigned int n);
1154#else
1155static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1156 unsigned int n)
1157{
1158 return 0;
1159}
1160#endif
1161
1162
c31accd1
JH
1163/**
1164 * module_phy_driver() - Helper macro for registering PHY drivers
1165 * @__phy_drivers: array of PHY drivers to register
1166 *
1167 * Helper macro for PHY drivers which do not do anything special in module
1168 * init/exit. Each module may only use this macro once, and calling it
1169 * replaces module_init() and module_exit().
1170 */
1171#define phy_module_driver(__phy_drivers, __count) \
1172static int __init phy_module_init(void) \
1173{ \
be01da72 1174 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
c31accd1
JH
1175} \
1176module_init(phy_module_init); \
1177static void __exit phy_module_exit(void) \
1178{ \
1179 phy_drivers_unregister(__phy_drivers, __count); \
1180} \
1181module_exit(phy_module_exit)
1182
1183#define module_phy_driver(__phy_drivers) \
1184 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1185
00db8189 1186#endif /* __PHY_H */