net: phy: at803x: add MDIX support to AR8031/33
[linux-block.git] / include / linux / phy.h
CommitLineData
2874c5fd 1/* SPDX-License-Identifier: GPL-2.0-or-later */
00db8189 2/*
00db8189 3 * Framework and drivers for configuring and reading different PHYs
d8de01b7 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
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AF
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
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AF
9 */
10
11#ifndef __PHY_H
12#define __PHY_H
13
2220943a 14#include <linux/compiler.h>
00db8189 15#include <linux/spinlock.h>
13df29f6 16#include <linux/ethtool.h>
b31cdffa 17#include <linux/linkmode.h>
a68a8138 18#include <linux/netlink.h>
bac83c65 19#include <linux/mdio.h>
13df29f6 20#include <linux/mii.h>
4715f65f 21#include <linux/mii_timestamper.h>
3e3aaf64 22#include <linux/module.h>
13df29f6
MR
23#include <linux/timer.h>
24#include <linux/workqueue.h>
8626d3b4 25#include <linux/mod_devicetable.h>
080bb352 26#include <linux/u64_stats_sync.h>
9010f9de 27#include <linux/irqreturn.h>
bd971ff0 28#include <linux/iopoll.h>
63490847 29#include <linux/refcount.h>
00db8189 30
60063497 31#include <linux/atomic.h>
0ac49527 32
e9fbdf17 33#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
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34 SUPPORTED_TP | \
35 SUPPORTED_MII)
36
e9fbdf17
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37#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
38 SUPPORTED_10baseT_Full)
39
40#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
41 SUPPORTED_100baseT_Full)
42
43#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
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44 SUPPORTED_1000baseT_Full)
45
719655a1
AL
46extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
47extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
48extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
49extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
50extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
51extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
9e857a40 52extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
719655a1
AL
53extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
54
55#define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
56#define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
57#define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
58#define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
59#define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
60#define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
9e857a40 61#define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
719655a1 62#define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
e9fbdf17 63
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64extern const int phy_basic_ports_array[3];
65extern const int phy_fibre_port_array[1];
66extern const int phy_all_ports_features_array[7];
3c1bcc86
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67extern const int phy_10_100_features_array[4];
68extern const int phy_basic_t1_features_array[2];
69extern const int phy_gbit_features_array[2];
70extern const int phy_10gbit_features_array[1];
71
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72/*
73 * Set phydev->irq to PHY_POLL if interrupts are not supported,
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74 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
75 * the attached driver handles the interrupt
76 */
77#define PHY_POLL -1
78#define PHY_IGNORE_INTERRUPT -2
79
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80#define PHY_IS_INTERNAL 0x00000001
81#define PHY_RST_AFTER_CLK_EN 0x00000002
97c22438 82#define PHY_POLL_CABLE_TEST 0x00000004
a9049e0c 83#define MDIO_DEVICE_IS_PHY 0x80000000
00db8189 84
4069a572
AL
85/**
86 * enum phy_interface_t - Interface Mode definitions
87 *
88 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
89 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined
90 * @PHY_INTERFACE_MODE_MII: Median-independent interface
91 * @PHY_INTERFACE_MODE_GMII: Gigabit median-independent interface
92 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface
93 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface
94 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface
95 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface
96 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface
97 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay
98 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay
99 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay
100 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI
101 * @PHY_INTERFACE_MODE_SMII: ??? MII
102 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface
103 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface
104 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax
105 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII
106 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII
b1ae3587 107 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX
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108 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX
109 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX
110 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI
111 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface
112 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR
113 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII
114 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN
115 * @PHY_INTERFACE_MODE_MAX: Book keeping
116 *
117 * Describes the interface between the MAC and PHY.
118 */
e8a2b6a4 119typedef enum {
4157ef1b 120 PHY_INTERFACE_MODE_NA,
735d8a18 121 PHY_INTERFACE_MODE_INTERNAL,
e8a2b6a4
AF
122 PHY_INTERFACE_MODE_MII,
123 PHY_INTERFACE_MODE_GMII,
124 PHY_INTERFACE_MODE_SGMII,
125 PHY_INTERFACE_MODE_TBI,
2cc70ba4 126 PHY_INTERFACE_MODE_REVMII,
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127 PHY_INTERFACE_MODE_RMII,
128 PHY_INTERFACE_MODE_RGMII,
a999589c 129 PHY_INTERFACE_MODE_RGMII_ID,
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130 PHY_INTERFACE_MODE_RGMII_RXID,
131 PHY_INTERFACE_MODE_RGMII_TXID,
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132 PHY_INTERFACE_MODE_RTBI,
133 PHY_INTERFACE_MODE_SMII,
898dd0bd 134 PHY_INTERFACE_MODE_XGMII,
58b05e58 135 PHY_INTERFACE_MODE_XLGMII,
fd70f72c 136 PHY_INTERFACE_MODE_MOCA,
b9d12085 137 PHY_INTERFACE_MODE_QSGMII,
572de608 138 PHY_INTERFACE_MODE_TRGMII,
b1ae3587 139 PHY_INTERFACE_MODE_100BASEX,
55601a88
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140 PHY_INTERFACE_MODE_1000BASEX,
141 PHY_INTERFACE_MODE_2500BASEX,
142 PHY_INTERFACE_MODE_RXAUI,
c125ca09 143 PHY_INTERFACE_MODE_XAUI,
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144 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
145 PHY_INTERFACE_MODE_10GBASER,
4618d671 146 PHY_INTERFACE_MODE_USXGMII,
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147 /* 10GBASE-KR - with Clause 73 AN */
148 PHY_INTERFACE_MODE_10GKR,
8a2fe56e 149 PHY_INTERFACE_MODE_MAX,
e8a2b6a4
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150} phy_interface_t;
151
e86c6569 152/*
4069a572 153 * phy_supported_speeds - return all speeds currently supported by a PHY device
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154 */
155unsigned int phy_supported_speeds(struct phy_device *phy,
156 unsigned int *speeds,
157 unsigned int size);
158
8a2fe56e 159/**
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160 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
161 * @interface: enum phy_interface_t value
162 *
4069a572 163 * Description: maps enum &phy_interface_t defined in this file
8a2fe56e 164 * into the device tree binding of 'phy-mode', so that Ethernet
4069a572 165 * device driver can get PHY interface from device tree.
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166 */
167static inline const char *phy_modes(phy_interface_t interface)
168{
169 switch (interface) {
170 case PHY_INTERFACE_MODE_NA:
171 return "";
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172 case PHY_INTERFACE_MODE_INTERNAL:
173 return "internal";
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174 case PHY_INTERFACE_MODE_MII:
175 return "mii";
176 case PHY_INTERFACE_MODE_GMII:
177 return "gmii";
178 case PHY_INTERFACE_MODE_SGMII:
179 return "sgmii";
180 case PHY_INTERFACE_MODE_TBI:
181 return "tbi";
182 case PHY_INTERFACE_MODE_REVMII:
183 return "rev-mii";
184 case PHY_INTERFACE_MODE_RMII:
185 return "rmii";
186 case PHY_INTERFACE_MODE_RGMII:
187 return "rgmii";
188 case PHY_INTERFACE_MODE_RGMII_ID:
189 return "rgmii-id";
190 case PHY_INTERFACE_MODE_RGMII_RXID:
191 return "rgmii-rxid";
192 case PHY_INTERFACE_MODE_RGMII_TXID:
193 return "rgmii-txid";
194 case PHY_INTERFACE_MODE_RTBI:
195 return "rtbi";
196 case PHY_INTERFACE_MODE_SMII:
197 return "smii";
198 case PHY_INTERFACE_MODE_XGMII:
199 return "xgmii";
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200 case PHY_INTERFACE_MODE_XLGMII:
201 return "xlgmii";
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202 case PHY_INTERFACE_MODE_MOCA:
203 return "moca";
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204 case PHY_INTERFACE_MODE_QSGMII:
205 return "qsgmii";
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206 case PHY_INTERFACE_MODE_TRGMII:
207 return "trgmii";
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208 case PHY_INTERFACE_MODE_1000BASEX:
209 return "1000base-x";
210 case PHY_INTERFACE_MODE_2500BASEX:
211 return "2500base-x";
212 case PHY_INTERFACE_MODE_RXAUI:
213 return "rxaui";
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214 case PHY_INTERFACE_MODE_XAUI:
215 return "xaui";
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216 case PHY_INTERFACE_MODE_10GBASER:
217 return "10gbase-r";
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218 case PHY_INTERFACE_MODE_USXGMII:
219 return "usxgmii";
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220 case PHY_INTERFACE_MODE_10GKR:
221 return "10gbase-kr";
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BJ
222 case PHY_INTERFACE_MODE_100BASEX:
223 return "100base-x";
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224 default:
225 return "unknown";
226 }
227}
228
00db8189 229
e8a2b6a4 230#define PHY_INIT_TIMEOUT 100000
00db8189 231#define PHY_FORCE_TIMEOUT 10
00db8189 232
e8a2b6a4 233#define PHY_MAX_ADDR 32
00db8189 234
a4d00f17 235/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
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236#define PHY_ID_FMT "%s:%02x"
237
4567d686 238#define MII_BUS_ID_SIZE 61
a4d00f17 239
313162d0 240struct device;
9525ae83 241struct phylink;
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242struct sfp_bus;
243struct sfp_upstream_ops;
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244struct sk_buff;
245
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246/**
247 * struct mdio_bus_stats - Statistics counters for MDIO busses
248 * @transfers: Total number of transfers, i.e. @writes + @reads
249 * @errors: Number of MDIO transfers that returned an error
250 * @writes: Number of write transfers
251 * @reads: Number of read transfers
252 * @syncp: Synchronisation for incrementing statistics
253 */
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FF
254struct mdio_bus_stats {
255 u64_stats_t transfers;
256 u64_stats_t errors;
257 u64_stats_t writes;
258 u64_stats_t reads;
259 /* Must be last, add new statistics above */
260 struct u64_stats_sync syncp;
261};
262
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263/**
264 * struct phy_package_shared - Shared information in PHY packages
265 * @addr: Common PHY address used to combine PHYs in one package
266 * @refcnt: Number of PHYs connected to this shared data
267 * @flags: Initialization of PHY package
268 * @priv_size: Size of the shared private data @priv
269 * @priv: Driver private data shared across a PHY package
270 *
271 * Represents a shared structure between different phydev's in the same
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272 * package, for example a quad PHY. See phy_package_join() and
273 * phy_package_leave().
274 */
275struct phy_package_shared {
276 int addr;
277 refcount_t refcnt;
278 unsigned long flags;
279 size_t priv_size;
280
281 /* private data pointer */
282 /* note that this pointer is shared between different phydevs and
283 * the user has to take care of appropriate locking. It is allocated
284 * and freed automatically by phy_package_join() and
285 * phy_package_leave().
286 */
287 void *priv;
288};
289
290/* used as bit number in atomic bitops */
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291#define PHY_SHARED_F_INIT_DONE 0
292#define PHY_SHARED_F_PROBE_DONE 1
63490847 293
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294/**
295 * struct mii_bus - Represents an MDIO bus
296 *
297 * @owner: Who owns this device
298 * @name: User friendly name for this MDIO device, or driver name
299 * @id: Unique identifier for this bus, typical from bus hierarchy
300 * @priv: Driver private data
301 *
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AF
302 * The Bus class for PHYs. Devices which provide access to
303 * PHYs should register using this structure
304 */
00db8189 305struct mii_bus {
3e3aaf64 306 struct module *owner;
00db8189 307 const char *name;
9d9326d3 308 char id[MII_BUS_ID_SIZE];
00db8189 309 void *priv;
4069a572 310 /** @read: Perform a read transfer on the bus */
ccaa953e 311 int (*read)(struct mii_bus *bus, int addr, int regnum);
4069a572 312 /** @write: Perform a write transfer on the bus */
ccaa953e 313 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
4069a572 314 /** @reset: Perform a reset of the bus */
00db8189 315 int (*reset)(struct mii_bus *bus);
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AL
316
317 /** @stats: Statistic counters per device on the bus */
080bb352 318 struct mdio_bus_stats stats[PHY_MAX_ADDR];
00db8189 319
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320 /**
321 * @mdio_lock: A lock to ensure that only one thing can read/write
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322 * the MDIO bus at a time
323 */
35b5f6b1 324 struct mutex mdio_lock;
00db8189 325
4069a572 326 /** @parent: Parent device of this bus */
18ee49dd 327 struct device *parent;
4069a572 328 /** @state: State of bus structure */
46abc021
LB
329 enum {
330 MDIOBUS_ALLOCATED = 1,
331 MDIOBUS_REGISTERED,
332 MDIOBUS_UNREGISTERED,
333 MDIOBUS_RELEASED,
334 } state;
4069a572
AL
335
336 /** @dev: Kernel device representation */
46abc021 337 struct device dev;
00db8189 338
4069a572 339 /** @mdio_map: list of all MDIO devices on bus */
7f854420 340 struct mdio_device *mdio_map[PHY_MAX_ADDR];
00db8189 341
4069a572 342 /** @phy_mask: PHY addresses to be ignored when probing */
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343 u32 phy_mask;
344
4069a572 345 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */
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346 u32 phy_ignore_ta_mask;
347
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348 /**
349 * @irq: An array of interrupts, each PHY's interrupt at the index
e7f4dc35 350 * matching its address
c5e38a94 351 */
e7f4dc35 352 int irq[PHY_MAX_ADDR];
69226896 353
4069a572 354 /** @reset_delay_us: GPIO reset pulse width in microseconds */
69226896 355 int reset_delay_us;
4069a572 356 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */
bb383129 357 int reset_post_delay_us;
4069a572 358 /** @reset_gpiod: Reset GPIO descriptor pointer */
d396e84c 359 struct gpio_desc *reset_gpiod;
63490847 360
4069a572 361 /** @probe_capabilities: bus capabilities, used for probing */
0cc8fecf
JL
362 enum {
363 MDIOBUS_NO_CAP = 0,
364 MDIOBUS_C22,
365 MDIOBUS_C45,
366 MDIOBUS_C22_C45,
367 } probe_capabilities;
368
4069a572 369 /** @shared_lock: protect access to the shared element */
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MW
370 struct mutex shared_lock;
371
4069a572 372 /** @shared: shared state across different PHYs */
63490847 373 struct phy_package_shared *shared[PHY_MAX_ADDR];
00db8189 374};
46abc021 375#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
00db8189 376
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AL
377struct mii_bus *mdiobus_alloc_size(size_t size);
378
379/**
380 * mdiobus_alloc - Allocate an MDIO bus structure
381 *
382 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready
383 * for the driver to register the bus.
384 */
eb8a54a7
TT
385static inline struct mii_bus *mdiobus_alloc(void)
386{
387 return mdiobus_alloc_size(0);
388}
389
3e3aaf64 390int __mdiobus_register(struct mii_bus *bus, struct module *owner);
ac3a68d5
BG
391int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus,
392 struct module *owner);
3e3aaf64 393#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
ac3a68d5
BG
394#define devm_mdiobus_register(dev, bus) \
395 __devm_mdiobus_register(dev, bus, THIS_MODULE)
38f961e7 396
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397void mdiobus_unregister(struct mii_bus *bus);
398void mdiobus_free(struct mii_bus *bus);
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399struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
400static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
401{
402 return devm_mdiobus_alloc_size(dev, 0);
403}
404
ce69e216 405struct mii_bus *mdio_find_bus(const char *mdio_name);
2e888103 406struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
2e888103 407
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HK
408#define PHY_INTERRUPT_DISABLED false
409#define PHY_INTERRUPT_ENABLED true
00db8189 410
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411/**
412 * enum phy_state - PHY state machine states:
00db8189 413 *
4069a572 414 * @PHY_DOWN: PHY device and driver are not ready for anything. probe
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AF
415 * should be called if and only if the PHY is in this state,
416 * given that the PHY device exists.
4069a572 417 * - PHY driver probe function will set the state to @PHY_READY
00db8189 418 *
4069a572 419 * @PHY_READY: PHY is ready to send and receive packets, but the
00db8189 420 * controller is not. By default, PHYs which do not implement
899a3cbb 421 * probe will be set to this state by phy_probe().
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AF
422 * - start will set the state to UP
423 *
4069a572 424 * @PHY_UP: The PHY and attached device are ready to do work.
00db8189 425 * Interrupts should be started here.
4069a572 426 * - timer moves to @PHY_NOLINK or @PHY_RUNNING
00db8189 427 *
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AL
428 * @PHY_NOLINK: PHY is up, but not currently plugged in.
429 * - irq or timer will set @PHY_RUNNING if link comes back
430 * - phy_stop moves to @PHY_HALTED
00db8189 431 *
4069a572 432 * @PHY_RUNNING: PHY is currently up, running, and possibly sending
00db8189 433 * and/or receiving packets
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AL
434 * - irq or timer will set @PHY_NOLINK if link goes down
435 * - phy_stop moves to @PHY_HALTED
00db8189 436 *
4069a572 437 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending
a68a8138
AL
438 * is not expected to work, carrier will be indicated as down. PHY will be
439 * poll once per second, or on interrupt for it current state.
440 * Once complete, move to UP to restart the PHY.
4069a572 441 * - phy_stop aborts the running test and moves to @PHY_HALTED
a68a8138 442 *
4069a572 443 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or
00db8189 444 * PHY is in an error state.
4069a572 445 * - phy_start moves to @PHY_UP
00db8189
AF
446 */
447enum phy_state {
4017b4d3 448 PHY_DOWN = 0,
00db8189 449 PHY_READY,
2b3e88ea 450 PHY_HALTED,
00db8189 451 PHY_UP,
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AF
452 PHY_RUNNING,
453 PHY_NOLINK,
a68a8138 454 PHY_CABLETEST,
00db8189
AF
455};
456
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457#define MDIO_MMD_NUM 32
458
ac28b9f8
DD
459/**
460 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
320ed3bf
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461 * @devices_in_package: IEEE 802.3 devices in package register value.
462 * @mmds_present: bit vector of MMDs present.
ac28b9f8
DD
463 * @device_ids: The device identifer for each present device.
464 */
465struct phy_c45_device_ids {
466 u32 devices_in_package;
320ed3bf 467 u32 mmds_present;
389a3389 468 u32 device_ids[MDIO_MMD_NUM];
ac28b9f8 469};
c1f19b51 470
76564261 471struct macsec_context;
2e181358 472struct macsec_ops;
76564261 473
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474/**
475 * struct phy_device - An instance of a PHY
00db8189 476 *
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AL
477 * @mdio: MDIO bus this PHY is on
478 * @drv: Pointer to the driver for this PHY instance
479 * @phy_id: UID for this device found during discovery
480 * @c45_ids: 802.3-c45 Device Identifiers if is_c45.
481 * @is_c45: Set to true if this PHY uses clause 45 addressing.
482 * @is_internal: Set to true if this PHY is internal to a MAC.
483 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc.
484 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps
485 * @has_fixups: Set to true if this PHY has fixups/quirks.
486 * @suspended: Set to true if this PHY has been suspended successfully.
487 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus.
488 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
489 * @loopback_enabled: Set true if this PHY has been loopbacked successfully.
490 * @downshifted_rate: Set true if link speed has been downshifted.
491 * @state: State of the PHY for management purposes
492 * @dev_flags: Device-specific flags used by the PHY driver.
493 * @irq: IRQ number of the PHY's interrupt (-1 if none)
494 * @phy_timer: The timer for handling the state machine
495 * @phylink: Pointer to phylink instance for this PHY
496 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached
497 * @sfp_bus: SFP bus attached to this PHY's fiber port
498 * @attached_dev: The attached enet driver's device instance ptr
499 * @adjust_link: Callback for the enet controller to respond to changes: in the
500 * link state.
501 * @phy_link_change: Callback for phylink for notification of link change
502 * @macsec_ops: MACsec offloading ops.
00db8189 503 *
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504 * @speed: Current link speed
505 * @duplex: Current duplex
4217a64e 506 * @port: Current port
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507 * @pause: Current pause
508 * @asym_pause: Current asymmetric pause
509 * @supported: Combined MAC/PHY supported linkmodes
510 * @advertising: Currently advertised linkmodes
511 * @adv_old: Saved advertised while power saving for WoL
512 * @lp_advertising: Current link partner advertised linkmodes
513 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited
514 * @autoneg: Flag autoneg being used
515 * @link: Current link state
516 * @autoneg_complete: Flag auto negotiation of the link has completed
517 * @mdix: Current crossover
518 * @mdix_ctrl: User setting of crossover
519 * @interrupts: Flag interrupts have been enabled
520 * @interface: enum phy_interface_t value
521 * @skb: Netlink message for cable diagnostics
522 * @nest: Netlink nest used for cable diagnostics
523 * @ehdr: nNtlink header for cable diagnostics
524 * @phy_led_triggers: Array of LED triggers
525 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers
526 * @led_link_trigger: LED trigger for link up/down
527 * @last_triggered: last LED trigger for link speed
528 * @master_slave_set: User requested master/slave configuration
529 * @master_slave_get: Current master/slave advertisement
530 * @master_slave_state: Current master/slave configuration
531 * @mii_ts: Pointer to time stamper callbacks
532 * @lock: Mutex for serialization access to PHY
533 * @state_queue: Work queue for state machine
534 * @shared: Pointer to private data shared by phys in one package
535 * @priv: Pointer to driver private data
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536 *
537 * interrupts currently only supports enabled or disabled,
538 * but could be changed in the future to support enabling
539 * and disabling specific interrupts
540 *
541 * Contains some infrastructure for polling and interrupt
542 * handling, as well as handling shifts in PHY hardware state
543 */
544struct phy_device {
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545 struct mdio_device mdio;
546
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547 /* Information about the PHY type */
548 /* And management functions */
549 struct phy_driver *drv;
550
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551 u32 phy_id;
552
ac28b9f8 553 struct phy_c45_device_ids c45_ids;
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554 unsigned is_c45:1;
555 unsigned is_internal:1;
556 unsigned is_pseudo_fixed_link:1;
3b8b11f9 557 unsigned is_gigabit_capable:1;
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558 unsigned has_fixups:1;
559 unsigned suspended:1;
611d779a 560 unsigned suspended_by_mdio_bus:1;
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561 unsigned sysfs_links:1;
562 unsigned loopback_enabled:1;
5eee3bb7 563 unsigned downshifted_rate:1;
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564
565 unsigned autoneg:1;
566 /* The most recently read link state */
567 unsigned link:1;
4950c2ba 568 unsigned autoneg_complete:1;
ac28b9f8 569
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570 /* Interrupts are enabled */
571 unsigned interrupts:1;
572
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573 enum phy_state state;
574
575 u32 dev_flags;
576
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577 phy_interface_t interface;
578
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579 /*
580 * forced speed & duplex (no autoneg)
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581 * partner speed & duplex & pause (autoneg)
582 */
583 int speed;
584 int duplex;
4217a64e 585 int port;
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586 int pause;
587 int asym_pause;
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588 u8 master_slave_get;
589 u8 master_slave_set;
590 u8 master_slave_state;
00db8189 591
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592 /* Union of PHY and Attached devices' supported link modes */
593 /* See ethtool.h for more info */
594 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
595 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
c0ec3c27 596 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
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597 /* used with phy_speed_down */
598 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old);
00db8189 599
d853d145 600 /* Energy efficient ethernet modes which should be prohibited */
601 u32 eee_broken_modes;
602
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603#ifdef CONFIG_LED_TRIGGER_PHY
604 struct phy_led_trigger *phy_led_triggers;
605 unsigned int phy_num_led_triggers;
606 struct phy_led_trigger *last_triggered;
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607
608 struct phy_led_trigger *led_link_trigger;
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609#endif
610
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611 /*
612 * Interrupt number for this PHY
613 * -1 means no interrupt
614 */
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615 int irq;
616
617 /* private data pointer */
618 /* For use by PHYs to maintain extra state */
619 void *priv;
620
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621 /* shared data pointer */
622 /* For use by PHYs inside the same package that need a shared state. */
623 struct phy_package_shared *shared;
624
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625 /* Reporting cable test results */
626 struct sk_buff *skb;
627 void *ehdr;
628 struct nlattr *nest;
629
00db8189 630 /* Interrupt and Polling infrastructure */
a390d1f3 631 struct delayed_work state_queue;
00db8189 632
35b5f6b1 633 struct mutex lock;
00db8189 634
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635 /* This may be modified under the rtnl lock */
636 bool sfp_bus_attached;
637 struct sfp_bus *sfp_bus;
9525ae83 638 struct phylink *phylink;
00db8189 639 struct net_device *attached_dev;
4715f65f 640 struct mii_timestamper *mii_ts;
00db8189 641
634ec36c 642 u8 mdix;
f4ed2fe3 643 u8 mdix_ctrl;
634ec36c 644
a307593a 645 void (*phy_link_change)(struct phy_device *phydev, bool up);
00db8189 646 void (*adjust_link)(struct net_device *dev);
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647
648#if IS_ENABLED(CONFIG_MACSEC)
649 /* MACsec management functions */
650 const struct macsec_ops *macsec_ops;
651#endif
00db8189 652};
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653
654static inline struct phy_device *to_phy_device(const struct device *dev)
655{
656 return container_of(to_mdio_device(dev), struct phy_device, mdio);
657}
00db8189 658
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659/**
660 * struct phy_tdr_config - Configuration of a TDR raw test
661 *
662 * @first: Distance for first data collection point
663 * @last: Distance for last data collection point
664 * @step: Step between data collection points
665 * @pair: Bitmap of cable pairs to collect data for
666 *
667 * A structure containing possible configuration parameters
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668 * for a TDR cable test. The driver does not need to implement
669 * all the parameters, but should report what is actually used.
4069a572 670 * All distances are in centimeters.
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671 */
672struct phy_tdr_config {
673 u32 first;
674 u32 last;
675 u32 step;
676 s8 pair;
677};
678#define PHY_PAIR_ALL -1
679
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680/**
681 * struct phy_driver - Driver structure for a particular PHY type
00db8189 682 *
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683 * @mdiodrv: Data common to all MDIO devices
684 * @phy_id: The result of reading the UID registers of this PHY
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685 * type, and ANDing them with the phy_id_mask. This driver
686 * only works for PHYs with IDs which match this field
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687 * @name: The friendly name of this PHY type
688 * @phy_id_mask: Defines the important bits of the phy_id
689 * @features: A mandatory list of features (speed, duplex, etc)
3e64cf7a 690 * supported by this PHY
4069a572 691 * @flags: A bitfield defining certain other features this PHY
00db8189 692 * supports (like interrupts)
4069a572 693 * @driver_data: Static driver data
00db8189 694 *
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695 * All functions are optional. If config_aneg or read_status
696 * are not implemented, the phy core uses the genphy versions.
697 * Note that none of these functions should be called from
698 * interrupt time. The goal is for the bus read/write functions
699 * to be able to block when the bus transaction is happening,
700 * and be freed up by an interrupt (The MPC85xx has this ability,
701 * though it is not currently supported in the driver).
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702 */
703struct phy_driver {
a9049e0c 704 struct mdio_driver_common mdiodrv;
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705 u32 phy_id;
706 char *name;
511e3036 707 u32 phy_id_mask;
719655a1 708 const unsigned long * const features;
00db8189 709 u32 flags;
860f6e9e 710 const void *driver_data;
00db8189 711
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712 /**
713 * @soft_reset: Called to issue a PHY software reset
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714 */
715 int (*soft_reset)(struct phy_device *phydev);
716
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717 /**
718 * @config_init: Called to initialize the PHY,
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719 * including after a reset
720 */
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721 int (*config_init)(struct phy_device *phydev);
722
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723 /**
724 * @probe: Called during discovery. Used to set
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725 * up device-specific structures, if any
726 */
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727 int (*probe)(struct phy_device *phydev);
728
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729 /**
730 * @get_features: Probe the hardware to determine what
731 * abilities it has. Should only set phydev->supported.
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732 */
733 int (*get_features)(struct phy_device *phydev);
734
00db8189 735 /* PHY Power Management */
4069a572 736 /** @suspend: Suspend the hardware, saving state if needed */
00db8189 737 int (*suspend)(struct phy_device *phydev);
4069a572 738 /** @resume: Resume the hardware, restoring state if needed */
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739 int (*resume)(struct phy_device *phydev);
740
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741 /**
742 * @config_aneg: Configures the advertisement and resets
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743 * autonegotiation if phydev->autoneg is on,
744 * forces the speed to the current settings in phydev
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745 * if phydev->autoneg is off
746 */
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747 int (*config_aneg)(struct phy_device *phydev);
748
4069a572 749 /** @aneg_done: Determines the auto negotiation result */
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750 int (*aneg_done)(struct phy_device *phydev);
751
4069a572 752 /** @read_status: Determines the negotiated speed and duplex */
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753 int (*read_status)(struct phy_device *phydev);
754
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755 /**
756 * @config_intr: Enables or disables interrupts.
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757 * It should also clear any pending interrupts prior to enabling the
758 * IRQs and after disabling them.
a8729eb3 759 */
6527b938 760 int (*config_intr)(struct phy_device *phydev);
a8729eb3 761
4069a572 762 /** @handle_interrupt: Override default interrupt handling */
9010f9de 763 irqreturn_t (*handle_interrupt)(struct phy_device *phydev);
49644e68 764
4069a572 765 /** @remove: Clears up any memory if needed */
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766 void (*remove)(struct phy_device *phydev);
767
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768 /**
769 * @match_phy_device: Returns true if this is a suitable
770 * driver for the given phydev. If NULL, matching is based on
771 * phy_id and phy_id_mask.
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772 */
773 int (*match_phy_device)(struct phy_device *phydev);
774
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775 /**
776 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY
777 * register changes to enable Wake on LAN, so set_wol is
778 * provided to be called in the ethernet driver's set_wol
779 * function.
780 */
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781 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
782
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783 /**
784 * @get_wol: See set_wol, but for checking whether Wake on LAN
785 * is enabled.
786 */
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787 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
788
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789 /**
790 * @link_change_notify: Called to inform a PHY device driver
791 * when the core is about to change the link state. This
792 * callback is supposed to be used as fixup hook for drivers
793 * that need to take action when the link state
794 * changes. Drivers are by no means allowed to mess with the
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795 * PHY device structure in their implementations.
796 */
797 void (*link_change_notify)(struct phy_device *dev);
798
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799 /**
800 * @read_mmd: PHY specific driver override for reading a MMD
801 * register. This function is optional for PHY specific
802 * drivers. When not provided, the default MMD read function
803 * will be used by phy_read_mmd(), which will use either a
804 * direct read for Clause 45 PHYs or an indirect read for
805 * Clause 22 PHYs. devnum is the MMD device number within the
806 * PHY device, regnum is the register within the selected MMD
807 * device.
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808 */
809 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
810
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811 /**
812 * @write_mmd: PHY specific driver override for writing a MMD
813 * register. This function is optional for PHY specific
814 * drivers. When not provided, the default MMD write function
815 * will be used by phy_write_mmd(), which will use either a
816 * direct write for Clause 45 PHYs, or an indirect write for
817 * Clause 22 PHYs. devnum is the MMD device number within the
818 * PHY device, regnum is the register within the selected MMD
819 * device. val is the value to be written.
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820 */
821 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
822 u16 val);
823
4069a572 824 /** @read_page: Return the current PHY register page number */
78ffc4ac 825 int (*read_page)(struct phy_device *dev);
4069a572 826 /** @write_page: Set the current PHY register page number */
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827 int (*write_page)(struct phy_device *dev, int page);
828
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829 /**
830 * @module_info: Get the size and type of the eeprom contained
831 * within a plug-in module
832 */
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833 int (*module_info)(struct phy_device *dev,
834 struct ethtool_modinfo *modinfo);
835
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836 /**
837 * @module_eeprom: Get the eeprom information from the plug-in
838 * module
839 */
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840 int (*module_eeprom)(struct phy_device *dev,
841 struct ethtool_eeprom *ee, u8 *data);
842
4069a572 843 /** @cable_test_start: Start a cable test */
a68a8138 844 int (*cable_test_start)(struct phy_device *dev);
1a644de2 845
4069a572 846 /** @cable_test_tdr_start: Start a raw TDR cable test */
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847 int (*cable_test_tdr_start)(struct phy_device *dev,
848 const struct phy_tdr_config *config);
1a644de2 849
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850 /**
851 * @cable_test_get_status: Once per second, or on interrupt,
852 * request the status of the test.
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853 */
854 int (*cable_test_get_status)(struct phy_device *dev, bool *finished);
855
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856 /* Get statistics from the PHY using ethtool */
857 /** @get_sset_count: Number of statistic counters */
f3a40945 858 int (*get_sset_count)(struct phy_device *dev);
4069a572 859 /** @get_strings: Names of the statistic counters */
f3a40945 860 void (*get_strings)(struct phy_device *dev, u8 *data);
4069a572 861 /** @get_stats: Return the statistic counter values */
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862 void (*get_stats)(struct phy_device *dev,
863 struct ethtool_stats *stats, u64 *data);
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864
865 /* Get and Set PHY tunables */
4069a572 866 /** @get_tunable: Return the value of a tunable */
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867 int (*get_tunable)(struct phy_device *dev,
868 struct ethtool_tunable *tuna, void *data);
4069a572 869 /** @set_tunable: Set the value of a tunable */
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870 int (*set_tunable)(struct phy_device *dev,
871 struct ethtool_tunable *tuna,
872 const void *data);
4069a572 873 /** @set_loopback: Set the loopback mood of the PHY */
f0f9b4ed 874 int (*set_loopback)(struct phy_device *dev, bool enable);
4069a572 875 /** @get_sqi: Get the signal quality indication */
80660219 876 int (*get_sqi)(struct phy_device *dev);
4069a572 877 /** @get_sqi_max: Get the maximum signal quality indication */
80660219 878 int (*get_sqi_max)(struct phy_device *dev);
00db8189 879};
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880#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
881 struct phy_driver, mdiodrv)
00db8189 882
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883#define PHY_ANY_ID "MATCH ANY PHY"
884#define PHY_ANY_UID 0xffffffff
885
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886#define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
887#define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
888#define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
889
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890/* A Structure for boards to register fixups with the PHY Lib */
891struct phy_fixup {
892 struct list_head list;
4567d686 893 char bus_id[MII_BUS_ID_SIZE + 3];
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894 u32 phy_uid;
895 u32 phy_uid_mask;
896 int (*run)(struct phy_device *phydev);
897};
898
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899const char *phy_speed_to_str(int speed);
900const char *phy_duplex_to_str(unsigned int duplex);
901
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902/* A structure for mapping a particular speed and duplex
903 * combination to a particular SUPPORTED and ADVERTISED value
904 */
905struct phy_setting {
906 u32 speed;
907 u8 duplex;
908 u8 bit;
909};
910
911const struct phy_setting *
912phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
3c1bcc86 913 bool exact);
0ccb4fc6 914size_t phy_speeds(unsigned int *speeds, size_t size,
3c1bcc86 915 unsigned long *mask);
a4eaed9f 916void of_set_phy_supported(struct phy_device *phydev);
3feb9b23 917void of_set_phy_eee_broken(struct phy_device *phydev);
331c56ac 918int phy_speed_down_core(struct phy_device *phydev);
0ccb4fc6 919
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920/**
921 * phy_is_started - Convenience function to check whether PHY is started
922 * @phydev: The phy_device struct
923 */
924static inline bool phy_is_started(struct phy_device *phydev)
925{
a2fc9d7e 926 return phydev->state >= PHY_UP;
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927}
928
2d880b87 929void phy_resolve_aneg_pause(struct phy_device *phydev);
8c5e850c 930void phy_resolve_aneg_linkmode(struct phy_device *phydev);
5eee3bb7 931void phy_check_downshift(struct phy_device *phydev);
8c5e850c 932
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933/**
934 * phy_read - Convenience function for reading a given PHY register
935 * @phydev: the phy_device struct
936 * @regnum: register number to read
937 *
938 * NOTE: MUST NOT be called from interrupt context,
939 * because the bus read/write functions may wait for an interrupt
940 * to conclude the operation.
941 */
abf35df2 942static inline int phy_read(struct phy_device *phydev, u32 regnum)
2e888103 943{
e5a03bfd 944 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
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945}
946
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947#define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \
948 timeout_us, sleep_before_read) \
949({ \
950 int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \
951 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \
952 if (val < 0) \
953 __ret = val; \
954 if (__ret) \
955 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
956 __ret; \
957})
958
959
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960/**
961 * __phy_read - convenience function for reading a given PHY register
962 * @phydev: the phy_device struct
963 * @regnum: register number to read
964 *
965 * The caller must have taken the MDIO bus lock.
966 */
967static inline int __phy_read(struct phy_device *phydev, u32 regnum)
968{
969 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
970}
971
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972/**
973 * phy_write - Convenience function for writing a given PHY register
974 * @phydev: the phy_device struct
975 * @regnum: register number to write
976 * @val: value to write to @regnum
977 *
978 * NOTE: MUST NOT be called from interrupt context,
979 * because the bus read/write functions may wait for an interrupt
980 * to conclude the operation.
981 */
abf35df2 982static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
2e888103 983{
e5a03bfd 984 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
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985}
986
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987/**
988 * __phy_write - Convenience function for writing a given PHY register
989 * @phydev: the phy_device struct
990 * @regnum: register number to write
991 * @val: value to write to @regnum
992 *
993 * The caller must have taken the MDIO bus lock.
994 */
995static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
996{
997 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
998 val);
999}
1000
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1001/**
1002 * __phy_modify_changed() - Convenience function for modifying a PHY register
1003 * @phydev: a pointer to a &struct phy_device
1004 * @regnum: register number
1005 * @mask: bit mask of bits to clear
1006 * @set: bit mask of bits to set
1007 *
1008 * Unlocked helper function which allows a PHY register to be modified as
1009 * new register value = (old register value & ~mask) | set
1010 *
1011 * Returns negative errno, 0 if there was no change, and 1 in case of change
1012 */
1013static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum,
1014 u16 mask, u16 set)
1015{
1016 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr,
1017 regnum, mask, set);
1018}
1019
e86c6569 1020/*
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1021 * phy_read_mmd - Convenience function for reading a register
1022 * from an MMD on a given PHY.
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1023 */
1024int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1025
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1026/**
1027 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a
1028 * condition is met or a timeout occurs
1029 *
1030 * @phydev: The phy_device struct
1031 * @devaddr: The MMD to read from
1032 * @regnum: The register on the MMD to read
1033 * @val: Variable to read the register into
1034 * @cond: Break condition (usually involving @val)
1035 * @sleep_us: Maximum time to sleep between reads in us (0
1036 * tight-loops). Should be less than ~20ms since usleep_range
1037 * is used (see Documentation/timers/timers-howto.rst).
1038 * @timeout_us: Timeout in us, 0 means never timeout
1039 * @sleep_before_read: if it is true, sleep @sleep_us before read.
1040 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
1041 * case, the last read value at @args is stored in @val. Must not
1042 * be called from atomic context if sleep_us or timeout_us are used.
1043 */
bd971ff0
DZ
1044#define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
1045 sleep_us, timeout_us, sleep_before_read) \
1046({ \
1047 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \
1048 sleep_us, timeout_us, sleep_before_read, \
1049 phydev, devaddr, regnum); \
1050 if (val < 0) \
1051 __ret = val; \
1052 if (__ret) \
1053 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1054 __ret; \
1055})
1056
e86c6569 1057/*
1878f0dc
NY
1058 * __phy_read_mmd - Convenience function for reading a register
1059 * from an MMD on a given PHY.
1878f0dc
NY
1060 */
1061int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1062
e86c6569 1063/*
1878f0dc
NY
1064 * phy_write_mmd - Convenience function for writing a register
1065 * on an MMD on a given PHY.
1878f0dc
NY
1066 */
1067int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1068
e86c6569 1069/*
1878f0dc
NY
1070 * __phy_write_mmd - Convenience function for writing a register
1071 * on an MMD on a given PHY.
1878f0dc
NY
1072 */
1073int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1074
b8554d4f
HK
1075int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1076 u16 set);
1077int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1078 u16 set);
788f9933 1079int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
2b74e5be 1080int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
788f9933 1081
b8554d4f
HK
1082int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1083 u16 mask, u16 set);
1084int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1085 u16 mask, u16 set);
1878f0dc 1086int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
b8554d4f 1087 u16 mask, u16 set);
1878f0dc 1088int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
b8554d4f 1089 u16 mask, u16 set);
1878f0dc 1090
ac8322d8
HK
1091/**
1092 * __phy_set_bits - Convenience function for setting bits in a PHY register
1093 * @phydev: the phy_device struct
1094 * @regnum: register number to write
1095 * @val: bits to set
1096 *
1097 * The caller must have taken the MDIO bus lock.
1098 */
1099static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1100{
1101 return __phy_modify(phydev, regnum, 0, val);
1102}
1103
1104/**
1105 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
1106 * @phydev: the phy_device struct
1107 * @regnum: register number to write
1108 * @val: bits to clear
1109 *
1110 * The caller must have taken the MDIO bus lock.
1111 */
1112static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
1113 u16 val)
1114{
1115 return __phy_modify(phydev, regnum, val, 0);
1116}
1117
1118/**
1119 * phy_set_bits - Convenience function for setting bits in a PHY register
1120 * @phydev: the phy_device struct
1121 * @regnum: register number to write
1122 * @val: bits to set
1123 */
1124static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1125{
1126 return phy_modify(phydev, regnum, 0, val);
1127}
1128
1129/**
1130 * phy_clear_bits - Convenience function for clearing bits in a PHY register
1131 * @phydev: the phy_device struct
1132 * @regnum: register number to write
1133 * @val: bits to clear
1134 */
1135static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
1136{
1137 return phy_modify(phydev, regnum, val, 0);
1138}
1139
1878f0dc
NY
1140/**
1141 * __phy_set_bits_mmd - Convenience function for setting bits in a register
1142 * on MMD
1143 * @phydev: the phy_device struct
1144 * @devad: the MMD containing register to modify
1145 * @regnum: register number to modify
1146 * @val: bits to set
1147 *
1148 * The caller must have taken the MDIO bus lock.
1149 */
1150static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
1151 u32 regnum, u16 val)
1152{
1153 return __phy_modify_mmd(phydev, devad, regnum, 0, val);
1154}
1155
1156/**
1157 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
1158 * on MMD
1159 * @phydev: the phy_device struct
1160 * @devad: the MMD containing register to modify
1161 * @regnum: register number to modify
1162 * @val: bits to clear
1163 *
1164 * The caller must have taken the MDIO bus lock.
1165 */
1166static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1167 u32 regnum, u16 val)
1168{
1169 return __phy_modify_mmd(phydev, devad, regnum, val, 0);
1170}
1171
1172/**
1173 * phy_set_bits_mmd - Convenience function for setting bits in a register
1174 * on MMD
1175 * @phydev: the phy_device struct
1176 * @devad: the MMD containing register to modify
1177 * @regnum: register number to modify
1178 * @val: bits to set
1179 */
1180static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
1181 u32 regnum, u16 val)
1182{
1183 return phy_modify_mmd(phydev, devad, regnum, 0, val);
1184}
1185
1186/**
1187 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
1188 * on MMD
1189 * @phydev: the phy_device struct
1190 * @devad: the MMD containing register to modify
1191 * @regnum: register number to modify
1192 * @val: bits to clear
1193 */
1194static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1195 u32 regnum, u16 val)
1196{
1197 return phy_modify_mmd(phydev, devad, regnum, val, 0);
1198}
1199
2c7b4921
FF
1200/**
1201 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
1202 * @phydev: the phy_device struct
1203 *
1204 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
1205 * PHY_IGNORE_INTERRUPT
1206 */
1207static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
1208{
1209 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
1210}
1211
3c507b8a
HK
1212/**
1213 * phy_polling_mode - Convenience function for testing whether polling is
1214 * used to detect PHY status changes
1215 * @phydev: the phy_device struct
1216 */
1217static inline bool phy_polling_mode(struct phy_device *phydev)
1218{
97c22438
AL
1219 if (phydev->state == PHY_CABLETEST)
1220 if (phydev->drv->flags & PHY_POLL_CABLE_TEST)
1221 return true;
1222
3c507b8a
HK
1223 return phydev->irq == PHY_POLL;
1224}
1225
0e5dafc8
RC
1226/**
1227 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration.
1228 * @phydev: the phy_device struct
1229 */
1230static inline bool phy_has_hwtstamp(struct phy_device *phydev)
1231{
4715f65f 1232 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp;
0e5dafc8
RC
1233}
1234
1235/**
1236 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping.
1237 * @phydev: the phy_device struct
1238 */
1239static inline bool phy_has_rxtstamp(struct phy_device *phydev)
1240{
4715f65f 1241 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp;
0e5dafc8
RC
1242}
1243
1244/**
1245 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or
1246 * PTP hardware clock capabilities.
1247 * @phydev: the phy_device struct
1248 */
1249static inline bool phy_has_tsinfo(struct phy_device *phydev)
1250{
4715f65f 1251 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info;
0e5dafc8
RC
1252}
1253
1254/**
1255 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping.
1256 * @phydev: the phy_device struct
1257 */
1258static inline bool phy_has_txtstamp(struct phy_device *phydev)
1259{
4715f65f 1260 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp;
0e5dafc8
RC
1261}
1262
1263static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr)
1264{
4715f65f 1265 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr);
0e5dafc8
RC
1266}
1267
1268static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb,
1269 int type)
1270{
4715f65f 1271 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type);
0e5dafc8
RC
1272}
1273
1274static inline int phy_ts_info(struct phy_device *phydev,
1275 struct ethtool_ts_info *tsinfo)
1276{
4715f65f 1277 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo);
0e5dafc8
RC
1278}
1279
1280static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb,
1281 int type)
1282{
4715f65f 1283 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type);
0e5dafc8
RC
1284}
1285
4284b6a5
FF
1286/**
1287 * phy_is_internal - Convenience function for testing if a PHY is internal
1288 * @phydev: the phy_device struct
1289 */
1290static inline bool phy_is_internal(struct phy_device *phydev)
1291{
1292 return phydev->is_internal;
1293}
1294
32d0f783
IS
1295/**
1296 * phy_interface_mode_is_rgmii - Convenience function for testing if a
1297 * PHY interface mode is RGMII (all variants)
4069a572 1298 * @mode: the &phy_interface_t enum
32d0f783
IS
1299 */
1300static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
1301{
1302 return mode >= PHY_INTERFACE_MODE_RGMII &&
1303 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
1304};
1305
365c1e64 1306/**
4069a572 1307 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z
365c1e64
RK
1308 * negotiation
1309 * @mode: one of &enum phy_interface_t
1310 *
4069a572 1311 * Returns true if the PHY interface mode uses the 16-bit negotiation
365c1e64
RK
1312 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
1313 */
1314static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
1315{
1316 return mode == PHY_INTERFACE_MODE_1000BASEX ||
1317 mode == PHY_INTERFACE_MODE_2500BASEX;
1318}
1319
e463d88c
FF
1320/**
1321 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
1322 * is RGMII (all variants)
1323 * @phydev: the phy_device struct
1324 */
1325static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
1326{
32d0f783 1327 return phy_interface_mode_is_rgmii(phydev->interface);
5a11dd7d
FF
1328};
1329
4069a572 1330/**
5a11dd7d
FF
1331 * phy_is_pseudo_fixed_link - Convenience function for testing if this
1332 * PHY is the CPU port facing side of an Ethernet switch, or similar.
1333 * @phydev: the phy_device struct
1334 */
1335static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
1336{
1337 return phydev->is_pseudo_fixed_link;
e463d88c
FF
1338}
1339
78ffc4ac
RK
1340int phy_save_page(struct phy_device *phydev);
1341int phy_select_page(struct phy_device *phydev, int page);
1342int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
1343int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
1344int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
bf22b343
HK
1345int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
1346 u16 mask, u16 set);
78ffc4ac
RK
1347int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
1348 u16 mask, u16 set);
1349
7d49a32a 1350struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
4017b4d3
SS
1351 bool is_c45,
1352 struct phy_c45_device_ids *c45_ids);
90eff909 1353#if IS_ENABLED(CONFIG_PHYLIB)
ac28b9f8 1354struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
4dea547f 1355int phy_device_register(struct phy_device *phy);
90eff909
FF
1356void phy_device_free(struct phy_device *phydev);
1357#else
1358static inline
1359struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1360{
1361 return NULL;
1362}
1363
1364static inline int phy_device_register(struct phy_device *phy)
1365{
1366 return 0;
1367}
1368
1369static inline void phy_device_free(struct phy_device *phydev) { }
1370#endif /* CONFIG_PHYLIB */
38737e49 1371void phy_device_remove(struct phy_device *phydev);
2f5cb434 1372int phy_init_hw(struct phy_device *phydev);
481b5d93
SH
1373int phy_suspend(struct phy_device *phydev);
1374int phy_resume(struct phy_device *phydev);
9c2c2e62 1375int __phy_resume(struct phy_device *phydev);
f0f9b4ed 1376int phy_loopback(struct phy_device *phydev, bool enable);
298e54fa
RK
1377void phy_sfp_attach(void *upstream, struct sfp_bus *bus);
1378void phy_sfp_detach(void *upstream, struct sfp_bus *bus);
1379int phy_sfp_probe(struct phy_device *phydev,
1380 const struct sfp_upstream_ops *ops);
4017b4d3
SS
1381struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1382 phy_interface_t interface);
f8f76db1 1383struct phy_device *phy_find_first(struct mii_bus *bus);
257184d7
AF
1384int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1385 u32 flags, phy_interface_t interface);
fa94f6d9 1386int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
4017b4d3
SS
1387 void (*handler)(struct net_device *),
1388 phy_interface_t interface);
1389struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1390 void (*handler)(struct net_device *),
1391 phy_interface_t interface);
e1393456
AF
1392void phy_disconnect(struct phy_device *phydev);
1393void phy_detach(struct phy_device *phydev);
1394void phy_start(struct phy_device *phydev);
1395void phy_stop(struct phy_device *phydev);
1396int phy_start_aneg(struct phy_device *phydev);
372788f9 1397int phy_aneg_done(struct phy_device *phydev);
2b9672dd
HK
1398int phy_speed_down(struct phy_device *phydev, bool sync);
1399int phy_speed_up(struct phy_device *phydev);
e1393456 1400
002ba705 1401int phy_restart_aneg(struct phy_device *phydev);
a9668491 1402int phy_reset_after_clk_enable(struct phy_device *phydev);
00db8189 1403
a68a8138
AL
1404#if IS_ENABLED(CONFIG_PHYLIB)
1405int phy_start_cable_test(struct phy_device *phydev,
1406 struct netlink_ext_ack *extack);
1a644de2 1407int phy_start_cable_test_tdr(struct phy_device *phydev,
f2bc8ad3
AL
1408 struct netlink_ext_ack *extack,
1409 const struct phy_tdr_config *config);
a68a8138
AL
1410#else
1411static inline
1412int phy_start_cable_test(struct phy_device *phydev,
1413 struct netlink_ext_ack *extack)
1414{
1415 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1416 return -EOPNOTSUPP;
1417}
1a644de2
AL
1418static inline
1419int phy_start_cable_test_tdr(struct phy_device *phydev,
f2bc8ad3
AL
1420 struct netlink_ext_ack *extack,
1421 const struct phy_tdr_config *config)
1a644de2
AL
1422{
1423 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1424 return -EOPNOTSUPP;
1425}
a68a8138
AL
1426#endif
1427
1e2dc145
AL
1428int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result);
1429int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair,
1430 u16 cm);
1431
bafbdd52
SS
1432static inline void phy_device_reset(struct phy_device *phydev, int value)
1433{
1434 mdio_device_reset(&phydev->mdio, value);
1435}
1436
72ba48be 1437#define phydev_err(_phydev, format, args...) \
e5a03bfd 1438 dev_err(&_phydev->mdio.dev, format, ##args)
72ba48be 1439
c4fabb8b
AL
1440#define phydev_info(_phydev, format, args...) \
1441 dev_info(&_phydev->mdio.dev, format, ##args)
1442
ab2a605f
AL
1443#define phydev_warn(_phydev, format, args...) \
1444 dev_warn(&_phydev->mdio.dev, format, ##args)
1445
72ba48be 1446#define phydev_dbg(_phydev, format, args...) \
2eaa38d9 1447 dev_dbg(&_phydev->mdio.dev, format, ##args)
72ba48be 1448
84eff6d1
AL
1449static inline const char *phydev_name(const struct phy_device *phydev)
1450{
e5a03bfd 1451 return dev_name(&phydev->mdio.dev);
84eff6d1
AL
1452}
1453
bec170e5
HK
1454static inline void phy_lock_mdio_bus(struct phy_device *phydev)
1455{
1456 mutex_lock(&phydev->mdio.bus->mdio_lock);
1457}
1458
1459static inline void phy_unlock_mdio_bus(struct phy_device *phydev)
1460{
1461 mutex_unlock(&phydev->mdio.bus->mdio_lock);
1462}
1463
2220943a
AL
1464void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1465 __printf(2, 3);
e27f1787
FF
1466char *phy_attached_info_irq(struct phy_device *phydev)
1467 __malloc;
2220943a 1468void phy_attached_info(struct phy_device *phydev);
5acde34a
RK
1469
1470/* Clause 22 PHY */
045925e3 1471int genphy_read_abilities(struct phy_device *phydev);
3fb69bca 1472int genphy_setup_forced(struct phy_device *phydev);
00db8189 1473int genphy_restart_aneg(struct phy_device *phydev);
2a10ab04 1474int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart);
cd34499c 1475int genphy_config_eee_advert(struct phy_device *phydev);
f4069cd7 1476int __genphy_config_aneg(struct phy_device *phydev, bool changed);
a9fa6e6a 1477int genphy_aneg_done(struct phy_device *phydev);
00db8189 1478int genphy_update_link(struct phy_device *phydev);
8d3dc3ac 1479int genphy_read_lpa(struct phy_device *phydev);
0efc286a 1480int genphy_read_status_fixed(struct phy_device *phydev);
00db8189 1481int genphy_read_status(struct phy_device *phydev);
0f0ca340
GC
1482int genphy_suspend(struct phy_device *phydev);
1483int genphy_resume(struct phy_device *phydev);
f0f9b4ed 1484int genphy_loopback(struct phy_device *phydev, bool enable);
797ac071 1485int genphy_soft_reset(struct phy_device *phydev);
87de1f05 1486irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev);
f4069cd7
HK
1487
1488static inline int genphy_config_aneg(struct phy_device *phydev)
1489{
1490 return __genphy_config_aneg(phydev, false);
1491}
1492
4c8e0459
LW
1493static inline int genphy_no_config_intr(struct phy_device *phydev)
1494{
1495 return 0;
1496}
5df7af85
KH
1497int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1498 u16 regnum);
1499int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1500 u16 regnum, u16 val);
5acde34a 1501
fa6e98ce
HK
1502/* Clause 37 */
1503int genphy_c37_config_aneg(struct phy_device *phydev);
1504int genphy_c37_read_status(struct phy_device *phydev);
1505
5acde34a
RK
1506/* Clause 45 PHY */
1507int genphy_c45_restart_aneg(struct phy_device *phydev);
1af9f168 1508int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
5acde34a 1509int genphy_c45_aneg_done(struct phy_device *phydev);
998a8a83 1510int genphy_c45_read_link(struct phy_device *phydev);
5acde34a
RK
1511int genphy_c45_read_lpa(struct phy_device *phydev);
1512int genphy_c45_read_pma(struct phy_device *phydev);
1513int genphy_c45_pma_setup_forced(struct phy_device *phydev);
9a5dc8af 1514int genphy_c45_an_config_aneg(struct phy_device *phydev);
5acde34a 1515int genphy_c45_an_disable_aneg(struct phy_device *phydev);
ea4efe25 1516int genphy_c45_read_mdix(struct phy_device *phydev);
ac3f5533 1517int genphy_c45_pma_read_abilities(struct phy_device *phydev);
70fa3a96 1518int genphy_c45_read_status(struct phy_device *phydev);
94acaeb5 1519int genphy_c45_config_aneg(struct phy_device *phydev);
5acde34a 1520
3970ed49
AL
1521/* Generic C45 PHY driver */
1522extern struct phy_driver genphy_c45_driver;
1523
e8a714e0
FF
1524/* The gen10g_* functions are the old Clause 45 stub */
1525int gen10g_config_aneg(struct phy_device *phydev);
e8a714e0 1526
00fde795
HK
1527static inline int phy_read_status(struct phy_device *phydev)
1528{
1529 if (!phydev->drv)
1530 return -EIO;
1531
1532 if (phydev->drv->read_status)
1533 return phydev->drv->read_status(phydev);
1534 else
1535 return genphy_read_status(phydev);
1536}
1537
00db8189 1538void phy_driver_unregister(struct phy_driver *drv);
d5bf9071 1539void phy_drivers_unregister(struct phy_driver *drv, int n);
be01da72
AL
1540int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1541int phy_drivers_register(struct phy_driver *new_driver, int n,
1542 struct module *owner);
293e9a3d 1543void phy_error(struct phy_device *phydev);
4f9c85a1 1544void phy_state_machine(struct work_struct *work);
97b33bdf 1545void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies);
293e9a3d 1546void phy_trigger_machine(struct phy_device *phydev);
28b2e0d2 1547void phy_mac_interrupt(struct phy_device *phydev);
29935aeb 1548void phy_start_machine(struct phy_device *phydev);
00db8189 1549void phy_stop_machine(struct phy_device *phydev);
5514174f 1550void phy_ethtool_ksettings_get(struct phy_device *phydev,
1551 struct ethtool_link_ksettings *cmd);
2d55173e
PR
1552int phy_ethtool_ksettings_set(struct phy_device *phydev,
1553 const struct ethtool_link_ksettings *cmd);
4017b4d3 1554int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
bbbf8430 1555int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
3231e5d2 1556int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd);
3dd4ef1b 1557int phy_disable_interrupts(struct phy_device *phydev);
434a4315 1558void phy_request_interrupt(struct phy_device *phydev);
07b09289 1559void phy_free_interrupt(struct phy_device *phydev);
e1393456 1560void phy_print_status(struct phy_device *phydev);
f3a6bd39 1561int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
41124fa6 1562void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
22c0ef6b 1563void phy_advertise_supported(struct phy_device *phydev);
c306ad36 1564void phy_support_sym_pause(struct phy_device *phydev);
af8d9bb2 1565void phy_support_asym_pause(struct phy_device *phydev);
0c122405
AL
1566void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1567 bool autoneg);
70814e81 1568void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
22b7d299
AL
1569bool phy_validate_pause(struct phy_device *phydev,
1570 struct ethtool_pauseparam *pp);
a87ae8a9 1571void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause);
92252eec
DM
1572
1573s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,
1574 const int *delay_values, int size, bool is_rx);
1575
a87ae8a9
RK
1576void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv,
1577 bool *tx_pause, bool *rx_pause);
00db8189 1578
f62220d3 1579int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1580 int (*run)(struct phy_device *));
f62220d3 1581int phy_register_fixup_for_id(const char *bus_id,
4017b4d3 1582 int (*run)(struct phy_device *));
f62220d3 1583int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1584 int (*run)(struct phy_device *));
f62220d3 1585
f38e7a32
WH
1586int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1587int phy_unregister_fixup_for_id(const char *bus_id);
1588int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1589
a59a4d19
GC
1590int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1591int phy_get_eee_err(struct phy_device *phydev);
1592int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1593int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
42e836eb 1594int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
4017b4d3
SS
1595void phy_ethtool_get_wol(struct phy_device *phydev,
1596 struct ethtool_wolinfo *wol);
9d9a77ce
PR
1597int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1598 struct ethtool_link_ksettings *cmd);
1599int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1600 const struct ethtool_link_ksettings *cmd);
e86a8987 1601int phy_ethtool_nway_reset(struct net_device *ndev);
63490847
MW
1602int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size);
1603void phy_package_leave(struct phy_device *phydev);
1604int devm_phy_package_join(struct device *dev, struct phy_device *phydev,
1605 int addr, size_t priv_size);
a59a4d19 1606
90eff909 1607#if IS_ENABLED(CONFIG_PHYLIB)
9b9a8bfc
AF
1608int __init mdio_bus_init(void);
1609void mdio_bus_exit(void);
9e8d438e
FF
1610#endif
1611
17809516
FF
1612int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data);
1613int phy_ethtool_get_sset_count(struct phy_device *phydev);
1614int phy_ethtool_get_stats(struct phy_device *phydev,
1615 struct ethtool_stats *stats, u64 *data);
9b9a8bfc 1616
63490847
MW
1617static inline int phy_package_read(struct phy_device *phydev, u32 regnum)
1618{
1619 struct phy_package_shared *shared = phydev->shared;
1620
1621 if (!shared)
1622 return -EIO;
1623
1624 return mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
1625}
1626
1627static inline int __phy_package_read(struct phy_device *phydev, u32 regnum)
1628{
1629 struct phy_package_shared *shared = phydev->shared;
1630
1631 if (!shared)
1632 return -EIO;
1633
1634 return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
1635}
1636
1637static inline int phy_package_write(struct phy_device *phydev,
1638 u32 regnum, u16 val)
1639{
1640 struct phy_package_shared *shared = phydev->shared;
1641
1642 if (!shared)
1643 return -EIO;
1644
1645 return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
1646}
1647
1648static inline int __phy_package_write(struct phy_device *phydev,
1649 u32 regnum, u16 val)
1650{
1651 struct phy_package_shared *shared = phydev->shared;
1652
1653 if (!shared)
1654 return -EIO;
1655
1656 return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
1657}
1658
0ef44e5c
AT
1659static inline bool __phy_package_set_once(struct phy_device *phydev,
1660 unsigned int b)
63490847
MW
1661{
1662 struct phy_package_shared *shared = phydev->shared;
1663
1664 if (!shared)
1665 return false;
1666
0ef44e5c
AT
1667 return !test_and_set_bit(b, &shared->flags);
1668}
1669
1670static inline bool phy_package_init_once(struct phy_device *phydev)
1671{
1672 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE);
1673}
1674
1675static inline bool phy_package_probe_once(struct phy_device *phydev)
1676{
1677 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE);
63490847
MW
1678}
1679
00db8189 1680extern struct bus_type mdio_bus_type;
c31accd1 1681
648ea013
FF
1682struct mdio_board_info {
1683 const char *bus_id;
1684 char modalias[MDIO_NAME_SIZE];
1685 int mdio_addr;
1686 const void *platform_data;
1687};
1688
90eff909 1689#if IS_ENABLED(CONFIG_MDIO_DEVICE)
648ea013
FF
1690int mdiobus_register_board_info(const struct mdio_board_info *info,
1691 unsigned int n);
1692#else
1693static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1694 unsigned int n)
1695{
1696 return 0;
1697}
1698#endif
1699
1700
c31accd1 1701/**
39097ab6 1702 * phy_module_driver() - Helper macro for registering PHY drivers
c31accd1 1703 * @__phy_drivers: array of PHY drivers to register
39097ab6 1704 * @__count: Numbers of members in array
c31accd1
JH
1705 *
1706 * Helper macro for PHY drivers which do not do anything special in module
1707 * init/exit. Each module may only use this macro once, and calling it
1708 * replaces module_init() and module_exit().
1709 */
1710#define phy_module_driver(__phy_drivers, __count) \
1711static int __init phy_module_init(void) \
1712{ \
be01da72 1713 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
c31accd1
JH
1714} \
1715module_init(phy_module_init); \
1716static void __exit phy_module_exit(void) \
1717{ \
1718 phy_drivers_unregister(__phy_drivers, __count); \
1719} \
1720module_exit(phy_module_exit)
1721
1722#define module_phy_driver(__phy_drivers) \
1723 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1724
5db5ea99
FF
1725bool phy_driver_is_genphy(struct phy_device *phydev);
1726bool phy_driver_is_genphy_10g(struct phy_device *phydev);
1727
00db8189 1728#endif /* __PHY_H */