net: phy: ar803x: disable extended next page bit
[linux-block.git] / include / linux / phy.h
CommitLineData
2874c5fd 1/* SPDX-License-Identifier: GPL-2.0-or-later */
00db8189 2/*
00db8189 3 * Framework and drivers for configuring and reading different PHYs
d8de01b7 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
00db8189
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5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
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AF
9 */
10
11#ifndef __PHY_H
12#define __PHY_H
13
2220943a 14#include <linux/compiler.h>
00db8189 15#include <linux/spinlock.h>
13df29f6 16#include <linux/ethtool.h>
b31cdffa 17#include <linux/linkmode.h>
a68a8138 18#include <linux/netlink.h>
bac83c65 19#include <linux/mdio.h>
13df29f6 20#include <linux/mii.h>
4715f65f 21#include <linux/mii_timestamper.h>
3e3aaf64 22#include <linux/module.h>
13df29f6
MR
23#include <linux/timer.h>
24#include <linux/workqueue.h>
8626d3b4 25#include <linux/mod_devicetable.h>
080bb352 26#include <linux/u64_stats_sync.h>
9010f9de 27#include <linux/irqreturn.h>
bd971ff0 28#include <linux/iopoll.h>
63490847 29#include <linux/refcount.h>
00db8189 30
60063497 31#include <linux/atomic.h>
0ac49527 32
e9fbdf17 33#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
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34 SUPPORTED_TP | \
35 SUPPORTED_MII)
36
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37#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
38 SUPPORTED_10baseT_Full)
39
40#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
41 SUPPORTED_100baseT_Full)
42
43#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
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44 SUPPORTED_1000baseT_Full)
45
719655a1
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46extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
47extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
48extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
49extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
50extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
51extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
9e857a40 52extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
719655a1
AL
53extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
54
55#define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
56#define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
57#define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
58#define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
59#define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
60#define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
9e857a40 61#define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
719655a1 62#define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
e9fbdf17 63
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64extern const int phy_basic_ports_array[3];
65extern const int phy_fibre_port_array[1];
66extern const int phy_all_ports_features_array[7];
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67extern const int phy_10_100_features_array[4];
68extern const int phy_basic_t1_features_array[2];
69extern const int phy_gbit_features_array[2];
70extern const int phy_10gbit_features_array[1];
71
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72/*
73 * Set phydev->irq to PHY_POLL if interrupts are not supported,
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74 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
75 * the attached driver handles the interrupt
76 */
77#define PHY_POLL -1
78#define PHY_IGNORE_INTERRUPT -2
79
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80#define PHY_IS_INTERNAL 0x00000001
81#define PHY_RST_AFTER_CLK_EN 0x00000002
97c22438 82#define PHY_POLL_CABLE_TEST 0x00000004
a9049e0c 83#define MDIO_DEVICE_IS_PHY 0x80000000
00db8189 84
4069a572
AL
85/**
86 * enum phy_interface_t - Interface Mode definitions
87 *
88 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
89 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined
90 * @PHY_INTERFACE_MODE_MII: Median-independent interface
91 * @PHY_INTERFACE_MODE_GMII: Gigabit median-independent interface
92 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface
93 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface
94 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface
95 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface
96 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface
97 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay
98 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay
99 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay
100 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI
101 * @PHY_INTERFACE_MODE_SMII: ??? MII
102 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface
103 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface
104 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax
105 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII
106 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII
107 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX
108 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX
109 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI
110 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface
111 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR
112 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII
113 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN
114 * @PHY_INTERFACE_MODE_MAX: Book keeping
115 *
116 * Describes the interface between the MAC and PHY.
117 */
e8a2b6a4 118typedef enum {
4157ef1b 119 PHY_INTERFACE_MODE_NA,
735d8a18 120 PHY_INTERFACE_MODE_INTERNAL,
e8a2b6a4
AF
121 PHY_INTERFACE_MODE_MII,
122 PHY_INTERFACE_MODE_GMII,
123 PHY_INTERFACE_MODE_SGMII,
124 PHY_INTERFACE_MODE_TBI,
2cc70ba4 125 PHY_INTERFACE_MODE_REVMII,
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126 PHY_INTERFACE_MODE_RMII,
127 PHY_INTERFACE_MODE_RGMII,
a999589c 128 PHY_INTERFACE_MODE_RGMII_ID,
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129 PHY_INTERFACE_MODE_RGMII_RXID,
130 PHY_INTERFACE_MODE_RGMII_TXID,
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131 PHY_INTERFACE_MODE_RTBI,
132 PHY_INTERFACE_MODE_SMII,
898dd0bd 133 PHY_INTERFACE_MODE_XGMII,
58b05e58 134 PHY_INTERFACE_MODE_XLGMII,
fd70f72c 135 PHY_INTERFACE_MODE_MOCA,
b9d12085 136 PHY_INTERFACE_MODE_QSGMII,
572de608 137 PHY_INTERFACE_MODE_TRGMII,
55601a88
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138 PHY_INTERFACE_MODE_1000BASEX,
139 PHY_INTERFACE_MODE_2500BASEX,
140 PHY_INTERFACE_MODE_RXAUI,
c125ca09 141 PHY_INTERFACE_MODE_XAUI,
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142 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
143 PHY_INTERFACE_MODE_10GBASER,
4618d671 144 PHY_INTERFACE_MODE_USXGMII,
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145 /* 10GBASE-KR - with Clause 73 AN */
146 PHY_INTERFACE_MODE_10GKR,
8a2fe56e 147 PHY_INTERFACE_MODE_MAX,
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148} phy_interface_t;
149
e86c6569 150/*
4069a572 151 * phy_supported_speeds - return all speeds currently supported by a PHY device
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152 */
153unsigned int phy_supported_speeds(struct phy_device *phy,
154 unsigned int *speeds,
155 unsigned int size);
156
8a2fe56e 157/**
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158 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
159 * @interface: enum phy_interface_t value
160 *
4069a572 161 * Description: maps enum &phy_interface_t defined in this file
8a2fe56e 162 * into the device tree binding of 'phy-mode', so that Ethernet
4069a572 163 * device driver can get PHY interface from device tree.
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164 */
165static inline const char *phy_modes(phy_interface_t interface)
166{
167 switch (interface) {
168 case PHY_INTERFACE_MODE_NA:
169 return "";
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170 case PHY_INTERFACE_MODE_INTERNAL:
171 return "internal";
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172 case PHY_INTERFACE_MODE_MII:
173 return "mii";
174 case PHY_INTERFACE_MODE_GMII:
175 return "gmii";
176 case PHY_INTERFACE_MODE_SGMII:
177 return "sgmii";
178 case PHY_INTERFACE_MODE_TBI:
179 return "tbi";
180 case PHY_INTERFACE_MODE_REVMII:
181 return "rev-mii";
182 case PHY_INTERFACE_MODE_RMII:
183 return "rmii";
184 case PHY_INTERFACE_MODE_RGMII:
185 return "rgmii";
186 case PHY_INTERFACE_MODE_RGMII_ID:
187 return "rgmii-id";
188 case PHY_INTERFACE_MODE_RGMII_RXID:
189 return "rgmii-rxid";
190 case PHY_INTERFACE_MODE_RGMII_TXID:
191 return "rgmii-txid";
192 case PHY_INTERFACE_MODE_RTBI:
193 return "rtbi";
194 case PHY_INTERFACE_MODE_SMII:
195 return "smii";
196 case PHY_INTERFACE_MODE_XGMII:
197 return "xgmii";
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198 case PHY_INTERFACE_MODE_XLGMII:
199 return "xlgmii";
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200 case PHY_INTERFACE_MODE_MOCA:
201 return "moca";
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202 case PHY_INTERFACE_MODE_QSGMII:
203 return "qsgmii";
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204 case PHY_INTERFACE_MODE_TRGMII:
205 return "trgmii";
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AL
206 case PHY_INTERFACE_MODE_1000BASEX:
207 return "1000base-x";
208 case PHY_INTERFACE_MODE_2500BASEX:
209 return "2500base-x";
210 case PHY_INTERFACE_MODE_RXAUI:
211 return "rxaui";
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212 case PHY_INTERFACE_MODE_XAUI:
213 return "xaui";
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214 case PHY_INTERFACE_MODE_10GBASER:
215 return "10gbase-r";
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216 case PHY_INTERFACE_MODE_USXGMII:
217 return "usxgmii";
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218 case PHY_INTERFACE_MODE_10GKR:
219 return "10gbase-kr";
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220 default:
221 return "unknown";
222 }
223}
224
00db8189 225
e8a2b6a4 226#define PHY_INIT_TIMEOUT 100000
00db8189 227#define PHY_FORCE_TIMEOUT 10
00db8189 228
e8a2b6a4 229#define PHY_MAX_ADDR 32
00db8189 230
a4d00f17 231/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
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232#define PHY_ID_FMT "%s:%02x"
233
4567d686 234#define MII_BUS_ID_SIZE 61
a4d00f17 235
313162d0 236struct device;
9525ae83 237struct phylink;
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238struct sfp_bus;
239struct sfp_upstream_ops;
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240struct sk_buff;
241
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242/**
243 * struct mdio_bus_stats - Statistics counters for MDIO busses
244 * @transfers: Total number of transfers, i.e. @writes + @reads
245 * @errors: Number of MDIO transfers that returned an error
246 * @writes: Number of write transfers
247 * @reads: Number of read transfers
248 * @syncp: Synchronisation for incrementing statistics
249 */
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FF
250struct mdio_bus_stats {
251 u64_stats_t transfers;
252 u64_stats_t errors;
253 u64_stats_t writes;
254 u64_stats_t reads;
255 /* Must be last, add new statistics above */
256 struct u64_stats_sync syncp;
257};
258
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AL
259/**
260 * struct phy_package_shared - Shared information in PHY packages
261 * @addr: Common PHY address used to combine PHYs in one package
262 * @refcnt: Number of PHYs connected to this shared data
263 * @flags: Initialization of PHY package
264 * @priv_size: Size of the shared private data @priv
265 * @priv: Driver private data shared across a PHY package
266 *
267 * Represents a shared structure between different phydev's in the same
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268 * package, for example a quad PHY. See phy_package_join() and
269 * phy_package_leave().
270 */
271struct phy_package_shared {
272 int addr;
273 refcount_t refcnt;
274 unsigned long flags;
275 size_t priv_size;
276
277 /* private data pointer */
278 /* note that this pointer is shared between different phydevs and
279 * the user has to take care of appropriate locking. It is allocated
280 * and freed automatically by phy_package_join() and
281 * phy_package_leave().
282 */
283 void *priv;
284};
285
286/* used as bit number in atomic bitops */
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287#define PHY_SHARED_F_INIT_DONE 0
288#define PHY_SHARED_F_PROBE_DONE 1
63490847 289
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290/**
291 * struct mii_bus - Represents an MDIO bus
292 *
293 * @owner: Who owns this device
294 * @name: User friendly name for this MDIO device, or driver name
295 * @id: Unique identifier for this bus, typical from bus hierarchy
296 * @priv: Driver private data
297 *
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AF
298 * The Bus class for PHYs. Devices which provide access to
299 * PHYs should register using this structure
300 */
00db8189 301struct mii_bus {
3e3aaf64 302 struct module *owner;
00db8189 303 const char *name;
9d9326d3 304 char id[MII_BUS_ID_SIZE];
00db8189 305 void *priv;
4069a572 306 /** @read: Perform a read transfer on the bus */
ccaa953e 307 int (*read)(struct mii_bus *bus, int addr, int regnum);
4069a572 308 /** @write: Perform a write transfer on the bus */
ccaa953e 309 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
4069a572 310 /** @reset: Perform a reset of the bus */
00db8189 311 int (*reset)(struct mii_bus *bus);
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AL
312
313 /** @stats: Statistic counters per device on the bus */
080bb352 314 struct mdio_bus_stats stats[PHY_MAX_ADDR];
00db8189 315
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316 /**
317 * @mdio_lock: A lock to ensure that only one thing can read/write
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318 * the MDIO bus at a time
319 */
35b5f6b1 320 struct mutex mdio_lock;
00db8189 321
4069a572 322 /** @parent: Parent device of this bus */
18ee49dd 323 struct device *parent;
4069a572 324 /** @state: State of bus structure */
46abc021
LB
325 enum {
326 MDIOBUS_ALLOCATED = 1,
327 MDIOBUS_REGISTERED,
328 MDIOBUS_UNREGISTERED,
329 MDIOBUS_RELEASED,
330 } state;
4069a572
AL
331
332 /** @dev: Kernel device representation */
46abc021 333 struct device dev;
00db8189 334
4069a572 335 /** @mdio_map: list of all MDIO devices on bus */
7f854420 336 struct mdio_device *mdio_map[PHY_MAX_ADDR];
00db8189 337
4069a572 338 /** @phy_mask: PHY addresses to be ignored when probing */
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339 u32 phy_mask;
340
4069a572 341 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */
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342 u32 phy_ignore_ta_mask;
343
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344 /**
345 * @irq: An array of interrupts, each PHY's interrupt at the index
e7f4dc35 346 * matching its address
c5e38a94 347 */
e7f4dc35 348 int irq[PHY_MAX_ADDR];
69226896 349
4069a572 350 /** @reset_delay_us: GPIO reset pulse width in microseconds */
69226896 351 int reset_delay_us;
4069a572 352 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */
bb383129 353 int reset_post_delay_us;
4069a572 354 /** @reset_gpiod: Reset GPIO descriptor pointer */
d396e84c 355 struct gpio_desc *reset_gpiod;
63490847 356
4069a572 357 /** @probe_capabilities: bus capabilities, used for probing */
0cc8fecf
JL
358 enum {
359 MDIOBUS_NO_CAP = 0,
360 MDIOBUS_C22,
361 MDIOBUS_C45,
362 MDIOBUS_C22_C45,
363 } probe_capabilities;
364
4069a572 365 /** @shared_lock: protect access to the shared element */
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MW
366 struct mutex shared_lock;
367
4069a572 368 /** @shared: shared state across different PHYs */
63490847 369 struct phy_package_shared *shared[PHY_MAX_ADDR];
00db8189 370};
46abc021 371#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
00db8189 372
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AL
373struct mii_bus *mdiobus_alloc_size(size_t size);
374
375/**
376 * mdiobus_alloc - Allocate an MDIO bus structure
377 *
378 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready
379 * for the driver to register the bus.
380 */
eb8a54a7
TT
381static inline struct mii_bus *mdiobus_alloc(void)
382{
383 return mdiobus_alloc_size(0);
384}
385
3e3aaf64 386int __mdiobus_register(struct mii_bus *bus, struct module *owner);
ac3a68d5
BG
387int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus,
388 struct module *owner);
3e3aaf64 389#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
ac3a68d5
BG
390#define devm_mdiobus_register(dev, bus) \
391 __devm_mdiobus_register(dev, bus, THIS_MODULE)
38f961e7 392
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393void mdiobus_unregister(struct mii_bus *bus);
394void mdiobus_free(struct mii_bus *bus);
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395struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
396static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
397{
398 return devm_mdiobus_alloc_size(dev, 0);
399}
400
ce69e216 401struct mii_bus *mdio_find_bus(const char *mdio_name);
2e888103 402struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
2e888103 403
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404#define PHY_INTERRUPT_DISABLED false
405#define PHY_INTERRUPT_ENABLED true
00db8189 406
4069a572
AL
407/**
408 * enum phy_state - PHY state machine states:
00db8189 409 *
4069a572 410 * @PHY_DOWN: PHY device and driver are not ready for anything. probe
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AF
411 * should be called if and only if the PHY is in this state,
412 * given that the PHY device exists.
4069a572 413 * - PHY driver probe function will set the state to @PHY_READY
00db8189 414 *
4069a572 415 * @PHY_READY: PHY is ready to send and receive packets, but the
00db8189 416 * controller is not. By default, PHYs which do not implement
899a3cbb 417 * probe will be set to this state by phy_probe().
00db8189
AF
418 * - start will set the state to UP
419 *
4069a572 420 * @PHY_UP: The PHY and attached device are ready to do work.
00db8189 421 * Interrupts should be started here.
4069a572 422 * - timer moves to @PHY_NOLINK or @PHY_RUNNING
00db8189 423 *
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AL
424 * @PHY_NOLINK: PHY is up, but not currently plugged in.
425 * - irq or timer will set @PHY_RUNNING if link comes back
426 * - phy_stop moves to @PHY_HALTED
00db8189 427 *
4069a572 428 * @PHY_RUNNING: PHY is currently up, running, and possibly sending
00db8189 429 * and/or receiving packets
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AL
430 * - irq or timer will set @PHY_NOLINK if link goes down
431 * - phy_stop moves to @PHY_HALTED
00db8189 432 *
4069a572 433 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending
a68a8138
AL
434 * is not expected to work, carrier will be indicated as down. PHY will be
435 * poll once per second, or on interrupt for it current state.
436 * Once complete, move to UP to restart the PHY.
4069a572 437 * - phy_stop aborts the running test and moves to @PHY_HALTED
a68a8138 438 *
4069a572 439 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or
00db8189 440 * PHY is in an error state.
4069a572 441 * - phy_start moves to @PHY_UP
00db8189
AF
442 */
443enum phy_state {
4017b4d3 444 PHY_DOWN = 0,
00db8189 445 PHY_READY,
2b3e88ea 446 PHY_HALTED,
00db8189 447 PHY_UP,
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AF
448 PHY_RUNNING,
449 PHY_NOLINK,
a68a8138 450 PHY_CABLETEST,
00db8189
AF
451};
452
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453#define MDIO_MMD_NUM 32
454
ac28b9f8
DD
455/**
456 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
320ed3bf
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457 * @devices_in_package: IEEE 802.3 devices in package register value.
458 * @mmds_present: bit vector of MMDs present.
ac28b9f8
DD
459 * @device_ids: The device identifer for each present device.
460 */
461struct phy_c45_device_ids {
462 u32 devices_in_package;
320ed3bf 463 u32 mmds_present;
389a3389 464 u32 device_ids[MDIO_MMD_NUM];
ac28b9f8 465};
c1f19b51 466
76564261 467struct macsec_context;
2e181358 468struct macsec_ops;
76564261 469
4069a572
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470/**
471 * struct phy_device - An instance of a PHY
00db8189 472 *
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473 * @mdio: MDIO bus this PHY is on
474 * @drv: Pointer to the driver for this PHY instance
475 * @phy_id: UID for this device found during discovery
476 * @c45_ids: 802.3-c45 Device Identifiers if is_c45.
477 * @is_c45: Set to true if this PHY uses clause 45 addressing.
478 * @is_internal: Set to true if this PHY is internal to a MAC.
479 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc.
480 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps
481 * @has_fixups: Set to true if this PHY has fixups/quirks.
482 * @suspended: Set to true if this PHY has been suspended successfully.
483 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus.
484 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
485 * @loopback_enabled: Set true if this PHY has been loopbacked successfully.
486 * @downshifted_rate: Set true if link speed has been downshifted.
487 * @state: State of the PHY for management purposes
488 * @dev_flags: Device-specific flags used by the PHY driver.
489 * @irq: IRQ number of the PHY's interrupt (-1 if none)
490 * @phy_timer: The timer for handling the state machine
491 * @phylink: Pointer to phylink instance for this PHY
492 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached
493 * @sfp_bus: SFP bus attached to this PHY's fiber port
494 * @attached_dev: The attached enet driver's device instance ptr
495 * @adjust_link: Callback for the enet controller to respond to changes: in the
496 * link state.
497 * @phy_link_change: Callback for phylink for notification of link change
498 * @macsec_ops: MACsec offloading ops.
00db8189 499 *
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500 * @speed: Current link speed
501 * @duplex: Current duplex
502 * @pause: Current pause
503 * @asym_pause: Current asymmetric pause
504 * @supported: Combined MAC/PHY supported linkmodes
505 * @advertising: Currently advertised linkmodes
506 * @adv_old: Saved advertised while power saving for WoL
507 * @lp_advertising: Current link partner advertised linkmodes
508 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited
509 * @autoneg: Flag autoneg being used
510 * @link: Current link state
511 * @autoneg_complete: Flag auto negotiation of the link has completed
512 * @mdix: Current crossover
513 * @mdix_ctrl: User setting of crossover
514 * @interrupts: Flag interrupts have been enabled
515 * @interface: enum phy_interface_t value
516 * @skb: Netlink message for cable diagnostics
517 * @nest: Netlink nest used for cable diagnostics
518 * @ehdr: nNtlink header for cable diagnostics
519 * @phy_led_triggers: Array of LED triggers
520 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers
521 * @led_link_trigger: LED trigger for link up/down
522 * @last_triggered: last LED trigger for link speed
523 * @master_slave_set: User requested master/slave configuration
524 * @master_slave_get: Current master/slave advertisement
525 * @master_slave_state: Current master/slave configuration
526 * @mii_ts: Pointer to time stamper callbacks
527 * @lock: Mutex for serialization access to PHY
528 * @state_queue: Work queue for state machine
529 * @shared: Pointer to private data shared by phys in one package
530 * @priv: Pointer to driver private data
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531 *
532 * interrupts currently only supports enabled or disabled,
533 * but could be changed in the future to support enabling
534 * and disabling specific interrupts
535 *
536 * Contains some infrastructure for polling and interrupt
537 * handling, as well as handling shifts in PHY hardware state
538 */
539struct phy_device {
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540 struct mdio_device mdio;
541
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542 /* Information about the PHY type */
543 /* And management functions */
544 struct phy_driver *drv;
545
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546 u32 phy_id;
547
ac28b9f8 548 struct phy_c45_device_ids c45_ids;
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549 unsigned is_c45:1;
550 unsigned is_internal:1;
551 unsigned is_pseudo_fixed_link:1;
3b8b11f9 552 unsigned is_gigabit_capable:1;
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553 unsigned has_fixups:1;
554 unsigned suspended:1;
611d779a 555 unsigned suspended_by_mdio_bus:1;
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556 unsigned sysfs_links:1;
557 unsigned loopback_enabled:1;
5eee3bb7 558 unsigned downshifted_rate:1;
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559
560 unsigned autoneg:1;
561 /* The most recently read link state */
562 unsigned link:1;
4950c2ba 563 unsigned autoneg_complete:1;
ac28b9f8 564
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565 /* Interrupts are enabled */
566 unsigned interrupts:1;
567
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568 enum phy_state state;
569
570 u32 dev_flags;
571
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572 phy_interface_t interface;
573
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574 /*
575 * forced speed & duplex (no autoneg)
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576 * partner speed & duplex & pause (autoneg)
577 */
578 int speed;
579 int duplex;
580 int pause;
581 int asym_pause;
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582 u8 master_slave_get;
583 u8 master_slave_set;
584 u8 master_slave_state;
00db8189 585
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586 /* Union of PHY and Attached devices' supported link modes */
587 /* See ethtool.h for more info */
588 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
589 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
c0ec3c27 590 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
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591 /* used with phy_speed_down */
592 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old);
00db8189 593
d853d145 594 /* Energy efficient ethernet modes which should be prohibited */
595 u32 eee_broken_modes;
596
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597#ifdef CONFIG_LED_TRIGGER_PHY
598 struct phy_led_trigger *phy_led_triggers;
599 unsigned int phy_num_led_triggers;
600 struct phy_led_trigger *last_triggered;
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601
602 struct phy_led_trigger *led_link_trigger;
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603#endif
604
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605 /*
606 * Interrupt number for this PHY
607 * -1 means no interrupt
608 */
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609 int irq;
610
611 /* private data pointer */
612 /* For use by PHYs to maintain extra state */
613 void *priv;
614
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615 /* shared data pointer */
616 /* For use by PHYs inside the same package that need a shared state. */
617 struct phy_package_shared *shared;
618
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619 /* Reporting cable test results */
620 struct sk_buff *skb;
621 void *ehdr;
622 struct nlattr *nest;
623
00db8189 624 /* Interrupt and Polling infrastructure */
a390d1f3 625 struct delayed_work state_queue;
00db8189 626
35b5f6b1 627 struct mutex lock;
00db8189 628
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629 /* This may be modified under the rtnl lock */
630 bool sfp_bus_attached;
631 struct sfp_bus *sfp_bus;
9525ae83 632 struct phylink *phylink;
00db8189 633 struct net_device *attached_dev;
4715f65f 634 struct mii_timestamper *mii_ts;
00db8189 635
634ec36c 636 u8 mdix;
f4ed2fe3 637 u8 mdix_ctrl;
634ec36c 638
a307593a 639 void (*phy_link_change)(struct phy_device *phydev, bool up);
00db8189 640 void (*adjust_link)(struct net_device *dev);
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641
642#if IS_ENABLED(CONFIG_MACSEC)
643 /* MACsec management functions */
644 const struct macsec_ops *macsec_ops;
645#endif
00db8189 646};
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647#define to_phy_device(d) container_of(to_mdio_device(d), \
648 struct phy_device, mdio)
00db8189 649
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650/**
651 * struct phy_tdr_config - Configuration of a TDR raw test
652 *
653 * @first: Distance for first data collection point
654 * @last: Distance for last data collection point
655 * @step: Step between data collection points
656 * @pair: Bitmap of cable pairs to collect data for
657 *
658 * A structure containing possible configuration parameters
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659 * for a TDR cable test. The driver does not need to implement
660 * all the parameters, but should report what is actually used.
4069a572 661 * All distances are in centimeters.
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662 */
663struct phy_tdr_config {
664 u32 first;
665 u32 last;
666 u32 step;
667 s8 pair;
668};
669#define PHY_PAIR_ALL -1
670
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671/**
672 * struct phy_driver - Driver structure for a particular PHY type
00db8189 673 *
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674 * @mdiodrv: Data common to all MDIO devices
675 * @phy_id: The result of reading the UID registers of this PHY
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676 * type, and ANDing them with the phy_id_mask. This driver
677 * only works for PHYs with IDs which match this field
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678 * @name: The friendly name of this PHY type
679 * @phy_id_mask: Defines the important bits of the phy_id
680 * @features: A mandatory list of features (speed, duplex, etc)
3e64cf7a 681 * supported by this PHY
4069a572 682 * @flags: A bitfield defining certain other features this PHY
00db8189 683 * supports (like interrupts)
4069a572 684 * @driver_data: Static driver data
00db8189 685 *
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686 * All functions are optional. If config_aneg or read_status
687 * are not implemented, the phy core uses the genphy versions.
688 * Note that none of these functions should be called from
689 * interrupt time. The goal is for the bus read/write functions
690 * to be able to block when the bus transaction is happening,
691 * and be freed up by an interrupt (The MPC85xx has this ability,
692 * though it is not currently supported in the driver).
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693 */
694struct phy_driver {
a9049e0c 695 struct mdio_driver_common mdiodrv;
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696 u32 phy_id;
697 char *name;
511e3036 698 u32 phy_id_mask;
719655a1 699 const unsigned long * const features;
00db8189 700 u32 flags;
860f6e9e 701 const void *driver_data;
00db8189 702
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703 /**
704 * @soft_reset: Called to issue a PHY software reset
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705 */
706 int (*soft_reset)(struct phy_device *phydev);
707
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708 /**
709 * @config_init: Called to initialize the PHY,
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710 * including after a reset
711 */
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712 int (*config_init)(struct phy_device *phydev);
713
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714 /**
715 * @probe: Called during discovery. Used to set
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716 * up device-specific structures, if any
717 */
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718 int (*probe)(struct phy_device *phydev);
719
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720 /**
721 * @get_features: Probe the hardware to determine what
722 * abilities it has. Should only set phydev->supported.
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723 */
724 int (*get_features)(struct phy_device *phydev);
725
00db8189 726 /* PHY Power Management */
4069a572 727 /** @suspend: Suspend the hardware, saving state if needed */
00db8189 728 int (*suspend)(struct phy_device *phydev);
4069a572 729 /** @resume: Resume the hardware, restoring state if needed */
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730 int (*resume)(struct phy_device *phydev);
731
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732 /**
733 * @config_aneg: Configures the advertisement and resets
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734 * autonegotiation if phydev->autoneg is on,
735 * forces the speed to the current settings in phydev
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736 * if phydev->autoneg is off
737 */
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738 int (*config_aneg)(struct phy_device *phydev);
739
4069a572 740 /** @aneg_done: Determines the auto negotiation result */
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741 int (*aneg_done)(struct phy_device *phydev);
742
4069a572 743 /** @read_status: Determines the negotiated speed and duplex */
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744 int (*read_status)(struct phy_device *phydev);
745
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746 /**
747 * @config_intr: Enables or disables interrupts.
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748 * It should also clear any pending interrupts prior to enabling the
749 * IRQs and after disabling them.
a8729eb3 750 */
6527b938 751 int (*config_intr)(struct phy_device *phydev);
a8729eb3 752
4069a572 753 /** @handle_interrupt: Override default interrupt handling */
9010f9de 754 irqreturn_t (*handle_interrupt)(struct phy_device *phydev);
49644e68 755
4069a572 756 /** @remove: Clears up any memory if needed */
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757 void (*remove)(struct phy_device *phydev);
758
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759 /**
760 * @match_phy_device: Returns true if this is a suitable
761 * driver for the given phydev. If NULL, matching is based on
762 * phy_id and phy_id_mask.
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763 */
764 int (*match_phy_device)(struct phy_device *phydev);
765
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766 /**
767 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY
768 * register changes to enable Wake on LAN, so set_wol is
769 * provided to be called in the ethernet driver's set_wol
770 * function.
771 */
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772 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
773
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774 /**
775 * @get_wol: See set_wol, but for checking whether Wake on LAN
776 * is enabled.
777 */
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778 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
779
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780 /**
781 * @link_change_notify: Called to inform a PHY device driver
782 * when the core is about to change the link state. This
783 * callback is supposed to be used as fixup hook for drivers
784 * that need to take action when the link state
785 * changes. Drivers are by no means allowed to mess with the
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786 * PHY device structure in their implementations.
787 */
788 void (*link_change_notify)(struct phy_device *dev);
789
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790 /**
791 * @read_mmd: PHY specific driver override for reading a MMD
792 * register. This function is optional for PHY specific
793 * drivers. When not provided, the default MMD read function
794 * will be used by phy_read_mmd(), which will use either a
795 * direct read for Clause 45 PHYs or an indirect read for
796 * Clause 22 PHYs. devnum is the MMD device number within the
797 * PHY device, regnum is the register within the selected MMD
798 * device.
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799 */
800 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
801
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802 /**
803 * @write_mmd: PHY specific driver override for writing a MMD
804 * register. This function is optional for PHY specific
805 * drivers. When not provided, the default MMD write function
806 * will be used by phy_write_mmd(), which will use either a
807 * direct write for Clause 45 PHYs, or an indirect write for
808 * Clause 22 PHYs. devnum is the MMD device number within the
809 * PHY device, regnum is the register within the selected MMD
810 * device. val is the value to be written.
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811 */
812 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
813 u16 val);
814
4069a572 815 /** @read_page: Return the current PHY register page number */
78ffc4ac 816 int (*read_page)(struct phy_device *dev);
4069a572 817 /** @write_page: Set the current PHY register page number */
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818 int (*write_page)(struct phy_device *dev, int page);
819
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820 /**
821 * @module_info: Get the size and type of the eeprom contained
822 * within a plug-in module
823 */
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824 int (*module_info)(struct phy_device *dev,
825 struct ethtool_modinfo *modinfo);
826
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827 /**
828 * @module_eeprom: Get the eeprom information from the plug-in
829 * module
830 */
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831 int (*module_eeprom)(struct phy_device *dev,
832 struct ethtool_eeprom *ee, u8 *data);
833
4069a572 834 /** @cable_test_start: Start a cable test */
a68a8138 835 int (*cable_test_start)(struct phy_device *dev);
1a644de2 836
4069a572 837 /** @cable_test_tdr_start: Start a raw TDR cable test */
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838 int (*cable_test_tdr_start)(struct phy_device *dev,
839 const struct phy_tdr_config *config);
1a644de2 840
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841 /**
842 * @cable_test_get_status: Once per second, or on interrupt,
843 * request the status of the test.
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844 */
845 int (*cable_test_get_status)(struct phy_device *dev, bool *finished);
846
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847 /* Get statistics from the PHY using ethtool */
848 /** @get_sset_count: Number of statistic counters */
f3a40945 849 int (*get_sset_count)(struct phy_device *dev);
4069a572 850 /** @get_strings: Names of the statistic counters */
f3a40945 851 void (*get_strings)(struct phy_device *dev, u8 *data);
4069a572 852 /** @get_stats: Return the statistic counter values */
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853 void (*get_stats)(struct phy_device *dev,
854 struct ethtool_stats *stats, u64 *data);
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855
856 /* Get and Set PHY tunables */
4069a572 857 /** @get_tunable: Return the value of a tunable */
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858 int (*get_tunable)(struct phy_device *dev,
859 struct ethtool_tunable *tuna, void *data);
4069a572 860 /** @set_tunable: Set the value of a tunable */
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861 int (*set_tunable)(struct phy_device *dev,
862 struct ethtool_tunable *tuna,
863 const void *data);
4069a572 864 /** @set_loopback: Set the loopback mood of the PHY */
f0f9b4ed 865 int (*set_loopback)(struct phy_device *dev, bool enable);
4069a572 866 /** @get_sqi: Get the signal quality indication */
80660219 867 int (*get_sqi)(struct phy_device *dev);
4069a572 868 /** @get_sqi_max: Get the maximum signal quality indication */
80660219 869 int (*get_sqi_max)(struct phy_device *dev);
00db8189 870};
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871#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
872 struct phy_driver, mdiodrv)
00db8189 873
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874#define PHY_ANY_ID "MATCH ANY PHY"
875#define PHY_ANY_UID 0xffffffff
876
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877#define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
878#define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
879#define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
880
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881/* A Structure for boards to register fixups with the PHY Lib */
882struct phy_fixup {
883 struct list_head list;
4567d686 884 char bus_id[MII_BUS_ID_SIZE + 3];
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885 u32 phy_uid;
886 u32 phy_uid_mask;
887 int (*run)(struct phy_device *phydev);
888};
889
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890const char *phy_speed_to_str(int speed);
891const char *phy_duplex_to_str(unsigned int duplex);
892
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893/* A structure for mapping a particular speed and duplex
894 * combination to a particular SUPPORTED and ADVERTISED value
895 */
896struct phy_setting {
897 u32 speed;
898 u8 duplex;
899 u8 bit;
900};
901
902const struct phy_setting *
903phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
3c1bcc86 904 bool exact);
0ccb4fc6 905size_t phy_speeds(unsigned int *speeds, size_t size,
3c1bcc86 906 unsigned long *mask);
a4eaed9f 907void of_set_phy_supported(struct phy_device *phydev);
3feb9b23 908void of_set_phy_eee_broken(struct phy_device *phydev);
331c56ac 909int phy_speed_down_core(struct phy_device *phydev);
0ccb4fc6 910
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911/**
912 * phy_is_started - Convenience function to check whether PHY is started
913 * @phydev: The phy_device struct
914 */
915static inline bool phy_is_started(struct phy_device *phydev)
916{
a2fc9d7e 917 return phydev->state >= PHY_UP;
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HK
918}
919
2d880b87 920void phy_resolve_aneg_pause(struct phy_device *phydev);
8c5e850c 921void phy_resolve_aneg_linkmode(struct phy_device *phydev);
5eee3bb7 922void phy_check_downshift(struct phy_device *phydev);
8c5e850c 923
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924/**
925 * phy_read - Convenience function for reading a given PHY register
926 * @phydev: the phy_device struct
927 * @regnum: register number to read
928 *
929 * NOTE: MUST NOT be called from interrupt context,
930 * because the bus read/write functions may wait for an interrupt
931 * to conclude the operation.
932 */
abf35df2 933static inline int phy_read(struct phy_device *phydev, u32 regnum)
2e888103 934{
e5a03bfd 935 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
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936}
937
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938#define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \
939 timeout_us, sleep_before_read) \
940({ \
941 int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \
942 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \
943 if (val < 0) \
944 __ret = val; \
945 if (__ret) \
946 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
947 __ret; \
948})
949
950
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951/**
952 * __phy_read - convenience function for reading a given PHY register
953 * @phydev: the phy_device struct
954 * @regnum: register number to read
955 *
956 * The caller must have taken the MDIO bus lock.
957 */
958static inline int __phy_read(struct phy_device *phydev, u32 regnum)
959{
960 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
961}
962
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963/**
964 * phy_write - Convenience function for writing a given PHY register
965 * @phydev: the phy_device struct
966 * @regnum: register number to write
967 * @val: value to write to @regnum
968 *
969 * NOTE: MUST NOT be called from interrupt context,
970 * because the bus read/write functions may wait for an interrupt
971 * to conclude the operation.
972 */
abf35df2 973static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
2e888103 974{
e5a03bfd 975 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
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976}
977
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978/**
979 * __phy_write - Convenience function for writing a given PHY register
980 * @phydev: the phy_device struct
981 * @regnum: register number to write
982 * @val: value to write to @regnum
983 *
984 * The caller must have taken the MDIO bus lock.
985 */
986static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
987{
988 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
989 val);
990}
991
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992/**
993 * __phy_modify_changed() - Convenience function for modifying a PHY register
994 * @phydev: a pointer to a &struct phy_device
995 * @regnum: register number
996 * @mask: bit mask of bits to clear
997 * @set: bit mask of bits to set
998 *
999 * Unlocked helper function which allows a PHY register to be modified as
1000 * new register value = (old register value & ~mask) | set
1001 *
1002 * Returns negative errno, 0 if there was no change, and 1 in case of change
1003 */
1004static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum,
1005 u16 mask, u16 set)
1006{
1007 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr,
1008 regnum, mask, set);
1009}
1010
e86c6569 1011/*
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1012 * phy_read_mmd - Convenience function for reading a register
1013 * from an MMD on a given PHY.
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1014 */
1015int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1016
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1017/**
1018 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a
1019 * condition is met or a timeout occurs
1020 *
1021 * @phydev: The phy_device struct
1022 * @devaddr: The MMD to read from
1023 * @regnum: The register on the MMD to read
1024 * @val: Variable to read the register into
1025 * @cond: Break condition (usually involving @val)
1026 * @sleep_us: Maximum time to sleep between reads in us (0
1027 * tight-loops). Should be less than ~20ms since usleep_range
1028 * is used (see Documentation/timers/timers-howto.rst).
1029 * @timeout_us: Timeout in us, 0 means never timeout
1030 * @sleep_before_read: if it is true, sleep @sleep_us before read.
1031 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
1032 * case, the last read value at @args is stored in @val. Must not
1033 * be called from atomic context if sleep_us or timeout_us are used.
1034 */
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1035#define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
1036 sleep_us, timeout_us, sleep_before_read) \
1037({ \
1038 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \
1039 sleep_us, timeout_us, sleep_before_read, \
1040 phydev, devaddr, regnum); \
1041 if (val < 0) \
1042 __ret = val; \
1043 if (__ret) \
1044 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1045 __ret; \
1046})
1047
e86c6569 1048/*
1878f0dc
NY
1049 * __phy_read_mmd - Convenience function for reading a register
1050 * from an MMD on a given PHY.
1878f0dc
NY
1051 */
1052int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1053
e86c6569 1054/*
1878f0dc
NY
1055 * phy_write_mmd - Convenience function for writing a register
1056 * on an MMD on a given PHY.
1878f0dc
NY
1057 */
1058int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1059
e86c6569 1060/*
1878f0dc
NY
1061 * __phy_write_mmd - Convenience function for writing a register
1062 * on an MMD on a given PHY.
1878f0dc
NY
1063 */
1064int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1065
b8554d4f
HK
1066int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1067 u16 set);
1068int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1069 u16 set);
788f9933 1070int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
2b74e5be 1071int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
788f9933 1072
b8554d4f
HK
1073int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1074 u16 mask, u16 set);
1075int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1076 u16 mask, u16 set);
1878f0dc 1077int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
b8554d4f 1078 u16 mask, u16 set);
1878f0dc 1079int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
b8554d4f 1080 u16 mask, u16 set);
1878f0dc 1081
ac8322d8
HK
1082/**
1083 * __phy_set_bits - Convenience function for setting bits in a PHY register
1084 * @phydev: the phy_device struct
1085 * @regnum: register number to write
1086 * @val: bits to set
1087 *
1088 * The caller must have taken the MDIO bus lock.
1089 */
1090static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1091{
1092 return __phy_modify(phydev, regnum, 0, val);
1093}
1094
1095/**
1096 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
1097 * @phydev: the phy_device struct
1098 * @regnum: register number to write
1099 * @val: bits to clear
1100 *
1101 * The caller must have taken the MDIO bus lock.
1102 */
1103static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
1104 u16 val)
1105{
1106 return __phy_modify(phydev, regnum, val, 0);
1107}
1108
1109/**
1110 * phy_set_bits - Convenience function for setting bits in a PHY register
1111 * @phydev: the phy_device struct
1112 * @regnum: register number to write
1113 * @val: bits to set
1114 */
1115static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1116{
1117 return phy_modify(phydev, regnum, 0, val);
1118}
1119
1120/**
1121 * phy_clear_bits - Convenience function for clearing bits in a PHY register
1122 * @phydev: the phy_device struct
1123 * @regnum: register number to write
1124 * @val: bits to clear
1125 */
1126static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
1127{
1128 return phy_modify(phydev, regnum, val, 0);
1129}
1130
1878f0dc
NY
1131/**
1132 * __phy_set_bits_mmd - Convenience function for setting bits in a register
1133 * on MMD
1134 * @phydev: the phy_device struct
1135 * @devad: the MMD containing register to modify
1136 * @regnum: register number to modify
1137 * @val: bits to set
1138 *
1139 * The caller must have taken the MDIO bus lock.
1140 */
1141static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
1142 u32 regnum, u16 val)
1143{
1144 return __phy_modify_mmd(phydev, devad, regnum, 0, val);
1145}
1146
1147/**
1148 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
1149 * on MMD
1150 * @phydev: the phy_device struct
1151 * @devad: the MMD containing register to modify
1152 * @regnum: register number to modify
1153 * @val: bits to clear
1154 *
1155 * The caller must have taken the MDIO bus lock.
1156 */
1157static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1158 u32 regnum, u16 val)
1159{
1160 return __phy_modify_mmd(phydev, devad, regnum, val, 0);
1161}
1162
1163/**
1164 * phy_set_bits_mmd - Convenience function for setting bits in a register
1165 * on MMD
1166 * @phydev: the phy_device struct
1167 * @devad: the MMD containing register to modify
1168 * @regnum: register number to modify
1169 * @val: bits to set
1170 */
1171static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
1172 u32 regnum, u16 val)
1173{
1174 return phy_modify_mmd(phydev, devad, regnum, 0, val);
1175}
1176
1177/**
1178 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
1179 * on MMD
1180 * @phydev: the phy_device struct
1181 * @devad: the MMD containing register to modify
1182 * @regnum: register number to modify
1183 * @val: bits to clear
1184 */
1185static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1186 u32 regnum, u16 val)
1187{
1188 return phy_modify_mmd(phydev, devad, regnum, val, 0);
1189}
1190
2c7b4921
FF
1191/**
1192 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
1193 * @phydev: the phy_device struct
1194 *
1195 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
1196 * PHY_IGNORE_INTERRUPT
1197 */
1198static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
1199{
1200 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
1201}
1202
3c507b8a
HK
1203/**
1204 * phy_polling_mode - Convenience function for testing whether polling is
1205 * used to detect PHY status changes
1206 * @phydev: the phy_device struct
1207 */
1208static inline bool phy_polling_mode(struct phy_device *phydev)
1209{
97c22438
AL
1210 if (phydev->state == PHY_CABLETEST)
1211 if (phydev->drv->flags & PHY_POLL_CABLE_TEST)
1212 return true;
1213
3c507b8a
HK
1214 return phydev->irq == PHY_POLL;
1215}
1216
0e5dafc8
RC
1217/**
1218 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration.
1219 * @phydev: the phy_device struct
1220 */
1221static inline bool phy_has_hwtstamp(struct phy_device *phydev)
1222{
4715f65f 1223 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp;
0e5dafc8
RC
1224}
1225
1226/**
1227 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping.
1228 * @phydev: the phy_device struct
1229 */
1230static inline bool phy_has_rxtstamp(struct phy_device *phydev)
1231{
4715f65f 1232 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp;
0e5dafc8
RC
1233}
1234
1235/**
1236 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or
1237 * PTP hardware clock capabilities.
1238 * @phydev: the phy_device struct
1239 */
1240static inline bool phy_has_tsinfo(struct phy_device *phydev)
1241{
4715f65f 1242 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info;
0e5dafc8
RC
1243}
1244
1245/**
1246 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping.
1247 * @phydev: the phy_device struct
1248 */
1249static inline bool phy_has_txtstamp(struct phy_device *phydev)
1250{
4715f65f 1251 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp;
0e5dafc8
RC
1252}
1253
1254static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr)
1255{
4715f65f 1256 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr);
0e5dafc8
RC
1257}
1258
1259static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb,
1260 int type)
1261{
4715f65f 1262 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type);
0e5dafc8
RC
1263}
1264
1265static inline int phy_ts_info(struct phy_device *phydev,
1266 struct ethtool_ts_info *tsinfo)
1267{
4715f65f 1268 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo);
0e5dafc8
RC
1269}
1270
1271static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb,
1272 int type)
1273{
4715f65f 1274 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type);
0e5dafc8
RC
1275}
1276
4284b6a5
FF
1277/**
1278 * phy_is_internal - Convenience function for testing if a PHY is internal
1279 * @phydev: the phy_device struct
1280 */
1281static inline bool phy_is_internal(struct phy_device *phydev)
1282{
1283 return phydev->is_internal;
1284}
1285
32d0f783
IS
1286/**
1287 * phy_interface_mode_is_rgmii - Convenience function for testing if a
1288 * PHY interface mode is RGMII (all variants)
4069a572 1289 * @mode: the &phy_interface_t enum
32d0f783
IS
1290 */
1291static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
1292{
1293 return mode >= PHY_INTERFACE_MODE_RGMII &&
1294 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
1295};
1296
365c1e64 1297/**
4069a572 1298 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z
365c1e64
RK
1299 * negotiation
1300 * @mode: one of &enum phy_interface_t
1301 *
4069a572 1302 * Returns true if the PHY interface mode uses the 16-bit negotiation
365c1e64
RK
1303 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
1304 */
1305static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
1306{
1307 return mode == PHY_INTERFACE_MODE_1000BASEX ||
1308 mode == PHY_INTERFACE_MODE_2500BASEX;
1309}
1310
e463d88c
FF
1311/**
1312 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
1313 * is RGMII (all variants)
1314 * @phydev: the phy_device struct
1315 */
1316static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
1317{
32d0f783 1318 return phy_interface_mode_is_rgmii(phydev->interface);
5a11dd7d
FF
1319};
1320
4069a572 1321/**
5a11dd7d
FF
1322 * phy_is_pseudo_fixed_link - Convenience function for testing if this
1323 * PHY is the CPU port facing side of an Ethernet switch, or similar.
1324 * @phydev: the phy_device struct
1325 */
1326static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
1327{
1328 return phydev->is_pseudo_fixed_link;
e463d88c
FF
1329}
1330
78ffc4ac
RK
1331int phy_save_page(struct phy_device *phydev);
1332int phy_select_page(struct phy_device *phydev, int page);
1333int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
1334int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
1335int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
bf22b343
HK
1336int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
1337 u16 mask, u16 set);
78ffc4ac
RK
1338int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
1339 u16 mask, u16 set);
1340
7d49a32a 1341struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
4017b4d3
SS
1342 bool is_c45,
1343 struct phy_c45_device_ids *c45_ids);
90eff909 1344#if IS_ENABLED(CONFIG_PHYLIB)
ac28b9f8 1345struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
4dea547f 1346int phy_device_register(struct phy_device *phy);
90eff909
FF
1347void phy_device_free(struct phy_device *phydev);
1348#else
1349static inline
1350struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1351{
1352 return NULL;
1353}
1354
1355static inline int phy_device_register(struct phy_device *phy)
1356{
1357 return 0;
1358}
1359
1360static inline void phy_device_free(struct phy_device *phydev) { }
1361#endif /* CONFIG_PHYLIB */
38737e49 1362void phy_device_remove(struct phy_device *phydev);
2f5cb434 1363int phy_init_hw(struct phy_device *phydev);
481b5d93
SH
1364int phy_suspend(struct phy_device *phydev);
1365int phy_resume(struct phy_device *phydev);
9c2c2e62 1366int __phy_resume(struct phy_device *phydev);
f0f9b4ed 1367int phy_loopback(struct phy_device *phydev, bool enable);
298e54fa
RK
1368void phy_sfp_attach(void *upstream, struct sfp_bus *bus);
1369void phy_sfp_detach(void *upstream, struct sfp_bus *bus);
1370int phy_sfp_probe(struct phy_device *phydev,
1371 const struct sfp_upstream_ops *ops);
4017b4d3
SS
1372struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1373 phy_interface_t interface);
f8f76db1 1374struct phy_device *phy_find_first(struct mii_bus *bus);
257184d7
AF
1375int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1376 u32 flags, phy_interface_t interface);
fa94f6d9 1377int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
4017b4d3
SS
1378 void (*handler)(struct net_device *),
1379 phy_interface_t interface);
1380struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1381 void (*handler)(struct net_device *),
1382 phy_interface_t interface);
e1393456
AF
1383void phy_disconnect(struct phy_device *phydev);
1384void phy_detach(struct phy_device *phydev);
1385void phy_start(struct phy_device *phydev);
1386void phy_stop(struct phy_device *phydev);
1387int phy_start_aneg(struct phy_device *phydev);
372788f9 1388int phy_aneg_done(struct phy_device *phydev);
2b9672dd
HK
1389int phy_speed_down(struct phy_device *phydev, bool sync);
1390int phy_speed_up(struct phy_device *phydev);
e1393456 1391
002ba705 1392int phy_restart_aneg(struct phy_device *phydev);
a9668491 1393int phy_reset_after_clk_enable(struct phy_device *phydev);
00db8189 1394
a68a8138
AL
1395#if IS_ENABLED(CONFIG_PHYLIB)
1396int phy_start_cable_test(struct phy_device *phydev,
1397 struct netlink_ext_ack *extack);
1a644de2 1398int phy_start_cable_test_tdr(struct phy_device *phydev,
f2bc8ad3
AL
1399 struct netlink_ext_ack *extack,
1400 const struct phy_tdr_config *config);
a68a8138
AL
1401#else
1402static inline
1403int phy_start_cable_test(struct phy_device *phydev,
1404 struct netlink_ext_ack *extack)
1405{
1406 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1407 return -EOPNOTSUPP;
1408}
1a644de2
AL
1409static inline
1410int phy_start_cable_test_tdr(struct phy_device *phydev,
f2bc8ad3
AL
1411 struct netlink_ext_ack *extack,
1412 const struct phy_tdr_config *config)
1a644de2
AL
1413{
1414 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1415 return -EOPNOTSUPP;
1416}
a68a8138
AL
1417#endif
1418
1e2dc145
AL
1419int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result);
1420int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair,
1421 u16 cm);
1422
bafbdd52
SS
1423static inline void phy_device_reset(struct phy_device *phydev, int value)
1424{
1425 mdio_device_reset(&phydev->mdio, value);
1426}
1427
72ba48be 1428#define phydev_err(_phydev, format, args...) \
e5a03bfd 1429 dev_err(&_phydev->mdio.dev, format, ##args)
72ba48be 1430
c4fabb8b
AL
1431#define phydev_info(_phydev, format, args...) \
1432 dev_info(&_phydev->mdio.dev, format, ##args)
1433
ab2a605f
AL
1434#define phydev_warn(_phydev, format, args...) \
1435 dev_warn(&_phydev->mdio.dev, format, ##args)
1436
72ba48be 1437#define phydev_dbg(_phydev, format, args...) \
2eaa38d9 1438 dev_dbg(&_phydev->mdio.dev, format, ##args)
72ba48be 1439
84eff6d1
AL
1440static inline const char *phydev_name(const struct phy_device *phydev)
1441{
e5a03bfd 1442 return dev_name(&phydev->mdio.dev);
84eff6d1
AL
1443}
1444
bec170e5
HK
1445static inline void phy_lock_mdio_bus(struct phy_device *phydev)
1446{
1447 mutex_lock(&phydev->mdio.bus->mdio_lock);
1448}
1449
1450static inline void phy_unlock_mdio_bus(struct phy_device *phydev)
1451{
1452 mutex_unlock(&phydev->mdio.bus->mdio_lock);
1453}
1454
2220943a
AL
1455void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1456 __printf(2, 3);
e27f1787
FF
1457char *phy_attached_info_irq(struct phy_device *phydev)
1458 __malloc;
2220943a 1459void phy_attached_info(struct phy_device *phydev);
5acde34a
RK
1460
1461/* Clause 22 PHY */
045925e3 1462int genphy_read_abilities(struct phy_device *phydev);
3fb69bca 1463int genphy_setup_forced(struct phy_device *phydev);
00db8189 1464int genphy_restart_aneg(struct phy_device *phydev);
2a10ab04 1465int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart);
cd34499c 1466int genphy_config_eee_advert(struct phy_device *phydev);
f4069cd7 1467int __genphy_config_aneg(struct phy_device *phydev, bool changed);
a9fa6e6a 1468int genphy_aneg_done(struct phy_device *phydev);
00db8189 1469int genphy_update_link(struct phy_device *phydev);
8d3dc3ac 1470int genphy_read_lpa(struct phy_device *phydev);
0efc286a 1471int genphy_read_status_fixed(struct phy_device *phydev);
00db8189 1472int genphy_read_status(struct phy_device *phydev);
0f0ca340
GC
1473int genphy_suspend(struct phy_device *phydev);
1474int genphy_resume(struct phy_device *phydev);
f0f9b4ed 1475int genphy_loopback(struct phy_device *phydev, bool enable);
797ac071 1476int genphy_soft_reset(struct phy_device *phydev);
87de1f05 1477irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev);
f4069cd7
HK
1478
1479static inline int genphy_config_aneg(struct phy_device *phydev)
1480{
1481 return __genphy_config_aneg(phydev, false);
1482}
1483
4c8e0459
LW
1484static inline int genphy_no_config_intr(struct phy_device *phydev)
1485{
1486 return 0;
1487}
5df7af85
KH
1488int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1489 u16 regnum);
1490int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1491 u16 regnum, u16 val);
5acde34a 1492
fa6e98ce
HK
1493/* Clause 37 */
1494int genphy_c37_config_aneg(struct phy_device *phydev);
1495int genphy_c37_read_status(struct phy_device *phydev);
1496
5acde34a
RK
1497/* Clause 45 PHY */
1498int genphy_c45_restart_aneg(struct phy_device *phydev);
1af9f168 1499int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
5acde34a 1500int genphy_c45_aneg_done(struct phy_device *phydev);
998a8a83 1501int genphy_c45_read_link(struct phy_device *phydev);
5acde34a
RK
1502int genphy_c45_read_lpa(struct phy_device *phydev);
1503int genphy_c45_read_pma(struct phy_device *phydev);
1504int genphy_c45_pma_setup_forced(struct phy_device *phydev);
9a5dc8af 1505int genphy_c45_an_config_aneg(struct phy_device *phydev);
5acde34a 1506int genphy_c45_an_disable_aneg(struct phy_device *phydev);
ea4efe25 1507int genphy_c45_read_mdix(struct phy_device *phydev);
ac3f5533 1508int genphy_c45_pma_read_abilities(struct phy_device *phydev);
70fa3a96 1509int genphy_c45_read_status(struct phy_device *phydev);
94acaeb5 1510int genphy_c45_config_aneg(struct phy_device *phydev);
5acde34a 1511
3970ed49
AL
1512/* Generic C45 PHY driver */
1513extern struct phy_driver genphy_c45_driver;
1514
e8a714e0
FF
1515/* The gen10g_* functions are the old Clause 45 stub */
1516int gen10g_config_aneg(struct phy_device *phydev);
e8a714e0 1517
00fde795
HK
1518static inline int phy_read_status(struct phy_device *phydev)
1519{
1520 if (!phydev->drv)
1521 return -EIO;
1522
1523 if (phydev->drv->read_status)
1524 return phydev->drv->read_status(phydev);
1525 else
1526 return genphy_read_status(phydev);
1527}
1528
00db8189 1529void phy_driver_unregister(struct phy_driver *drv);
d5bf9071 1530void phy_drivers_unregister(struct phy_driver *drv, int n);
be01da72
AL
1531int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1532int phy_drivers_register(struct phy_driver *new_driver, int n,
1533 struct module *owner);
293e9a3d 1534void phy_error(struct phy_device *phydev);
4f9c85a1 1535void phy_state_machine(struct work_struct *work);
97b33bdf 1536void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies);
293e9a3d 1537void phy_trigger_machine(struct phy_device *phydev);
28b2e0d2 1538void phy_mac_interrupt(struct phy_device *phydev);
29935aeb 1539void phy_start_machine(struct phy_device *phydev);
00db8189 1540void phy_stop_machine(struct phy_device *phydev);
5514174f 1541void phy_ethtool_ksettings_get(struct phy_device *phydev,
1542 struct ethtool_link_ksettings *cmd);
2d55173e
PR
1543int phy_ethtool_ksettings_set(struct phy_device *phydev,
1544 const struct ethtool_link_ksettings *cmd);
4017b4d3 1545int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
bbbf8430 1546int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
3231e5d2 1547int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd);
3dd4ef1b 1548int phy_disable_interrupts(struct phy_device *phydev);
434a4315 1549void phy_request_interrupt(struct phy_device *phydev);
07b09289 1550void phy_free_interrupt(struct phy_device *phydev);
e1393456 1551void phy_print_status(struct phy_device *phydev);
f3a6bd39 1552int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
41124fa6 1553void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
22c0ef6b 1554void phy_advertise_supported(struct phy_device *phydev);
c306ad36 1555void phy_support_sym_pause(struct phy_device *phydev);
af8d9bb2 1556void phy_support_asym_pause(struct phy_device *phydev);
0c122405
AL
1557void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1558 bool autoneg);
70814e81 1559void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
22b7d299
AL
1560bool phy_validate_pause(struct phy_device *phydev,
1561 struct ethtool_pauseparam *pp);
a87ae8a9 1562void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause);
92252eec
DM
1563
1564s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,
1565 const int *delay_values, int size, bool is_rx);
1566
a87ae8a9
RK
1567void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv,
1568 bool *tx_pause, bool *rx_pause);
00db8189 1569
f62220d3 1570int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1571 int (*run)(struct phy_device *));
f62220d3 1572int phy_register_fixup_for_id(const char *bus_id,
4017b4d3 1573 int (*run)(struct phy_device *));
f62220d3 1574int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1575 int (*run)(struct phy_device *));
f62220d3 1576
f38e7a32
WH
1577int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1578int phy_unregister_fixup_for_id(const char *bus_id);
1579int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1580
a59a4d19
GC
1581int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1582int phy_get_eee_err(struct phy_device *phydev);
1583int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1584int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
42e836eb 1585int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
4017b4d3
SS
1586void phy_ethtool_get_wol(struct phy_device *phydev,
1587 struct ethtool_wolinfo *wol);
9d9a77ce
PR
1588int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1589 struct ethtool_link_ksettings *cmd);
1590int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1591 const struct ethtool_link_ksettings *cmd);
e86a8987 1592int phy_ethtool_nway_reset(struct net_device *ndev);
63490847
MW
1593int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size);
1594void phy_package_leave(struct phy_device *phydev);
1595int devm_phy_package_join(struct device *dev, struct phy_device *phydev,
1596 int addr, size_t priv_size);
a59a4d19 1597
90eff909 1598#if IS_ENABLED(CONFIG_PHYLIB)
9b9a8bfc
AF
1599int __init mdio_bus_init(void);
1600void mdio_bus_exit(void);
9e8d438e
FF
1601#endif
1602
17809516
FF
1603int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data);
1604int phy_ethtool_get_sset_count(struct phy_device *phydev);
1605int phy_ethtool_get_stats(struct phy_device *phydev,
1606 struct ethtool_stats *stats, u64 *data);
9b9a8bfc 1607
63490847
MW
1608static inline int phy_package_read(struct phy_device *phydev, u32 regnum)
1609{
1610 struct phy_package_shared *shared = phydev->shared;
1611
1612 if (!shared)
1613 return -EIO;
1614
1615 return mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
1616}
1617
1618static inline int __phy_package_read(struct phy_device *phydev, u32 regnum)
1619{
1620 struct phy_package_shared *shared = phydev->shared;
1621
1622 if (!shared)
1623 return -EIO;
1624
1625 return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
1626}
1627
1628static inline int phy_package_write(struct phy_device *phydev,
1629 u32 regnum, u16 val)
1630{
1631 struct phy_package_shared *shared = phydev->shared;
1632
1633 if (!shared)
1634 return -EIO;
1635
1636 return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
1637}
1638
1639static inline int __phy_package_write(struct phy_device *phydev,
1640 u32 regnum, u16 val)
1641{
1642 struct phy_package_shared *shared = phydev->shared;
1643
1644 if (!shared)
1645 return -EIO;
1646
1647 return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
1648}
1649
0ef44e5c
AT
1650static inline bool __phy_package_set_once(struct phy_device *phydev,
1651 unsigned int b)
63490847
MW
1652{
1653 struct phy_package_shared *shared = phydev->shared;
1654
1655 if (!shared)
1656 return false;
1657
0ef44e5c
AT
1658 return !test_and_set_bit(b, &shared->flags);
1659}
1660
1661static inline bool phy_package_init_once(struct phy_device *phydev)
1662{
1663 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE);
1664}
1665
1666static inline bool phy_package_probe_once(struct phy_device *phydev)
1667{
1668 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE);
63490847
MW
1669}
1670
00db8189 1671extern struct bus_type mdio_bus_type;
c31accd1 1672
648ea013
FF
1673struct mdio_board_info {
1674 const char *bus_id;
1675 char modalias[MDIO_NAME_SIZE];
1676 int mdio_addr;
1677 const void *platform_data;
1678};
1679
90eff909 1680#if IS_ENABLED(CONFIG_MDIO_DEVICE)
648ea013
FF
1681int mdiobus_register_board_info(const struct mdio_board_info *info,
1682 unsigned int n);
1683#else
1684static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1685 unsigned int n)
1686{
1687 return 0;
1688}
1689#endif
1690
1691
c31accd1 1692/**
39097ab6 1693 * phy_module_driver() - Helper macro for registering PHY drivers
c31accd1 1694 * @__phy_drivers: array of PHY drivers to register
39097ab6 1695 * @__count: Numbers of members in array
c31accd1
JH
1696 *
1697 * Helper macro for PHY drivers which do not do anything special in module
1698 * init/exit. Each module may only use this macro once, and calling it
1699 * replaces module_init() and module_exit().
1700 */
1701#define phy_module_driver(__phy_drivers, __count) \
1702static int __init phy_module_init(void) \
1703{ \
be01da72 1704 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
c31accd1
JH
1705} \
1706module_init(phy_module_init); \
1707static void __exit phy_module_exit(void) \
1708{ \
1709 phy_drivers_unregister(__phy_drivers, __count); \
1710} \
1711module_exit(phy_module_exit)
1712
1713#define module_phy_driver(__phy_drivers) \
1714 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1715
5db5ea99
FF
1716bool phy_driver_is_genphy(struct phy_device *phydev);
1717bool phy_driver_is_genphy_10g(struct phy_device *phydev);
1718
00db8189 1719#endif /* __PHY_H */