net: phy: rename phy_do_ioctl to phy_do_ioctl_running
[linux-block.git] / include / linux / phy.h
CommitLineData
2874c5fd 1/* SPDX-License-Identifier: GPL-2.0-or-later */
00db8189 2/*
00db8189 3 * Framework and drivers for configuring and reading different PHYs
d8de01b7 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
00db8189
AF
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
00db8189
AF
9 */
10
11#ifndef __PHY_H
12#define __PHY_H
13
2220943a 14#include <linux/compiler.h>
00db8189 15#include <linux/spinlock.h>
13df29f6 16#include <linux/ethtool.h>
b31cdffa 17#include <linux/linkmode.h>
bac83c65 18#include <linux/mdio.h>
13df29f6 19#include <linux/mii.h>
4715f65f 20#include <linux/mii_timestamper.h>
3e3aaf64 21#include <linux/module.h>
13df29f6
MR
22#include <linux/timer.h>
23#include <linux/workqueue.h>
8626d3b4 24#include <linux/mod_devicetable.h>
080bb352 25#include <linux/u64_stats_sync.h>
00db8189 26
60063497 27#include <linux/atomic.h>
0ac49527 28
e9fbdf17 29#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
00db8189
AF
30 SUPPORTED_TP | \
31 SUPPORTED_MII)
32
e9fbdf17
FF
33#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
34 SUPPORTED_10baseT_Full)
35
36#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
37 SUPPORTED_100baseT_Full)
38
39#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
00db8189
AF
40 SUPPORTED_1000baseT_Full)
41
719655a1
AL
42extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
43extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
44extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
45extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
46extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
47extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
9e857a40 48extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
719655a1
AL
49extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
50
51#define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
52#define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
53#define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
54#define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
55#define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
56#define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
9e857a40 57#define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
719655a1 58#define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
e9fbdf17 59
54638c6e
DE
60extern const int phy_basic_ports_array[3];
61extern const int phy_fibre_port_array[1];
62extern const int phy_all_ports_features_array[7];
3c1bcc86
AL
63extern const int phy_10_100_features_array[4];
64extern const int phy_basic_t1_features_array[2];
65extern const int phy_gbit_features_array[2];
66extern const int phy_10gbit_features_array[1];
67
c5e38a94
AF
68/*
69 * Set phydev->irq to PHY_POLL if interrupts are not supported,
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AF
70 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
71 * the attached driver handles the interrupt
72 */
73#define PHY_POLL -1
74#define PHY_IGNORE_INTERRUPT -2
75
a4307c0e
HK
76#define PHY_IS_INTERNAL 0x00000001
77#define PHY_RST_AFTER_CLK_EN 0x00000002
a9049e0c 78#define MDIO_DEVICE_IS_PHY 0x80000000
00db8189 79
e8a2b6a4
AF
80/* Interface Mode definitions */
81typedef enum {
4157ef1b 82 PHY_INTERFACE_MODE_NA,
735d8a18 83 PHY_INTERFACE_MODE_INTERNAL,
e8a2b6a4
AF
84 PHY_INTERFACE_MODE_MII,
85 PHY_INTERFACE_MODE_GMII,
86 PHY_INTERFACE_MODE_SGMII,
87 PHY_INTERFACE_MODE_TBI,
2cc70ba4 88 PHY_INTERFACE_MODE_REVMII,
e8a2b6a4
AF
89 PHY_INTERFACE_MODE_RMII,
90 PHY_INTERFACE_MODE_RGMII,
a999589c 91 PHY_INTERFACE_MODE_RGMII_ID,
7d400a4c
KP
92 PHY_INTERFACE_MODE_RGMII_RXID,
93 PHY_INTERFACE_MODE_RGMII_TXID,
4157ef1b
SG
94 PHY_INTERFACE_MODE_RTBI,
95 PHY_INTERFACE_MODE_SMII,
898dd0bd 96 PHY_INTERFACE_MODE_XGMII,
fd70f72c 97 PHY_INTERFACE_MODE_MOCA,
b9d12085 98 PHY_INTERFACE_MODE_QSGMII,
572de608 99 PHY_INTERFACE_MODE_TRGMII,
55601a88
AL
100 PHY_INTERFACE_MODE_1000BASEX,
101 PHY_INTERFACE_MODE_2500BASEX,
102 PHY_INTERFACE_MODE_RXAUI,
c125ca09 103 PHY_INTERFACE_MODE_XAUI,
c114574e
RK
104 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
105 PHY_INTERFACE_MODE_10GBASER,
4618d671 106 PHY_INTERFACE_MODE_USXGMII,
c114574e
RK
107 /* 10GBASE-KR - with Clause 73 AN */
108 PHY_INTERFACE_MODE_10GKR,
8a2fe56e 109 PHY_INTERFACE_MODE_MAX,
e8a2b6a4
AF
110} phy_interface_t;
111
1f9127ca
ZB
112/**
113 * phy_supported_speeds - return all speeds currently supported by a phy device
114 * @phy: The phy device to return supported speeds of.
115 * @speeds: buffer to store supported speeds in.
116 * @size: size of speeds buffer.
117 *
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RD
118 * Description: Returns the number of supported speeds, and fills
119 * the speeds buffer with the supported speeds. If speeds buffer is
120 * too small to contain all currently supported speeds, will return as
1f9127ca
ZB
121 * many speeds as can fit.
122 */
123unsigned int phy_supported_speeds(struct phy_device *phy,
124 unsigned int *speeds,
125 unsigned int size);
126
8a2fe56e 127/**
d8de01b7
RD
128 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
129 * @interface: enum phy_interface_t value
130 *
131 * Description: maps 'enum phy_interface_t' defined in this file
8a2fe56e
FF
132 * into the device tree binding of 'phy-mode', so that Ethernet
133 * device driver can get phy interface from device tree.
134 */
135static inline const char *phy_modes(phy_interface_t interface)
136{
137 switch (interface) {
138 case PHY_INTERFACE_MODE_NA:
139 return "";
735d8a18
FF
140 case PHY_INTERFACE_MODE_INTERNAL:
141 return "internal";
8a2fe56e
FF
142 case PHY_INTERFACE_MODE_MII:
143 return "mii";
144 case PHY_INTERFACE_MODE_GMII:
145 return "gmii";
146 case PHY_INTERFACE_MODE_SGMII:
147 return "sgmii";
148 case PHY_INTERFACE_MODE_TBI:
149 return "tbi";
150 case PHY_INTERFACE_MODE_REVMII:
151 return "rev-mii";
152 case PHY_INTERFACE_MODE_RMII:
153 return "rmii";
154 case PHY_INTERFACE_MODE_RGMII:
155 return "rgmii";
156 case PHY_INTERFACE_MODE_RGMII_ID:
157 return "rgmii-id";
158 case PHY_INTERFACE_MODE_RGMII_RXID:
159 return "rgmii-rxid";
160 case PHY_INTERFACE_MODE_RGMII_TXID:
161 return "rgmii-txid";
162 case PHY_INTERFACE_MODE_RTBI:
163 return "rtbi";
164 case PHY_INTERFACE_MODE_SMII:
165 return "smii";
166 case PHY_INTERFACE_MODE_XGMII:
167 return "xgmii";
fd70f72c
FF
168 case PHY_INTERFACE_MODE_MOCA:
169 return "moca";
b9d12085
TP
170 case PHY_INTERFACE_MODE_QSGMII:
171 return "qsgmii";
572de608
SW
172 case PHY_INTERFACE_MODE_TRGMII:
173 return "trgmii";
55601a88
AL
174 case PHY_INTERFACE_MODE_1000BASEX:
175 return "1000base-x";
176 case PHY_INTERFACE_MODE_2500BASEX:
177 return "2500base-x";
178 case PHY_INTERFACE_MODE_RXAUI:
179 return "rxaui";
c125ca09
RK
180 case PHY_INTERFACE_MODE_XAUI:
181 return "xaui";
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RK
182 case PHY_INTERFACE_MODE_10GBASER:
183 return "10gbase-r";
4618d671
HK
184 case PHY_INTERFACE_MODE_USXGMII:
185 return "usxgmii";
c114574e
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186 case PHY_INTERFACE_MODE_10GKR:
187 return "10gbase-kr";
8a2fe56e
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188 default:
189 return "unknown";
190 }
191}
192
00db8189 193
e8a2b6a4 194#define PHY_INIT_TIMEOUT 100000
00db8189 195#define PHY_FORCE_TIMEOUT 10
00db8189 196
e8a2b6a4 197#define PHY_MAX_ADDR 32
00db8189 198
a4d00f17 199/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
9d9326d3
AF
200#define PHY_ID_FMT "%s:%02x"
201
4567d686 202#define MII_BUS_ID_SIZE 61
a4d00f17 203
abf35df2
JG
204/* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
205 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
206#define MII_ADDR_C45 (1<<30)
d4117d63
KHL
207#define MII_DEVADDR_C45_SHIFT 16
208#define MII_REGADDR_C45_MASK GENMASK(15, 0)
abf35df2 209
313162d0 210struct device;
9525ae83 211struct phylink;
298e54fa
RK
212struct sfp_bus;
213struct sfp_upstream_ops;
313162d0
PG
214struct sk_buff;
215
080bb352
FF
216struct mdio_bus_stats {
217 u64_stats_t transfers;
218 u64_stats_t errors;
219 u64_stats_t writes;
220 u64_stats_t reads;
221 /* Must be last, add new statistics above */
222 struct u64_stats_sync syncp;
223};
224
c5e38a94
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225/*
226 * The Bus class for PHYs. Devices which provide access to
227 * PHYs should register using this structure
228 */
00db8189 229struct mii_bus {
3e3aaf64 230 struct module *owner;
00db8189 231 const char *name;
9d9326d3 232 char id[MII_BUS_ID_SIZE];
00db8189 233 void *priv;
ccaa953e
AL
234 int (*read)(struct mii_bus *bus, int addr, int regnum);
235 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
00db8189 236 int (*reset)(struct mii_bus *bus);
080bb352 237 struct mdio_bus_stats stats[PHY_MAX_ADDR];
00db8189 238
c5e38a94
AF
239 /*
240 * A lock to ensure that only one thing can read/write
241 * the MDIO bus at a time
242 */
35b5f6b1 243 struct mutex mdio_lock;
00db8189 244
18ee49dd 245 struct device *parent;
46abc021
LB
246 enum {
247 MDIOBUS_ALLOCATED = 1,
248 MDIOBUS_REGISTERED,
249 MDIOBUS_UNREGISTERED,
250 MDIOBUS_RELEASED,
251 } state;
252 struct device dev;
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AF
253
254 /* list of all PHYs on bus */
7f854420 255 struct mdio_device *mdio_map[PHY_MAX_ADDR];
00db8189 256
c6883996 257 /* PHY addresses to be ignored when probing */
f896424c
MP
258 u32 phy_mask;
259
922f2dd1
FF
260 /* PHY addresses to ignore the TA/read failure */
261 u32 phy_ignore_ta_mask;
262
c5e38a94 263 /*
e7f4dc35
AL
264 * An array of interrupts, each PHY's interrupt at the index
265 * matching its address
c5e38a94 266 */
e7f4dc35 267 int irq[PHY_MAX_ADDR];
69226896
RQ
268
269 /* GPIO reset pulse width in microseconds */
270 int reset_delay_us;
d396e84c
SS
271 /* RESET GPIO descriptor pointer */
272 struct gpio_desc *reset_gpiod;
00db8189 273};
46abc021 274#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
00db8189 275
eb8a54a7
TT
276struct mii_bus *mdiobus_alloc_size(size_t);
277static inline struct mii_bus *mdiobus_alloc(void)
278{
279 return mdiobus_alloc_size(0);
280}
281
3e3aaf64
RK
282int __mdiobus_register(struct mii_bus *bus, struct module *owner);
283#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
2e888103
LB
284void mdiobus_unregister(struct mii_bus *bus);
285void mdiobus_free(struct mii_bus *bus);
6d48f44b
GS
286struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
287static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
288{
289 return devm_mdiobus_alloc_size(dev, 0);
290}
291
292void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
2e888103 293struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
2e888103 294
695bce8f
HK
295#define PHY_INTERRUPT_DISABLED false
296#define PHY_INTERRUPT_ENABLED true
00db8189
AF
297
298/* PHY state machine states:
299 *
300 * DOWN: PHY device and driver are not ready for anything. probe
301 * should be called if and only if the PHY is in this state,
302 * given that the PHY device exists.
899a3cbb 303 * - PHY driver probe function will set the state to READY
00db8189
AF
304 *
305 * READY: PHY is ready to send and receive packets, but the
306 * controller is not. By default, PHYs which do not implement
899a3cbb 307 * probe will be set to this state by phy_probe().
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AF
308 * - start will set the state to UP
309 *
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AF
310 * UP: The PHY and attached device are ready to do work.
311 * Interrupts should be started here.
85a1f31d 312 * - timer moves to NOLINK or RUNNING
00db8189
AF
313 *
314 * NOLINK: PHY is up, but not currently plugged in.
8deeb630 315 * - irq or timer will set RUNNING if link comes back
00db8189
AF
316 * - phy_stop moves to HALTED
317 *
00db8189
AF
318 * RUNNING: PHY is currently up, running, and possibly sending
319 * and/or receiving packets
8deeb630 320 * - irq or timer will set NOLINK if link goes down
00db8189
AF
321 * - phy_stop moves to HALTED
322 *
00db8189
AF
323 * HALTED: PHY is up, but no polling or interrupts are done. Or
324 * PHY is in an error state.
f24098f8 325 * - phy_start moves to UP
00db8189
AF
326 */
327enum phy_state {
4017b4d3 328 PHY_DOWN = 0,
00db8189 329 PHY_READY,
2b3e88ea 330 PHY_HALTED,
00db8189 331 PHY_UP,
00db8189
AF
332 PHY_RUNNING,
333 PHY_NOLINK,
00db8189
AF
334};
335
ac28b9f8
DD
336/**
337 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
338 * @devices_in_package: Bit vector of devices present.
339 * @device_ids: The device identifer for each present device.
340 */
341struct phy_c45_device_ids {
342 u32 devices_in_package;
343 u32 device_ids[8];
344};
c1f19b51 345
76564261 346struct macsec_context;
2e181358 347struct macsec_ops;
76564261 348
00db8189
AF
349/* phy_device: An instance of a PHY
350 *
351 * drv: Pointer to the driver for this PHY instance
00db8189 352 * phy_id: UID for this device found during discovery
ac28b9f8
DD
353 * c45_ids: 802.3-c45 Device Identifers if is_c45.
354 * is_c45: Set to true if this phy uses clause 45 addressing.
4284b6a5 355 * is_internal: Set to true if this phy is internal to a MAC.
5a11dd7d 356 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc.
3b8b11f9 357 * is_gigabit_capable: Set to true if PHY supports 1000Mbps
aae88261 358 * has_fixups: Set to true if this phy has fixups/quirks.
8a477a6f 359 * suspended: Set to true if this phy has been suspended successfully.
a3995460 360 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
f0f9b4ed 361 * loopback_enabled: Set true if this phy has been loopbacked successfully.
00db8189
AF
362 * state: state of the PHY for management purposes
363 * dev_flags: Device-specific flags used by the PHY driver.
00db8189
AF
364 * irq: IRQ number of the PHY's interrupt (-1 if none)
365 * phy_timer: The timer for handling the state machine
298e54fa
RK
366 * sfp_bus_attached: flag indicating whether the SFP bus has been attached
367 * sfp_bus: SFP bus attached to this PHY's fiber port
00db8189
AF
368 * attached_dev: The attached enet driver's device instance ptr
369 * adjust_link: Callback for the enet controller to respond to
370 * changes in the link state.
2e181358 371 * macsec_ops: MACsec offloading ops.
00db8189 372 *
114002bc
FF
373 * speed, duplex, pause, supported, advertising, lp_advertising,
374 * and autoneg are used like in mii_if_info
00db8189
AF
375 *
376 * interrupts currently only supports enabled or disabled,
377 * but could be changed in the future to support enabling
378 * and disabling specific interrupts
379 *
380 * Contains some infrastructure for polling and interrupt
381 * handling, as well as handling shifts in PHY hardware state
382 */
383struct phy_device {
e5a03bfd
AL
384 struct mdio_device mdio;
385
00db8189
AF
386 /* Information about the PHY type */
387 /* And management functions */
388 struct phy_driver *drv;
389
00db8189
AF
390 u32 phy_id;
391
ac28b9f8 392 struct phy_c45_device_ids c45_ids;
87e5808d
HK
393 unsigned is_c45:1;
394 unsigned is_internal:1;
395 unsigned is_pseudo_fixed_link:1;
3b8b11f9 396 unsigned is_gigabit_capable:1;
87e5808d
HK
397 unsigned has_fixups:1;
398 unsigned suspended:1;
399 unsigned sysfs_links:1;
400 unsigned loopback_enabled:1;
401
402 unsigned autoneg:1;
403 /* The most recently read link state */
404 unsigned link:1;
4950c2ba 405 unsigned autoneg_complete:1;
ac28b9f8 406
695bce8f
HK
407 /* Interrupts are enabled */
408 unsigned interrupts:1;
409
00db8189
AF
410 enum phy_state state;
411
412 u32 dev_flags;
413
e8a2b6a4
AF
414 phy_interface_t interface;
415
c5e38a94
AF
416 /*
417 * forced speed & duplex (no autoneg)
00db8189
AF
418 * partner speed & duplex & pause (autoneg)
419 */
420 int speed;
421 int duplex;
422 int pause;
423 int asym_pause;
424
3c1bcc86
AL
425 /* Union of PHY and Attached devices' supported link modes */
426 /* See ethtool.h for more info */
427 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
428 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
c0ec3c27 429 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
65b27995
HK
430 /* used with phy_speed_down */
431 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old);
00db8189 432
d853d145 433 /* Energy efficient ethernet modes which should be prohibited */
434 u32 eee_broken_modes;
435
2e0bc452
ZB
436#ifdef CONFIG_LED_TRIGGER_PHY
437 struct phy_led_trigger *phy_led_triggers;
438 unsigned int phy_num_led_triggers;
439 struct phy_led_trigger *last_triggered;
3928ee64
MS
440
441 struct phy_led_trigger *led_link_trigger;
2e0bc452
ZB
442#endif
443
c5e38a94
AF
444 /*
445 * Interrupt number for this PHY
446 * -1 means no interrupt
447 */
00db8189
AF
448 int irq;
449
450 /* private data pointer */
451 /* For use by PHYs to maintain extra state */
452 void *priv;
453
454 /* Interrupt and Polling infrastructure */
a390d1f3 455 struct delayed_work state_queue;
00db8189 456
35b5f6b1 457 struct mutex lock;
00db8189 458
298e54fa
RK
459 /* This may be modified under the rtnl lock */
460 bool sfp_bus_attached;
461 struct sfp_bus *sfp_bus;
9525ae83 462 struct phylink *phylink;
00db8189 463 struct net_device *attached_dev;
4715f65f 464 struct mii_timestamper *mii_ts;
00db8189 465
634ec36c 466 u8 mdix;
f4ed2fe3 467 u8 mdix_ctrl;
634ec36c 468
a81497be 469 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier);
00db8189 470 void (*adjust_link)(struct net_device *dev);
2e181358
AT
471
472#if IS_ENABLED(CONFIG_MACSEC)
473 /* MACsec management functions */
474 const struct macsec_ops *macsec_ops;
475#endif
00db8189 476};
e5a03bfd
AL
477#define to_phy_device(d) container_of(to_mdio_device(d), \
478 struct phy_device, mdio)
00db8189
AF
479
480/* struct phy_driver: Driver structure for a particular PHY type
481 *
a9049e0c 482 * driver_data: static driver data
00db8189
AF
483 * phy_id: The result of reading the UID registers of this PHY
484 * type, and ANDing them with the phy_id_mask. This driver
485 * only works for PHYs with IDs which match this field
486 * name: The friendly name of this PHY type
487 * phy_id_mask: Defines the important bits of the phy_id
3e64cf7a
CG
488 * features: A mandatory list of features (speed, duplex, etc)
489 * supported by this PHY
00db8189
AF
490 * flags: A bitfield defining certain other features this PHY
491 * supports (like interrupts)
492 *
00fde795
HK
493 * All functions are optional. If config_aneg or read_status
494 * are not implemented, the phy core uses the genphy versions.
495 * Note that none of these functions should be called from
496 * interrupt time. The goal is for the bus read/write functions
497 * to be able to block when the bus transaction is happening,
498 * and be freed up by an interrupt (The MPC85xx has this ability,
499 * though it is not currently supported in the driver).
00db8189
AF
500 */
501struct phy_driver {
a9049e0c 502 struct mdio_driver_common mdiodrv;
00db8189
AF
503 u32 phy_id;
504 char *name;
511e3036 505 u32 phy_id_mask;
719655a1 506 const unsigned long * const features;
00db8189 507 u32 flags;
860f6e9e 508 const void *driver_data;
00db8189 509
c5e38a94 510 /*
9df81dd7
FF
511 * Called to issue a PHY software reset
512 */
513 int (*soft_reset)(struct phy_device *phydev);
514
515 /*
c5e38a94
AF
516 * Called to initialize the PHY,
517 * including after a reset
518 */
00db8189
AF
519 int (*config_init)(struct phy_device *phydev);
520
c5e38a94
AF
521 /*
522 * Called during discovery. Used to set
523 * up device-specific structures, if any
524 */
00db8189
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525 int (*probe)(struct phy_device *phydev);
526
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527 /*
528 * Probe the hardware to determine what abilities it has.
529 * Should only set phydev->supported.
530 */
531 int (*get_features)(struct phy_device *phydev);
532
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533 /* PHY Power Management */
534 int (*suspend)(struct phy_device *phydev);
535 int (*resume)(struct phy_device *phydev);
536
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537 /*
538 * Configures the advertisement and resets
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539 * autonegotiation if phydev->autoneg is on,
540 * forces the speed to the current settings in phydev
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541 * if phydev->autoneg is off
542 */
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543 int (*config_aneg)(struct phy_device *phydev);
544
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545 /* Determines the auto negotiation result */
546 int (*aneg_done)(struct phy_device *phydev);
547
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548 /* Determines the negotiated speed and duplex */
549 int (*read_status)(struct phy_device *phydev);
550
551 /* Clears any pending interrupts */
552 int (*ack_interrupt)(struct phy_device *phydev);
553
554 /* Enables or disables interrupts */
555 int (*config_intr)(struct phy_device *phydev);
556
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557 /*
558 * Checks if the PHY generated an interrupt.
559 * For multi-PHY devices with shared PHY interrupt pin
560 */
561 int (*did_interrupt)(struct phy_device *phydev);
562
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563 /* Override default interrupt handling */
564 int (*handle_interrupt)(struct phy_device *phydev);
565
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566 /* Clears up any memory if needed */
567 void (*remove)(struct phy_device *phydev);
568
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569 /* Returns true if this is a suitable driver for the given
570 * phydev. If NULL, matching is based on phy_id and
571 * phy_id_mask.
572 */
573 int (*match_phy_device)(struct phy_device *phydev);
574
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575 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
576 * enable Wake on LAN, so set_wol is provided to be called in the
577 * ethernet driver's set_wol function. */
578 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
579
580 /* See set_wol, but for checking whether Wake on LAN is enabled. */
581 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
582
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583 /*
584 * Called to inform a PHY device driver when the core is about to
585 * change the link state. This callback is supposed to be used as
586 * fixup hook for drivers that need to take action when the link
587 * state changes. Drivers are by no means allowed to mess with the
588 * PHY device structure in their implementations.
589 */
590 void (*link_change_notify)(struct phy_device *dev);
591
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592 /*
593 * Phy specific driver override for reading a MMD register.
594 * This function is optional for PHY specific drivers. When
595 * not provided, the default MMD read function will be used
596 * by phy_read_mmd(), which will use either a direct read for
597 * Clause 45 PHYs or an indirect read for Clause 22 PHYs.
598 * devnum is the MMD device number within the PHY device,
599 * regnum is the register within the selected MMD device.
600 */
601 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
602
603 /*
604 * Phy specific driver override for writing a MMD register.
605 * This function is optional for PHY specific drivers. When
606 * not provided, the default MMD write function will be used
607 * by phy_write_mmd(), which will use either a direct write for
608 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs.
609 * devnum is the MMD device number within the PHY device,
610 * regnum is the register within the selected MMD device.
611 * val is the value to be written.
612 */
613 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
614 u16 val);
615
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616 int (*read_page)(struct phy_device *dev);
617 int (*write_page)(struct phy_device *dev, int page);
618
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619 /* Get the size and type of the eeprom contained within a plug-in
620 * module */
621 int (*module_info)(struct phy_device *dev,
622 struct ethtool_modinfo *modinfo);
623
624 /* Get the eeprom information from the plug-in module */
625 int (*module_eeprom)(struct phy_device *dev,
626 struct ethtool_eeprom *ee, u8 *data);
627
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628 /* Get statistics from the phy using ethtool */
629 int (*get_sset_count)(struct phy_device *dev);
630 void (*get_strings)(struct phy_device *dev, u8 *data);
631 void (*get_stats)(struct phy_device *dev,
632 struct ethtool_stats *stats, u64 *data);
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633
634 /* Get and Set PHY tunables */
635 int (*get_tunable)(struct phy_device *dev,
636 struct ethtool_tunable *tuna, void *data);
637 int (*set_tunable)(struct phy_device *dev,
638 struct ethtool_tunable *tuna,
639 const void *data);
f0f9b4ed 640 int (*set_loopback)(struct phy_device *dev, bool enable);
00db8189 641};
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642#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
643 struct phy_driver, mdiodrv)
00db8189 644
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645#define PHY_ANY_ID "MATCH ANY PHY"
646#define PHY_ANY_UID 0xffffffff
647
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648#define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
649#define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
650#define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
651
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652/* A Structure for boards to register fixups with the PHY Lib */
653struct phy_fixup {
654 struct list_head list;
4567d686 655 char bus_id[MII_BUS_ID_SIZE + 3];
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656 u32 phy_uid;
657 u32 phy_uid_mask;
658 int (*run)(struct phy_device *phydev);
659};
660
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661const char *phy_speed_to_str(int speed);
662const char *phy_duplex_to_str(unsigned int duplex);
663
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664/* A structure for mapping a particular speed and duplex
665 * combination to a particular SUPPORTED and ADVERTISED value
666 */
667struct phy_setting {
668 u32 speed;
669 u8 duplex;
670 u8 bit;
671};
672
673const struct phy_setting *
674phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
3c1bcc86 675 bool exact);
0ccb4fc6 676size_t phy_speeds(unsigned int *speeds, size_t size,
3c1bcc86 677 unsigned long *mask);
a4eaed9f 678void of_set_phy_supported(struct phy_device *phydev);
3feb9b23 679void of_set_phy_eee_broken(struct phy_device *phydev);
331c56ac 680int phy_speed_down_core(struct phy_device *phydev);
0ccb4fc6 681
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682/**
683 * phy_is_started - Convenience function to check whether PHY is started
684 * @phydev: The phy_device struct
685 */
686static inline bool phy_is_started(struct phy_device *phydev)
687{
a2fc9d7e 688 return phydev->state >= PHY_UP;
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689}
690
2d880b87 691void phy_resolve_aneg_pause(struct phy_device *phydev);
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692void phy_resolve_aneg_linkmode(struct phy_device *phydev);
693
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694/**
695 * phy_read - Convenience function for reading a given PHY register
696 * @phydev: the phy_device struct
697 * @regnum: register number to read
698 *
699 * NOTE: MUST NOT be called from interrupt context,
700 * because the bus read/write functions may wait for an interrupt
701 * to conclude the operation.
702 */
abf35df2 703static inline int phy_read(struct phy_device *phydev, u32 regnum)
2e888103 704{
e5a03bfd 705 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
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706}
707
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708/**
709 * __phy_read - convenience function for reading a given PHY register
710 * @phydev: the phy_device struct
711 * @regnum: register number to read
712 *
713 * The caller must have taken the MDIO bus lock.
714 */
715static inline int __phy_read(struct phy_device *phydev, u32 regnum)
716{
717 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
718}
719
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720/**
721 * phy_write - Convenience function for writing a given PHY register
722 * @phydev: the phy_device struct
723 * @regnum: register number to write
724 * @val: value to write to @regnum
725 *
726 * NOTE: MUST NOT be called from interrupt context,
727 * because the bus read/write functions may wait for an interrupt
728 * to conclude the operation.
729 */
abf35df2 730static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
2e888103 731{
e5a03bfd 732 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
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LB
733}
734
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735/**
736 * __phy_write - Convenience function for writing a given PHY register
737 * @phydev: the phy_device struct
738 * @regnum: register number to write
739 * @val: value to write to @regnum
740 *
741 * The caller must have taken the MDIO bus lock.
742 */
743static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
744{
745 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
746 val);
747}
748
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749/**
750 * phy_read_mmd - Convenience function for reading a register
751 * from an MMD on a given PHY.
752 * @phydev: The phy_device struct
753 * @devad: The MMD to read from
754 * @regnum: The register on the MMD to read
755 *
756 * Same rules as for phy_read();
757 */
758int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
759
760/**
761 * __phy_read_mmd - Convenience function for reading a register
762 * from an MMD on a given PHY.
763 * @phydev: The phy_device struct
764 * @devad: The MMD to read from
765 * @regnum: The register on the MMD to read
766 *
767 * Same rules as for __phy_read();
768 */
769int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
770
771/**
772 * phy_write_mmd - Convenience function for writing a register
773 * on an MMD on a given PHY.
774 * @phydev: The phy_device struct
775 * @devad: The MMD to write to
776 * @regnum: The register on the MMD to read
777 * @val: value to write to @regnum
778 *
779 * Same rules as for phy_write();
780 */
781int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
782
783/**
784 * __phy_write_mmd - Convenience function for writing a register
785 * on an MMD on a given PHY.
786 * @phydev: The phy_device struct
787 * @devad: The MMD to write to
788 * @regnum: The register on the MMD to read
789 * @val: value to write to @regnum
790 *
791 * Same rules as for __phy_write();
792 */
793int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
794
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795int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
796 u16 set);
797int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
798 u16 set);
788f9933 799int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
2b74e5be 800int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
788f9933 801
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802int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
803 u16 mask, u16 set);
804int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
805 u16 mask, u16 set);
1878f0dc 806int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
b8554d4f 807 u16 mask, u16 set);
1878f0dc 808int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
b8554d4f 809 u16 mask, u16 set);
1878f0dc 810
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811/**
812 * __phy_set_bits - Convenience function for setting bits in a PHY register
813 * @phydev: the phy_device struct
814 * @regnum: register number to write
815 * @val: bits to set
816 *
817 * The caller must have taken the MDIO bus lock.
818 */
819static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
820{
821 return __phy_modify(phydev, regnum, 0, val);
822}
823
824/**
825 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
826 * @phydev: the phy_device struct
827 * @regnum: register number to write
828 * @val: bits to clear
829 *
830 * The caller must have taken the MDIO bus lock.
831 */
832static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
833 u16 val)
834{
835 return __phy_modify(phydev, regnum, val, 0);
836}
837
838/**
839 * phy_set_bits - Convenience function for setting bits in a PHY register
840 * @phydev: the phy_device struct
841 * @regnum: register number to write
842 * @val: bits to set
843 */
844static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
845{
846 return phy_modify(phydev, regnum, 0, val);
847}
848
849/**
850 * phy_clear_bits - Convenience function for clearing bits in a PHY register
851 * @phydev: the phy_device struct
852 * @regnum: register number to write
853 * @val: bits to clear
854 */
855static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
856{
857 return phy_modify(phydev, regnum, val, 0);
858}
859
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860/**
861 * __phy_set_bits_mmd - Convenience function for setting bits in a register
862 * on MMD
863 * @phydev: the phy_device struct
864 * @devad: the MMD containing register to modify
865 * @regnum: register number to modify
866 * @val: bits to set
867 *
868 * The caller must have taken the MDIO bus lock.
869 */
870static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
871 u32 regnum, u16 val)
872{
873 return __phy_modify_mmd(phydev, devad, regnum, 0, val);
874}
875
876/**
877 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
878 * on MMD
879 * @phydev: the phy_device struct
880 * @devad: the MMD containing register to modify
881 * @regnum: register number to modify
882 * @val: bits to clear
883 *
884 * The caller must have taken the MDIO bus lock.
885 */
886static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
887 u32 regnum, u16 val)
888{
889 return __phy_modify_mmd(phydev, devad, regnum, val, 0);
890}
891
892/**
893 * phy_set_bits_mmd - Convenience function for setting bits in a register
894 * on MMD
895 * @phydev: the phy_device struct
896 * @devad: the MMD containing register to modify
897 * @regnum: register number to modify
898 * @val: bits to set
899 */
900static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
901 u32 regnum, u16 val)
902{
903 return phy_modify_mmd(phydev, devad, regnum, 0, val);
904}
905
906/**
907 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
908 * on MMD
909 * @phydev: the phy_device struct
910 * @devad: the MMD containing register to modify
911 * @regnum: register number to modify
912 * @val: bits to clear
913 */
914static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
915 u32 regnum, u16 val)
916{
917 return phy_modify_mmd(phydev, devad, regnum, val, 0);
918}
919
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920/**
921 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
922 * @phydev: the phy_device struct
923 *
924 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
925 * PHY_IGNORE_INTERRUPT
926 */
927static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
928{
929 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
930}
931
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932/**
933 * phy_polling_mode - Convenience function for testing whether polling is
934 * used to detect PHY status changes
935 * @phydev: the phy_device struct
936 */
937static inline bool phy_polling_mode(struct phy_device *phydev)
938{
939 return phydev->irq == PHY_POLL;
940}
941
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942/**
943 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration.
944 * @phydev: the phy_device struct
945 */
946static inline bool phy_has_hwtstamp(struct phy_device *phydev)
947{
4715f65f 948 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp;
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RC
949}
950
951/**
952 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping.
953 * @phydev: the phy_device struct
954 */
955static inline bool phy_has_rxtstamp(struct phy_device *phydev)
956{
4715f65f 957 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp;
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958}
959
960/**
961 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or
962 * PTP hardware clock capabilities.
963 * @phydev: the phy_device struct
964 */
965static inline bool phy_has_tsinfo(struct phy_device *phydev)
966{
4715f65f 967 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info;
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968}
969
970/**
971 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping.
972 * @phydev: the phy_device struct
973 */
974static inline bool phy_has_txtstamp(struct phy_device *phydev)
975{
4715f65f 976 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp;
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977}
978
979static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr)
980{
4715f65f 981 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr);
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982}
983
984static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb,
985 int type)
986{
4715f65f 987 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type);
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988}
989
990static inline int phy_ts_info(struct phy_device *phydev,
991 struct ethtool_ts_info *tsinfo)
992{
4715f65f 993 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo);
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994}
995
996static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb,
997 int type)
998{
4715f65f 999 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type);
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1000}
1001
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1002/**
1003 * phy_is_internal - Convenience function for testing if a PHY is internal
1004 * @phydev: the phy_device struct
1005 */
1006static inline bool phy_is_internal(struct phy_device *phydev)
1007{
1008 return phydev->is_internal;
1009}
1010
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1011/**
1012 * phy_interface_mode_is_rgmii - Convenience function for testing if a
1013 * PHY interface mode is RGMII (all variants)
1014 * @mode: the phy_interface_t enum
1015 */
1016static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
1017{
1018 return mode >= PHY_INTERFACE_MODE_RGMII &&
1019 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
1020};
1021
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1022/**
1023 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z
1024 * negotiation
1025 * @mode: one of &enum phy_interface_t
1026 *
1027 * Returns true if the phy interface mode uses the 16-bit negotiation
1028 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
1029 */
1030static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
1031{
1032 return mode == PHY_INTERFACE_MODE_1000BASEX ||
1033 mode == PHY_INTERFACE_MODE_2500BASEX;
1034}
1035
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1036/**
1037 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
1038 * is RGMII (all variants)
1039 * @phydev: the phy_device struct
1040 */
1041static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
1042{
32d0f783 1043 return phy_interface_mode_is_rgmii(phydev->interface);
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FF
1044};
1045
1046/*
1047 * phy_is_pseudo_fixed_link - Convenience function for testing if this
1048 * PHY is the CPU port facing side of an Ethernet switch, or similar.
1049 * @phydev: the phy_device struct
1050 */
1051static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
1052{
1053 return phydev->is_pseudo_fixed_link;
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FF
1054}
1055
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1056int phy_save_page(struct phy_device *phydev);
1057int phy_select_page(struct phy_device *phydev, int page);
1058int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
1059int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
1060int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
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1061int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
1062 u16 mask, u16 set);
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1063int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
1064 u16 mask, u16 set);
1065
7d49a32a 1066struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
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1067 bool is_c45,
1068 struct phy_c45_device_ids *c45_ids);
90eff909 1069#if IS_ENABLED(CONFIG_PHYLIB)
ac28b9f8 1070struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
4dea547f 1071int phy_device_register(struct phy_device *phy);
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1072void phy_device_free(struct phy_device *phydev);
1073#else
1074static inline
1075struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1076{
1077 return NULL;
1078}
1079
1080static inline int phy_device_register(struct phy_device *phy)
1081{
1082 return 0;
1083}
1084
1085static inline void phy_device_free(struct phy_device *phydev) { }
1086#endif /* CONFIG_PHYLIB */
38737e49 1087void phy_device_remove(struct phy_device *phydev);
2f5cb434 1088int phy_init_hw(struct phy_device *phydev);
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1089int phy_suspend(struct phy_device *phydev);
1090int phy_resume(struct phy_device *phydev);
9c2c2e62 1091int __phy_resume(struct phy_device *phydev);
f0f9b4ed 1092int phy_loopback(struct phy_device *phydev, bool enable);
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RK
1093void phy_sfp_attach(void *upstream, struct sfp_bus *bus);
1094void phy_sfp_detach(void *upstream, struct sfp_bus *bus);
1095int phy_sfp_probe(struct phy_device *phydev,
1096 const struct sfp_upstream_ops *ops);
4017b4d3
SS
1097struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1098 phy_interface_t interface);
f8f76db1 1099struct phy_device *phy_find_first(struct mii_bus *bus);
257184d7
AF
1100int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1101 u32 flags, phy_interface_t interface);
fa94f6d9 1102int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
4017b4d3
SS
1103 void (*handler)(struct net_device *),
1104 phy_interface_t interface);
1105struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1106 void (*handler)(struct net_device *),
1107 phy_interface_t interface);
e1393456
AF
1108void phy_disconnect(struct phy_device *phydev);
1109void phy_detach(struct phy_device *phydev);
1110void phy_start(struct phy_device *phydev);
1111void phy_stop(struct phy_device *phydev);
1112int phy_start_aneg(struct phy_device *phydev);
372788f9 1113int phy_aneg_done(struct phy_device *phydev);
2b9672dd
HK
1114int phy_speed_down(struct phy_device *phydev, bool sync);
1115int phy_speed_up(struct phy_device *phydev);
e1393456 1116
002ba705 1117int phy_restart_aneg(struct phy_device *phydev);
a9668491 1118int phy_reset_after_clk_enable(struct phy_device *phydev);
00db8189 1119
bafbdd52
SS
1120static inline void phy_device_reset(struct phy_device *phydev, int value)
1121{
1122 mdio_device_reset(&phydev->mdio, value);
1123}
1124
72ba48be 1125#define phydev_err(_phydev, format, args...) \
e5a03bfd 1126 dev_err(&_phydev->mdio.dev, format, ##args)
72ba48be 1127
c4fabb8b
AL
1128#define phydev_info(_phydev, format, args...) \
1129 dev_info(&_phydev->mdio.dev, format, ##args)
1130
ab2a605f
AL
1131#define phydev_warn(_phydev, format, args...) \
1132 dev_warn(&_phydev->mdio.dev, format, ##args)
1133
72ba48be 1134#define phydev_dbg(_phydev, format, args...) \
2eaa38d9 1135 dev_dbg(&_phydev->mdio.dev, format, ##args)
72ba48be 1136
84eff6d1
AL
1137static inline const char *phydev_name(const struct phy_device *phydev)
1138{
e5a03bfd 1139 return dev_name(&phydev->mdio.dev);
84eff6d1
AL
1140}
1141
bec170e5
HK
1142static inline void phy_lock_mdio_bus(struct phy_device *phydev)
1143{
1144 mutex_lock(&phydev->mdio.bus->mdio_lock);
1145}
1146
1147static inline void phy_unlock_mdio_bus(struct phy_device *phydev)
1148{
1149 mutex_unlock(&phydev->mdio.bus->mdio_lock);
1150}
1151
2220943a
AL
1152void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1153 __printf(2, 3);
e27f1787
FF
1154char *phy_attached_info_irq(struct phy_device *phydev)
1155 __malloc;
2220943a 1156void phy_attached_info(struct phy_device *phydev);
5acde34a
RK
1157
1158/* Clause 22 PHY */
045925e3 1159int genphy_read_abilities(struct phy_device *phydev);
3fb69bca 1160int genphy_setup_forced(struct phy_device *phydev);
00db8189 1161int genphy_restart_aneg(struct phy_device *phydev);
2a10ab04 1162int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart);
cd34499c 1163int genphy_config_eee_advert(struct phy_device *phydev);
f4069cd7 1164int __genphy_config_aneg(struct phy_device *phydev, bool changed);
a9fa6e6a 1165int genphy_aneg_done(struct phy_device *phydev);
00db8189 1166int genphy_update_link(struct phy_device *phydev);
8d3dc3ac 1167int genphy_read_lpa(struct phy_device *phydev);
0efc286a 1168int genphy_read_status_fixed(struct phy_device *phydev);
00db8189 1169int genphy_read_status(struct phy_device *phydev);
0f0ca340
GC
1170int genphy_suspend(struct phy_device *phydev);
1171int genphy_resume(struct phy_device *phydev);
f0f9b4ed 1172int genphy_loopback(struct phy_device *phydev, bool enable);
797ac071 1173int genphy_soft_reset(struct phy_device *phydev);
f4069cd7
HK
1174
1175static inline int genphy_config_aneg(struct phy_device *phydev)
1176{
1177 return __genphy_config_aneg(phydev, false);
1178}
1179
0878fff1
FF
1180static inline int genphy_no_soft_reset(struct phy_device *phydev)
1181{
1182 return 0;
1183}
4c8e0459
LW
1184static inline int genphy_no_ack_interrupt(struct phy_device *phydev)
1185{
1186 return 0;
1187}
1188static inline int genphy_no_config_intr(struct phy_device *phydev)
1189{
1190 return 0;
1191}
5df7af85
KH
1192int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1193 u16 regnum);
1194int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1195 u16 regnum, u16 val);
5acde34a 1196
fa6e98ce
HK
1197/* Clause 37 */
1198int genphy_c37_config_aneg(struct phy_device *phydev);
1199int genphy_c37_read_status(struct phy_device *phydev);
1200
5acde34a
RK
1201/* Clause 45 PHY */
1202int genphy_c45_restart_aneg(struct phy_device *phydev);
1af9f168 1203int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
5acde34a 1204int genphy_c45_aneg_done(struct phy_device *phydev);
998a8a83 1205int genphy_c45_read_link(struct phy_device *phydev);
5acde34a
RK
1206int genphy_c45_read_lpa(struct phy_device *phydev);
1207int genphy_c45_read_pma(struct phy_device *phydev);
1208int genphy_c45_pma_setup_forced(struct phy_device *phydev);
9a5dc8af 1209int genphy_c45_an_config_aneg(struct phy_device *phydev);
5acde34a 1210int genphy_c45_an_disable_aneg(struct phy_device *phydev);
ea4efe25 1211int genphy_c45_read_mdix(struct phy_device *phydev);
ac3f5533 1212int genphy_c45_pma_read_abilities(struct phy_device *phydev);
70fa3a96 1213int genphy_c45_read_status(struct phy_device *phydev);
94acaeb5 1214int genphy_c45_config_aneg(struct phy_device *phydev);
5acde34a 1215
e8a714e0
FF
1216/* The gen10g_* functions are the old Clause 45 stub */
1217int gen10g_config_aneg(struct phy_device *phydev);
e8a714e0 1218
00fde795
HK
1219static inline int phy_read_status(struct phy_device *phydev)
1220{
1221 if (!phydev->drv)
1222 return -EIO;
1223
1224 if (phydev->drv->read_status)
1225 return phydev->drv->read_status(phydev);
1226 else
1227 return genphy_read_status(phydev);
1228}
1229
00db8189 1230void phy_driver_unregister(struct phy_driver *drv);
d5bf9071 1231void phy_drivers_unregister(struct phy_driver *drv, int n);
be01da72
AL
1232int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1233int phy_drivers_register(struct phy_driver *new_driver, int n,
1234 struct module *owner);
4f9c85a1 1235void phy_state_machine(struct work_struct *work);
97b33bdf 1236void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies);
28b2e0d2 1237void phy_mac_interrupt(struct phy_device *phydev);
29935aeb 1238void phy_start_machine(struct phy_device *phydev);
00db8189 1239void phy_stop_machine(struct phy_device *phydev);
5514174f 1240void phy_ethtool_ksettings_get(struct phy_device *phydev,
1241 struct ethtool_link_ksettings *cmd);
2d55173e
PR
1242int phy_ethtool_ksettings_set(struct phy_device *phydev,
1243 const struct ethtool_link_ksettings *cmd);
4017b4d3 1244int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
3231e5d2 1245int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd);
434a4315 1246void phy_request_interrupt(struct phy_device *phydev);
07b09289 1247void phy_free_interrupt(struct phy_device *phydev);
e1393456 1248void phy_print_status(struct phy_device *phydev);
f3a6bd39 1249int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
41124fa6 1250void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
22c0ef6b 1251void phy_advertise_supported(struct phy_device *phydev);
c306ad36 1252void phy_support_sym_pause(struct phy_device *phydev);
af8d9bb2 1253void phy_support_asym_pause(struct phy_device *phydev);
0c122405
AL
1254void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1255 bool autoneg);
70814e81 1256void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
22b7d299
AL
1257bool phy_validate_pause(struct phy_device *phydev,
1258 struct ethtool_pauseparam *pp);
00db8189 1259
f62220d3 1260int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1261 int (*run)(struct phy_device *));
f62220d3 1262int phy_register_fixup_for_id(const char *bus_id,
4017b4d3 1263 int (*run)(struct phy_device *));
f62220d3 1264int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1265 int (*run)(struct phy_device *));
f62220d3 1266
f38e7a32
WH
1267int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1268int phy_unregister_fixup_for_id(const char *bus_id);
1269int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1270
a59a4d19
GC
1271int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1272int phy_get_eee_err(struct phy_device *phydev);
1273int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1274int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
42e836eb 1275int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
4017b4d3
SS
1276void phy_ethtool_get_wol(struct phy_device *phydev,
1277 struct ethtool_wolinfo *wol);
9d9a77ce
PR
1278int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1279 struct ethtool_link_ksettings *cmd);
1280int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1281 const struct ethtool_link_ksettings *cmd);
e86a8987 1282int phy_ethtool_nway_reset(struct net_device *ndev);
a59a4d19 1283
90eff909 1284#if IS_ENABLED(CONFIG_PHYLIB)
9b9a8bfc
AF
1285int __init mdio_bus_init(void);
1286void mdio_bus_exit(void);
9e8d438e
FF
1287#endif
1288
1289/* Inline function for use within net/core/ethtool.c (built-in) */
1290static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data)
c59530d0 1291{
9e8d438e
FF
1292 if (!phydev->drv)
1293 return -EIO;
1294
1295 mutex_lock(&phydev->lock);
1296 phydev->drv->get_strings(phydev, data);
1297 mutex_unlock(&phydev->lock);
1298
1299 return 0;
c59530d0
FF
1300}
1301
9e8d438e 1302static inline int phy_ethtool_get_sset_count(struct phy_device *phydev)
c59530d0 1303{
9e8d438e
FF
1304 int ret;
1305
1306 if (!phydev->drv)
1307 return -EIO;
1308
1309 if (phydev->drv->get_sset_count &&
1310 phydev->drv->get_strings &&
1311 phydev->drv->get_stats) {
1312 mutex_lock(&phydev->lock);
1313 ret = phydev->drv->get_sset_count(phydev);
1314 mutex_unlock(&phydev->lock);
1315
1316 return ret;
1317 }
1318
c59530d0
FF
1319 return -EOPNOTSUPP;
1320}
1321
9e8d438e
FF
1322static inline int phy_ethtool_get_stats(struct phy_device *phydev,
1323 struct ethtool_stats *stats, u64 *data)
c59530d0 1324{
9e8d438e
FF
1325 if (!phydev->drv)
1326 return -EIO;
1327
1328 mutex_lock(&phydev->lock);
1329 phydev->drv->get_stats(phydev, stats, data);
1330 mutex_unlock(&phydev->lock);
1331
1332 return 0;
c59530d0 1333}
9b9a8bfc 1334
00db8189 1335extern struct bus_type mdio_bus_type;
c31accd1 1336
648ea013
FF
1337struct mdio_board_info {
1338 const char *bus_id;
1339 char modalias[MDIO_NAME_SIZE];
1340 int mdio_addr;
1341 const void *platform_data;
1342};
1343
90eff909 1344#if IS_ENABLED(CONFIG_MDIO_DEVICE)
648ea013
FF
1345int mdiobus_register_board_info(const struct mdio_board_info *info,
1346 unsigned int n);
1347#else
1348static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1349 unsigned int n)
1350{
1351 return 0;
1352}
1353#endif
1354
1355
c31accd1
JH
1356/**
1357 * module_phy_driver() - Helper macro for registering PHY drivers
1358 * @__phy_drivers: array of PHY drivers to register
1359 *
1360 * Helper macro for PHY drivers which do not do anything special in module
1361 * init/exit. Each module may only use this macro once, and calling it
1362 * replaces module_init() and module_exit().
1363 */
1364#define phy_module_driver(__phy_drivers, __count) \
1365static int __init phy_module_init(void) \
1366{ \
be01da72 1367 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
c31accd1
JH
1368} \
1369module_init(phy_module_init); \
1370static void __exit phy_module_exit(void) \
1371{ \
1372 phy_drivers_unregister(__phy_drivers, __count); \
1373} \
1374module_exit(phy_module_exit)
1375
1376#define module_phy_driver(__phy_drivers) \
1377 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1378
5db5ea99
FF
1379bool phy_driver_is_genphy(struct phy_device *phydev);
1380bool phy_driver_is_genphy_10g(struct phy_device *phydev);
1381
00db8189 1382#endif /* __PHY_H */