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2874c5fd | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
00db8189 | 2 | /* |
00db8189 | 3 | * Framework and drivers for configuring and reading different PHYs |
d8de01b7 | 4 | * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c |
00db8189 AF |
5 | * |
6 | * Author: Andy Fleming | |
7 | * | |
8 | * Copyright (c) 2004 Freescale Semiconductor, Inc. | |
00db8189 AF |
9 | */ |
10 | ||
11 | #ifndef __PHY_H | |
12 | #define __PHY_H | |
13 | ||
2220943a | 14 | #include <linux/compiler.h> |
00db8189 | 15 | #include <linux/spinlock.h> |
13df29f6 | 16 | #include <linux/ethtool.h> |
b31cdffa | 17 | #include <linux/linkmode.h> |
a68a8138 | 18 | #include <linux/netlink.h> |
bac83c65 | 19 | #include <linux/mdio.h> |
13df29f6 | 20 | #include <linux/mii.h> |
4715f65f | 21 | #include <linux/mii_timestamper.h> |
3e3aaf64 | 22 | #include <linux/module.h> |
13df29f6 MR |
23 | #include <linux/timer.h> |
24 | #include <linux/workqueue.h> | |
8626d3b4 | 25 | #include <linux/mod_devicetable.h> |
080bb352 | 26 | #include <linux/u64_stats_sync.h> |
9010f9de | 27 | #include <linux/irqreturn.h> |
bd971ff0 | 28 | #include <linux/iopoll.h> |
63490847 | 29 | #include <linux/refcount.h> |
00db8189 | 30 | |
60063497 | 31 | #include <linux/atomic.h> |
0ac49527 | 32 | |
e9fbdf17 | 33 | #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ |
00db8189 AF |
34 | SUPPORTED_TP | \ |
35 | SUPPORTED_MII) | |
36 | ||
e9fbdf17 FF |
37 | #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ |
38 | SUPPORTED_10baseT_Full) | |
39 | ||
40 | #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ | |
41 | SUPPORTED_100baseT_Full) | |
42 | ||
43 | #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ | |
00db8189 AF |
44 | SUPPORTED_1000baseT_Full) |
45 | ||
719655a1 AL |
46 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; |
47 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; | |
48 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; | |
49 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; | |
50 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; | |
51 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; | |
9e857a40 | 52 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; |
719655a1 AL |
53 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; |
54 | ||
55 | #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) | |
56 | #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) | |
57 | #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) | |
58 | #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) | |
59 | #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) | |
60 | #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) | |
9e857a40 | 61 | #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) |
719655a1 | 62 | #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) |
e9fbdf17 | 63 | |
54638c6e DE |
64 | extern const int phy_basic_ports_array[3]; |
65 | extern const int phy_fibre_port_array[1]; | |
66 | extern const int phy_all_ports_features_array[7]; | |
3c1bcc86 AL |
67 | extern const int phy_10_100_features_array[4]; |
68 | extern const int phy_basic_t1_features_array[2]; | |
69 | extern const int phy_gbit_features_array[2]; | |
70 | extern const int phy_10gbit_features_array[1]; | |
71 | ||
c5e38a94 AF |
72 | /* |
73 | * Set phydev->irq to PHY_POLL if interrupts are not supported, | |
93e8990c HK |
74 | * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if |
75 | * the attached MAC driver handles the interrupt | |
00db8189 AF |
76 | */ |
77 | #define PHY_POLL -1 | |
93e8990c | 78 | #define PHY_MAC_INTERRUPT -2 |
00db8189 | 79 | |
a4307c0e HK |
80 | #define PHY_IS_INTERNAL 0x00000001 |
81 | #define PHY_RST_AFTER_CLK_EN 0x00000002 | |
97c22438 | 82 | #define PHY_POLL_CABLE_TEST 0x00000004 |
a9049e0c | 83 | #define MDIO_DEVICE_IS_PHY 0x80000000 |
00db8189 | 84 | |
4069a572 AL |
85 | /** |
86 | * enum phy_interface_t - Interface Mode definitions | |
87 | * | |
88 | * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch | |
89 | * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined | |
90 | * @PHY_INTERFACE_MODE_MII: Median-independent interface | |
91 | * @PHY_INTERFACE_MODE_GMII: Gigabit median-independent interface | |
92 | * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface | |
93 | * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface | |
94 | * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface | |
95 | * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface | |
c858d436 | 96 | * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role |
4069a572 AL |
97 | * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface |
98 | * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay | |
99 | * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay | |
100 | * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay | |
101 | * @PHY_INTERFACE_MODE_RTBI: Reduced TBI | |
102 | * @PHY_INTERFACE_MODE_SMII: ??? MII | |
103 | * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface | |
104 | * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface | |
105 | * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax | |
106 | * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII | |
107 | * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII | |
b1ae3587 | 108 | * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX |
4069a572 AL |
109 | * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX |
110 | * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX | |
7331d1d4 | 111 | * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR |
4069a572 AL |
112 | * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI |
113 | * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface | |
114 | * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR | |
a56c2868 | 115 | * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR |
4069a572 AL |
116 | * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII |
117 | * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN | |
118 | * @PHY_INTERFACE_MODE_MAX: Book keeping | |
119 | * | |
120 | * Describes the interface between the MAC and PHY. | |
121 | */ | |
e8a2b6a4 | 122 | typedef enum { |
4157ef1b | 123 | PHY_INTERFACE_MODE_NA, |
735d8a18 | 124 | PHY_INTERFACE_MODE_INTERNAL, |
e8a2b6a4 AF |
125 | PHY_INTERFACE_MODE_MII, |
126 | PHY_INTERFACE_MODE_GMII, | |
127 | PHY_INTERFACE_MODE_SGMII, | |
128 | PHY_INTERFACE_MODE_TBI, | |
2cc70ba4 | 129 | PHY_INTERFACE_MODE_REVMII, |
e8a2b6a4 | 130 | PHY_INTERFACE_MODE_RMII, |
c858d436 | 131 | PHY_INTERFACE_MODE_REVRMII, |
e8a2b6a4 | 132 | PHY_INTERFACE_MODE_RGMII, |
a999589c | 133 | PHY_INTERFACE_MODE_RGMII_ID, |
7d400a4c KP |
134 | PHY_INTERFACE_MODE_RGMII_RXID, |
135 | PHY_INTERFACE_MODE_RGMII_TXID, | |
4157ef1b SG |
136 | PHY_INTERFACE_MODE_RTBI, |
137 | PHY_INTERFACE_MODE_SMII, | |
898dd0bd | 138 | PHY_INTERFACE_MODE_XGMII, |
58b05e58 | 139 | PHY_INTERFACE_MODE_XLGMII, |
fd70f72c | 140 | PHY_INTERFACE_MODE_MOCA, |
b9d12085 | 141 | PHY_INTERFACE_MODE_QSGMII, |
572de608 | 142 | PHY_INTERFACE_MODE_TRGMII, |
b1ae3587 | 143 | PHY_INTERFACE_MODE_100BASEX, |
55601a88 AL |
144 | PHY_INTERFACE_MODE_1000BASEX, |
145 | PHY_INTERFACE_MODE_2500BASEX, | |
7331d1d4 | 146 | PHY_INTERFACE_MODE_5GBASER, |
55601a88 | 147 | PHY_INTERFACE_MODE_RXAUI, |
c125ca09 | 148 | PHY_INTERFACE_MODE_XAUI, |
c114574e RK |
149 | /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ |
150 | PHY_INTERFACE_MODE_10GBASER, | |
a56c2868 | 151 | PHY_INTERFACE_MODE_25GBASER, |
4618d671 | 152 | PHY_INTERFACE_MODE_USXGMII, |
c114574e RK |
153 | /* 10GBASE-KR - with Clause 73 AN */ |
154 | PHY_INTERFACE_MODE_10GKR, | |
8a2fe56e | 155 | PHY_INTERFACE_MODE_MAX, |
e8a2b6a4 AF |
156 | } phy_interface_t; |
157 | ||
e86c6569 | 158 | /* |
4069a572 | 159 | * phy_supported_speeds - return all speeds currently supported by a PHY device |
1f9127ca ZB |
160 | */ |
161 | unsigned int phy_supported_speeds(struct phy_device *phy, | |
162 | unsigned int *speeds, | |
163 | unsigned int size); | |
164 | ||
8a2fe56e | 165 | /** |
d8de01b7 RD |
166 | * phy_modes - map phy_interface_t enum to device tree binding of phy-mode |
167 | * @interface: enum phy_interface_t value | |
168 | * | |
4069a572 | 169 | * Description: maps enum &phy_interface_t defined in this file |
8a2fe56e | 170 | * into the device tree binding of 'phy-mode', so that Ethernet |
4069a572 | 171 | * device driver can get PHY interface from device tree. |
8a2fe56e FF |
172 | */ |
173 | static inline const char *phy_modes(phy_interface_t interface) | |
174 | { | |
175 | switch (interface) { | |
176 | case PHY_INTERFACE_MODE_NA: | |
177 | return ""; | |
735d8a18 FF |
178 | case PHY_INTERFACE_MODE_INTERNAL: |
179 | return "internal"; | |
8a2fe56e FF |
180 | case PHY_INTERFACE_MODE_MII: |
181 | return "mii"; | |
182 | case PHY_INTERFACE_MODE_GMII: | |
183 | return "gmii"; | |
184 | case PHY_INTERFACE_MODE_SGMII: | |
185 | return "sgmii"; | |
186 | case PHY_INTERFACE_MODE_TBI: | |
187 | return "tbi"; | |
188 | case PHY_INTERFACE_MODE_REVMII: | |
189 | return "rev-mii"; | |
190 | case PHY_INTERFACE_MODE_RMII: | |
191 | return "rmii"; | |
c858d436 VO |
192 | case PHY_INTERFACE_MODE_REVRMII: |
193 | return "rev-rmii"; | |
8a2fe56e FF |
194 | case PHY_INTERFACE_MODE_RGMII: |
195 | return "rgmii"; | |
196 | case PHY_INTERFACE_MODE_RGMII_ID: | |
197 | return "rgmii-id"; | |
198 | case PHY_INTERFACE_MODE_RGMII_RXID: | |
199 | return "rgmii-rxid"; | |
200 | case PHY_INTERFACE_MODE_RGMII_TXID: | |
201 | return "rgmii-txid"; | |
202 | case PHY_INTERFACE_MODE_RTBI: | |
203 | return "rtbi"; | |
204 | case PHY_INTERFACE_MODE_SMII: | |
205 | return "smii"; | |
206 | case PHY_INTERFACE_MODE_XGMII: | |
207 | return "xgmii"; | |
58b05e58 JA |
208 | case PHY_INTERFACE_MODE_XLGMII: |
209 | return "xlgmii"; | |
fd70f72c FF |
210 | case PHY_INTERFACE_MODE_MOCA: |
211 | return "moca"; | |
b9d12085 TP |
212 | case PHY_INTERFACE_MODE_QSGMII: |
213 | return "qsgmii"; | |
572de608 SW |
214 | case PHY_INTERFACE_MODE_TRGMII: |
215 | return "trgmii"; | |
55601a88 AL |
216 | case PHY_INTERFACE_MODE_1000BASEX: |
217 | return "1000base-x"; | |
218 | case PHY_INTERFACE_MODE_2500BASEX: | |
219 | return "2500base-x"; | |
7331d1d4 PS |
220 | case PHY_INTERFACE_MODE_5GBASER: |
221 | return "5gbase-r"; | |
55601a88 AL |
222 | case PHY_INTERFACE_MODE_RXAUI: |
223 | return "rxaui"; | |
c125ca09 RK |
224 | case PHY_INTERFACE_MODE_XAUI: |
225 | return "xaui"; | |
c114574e RK |
226 | case PHY_INTERFACE_MODE_10GBASER: |
227 | return "10gbase-r"; | |
a56c2868 SH |
228 | case PHY_INTERFACE_MODE_25GBASER: |
229 | return "25gbase-r"; | |
4618d671 HK |
230 | case PHY_INTERFACE_MODE_USXGMII: |
231 | return "usxgmii"; | |
c114574e RK |
232 | case PHY_INTERFACE_MODE_10GKR: |
233 | return "10gbase-kr"; | |
b1ae3587 BJ |
234 | case PHY_INTERFACE_MODE_100BASEX: |
235 | return "100base-x"; | |
8a2fe56e FF |
236 | default: |
237 | return "unknown"; | |
238 | } | |
239 | } | |
240 | ||
00db8189 | 241 | |
e8a2b6a4 | 242 | #define PHY_INIT_TIMEOUT 100000 |
00db8189 | 243 | #define PHY_FORCE_TIMEOUT 10 |
00db8189 | 244 | |
e8a2b6a4 | 245 | #define PHY_MAX_ADDR 32 |
00db8189 | 246 | |
a4d00f17 | 247 | /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ |
9d9326d3 AF |
248 | #define PHY_ID_FMT "%s:%02x" |
249 | ||
4567d686 | 250 | #define MII_BUS_ID_SIZE 61 |
a4d00f17 | 251 | |
313162d0 | 252 | struct device; |
9525ae83 | 253 | struct phylink; |
298e54fa RK |
254 | struct sfp_bus; |
255 | struct sfp_upstream_ops; | |
313162d0 PG |
256 | struct sk_buff; |
257 | ||
4069a572 AL |
258 | /** |
259 | * struct mdio_bus_stats - Statistics counters for MDIO busses | |
260 | * @transfers: Total number of transfers, i.e. @writes + @reads | |
261 | * @errors: Number of MDIO transfers that returned an error | |
262 | * @writes: Number of write transfers | |
263 | * @reads: Number of read transfers | |
264 | * @syncp: Synchronisation for incrementing statistics | |
265 | */ | |
080bb352 FF |
266 | struct mdio_bus_stats { |
267 | u64_stats_t transfers; | |
268 | u64_stats_t errors; | |
269 | u64_stats_t writes; | |
270 | u64_stats_t reads; | |
271 | /* Must be last, add new statistics above */ | |
272 | struct u64_stats_sync syncp; | |
273 | }; | |
274 | ||
4069a572 AL |
275 | /** |
276 | * struct phy_package_shared - Shared information in PHY packages | |
277 | * @addr: Common PHY address used to combine PHYs in one package | |
278 | * @refcnt: Number of PHYs connected to this shared data | |
279 | * @flags: Initialization of PHY package | |
280 | * @priv_size: Size of the shared private data @priv | |
281 | * @priv: Driver private data shared across a PHY package | |
282 | * | |
283 | * Represents a shared structure between different phydev's in the same | |
63490847 MW |
284 | * package, for example a quad PHY. See phy_package_join() and |
285 | * phy_package_leave(). | |
286 | */ | |
287 | struct phy_package_shared { | |
288 | int addr; | |
289 | refcount_t refcnt; | |
290 | unsigned long flags; | |
291 | size_t priv_size; | |
292 | ||
293 | /* private data pointer */ | |
294 | /* note that this pointer is shared between different phydevs and | |
295 | * the user has to take care of appropriate locking. It is allocated | |
296 | * and freed automatically by phy_package_join() and | |
297 | * phy_package_leave(). | |
298 | */ | |
299 | void *priv; | |
300 | }; | |
301 | ||
302 | /* used as bit number in atomic bitops */ | |
0ef44e5c AT |
303 | #define PHY_SHARED_F_INIT_DONE 0 |
304 | #define PHY_SHARED_F_PROBE_DONE 1 | |
63490847 | 305 | |
4069a572 AL |
306 | /** |
307 | * struct mii_bus - Represents an MDIO bus | |
308 | * | |
309 | * @owner: Who owns this device | |
310 | * @name: User friendly name for this MDIO device, or driver name | |
311 | * @id: Unique identifier for this bus, typical from bus hierarchy | |
312 | * @priv: Driver private data | |
313 | * | |
c5e38a94 AF |
314 | * The Bus class for PHYs. Devices which provide access to |
315 | * PHYs should register using this structure | |
316 | */ | |
00db8189 | 317 | struct mii_bus { |
3e3aaf64 | 318 | struct module *owner; |
00db8189 | 319 | const char *name; |
9d9326d3 | 320 | char id[MII_BUS_ID_SIZE]; |
00db8189 | 321 | void *priv; |
4069a572 | 322 | /** @read: Perform a read transfer on the bus */ |
ccaa953e | 323 | int (*read)(struct mii_bus *bus, int addr, int regnum); |
4069a572 | 324 | /** @write: Perform a write transfer on the bus */ |
ccaa953e | 325 | int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); |
4069a572 | 326 | /** @reset: Perform a reset of the bus */ |
00db8189 | 327 | int (*reset)(struct mii_bus *bus); |
4069a572 AL |
328 | |
329 | /** @stats: Statistic counters per device on the bus */ | |
080bb352 | 330 | struct mdio_bus_stats stats[PHY_MAX_ADDR]; |
00db8189 | 331 | |
4069a572 AL |
332 | /** |
333 | * @mdio_lock: A lock to ensure that only one thing can read/write | |
c5e38a94 AF |
334 | * the MDIO bus at a time |
335 | */ | |
35b5f6b1 | 336 | struct mutex mdio_lock; |
00db8189 | 337 | |
4069a572 | 338 | /** @parent: Parent device of this bus */ |
18ee49dd | 339 | struct device *parent; |
4069a572 | 340 | /** @state: State of bus structure */ |
46abc021 LB |
341 | enum { |
342 | MDIOBUS_ALLOCATED = 1, | |
343 | MDIOBUS_REGISTERED, | |
344 | MDIOBUS_UNREGISTERED, | |
345 | MDIOBUS_RELEASED, | |
346 | } state; | |
4069a572 AL |
347 | |
348 | /** @dev: Kernel device representation */ | |
46abc021 | 349 | struct device dev; |
00db8189 | 350 | |
4069a572 | 351 | /** @mdio_map: list of all MDIO devices on bus */ |
7f854420 | 352 | struct mdio_device *mdio_map[PHY_MAX_ADDR]; |
00db8189 | 353 | |
4069a572 | 354 | /** @phy_mask: PHY addresses to be ignored when probing */ |
f896424c MP |
355 | u32 phy_mask; |
356 | ||
4069a572 | 357 | /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ |
922f2dd1 FF |
358 | u32 phy_ignore_ta_mask; |
359 | ||
4069a572 AL |
360 | /** |
361 | * @irq: An array of interrupts, each PHY's interrupt at the index | |
e7f4dc35 | 362 | * matching its address |
c5e38a94 | 363 | */ |
e7f4dc35 | 364 | int irq[PHY_MAX_ADDR]; |
69226896 | 365 | |
4069a572 | 366 | /** @reset_delay_us: GPIO reset pulse width in microseconds */ |
69226896 | 367 | int reset_delay_us; |
4069a572 | 368 | /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ |
bb383129 | 369 | int reset_post_delay_us; |
4069a572 | 370 | /** @reset_gpiod: Reset GPIO descriptor pointer */ |
d396e84c | 371 | struct gpio_desc *reset_gpiod; |
63490847 | 372 | |
4069a572 | 373 | /** @probe_capabilities: bus capabilities, used for probing */ |
0cc8fecf JL |
374 | enum { |
375 | MDIOBUS_NO_CAP = 0, | |
376 | MDIOBUS_C22, | |
377 | MDIOBUS_C45, | |
378 | MDIOBUS_C22_C45, | |
379 | } probe_capabilities; | |
380 | ||
4069a572 | 381 | /** @shared_lock: protect access to the shared element */ |
63490847 MW |
382 | struct mutex shared_lock; |
383 | ||
4069a572 | 384 | /** @shared: shared state across different PHYs */ |
63490847 | 385 | struct phy_package_shared *shared[PHY_MAX_ADDR]; |
00db8189 | 386 | }; |
46abc021 | 387 | #define to_mii_bus(d) container_of(d, struct mii_bus, dev) |
00db8189 | 388 | |
4069a572 AL |
389 | struct mii_bus *mdiobus_alloc_size(size_t size); |
390 | ||
391 | /** | |
392 | * mdiobus_alloc - Allocate an MDIO bus structure | |
393 | * | |
394 | * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready | |
395 | * for the driver to register the bus. | |
396 | */ | |
eb8a54a7 TT |
397 | static inline struct mii_bus *mdiobus_alloc(void) |
398 | { | |
399 | return mdiobus_alloc_size(0); | |
400 | } | |
401 | ||
3e3aaf64 | 402 | int __mdiobus_register(struct mii_bus *bus, struct module *owner); |
ac3a68d5 BG |
403 | int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, |
404 | struct module *owner); | |
3e3aaf64 | 405 | #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) |
ac3a68d5 BG |
406 | #define devm_mdiobus_register(dev, bus) \ |
407 | __devm_mdiobus_register(dev, bus, THIS_MODULE) | |
38f961e7 | 408 | |
2e888103 LB |
409 | void mdiobus_unregister(struct mii_bus *bus); |
410 | void mdiobus_free(struct mii_bus *bus); | |
6d48f44b GS |
411 | struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); |
412 | static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) | |
413 | { | |
414 | return devm_mdiobus_alloc_size(dev, 0); | |
415 | } | |
416 | ||
ce69e216 | 417 | struct mii_bus *mdio_find_bus(const char *mdio_name); |
2e888103 | 418 | struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); |
2e888103 | 419 | |
695bce8f HK |
420 | #define PHY_INTERRUPT_DISABLED false |
421 | #define PHY_INTERRUPT_ENABLED true | |
00db8189 | 422 | |
4069a572 AL |
423 | /** |
424 | * enum phy_state - PHY state machine states: | |
00db8189 | 425 | * |
4069a572 | 426 | * @PHY_DOWN: PHY device and driver are not ready for anything. probe |
00db8189 AF |
427 | * should be called if and only if the PHY is in this state, |
428 | * given that the PHY device exists. | |
4069a572 | 429 | * - PHY driver probe function will set the state to @PHY_READY |
00db8189 | 430 | * |
4069a572 | 431 | * @PHY_READY: PHY is ready to send and receive packets, but the |
00db8189 | 432 | * controller is not. By default, PHYs which do not implement |
899a3cbb | 433 | * probe will be set to this state by phy_probe(). |
00db8189 AF |
434 | * - start will set the state to UP |
435 | * | |
4069a572 | 436 | * @PHY_UP: The PHY and attached device are ready to do work. |
00db8189 | 437 | * Interrupts should be started here. |
4069a572 | 438 | * - timer moves to @PHY_NOLINK or @PHY_RUNNING |
00db8189 | 439 | * |
4069a572 AL |
440 | * @PHY_NOLINK: PHY is up, but not currently plugged in. |
441 | * - irq or timer will set @PHY_RUNNING if link comes back | |
442 | * - phy_stop moves to @PHY_HALTED | |
00db8189 | 443 | * |
4069a572 | 444 | * @PHY_RUNNING: PHY is currently up, running, and possibly sending |
00db8189 | 445 | * and/or receiving packets |
4069a572 AL |
446 | * - irq or timer will set @PHY_NOLINK if link goes down |
447 | * - phy_stop moves to @PHY_HALTED | |
00db8189 | 448 | * |
4069a572 | 449 | * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending |
a68a8138 AL |
450 | * is not expected to work, carrier will be indicated as down. PHY will be |
451 | * poll once per second, or on interrupt for it current state. | |
452 | * Once complete, move to UP to restart the PHY. | |
4069a572 | 453 | * - phy_stop aborts the running test and moves to @PHY_HALTED |
a68a8138 | 454 | * |
4069a572 | 455 | * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or |
00db8189 | 456 | * PHY is in an error state. |
4069a572 | 457 | * - phy_start moves to @PHY_UP |
00db8189 AF |
458 | */ |
459 | enum phy_state { | |
4017b4d3 | 460 | PHY_DOWN = 0, |
00db8189 | 461 | PHY_READY, |
2b3e88ea | 462 | PHY_HALTED, |
00db8189 | 463 | PHY_UP, |
00db8189 AF |
464 | PHY_RUNNING, |
465 | PHY_NOLINK, | |
a68a8138 | 466 | PHY_CABLETEST, |
00db8189 AF |
467 | }; |
468 | ||
c746053d RK |
469 | #define MDIO_MMD_NUM 32 |
470 | ||
ac28b9f8 DD |
471 | /** |
472 | * struct phy_c45_device_ids - 802.3-c45 Device Identifiers | |
320ed3bf RK |
473 | * @devices_in_package: IEEE 802.3 devices in package register value. |
474 | * @mmds_present: bit vector of MMDs present. | |
ac28b9f8 DD |
475 | * @device_ids: The device identifer for each present device. |
476 | */ | |
477 | struct phy_c45_device_ids { | |
478 | u32 devices_in_package; | |
320ed3bf | 479 | u32 mmds_present; |
389a3389 | 480 | u32 device_ids[MDIO_MMD_NUM]; |
ac28b9f8 | 481 | }; |
c1f19b51 | 482 | |
76564261 | 483 | struct macsec_context; |
2e181358 | 484 | struct macsec_ops; |
76564261 | 485 | |
4069a572 AL |
486 | /** |
487 | * struct phy_device - An instance of a PHY | |
00db8189 | 488 | * |
4069a572 AL |
489 | * @mdio: MDIO bus this PHY is on |
490 | * @drv: Pointer to the driver for this PHY instance | |
491 | * @phy_id: UID for this device found during discovery | |
492 | * @c45_ids: 802.3-c45 Device Identifiers if is_c45. | |
493 | * @is_c45: Set to true if this PHY uses clause 45 addressing. | |
494 | * @is_internal: Set to true if this PHY is internal to a MAC. | |
495 | * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. | |
496 | * @is_gigabit_capable: Set to true if PHY supports 1000Mbps | |
497 | * @has_fixups: Set to true if this PHY has fixups/quirks. | |
498 | * @suspended: Set to true if this PHY has been suspended successfully. | |
499 | * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. | |
500 | * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. | |
501 | * @loopback_enabled: Set true if this PHY has been loopbacked successfully. | |
502 | * @downshifted_rate: Set true if link speed has been downshifted. | |
b834489b | 503 | * @is_on_sfp_module: Set true if PHY is located on an SFP module. |
fba863b8 | 504 | * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY |
4069a572 AL |
505 | * @state: State of the PHY for management purposes |
506 | * @dev_flags: Device-specific flags used by the PHY driver. | |
62f3415d FF |
507 | * Bits [15:0] are free to use by the PHY driver to communicate |
508 | * driver specific behavior. | |
509 | * Bits [23:16] are currently reserved for future use. | |
510 | * Bits [31:24] are reserved for defining generic | |
511 | * PHY driver behavior. | |
4069a572 AL |
512 | * @irq: IRQ number of the PHY's interrupt (-1 if none) |
513 | * @phy_timer: The timer for handling the state machine | |
514 | * @phylink: Pointer to phylink instance for this PHY | |
515 | * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached | |
516 | * @sfp_bus: SFP bus attached to this PHY's fiber port | |
517 | * @attached_dev: The attached enet driver's device instance ptr | |
518 | * @adjust_link: Callback for the enet controller to respond to changes: in the | |
519 | * link state. | |
520 | * @phy_link_change: Callback for phylink for notification of link change | |
521 | * @macsec_ops: MACsec offloading ops. | |
00db8189 | 522 | * |
4069a572 AL |
523 | * @speed: Current link speed |
524 | * @duplex: Current duplex | |
4217a64e | 525 | * @port: Current port |
4069a572 AL |
526 | * @pause: Current pause |
527 | * @asym_pause: Current asymmetric pause | |
528 | * @supported: Combined MAC/PHY supported linkmodes | |
529 | * @advertising: Currently advertised linkmodes | |
530 | * @adv_old: Saved advertised while power saving for WoL | |
531 | * @lp_advertising: Current link partner advertised linkmodes | |
532 | * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited | |
533 | * @autoneg: Flag autoneg being used | |
534 | * @link: Current link state | |
535 | * @autoneg_complete: Flag auto negotiation of the link has completed | |
536 | * @mdix: Current crossover | |
537 | * @mdix_ctrl: User setting of crossover | |
538 | * @interrupts: Flag interrupts have been enabled | |
539 | * @interface: enum phy_interface_t value | |
540 | * @skb: Netlink message for cable diagnostics | |
541 | * @nest: Netlink nest used for cable diagnostics | |
542 | * @ehdr: nNtlink header for cable diagnostics | |
543 | * @phy_led_triggers: Array of LED triggers | |
544 | * @phy_num_led_triggers: Number of triggers in @phy_led_triggers | |
545 | * @led_link_trigger: LED trigger for link up/down | |
546 | * @last_triggered: last LED trigger for link speed | |
547 | * @master_slave_set: User requested master/slave configuration | |
548 | * @master_slave_get: Current master/slave advertisement | |
549 | * @master_slave_state: Current master/slave configuration | |
550 | * @mii_ts: Pointer to time stamper callbacks | |
551 | * @lock: Mutex for serialization access to PHY | |
552 | * @state_queue: Work queue for state machine | |
553 | * @shared: Pointer to private data shared by phys in one package | |
554 | * @priv: Pointer to driver private data | |
00db8189 AF |
555 | * |
556 | * interrupts currently only supports enabled or disabled, | |
557 | * but could be changed in the future to support enabling | |
558 | * and disabling specific interrupts | |
559 | * | |
560 | * Contains some infrastructure for polling and interrupt | |
561 | * handling, as well as handling shifts in PHY hardware state | |
562 | */ | |
563 | struct phy_device { | |
e5a03bfd AL |
564 | struct mdio_device mdio; |
565 | ||
00db8189 AF |
566 | /* Information about the PHY type */ |
567 | /* And management functions */ | |
568 | struct phy_driver *drv; | |
569 | ||
00db8189 AF |
570 | u32 phy_id; |
571 | ||
ac28b9f8 | 572 | struct phy_c45_device_ids c45_ids; |
87e5808d HK |
573 | unsigned is_c45:1; |
574 | unsigned is_internal:1; | |
575 | unsigned is_pseudo_fixed_link:1; | |
3b8b11f9 | 576 | unsigned is_gigabit_capable:1; |
87e5808d HK |
577 | unsigned has_fixups:1; |
578 | unsigned suspended:1; | |
611d779a | 579 | unsigned suspended_by_mdio_bus:1; |
87e5808d HK |
580 | unsigned sysfs_links:1; |
581 | unsigned loopback_enabled:1; | |
5eee3bb7 | 582 | unsigned downshifted_rate:1; |
b834489b | 583 | unsigned is_on_sfp_module:1; |
fba863b8 | 584 | unsigned mac_managed_pm:1; |
87e5808d HK |
585 | |
586 | unsigned autoneg:1; | |
587 | /* The most recently read link state */ | |
588 | unsigned link:1; | |
4950c2ba | 589 | unsigned autoneg_complete:1; |
ac28b9f8 | 590 | |
695bce8f HK |
591 | /* Interrupts are enabled */ |
592 | unsigned interrupts:1; | |
593 | ||
00db8189 AF |
594 | enum phy_state state; |
595 | ||
596 | u32 dev_flags; | |
597 | ||
e8a2b6a4 AF |
598 | phy_interface_t interface; |
599 | ||
c5e38a94 AF |
600 | /* |
601 | * forced speed & duplex (no autoneg) | |
00db8189 AF |
602 | * partner speed & duplex & pause (autoneg) |
603 | */ | |
604 | int speed; | |
605 | int duplex; | |
4217a64e | 606 | int port; |
00db8189 AF |
607 | int pause; |
608 | int asym_pause; | |
bdbdac76 OR |
609 | u8 master_slave_get; |
610 | u8 master_slave_set; | |
611 | u8 master_slave_state; | |
00db8189 | 612 | |
3c1bcc86 AL |
613 | /* Union of PHY and Attached devices' supported link modes */ |
614 | /* See ethtool.h for more info */ | |
615 | __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); | |
616 | __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); | |
c0ec3c27 | 617 | __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); |
65b27995 HK |
618 | /* used with phy_speed_down */ |
619 | __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); | |
00db8189 | 620 | |
d853d145 | 621 | /* Energy efficient ethernet modes which should be prohibited */ |
622 | u32 eee_broken_modes; | |
623 | ||
2e0bc452 ZB |
624 | #ifdef CONFIG_LED_TRIGGER_PHY |
625 | struct phy_led_trigger *phy_led_triggers; | |
626 | unsigned int phy_num_led_triggers; | |
627 | struct phy_led_trigger *last_triggered; | |
3928ee64 MS |
628 | |
629 | struct phy_led_trigger *led_link_trigger; | |
2e0bc452 ZB |
630 | #endif |
631 | ||
c5e38a94 AF |
632 | /* |
633 | * Interrupt number for this PHY | |
634 | * -1 means no interrupt | |
635 | */ | |
00db8189 AF |
636 | int irq; |
637 | ||
638 | /* private data pointer */ | |
639 | /* For use by PHYs to maintain extra state */ | |
640 | void *priv; | |
641 | ||
63490847 MW |
642 | /* shared data pointer */ |
643 | /* For use by PHYs inside the same package that need a shared state. */ | |
644 | struct phy_package_shared *shared; | |
645 | ||
1dd3f212 AL |
646 | /* Reporting cable test results */ |
647 | struct sk_buff *skb; | |
648 | void *ehdr; | |
649 | struct nlattr *nest; | |
650 | ||
00db8189 | 651 | /* Interrupt and Polling infrastructure */ |
a390d1f3 | 652 | struct delayed_work state_queue; |
00db8189 | 653 | |
35b5f6b1 | 654 | struct mutex lock; |
00db8189 | 655 | |
298e54fa RK |
656 | /* This may be modified under the rtnl lock */ |
657 | bool sfp_bus_attached; | |
658 | struct sfp_bus *sfp_bus; | |
9525ae83 | 659 | struct phylink *phylink; |
00db8189 | 660 | struct net_device *attached_dev; |
4715f65f | 661 | struct mii_timestamper *mii_ts; |
00db8189 | 662 | |
634ec36c | 663 | u8 mdix; |
f4ed2fe3 | 664 | u8 mdix_ctrl; |
634ec36c | 665 | |
a307593a | 666 | void (*phy_link_change)(struct phy_device *phydev, bool up); |
00db8189 | 667 | void (*adjust_link)(struct net_device *dev); |
2e181358 AT |
668 | |
669 | #if IS_ENABLED(CONFIG_MACSEC) | |
670 | /* MACsec management functions */ | |
671 | const struct macsec_ops *macsec_ops; | |
672 | #endif | |
00db8189 | 673 | }; |
7eab14de AL |
674 | |
675 | static inline struct phy_device *to_phy_device(const struct device *dev) | |
676 | { | |
677 | return container_of(to_mdio_device(dev), struct phy_device, mdio); | |
678 | } | |
00db8189 | 679 | |
4069a572 AL |
680 | /** |
681 | * struct phy_tdr_config - Configuration of a TDR raw test | |
682 | * | |
683 | * @first: Distance for first data collection point | |
684 | * @last: Distance for last data collection point | |
685 | * @step: Step between data collection points | |
686 | * @pair: Bitmap of cable pairs to collect data for | |
687 | * | |
688 | * A structure containing possible configuration parameters | |
f2bc8ad3 AL |
689 | * for a TDR cable test. The driver does not need to implement |
690 | * all the parameters, but should report what is actually used. | |
4069a572 | 691 | * All distances are in centimeters. |
f2bc8ad3 AL |
692 | */ |
693 | struct phy_tdr_config { | |
694 | u32 first; | |
695 | u32 last; | |
696 | u32 step; | |
697 | s8 pair; | |
698 | }; | |
699 | #define PHY_PAIR_ALL -1 | |
700 | ||
4069a572 AL |
701 | /** |
702 | * struct phy_driver - Driver structure for a particular PHY type | |
00db8189 | 703 | * |
4069a572 AL |
704 | * @mdiodrv: Data common to all MDIO devices |
705 | * @phy_id: The result of reading the UID registers of this PHY | |
00db8189 AF |
706 | * type, and ANDing them with the phy_id_mask. This driver |
707 | * only works for PHYs with IDs which match this field | |
4069a572 AL |
708 | * @name: The friendly name of this PHY type |
709 | * @phy_id_mask: Defines the important bits of the phy_id | |
710 | * @features: A mandatory list of features (speed, duplex, etc) | |
3e64cf7a | 711 | * supported by this PHY |
4069a572 | 712 | * @flags: A bitfield defining certain other features this PHY |
00db8189 | 713 | * supports (like interrupts) |
4069a572 | 714 | * @driver_data: Static driver data |
00db8189 | 715 | * |
00fde795 HK |
716 | * All functions are optional. If config_aneg or read_status |
717 | * are not implemented, the phy core uses the genphy versions. | |
718 | * Note that none of these functions should be called from | |
719 | * interrupt time. The goal is for the bus read/write functions | |
720 | * to be able to block when the bus transaction is happening, | |
721 | * and be freed up by an interrupt (The MPC85xx has this ability, | |
722 | * though it is not currently supported in the driver). | |
00db8189 AF |
723 | */ |
724 | struct phy_driver { | |
a9049e0c | 725 | struct mdio_driver_common mdiodrv; |
00db8189 AF |
726 | u32 phy_id; |
727 | char *name; | |
511e3036 | 728 | u32 phy_id_mask; |
719655a1 | 729 | const unsigned long * const features; |
00db8189 | 730 | u32 flags; |
860f6e9e | 731 | const void *driver_data; |
00db8189 | 732 | |
4069a572 AL |
733 | /** |
734 | * @soft_reset: Called to issue a PHY software reset | |
9df81dd7 FF |
735 | */ |
736 | int (*soft_reset)(struct phy_device *phydev); | |
737 | ||
4069a572 AL |
738 | /** |
739 | * @config_init: Called to initialize the PHY, | |
c5e38a94 AF |
740 | * including after a reset |
741 | */ | |
00db8189 AF |
742 | int (*config_init)(struct phy_device *phydev); |
743 | ||
4069a572 AL |
744 | /** |
745 | * @probe: Called during discovery. Used to set | |
c5e38a94 AF |
746 | * up device-specific structures, if any |
747 | */ | |
00db8189 AF |
748 | int (*probe)(struct phy_device *phydev); |
749 | ||
4069a572 AL |
750 | /** |
751 | * @get_features: Probe the hardware to determine what | |
752 | * abilities it has. Should only set phydev->supported. | |
efbdfdc2 AL |
753 | */ |
754 | int (*get_features)(struct phy_device *phydev); | |
755 | ||
00db8189 | 756 | /* PHY Power Management */ |
4069a572 | 757 | /** @suspend: Suspend the hardware, saving state if needed */ |
00db8189 | 758 | int (*suspend)(struct phy_device *phydev); |
4069a572 | 759 | /** @resume: Resume the hardware, restoring state if needed */ |
00db8189 AF |
760 | int (*resume)(struct phy_device *phydev); |
761 | ||
4069a572 AL |
762 | /** |
763 | * @config_aneg: Configures the advertisement and resets | |
00db8189 AF |
764 | * autonegotiation if phydev->autoneg is on, |
765 | * forces the speed to the current settings in phydev | |
c5e38a94 AF |
766 | * if phydev->autoneg is off |
767 | */ | |
00db8189 AF |
768 | int (*config_aneg)(struct phy_device *phydev); |
769 | ||
4069a572 | 770 | /** @aneg_done: Determines the auto negotiation result */ |
76a423a3 FF |
771 | int (*aneg_done)(struct phy_device *phydev); |
772 | ||
4069a572 | 773 | /** @read_status: Determines the negotiated speed and duplex */ |
00db8189 AF |
774 | int (*read_status)(struct phy_device *phydev); |
775 | ||
767143a1 JK |
776 | /** |
777 | * @config_intr: Enables or disables interrupts. | |
6527b938 IC |
778 | * It should also clear any pending interrupts prior to enabling the |
779 | * IRQs and after disabling them. | |
a8729eb3 | 780 | */ |
6527b938 | 781 | int (*config_intr)(struct phy_device *phydev); |
a8729eb3 | 782 | |
4069a572 | 783 | /** @handle_interrupt: Override default interrupt handling */ |
9010f9de | 784 | irqreturn_t (*handle_interrupt)(struct phy_device *phydev); |
49644e68 | 785 | |
4069a572 | 786 | /** @remove: Clears up any memory if needed */ |
00db8189 AF |
787 | void (*remove)(struct phy_device *phydev); |
788 | ||
4069a572 AL |
789 | /** |
790 | * @match_phy_device: Returns true if this is a suitable | |
791 | * driver for the given phydev. If NULL, matching is based on | |
792 | * phy_id and phy_id_mask. | |
a30e2c18 DD |
793 | */ |
794 | int (*match_phy_device)(struct phy_device *phydev); | |
795 | ||
4069a572 AL |
796 | /** |
797 | * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY | |
798 | * register changes to enable Wake on LAN, so set_wol is | |
799 | * provided to be called in the ethernet driver's set_wol | |
800 | * function. | |
801 | */ | |
42e836eb MS |
802 | int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); |
803 | ||
4069a572 AL |
804 | /** |
805 | * @get_wol: See set_wol, but for checking whether Wake on LAN | |
806 | * is enabled. | |
807 | */ | |
42e836eb MS |
808 | void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); |
809 | ||
4069a572 AL |
810 | /** |
811 | * @link_change_notify: Called to inform a PHY device driver | |
812 | * when the core is about to change the link state. This | |
813 | * callback is supposed to be used as fixup hook for drivers | |
814 | * that need to take action when the link state | |
815 | * changes. Drivers are by no means allowed to mess with the | |
2b8f2a28 DM |
816 | * PHY device structure in their implementations. |
817 | */ | |
818 | void (*link_change_notify)(struct phy_device *dev); | |
819 | ||
4069a572 AL |
820 | /** |
821 | * @read_mmd: PHY specific driver override for reading a MMD | |
822 | * register. This function is optional for PHY specific | |
823 | * drivers. When not provided, the default MMD read function | |
824 | * will be used by phy_read_mmd(), which will use either a | |
825 | * direct read for Clause 45 PHYs or an indirect read for | |
826 | * Clause 22 PHYs. devnum is the MMD device number within the | |
827 | * PHY device, regnum is the register within the selected MMD | |
828 | * device. | |
1ee6b9bc RK |
829 | */ |
830 | int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); | |
831 | ||
4069a572 AL |
832 | /** |
833 | * @write_mmd: PHY specific driver override for writing a MMD | |
834 | * register. This function is optional for PHY specific | |
835 | * drivers. When not provided, the default MMD write function | |
836 | * will be used by phy_write_mmd(), which will use either a | |
837 | * direct write for Clause 45 PHYs, or an indirect write for | |
838 | * Clause 22 PHYs. devnum is the MMD device number within the | |
839 | * PHY device, regnum is the register within the selected MMD | |
840 | * device. val is the value to be written. | |
1ee6b9bc RK |
841 | */ |
842 | int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, | |
843 | u16 val); | |
844 | ||
4069a572 | 845 | /** @read_page: Return the current PHY register page number */ |
78ffc4ac | 846 | int (*read_page)(struct phy_device *dev); |
4069a572 | 847 | /** @write_page: Set the current PHY register page number */ |
78ffc4ac RK |
848 | int (*write_page)(struct phy_device *dev, int page); |
849 | ||
4069a572 AL |
850 | /** |
851 | * @module_info: Get the size and type of the eeprom contained | |
852 | * within a plug-in module | |
853 | */ | |
2f438366 ES |
854 | int (*module_info)(struct phy_device *dev, |
855 | struct ethtool_modinfo *modinfo); | |
856 | ||
4069a572 AL |
857 | /** |
858 | * @module_eeprom: Get the eeprom information from the plug-in | |
859 | * module | |
860 | */ | |
2f438366 ES |
861 | int (*module_eeprom)(struct phy_device *dev, |
862 | struct ethtool_eeprom *ee, u8 *data); | |
863 | ||
4069a572 | 864 | /** @cable_test_start: Start a cable test */ |
a68a8138 | 865 | int (*cable_test_start)(struct phy_device *dev); |
1a644de2 | 866 | |
4069a572 | 867 | /** @cable_test_tdr_start: Start a raw TDR cable test */ |
f2bc8ad3 AL |
868 | int (*cable_test_tdr_start)(struct phy_device *dev, |
869 | const struct phy_tdr_config *config); | |
1a644de2 | 870 | |
4069a572 AL |
871 | /** |
872 | * @cable_test_get_status: Once per second, or on interrupt, | |
873 | * request the status of the test. | |
a68a8138 AL |
874 | */ |
875 | int (*cable_test_get_status)(struct phy_device *dev, bool *finished); | |
876 | ||
4069a572 AL |
877 | /* Get statistics from the PHY using ethtool */ |
878 | /** @get_sset_count: Number of statistic counters */ | |
f3a40945 | 879 | int (*get_sset_count)(struct phy_device *dev); |
4069a572 | 880 | /** @get_strings: Names of the statistic counters */ |
f3a40945 | 881 | void (*get_strings)(struct phy_device *dev, u8 *data); |
4069a572 | 882 | /** @get_stats: Return the statistic counter values */ |
f3a40945 AL |
883 | void (*get_stats)(struct phy_device *dev, |
884 | struct ethtool_stats *stats, u64 *data); | |
968ad9da RL |
885 | |
886 | /* Get and Set PHY tunables */ | |
4069a572 | 887 | /** @get_tunable: Return the value of a tunable */ |
968ad9da RL |
888 | int (*get_tunable)(struct phy_device *dev, |
889 | struct ethtool_tunable *tuna, void *data); | |
4069a572 | 890 | /** @set_tunable: Set the value of a tunable */ |
968ad9da RL |
891 | int (*set_tunable)(struct phy_device *dev, |
892 | struct ethtool_tunable *tuna, | |
893 | const void *data); | |
4069a572 | 894 | /** @set_loopback: Set the loopback mood of the PHY */ |
f0f9b4ed | 895 | int (*set_loopback)(struct phy_device *dev, bool enable); |
4069a572 | 896 | /** @get_sqi: Get the signal quality indication */ |
80660219 | 897 | int (*get_sqi)(struct phy_device *dev); |
4069a572 | 898 | /** @get_sqi_max: Get the maximum signal quality indication */ |
80660219 | 899 | int (*get_sqi_max)(struct phy_device *dev); |
00db8189 | 900 | }; |
a9049e0c AL |
901 | #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ |
902 | struct phy_driver, mdiodrv) | |
00db8189 | 903 | |
f62220d3 AF |
904 | #define PHY_ANY_ID "MATCH ANY PHY" |
905 | #define PHY_ANY_UID 0xffffffff | |
906 | ||
aa2af2eb HK |
907 | #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) |
908 | #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) | |
909 | #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) | |
910 | ||
f62220d3 AF |
911 | /* A Structure for boards to register fixups with the PHY Lib */ |
912 | struct phy_fixup { | |
913 | struct list_head list; | |
4567d686 | 914 | char bus_id[MII_BUS_ID_SIZE + 3]; |
f62220d3 AF |
915 | u32 phy_uid; |
916 | u32 phy_uid_mask; | |
917 | int (*run)(struct phy_device *phydev); | |
918 | }; | |
919 | ||
da4625ac RK |
920 | const char *phy_speed_to_str(int speed); |
921 | const char *phy_duplex_to_str(unsigned int duplex); | |
922 | ||
0ccb4fc6 RK |
923 | /* A structure for mapping a particular speed and duplex |
924 | * combination to a particular SUPPORTED and ADVERTISED value | |
925 | */ | |
926 | struct phy_setting { | |
927 | u32 speed; | |
928 | u8 duplex; | |
929 | u8 bit; | |
930 | }; | |
931 | ||
932 | const struct phy_setting * | |
933 | phy_lookup_setting(int speed, int duplex, const unsigned long *mask, | |
3c1bcc86 | 934 | bool exact); |
0ccb4fc6 | 935 | size_t phy_speeds(unsigned int *speeds, size_t size, |
3c1bcc86 | 936 | unsigned long *mask); |
a4eaed9f | 937 | void of_set_phy_supported(struct phy_device *phydev); |
3feb9b23 | 938 | void of_set_phy_eee_broken(struct phy_device *phydev); |
331c56ac | 939 | int phy_speed_down_core(struct phy_device *phydev); |
0ccb4fc6 | 940 | |
2b3e88ea HK |
941 | /** |
942 | * phy_is_started - Convenience function to check whether PHY is started | |
943 | * @phydev: The phy_device struct | |
944 | */ | |
945 | static inline bool phy_is_started(struct phy_device *phydev) | |
946 | { | |
a2fc9d7e | 947 | return phydev->state >= PHY_UP; |
2b3e88ea HK |
948 | } |
949 | ||
2d880b87 | 950 | void phy_resolve_aneg_pause(struct phy_device *phydev); |
8c5e850c | 951 | void phy_resolve_aneg_linkmode(struct phy_device *phydev); |
5eee3bb7 | 952 | void phy_check_downshift(struct phy_device *phydev); |
8c5e850c | 953 | |
2e888103 LB |
954 | /** |
955 | * phy_read - Convenience function for reading a given PHY register | |
956 | * @phydev: the phy_device struct | |
957 | * @regnum: register number to read | |
958 | * | |
959 | * NOTE: MUST NOT be called from interrupt context, | |
960 | * because the bus read/write functions may wait for an interrupt | |
961 | * to conclude the operation. | |
962 | */ | |
abf35df2 | 963 | static inline int phy_read(struct phy_device *phydev, u32 regnum) |
2e888103 | 964 | { |
e5a03bfd | 965 | return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); |
2e888103 LB |
966 | } |
967 | ||
fcbd30d0 DZ |
968 | #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ |
969 | timeout_us, sleep_before_read) \ | |
970 | ({ \ | |
971 | int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \ | |
972 | sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ | |
973 | if (val < 0) \ | |
974 | __ret = val; \ | |
975 | if (__ret) \ | |
976 | phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ | |
977 | __ret; \ | |
978 | }) | |
979 | ||
980 | ||
788f9933 RK |
981 | /** |
982 | * __phy_read - convenience function for reading a given PHY register | |
983 | * @phydev: the phy_device struct | |
984 | * @regnum: register number to read | |
985 | * | |
986 | * The caller must have taken the MDIO bus lock. | |
987 | */ | |
988 | static inline int __phy_read(struct phy_device *phydev, u32 regnum) | |
989 | { | |
990 | return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); | |
991 | } | |
992 | ||
2e888103 LB |
993 | /** |
994 | * phy_write - Convenience function for writing a given PHY register | |
995 | * @phydev: the phy_device struct | |
996 | * @regnum: register number to write | |
997 | * @val: value to write to @regnum | |
998 | * | |
999 | * NOTE: MUST NOT be called from interrupt context, | |
1000 | * because the bus read/write functions may wait for an interrupt | |
1001 | * to conclude the operation. | |
1002 | */ | |
abf35df2 | 1003 | static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) |
2e888103 | 1004 | { |
e5a03bfd | 1005 | return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); |
2e888103 LB |
1006 | } |
1007 | ||
788f9933 RK |
1008 | /** |
1009 | * __phy_write - Convenience function for writing a given PHY register | |
1010 | * @phydev: the phy_device struct | |
1011 | * @regnum: register number to write | |
1012 | * @val: value to write to @regnum | |
1013 | * | |
1014 | * The caller must have taken the MDIO bus lock. | |
1015 | */ | |
1016 | static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) | |
1017 | { | |
1018 | return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, | |
1019 | val); | |
1020 | } | |
1021 | ||
6cc7cf81 RK |
1022 | /** |
1023 | * __phy_modify_changed() - Convenience function for modifying a PHY register | |
1024 | * @phydev: a pointer to a &struct phy_device | |
1025 | * @regnum: register number | |
1026 | * @mask: bit mask of bits to clear | |
1027 | * @set: bit mask of bits to set | |
1028 | * | |
1029 | * Unlocked helper function which allows a PHY register to be modified as | |
1030 | * new register value = (old register value & ~mask) | set | |
1031 | * | |
1032 | * Returns negative errno, 0 if there was no change, and 1 in case of change | |
1033 | */ | |
1034 | static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, | |
1035 | u16 mask, u16 set) | |
1036 | { | |
1037 | return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, | |
1038 | regnum, mask, set); | |
1039 | } | |
1040 | ||
e86c6569 | 1041 | /* |
1878f0dc NY |
1042 | * phy_read_mmd - Convenience function for reading a register |
1043 | * from an MMD on a given PHY. | |
1878f0dc NY |
1044 | */ |
1045 | int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); | |
1046 | ||
4069a572 AL |
1047 | /** |
1048 | * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a | |
1049 | * condition is met or a timeout occurs | |
1050 | * | |
1051 | * @phydev: The phy_device struct | |
1052 | * @devaddr: The MMD to read from | |
1053 | * @regnum: The register on the MMD to read | |
1054 | * @val: Variable to read the register into | |
1055 | * @cond: Break condition (usually involving @val) | |
1056 | * @sleep_us: Maximum time to sleep between reads in us (0 | |
1057 | * tight-loops). Should be less than ~20ms since usleep_range | |
1058 | * is used (see Documentation/timers/timers-howto.rst). | |
1059 | * @timeout_us: Timeout in us, 0 means never timeout | |
1060 | * @sleep_before_read: if it is true, sleep @sleep_us before read. | |
1061 | * Returns 0 on success and -ETIMEDOUT upon a timeout. In either | |
1062 | * case, the last read value at @args is stored in @val. Must not | |
1063 | * be called from atomic context if sleep_us or timeout_us are used. | |
1064 | */ | |
bd971ff0 DZ |
1065 | #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ |
1066 | sleep_us, timeout_us, sleep_before_read) \ | |
1067 | ({ \ | |
1068 | int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \ | |
1069 | sleep_us, timeout_us, sleep_before_read, \ | |
1070 | phydev, devaddr, regnum); \ | |
1071 | if (val < 0) \ | |
1072 | __ret = val; \ | |
1073 | if (__ret) \ | |
1074 | phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ | |
1075 | __ret; \ | |
1076 | }) | |
1077 | ||
e86c6569 | 1078 | /* |
1878f0dc NY |
1079 | * __phy_read_mmd - Convenience function for reading a register |
1080 | * from an MMD on a given PHY. | |
1878f0dc NY |
1081 | */ |
1082 | int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); | |
1083 | ||
e86c6569 | 1084 | /* |
1878f0dc NY |
1085 | * phy_write_mmd - Convenience function for writing a register |
1086 | * on an MMD on a given PHY. | |
1878f0dc NY |
1087 | */ |
1088 | int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); | |
1089 | ||
e86c6569 | 1090 | /* |
1878f0dc NY |
1091 | * __phy_write_mmd - Convenience function for writing a register |
1092 | * on an MMD on a given PHY. | |
1878f0dc NY |
1093 | */ |
1094 | int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); | |
1095 | ||
b8554d4f HK |
1096 | int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, |
1097 | u16 set); | |
1098 | int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, | |
1099 | u16 set); | |
788f9933 | 1100 | int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); |
2b74e5be | 1101 | int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); |
788f9933 | 1102 | |
b8554d4f HK |
1103 | int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, |
1104 | u16 mask, u16 set); | |
1105 | int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, | |
1106 | u16 mask, u16 set); | |
1878f0dc | 1107 | int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, |
b8554d4f | 1108 | u16 mask, u16 set); |
1878f0dc | 1109 | int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, |
b8554d4f | 1110 | u16 mask, u16 set); |
1878f0dc | 1111 | |
ac8322d8 HK |
1112 | /** |
1113 | * __phy_set_bits - Convenience function for setting bits in a PHY register | |
1114 | * @phydev: the phy_device struct | |
1115 | * @regnum: register number to write | |
1116 | * @val: bits to set | |
1117 | * | |
1118 | * The caller must have taken the MDIO bus lock. | |
1119 | */ | |
1120 | static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) | |
1121 | { | |
1122 | return __phy_modify(phydev, regnum, 0, val); | |
1123 | } | |
1124 | ||
1125 | /** | |
1126 | * __phy_clear_bits - Convenience function for clearing bits in a PHY register | |
1127 | * @phydev: the phy_device struct | |
1128 | * @regnum: register number to write | |
1129 | * @val: bits to clear | |
1130 | * | |
1131 | * The caller must have taken the MDIO bus lock. | |
1132 | */ | |
1133 | static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, | |
1134 | u16 val) | |
1135 | { | |
1136 | return __phy_modify(phydev, regnum, val, 0); | |
1137 | } | |
1138 | ||
1139 | /** | |
1140 | * phy_set_bits - Convenience function for setting bits in a PHY register | |
1141 | * @phydev: the phy_device struct | |
1142 | * @regnum: register number to write | |
1143 | * @val: bits to set | |
1144 | */ | |
1145 | static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) | |
1146 | { | |
1147 | return phy_modify(phydev, regnum, 0, val); | |
1148 | } | |
1149 | ||
1150 | /** | |
1151 | * phy_clear_bits - Convenience function for clearing bits in a PHY register | |
1152 | * @phydev: the phy_device struct | |
1153 | * @regnum: register number to write | |
1154 | * @val: bits to clear | |
1155 | */ | |
1156 | static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) | |
1157 | { | |
1158 | return phy_modify(phydev, regnum, val, 0); | |
1159 | } | |
1160 | ||
1878f0dc NY |
1161 | /** |
1162 | * __phy_set_bits_mmd - Convenience function for setting bits in a register | |
1163 | * on MMD | |
1164 | * @phydev: the phy_device struct | |
1165 | * @devad: the MMD containing register to modify | |
1166 | * @regnum: register number to modify | |
1167 | * @val: bits to set | |
1168 | * | |
1169 | * The caller must have taken the MDIO bus lock. | |
1170 | */ | |
1171 | static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, | |
1172 | u32 regnum, u16 val) | |
1173 | { | |
1174 | return __phy_modify_mmd(phydev, devad, regnum, 0, val); | |
1175 | } | |
1176 | ||
1177 | /** | |
1178 | * __phy_clear_bits_mmd - Convenience function for clearing bits in a register | |
1179 | * on MMD | |
1180 | * @phydev: the phy_device struct | |
1181 | * @devad: the MMD containing register to modify | |
1182 | * @regnum: register number to modify | |
1183 | * @val: bits to clear | |
1184 | * | |
1185 | * The caller must have taken the MDIO bus lock. | |
1186 | */ | |
1187 | static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, | |
1188 | u32 regnum, u16 val) | |
1189 | { | |
1190 | return __phy_modify_mmd(phydev, devad, regnum, val, 0); | |
1191 | } | |
1192 | ||
1193 | /** | |
1194 | * phy_set_bits_mmd - Convenience function for setting bits in a register | |
1195 | * on MMD | |
1196 | * @phydev: the phy_device struct | |
1197 | * @devad: the MMD containing register to modify | |
1198 | * @regnum: register number to modify | |
1199 | * @val: bits to set | |
1200 | */ | |
1201 | static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, | |
1202 | u32 regnum, u16 val) | |
1203 | { | |
1204 | return phy_modify_mmd(phydev, devad, regnum, 0, val); | |
1205 | } | |
1206 | ||
1207 | /** | |
1208 | * phy_clear_bits_mmd - Convenience function for clearing bits in a register | |
1209 | * on MMD | |
1210 | * @phydev: the phy_device struct | |
1211 | * @devad: the MMD containing register to modify | |
1212 | * @regnum: register number to modify | |
1213 | * @val: bits to clear | |
1214 | */ | |
1215 | static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, | |
1216 | u32 regnum, u16 val) | |
1217 | { | |
1218 | return phy_modify_mmd(phydev, devad, regnum, val, 0); | |
1219 | } | |
1220 | ||
2c7b4921 FF |
1221 | /** |
1222 | * phy_interrupt_is_valid - Convenience function for testing a given PHY irq | |
1223 | * @phydev: the phy_device struct | |
1224 | * | |
1225 | * NOTE: must be kept in sync with addition/removal of PHY_POLL and | |
93e8990c | 1226 | * PHY_MAC_INTERRUPT |
2c7b4921 FF |
1227 | */ |
1228 | static inline bool phy_interrupt_is_valid(struct phy_device *phydev) | |
1229 | { | |
93e8990c | 1230 | return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; |
2c7b4921 FF |
1231 | } |
1232 | ||
3c507b8a HK |
1233 | /** |
1234 | * phy_polling_mode - Convenience function for testing whether polling is | |
1235 | * used to detect PHY status changes | |
1236 | * @phydev: the phy_device struct | |
1237 | */ | |
1238 | static inline bool phy_polling_mode(struct phy_device *phydev) | |
1239 | { | |
97c22438 AL |
1240 | if (phydev->state == PHY_CABLETEST) |
1241 | if (phydev->drv->flags & PHY_POLL_CABLE_TEST) | |
1242 | return true; | |
1243 | ||
3c507b8a HK |
1244 | return phydev->irq == PHY_POLL; |
1245 | } | |
1246 | ||
0e5dafc8 RC |
1247 | /** |
1248 | * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. | |
1249 | * @phydev: the phy_device struct | |
1250 | */ | |
1251 | static inline bool phy_has_hwtstamp(struct phy_device *phydev) | |
1252 | { | |
4715f65f | 1253 | return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; |
0e5dafc8 RC |
1254 | } |
1255 | ||
1256 | /** | |
1257 | * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. | |
1258 | * @phydev: the phy_device struct | |
1259 | */ | |
1260 | static inline bool phy_has_rxtstamp(struct phy_device *phydev) | |
1261 | { | |
4715f65f | 1262 | return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; |
0e5dafc8 RC |
1263 | } |
1264 | ||
1265 | /** | |
1266 | * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or | |
1267 | * PTP hardware clock capabilities. | |
1268 | * @phydev: the phy_device struct | |
1269 | */ | |
1270 | static inline bool phy_has_tsinfo(struct phy_device *phydev) | |
1271 | { | |
4715f65f | 1272 | return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; |
0e5dafc8 RC |
1273 | } |
1274 | ||
1275 | /** | |
1276 | * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. | |
1277 | * @phydev: the phy_device struct | |
1278 | */ | |
1279 | static inline bool phy_has_txtstamp(struct phy_device *phydev) | |
1280 | { | |
4715f65f | 1281 | return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; |
0e5dafc8 RC |
1282 | } |
1283 | ||
1284 | static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr) | |
1285 | { | |
4715f65f | 1286 | return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr); |
0e5dafc8 RC |
1287 | } |
1288 | ||
1289 | static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, | |
1290 | int type) | |
1291 | { | |
4715f65f | 1292 | return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); |
0e5dafc8 RC |
1293 | } |
1294 | ||
1295 | static inline int phy_ts_info(struct phy_device *phydev, | |
1296 | struct ethtool_ts_info *tsinfo) | |
1297 | { | |
4715f65f | 1298 | return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); |
0e5dafc8 RC |
1299 | } |
1300 | ||
1301 | static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, | |
1302 | int type) | |
1303 | { | |
4715f65f | 1304 | phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); |
0e5dafc8 RC |
1305 | } |
1306 | ||
4284b6a5 FF |
1307 | /** |
1308 | * phy_is_internal - Convenience function for testing if a PHY is internal | |
1309 | * @phydev: the phy_device struct | |
1310 | */ | |
1311 | static inline bool phy_is_internal(struct phy_device *phydev) | |
1312 | { | |
1313 | return phydev->is_internal; | |
1314 | } | |
1315 | ||
b834489b RH |
1316 | /** |
1317 | * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module | |
1318 | * @phydev: the phy_device struct | |
1319 | */ | |
1320 | static inline bool phy_on_sfp(struct phy_device *phydev) | |
1321 | { | |
1322 | return phydev->is_on_sfp_module; | |
1323 | } | |
1324 | ||
32d0f783 IS |
1325 | /** |
1326 | * phy_interface_mode_is_rgmii - Convenience function for testing if a | |
1327 | * PHY interface mode is RGMII (all variants) | |
4069a572 | 1328 | * @mode: the &phy_interface_t enum |
32d0f783 IS |
1329 | */ |
1330 | static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) | |
1331 | { | |
1332 | return mode >= PHY_INTERFACE_MODE_RGMII && | |
1333 | mode <= PHY_INTERFACE_MODE_RGMII_TXID; | |
1334 | }; | |
1335 | ||
365c1e64 | 1336 | /** |
4069a572 | 1337 | * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z |
365c1e64 RK |
1338 | * negotiation |
1339 | * @mode: one of &enum phy_interface_t | |
1340 | * | |
4069a572 | 1341 | * Returns true if the PHY interface mode uses the 16-bit negotiation |
365c1e64 RK |
1342 | * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) |
1343 | */ | |
1344 | static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) | |
1345 | { | |
1346 | return mode == PHY_INTERFACE_MODE_1000BASEX || | |
1347 | mode == PHY_INTERFACE_MODE_2500BASEX; | |
1348 | } | |
1349 | ||
e463d88c FF |
1350 | /** |
1351 | * phy_interface_is_rgmii - Convenience function for testing if a PHY interface | |
1352 | * is RGMII (all variants) | |
1353 | * @phydev: the phy_device struct | |
1354 | */ | |
1355 | static inline bool phy_interface_is_rgmii(struct phy_device *phydev) | |
1356 | { | |
32d0f783 | 1357 | return phy_interface_mode_is_rgmii(phydev->interface); |
5a11dd7d FF |
1358 | }; |
1359 | ||
4069a572 | 1360 | /** |
5a11dd7d FF |
1361 | * phy_is_pseudo_fixed_link - Convenience function for testing if this |
1362 | * PHY is the CPU port facing side of an Ethernet switch, or similar. | |
1363 | * @phydev: the phy_device struct | |
1364 | */ | |
1365 | static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) | |
1366 | { | |
1367 | return phydev->is_pseudo_fixed_link; | |
e463d88c FF |
1368 | } |
1369 | ||
78ffc4ac RK |
1370 | int phy_save_page(struct phy_device *phydev); |
1371 | int phy_select_page(struct phy_device *phydev, int page); | |
1372 | int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); | |
1373 | int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); | |
1374 | int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); | |
bf22b343 HK |
1375 | int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, |
1376 | u16 mask, u16 set); | |
78ffc4ac RK |
1377 | int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, |
1378 | u16 mask, u16 set); | |
1379 | ||
7d49a32a | 1380 | struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, |
4017b4d3 SS |
1381 | bool is_c45, |
1382 | struct phy_c45_device_ids *c45_ids); | |
90eff909 | 1383 | #if IS_ENABLED(CONFIG_PHYLIB) |
114dea60 | 1384 | int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); |
0fb16976 | 1385 | struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); |
425775ed CJ |
1386 | struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); |
1387 | struct phy_device *device_phy_find_device(struct device *dev); | |
1388 | struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode); | |
ac28b9f8 | 1389 | struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); |
4dea547f | 1390 | int phy_device_register(struct phy_device *phy); |
90eff909 FF |
1391 | void phy_device_free(struct phy_device *phydev); |
1392 | #else | |
114dea60 CJ |
1393 | static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) |
1394 | { | |
1395 | return 0; | |
1396 | } | |
0fb16976 CJ |
1397 | static inline |
1398 | struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) | |
1399 | { | |
1400 | return 0; | |
1401 | } | |
1402 | ||
425775ed CJ |
1403 | static inline |
1404 | struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) | |
1405 | { | |
1406 | return NULL; | |
1407 | } | |
1408 | ||
1409 | static inline struct phy_device *device_phy_find_device(struct device *dev) | |
1410 | { | |
1411 | return NULL; | |
1412 | } | |
1413 | ||
1414 | static inline | |
1415 | struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) | |
1416 | { | |
1417 | return NULL; | |
1418 | } | |
1419 | ||
90eff909 FF |
1420 | static inline |
1421 | struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) | |
1422 | { | |
1423 | return NULL; | |
1424 | } | |
1425 | ||
1426 | static inline int phy_device_register(struct phy_device *phy) | |
1427 | { | |
1428 | return 0; | |
1429 | } | |
1430 | ||
1431 | static inline void phy_device_free(struct phy_device *phydev) { } | |
1432 | #endif /* CONFIG_PHYLIB */ | |
38737e49 | 1433 | void phy_device_remove(struct phy_device *phydev); |
8b72b301 | 1434 | int phy_get_c45_ids(struct phy_device *phydev); |
2f5cb434 | 1435 | int phy_init_hw(struct phy_device *phydev); |
481b5d93 SH |
1436 | int phy_suspend(struct phy_device *phydev); |
1437 | int phy_resume(struct phy_device *phydev); | |
9c2c2e62 | 1438 | int __phy_resume(struct phy_device *phydev); |
f0f9b4ed | 1439 | int phy_loopback(struct phy_device *phydev, bool enable); |
298e54fa RK |
1440 | void phy_sfp_attach(void *upstream, struct sfp_bus *bus); |
1441 | void phy_sfp_detach(void *upstream, struct sfp_bus *bus); | |
1442 | int phy_sfp_probe(struct phy_device *phydev, | |
1443 | const struct sfp_upstream_ops *ops); | |
4017b4d3 SS |
1444 | struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, |
1445 | phy_interface_t interface); | |
f8f76db1 | 1446 | struct phy_device *phy_find_first(struct mii_bus *bus); |
257184d7 AF |
1447 | int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, |
1448 | u32 flags, phy_interface_t interface); | |
fa94f6d9 | 1449 | int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, |
4017b4d3 SS |
1450 | void (*handler)(struct net_device *), |
1451 | phy_interface_t interface); | |
1452 | struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, | |
1453 | void (*handler)(struct net_device *), | |
1454 | phy_interface_t interface); | |
e1393456 AF |
1455 | void phy_disconnect(struct phy_device *phydev); |
1456 | void phy_detach(struct phy_device *phydev); | |
1457 | void phy_start(struct phy_device *phydev); | |
1458 | void phy_stop(struct phy_device *phydev); | |
014068dc | 1459 | int phy_config_aneg(struct phy_device *phydev); |
e1393456 | 1460 | int phy_start_aneg(struct phy_device *phydev); |
372788f9 | 1461 | int phy_aneg_done(struct phy_device *phydev); |
2b9672dd HK |
1462 | int phy_speed_down(struct phy_device *phydev, bool sync); |
1463 | int phy_speed_up(struct phy_device *phydev); | |
e1393456 | 1464 | |
002ba705 | 1465 | int phy_restart_aneg(struct phy_device *phydev); |
a9668491 | 1466 | int phy_reset_after_clk_enable(struct phy_device *phydev); |
00db8189 | 1467 | |
a68a8138 AL |
1468 | #if IS_ENABLED(CONFIG_PHYLIB) |
1469 | int phy_start_cable_test(struct phy_device *phydev, | |
1470 | struct netlink_ext_ack *extack); | |
1a644de2 | 1471 | int phy_start_cable_test_tdr(struct phy_device *phydev, |
f2bc8ad3 AL |
1472 | struct netlink_ext_ack *extack, |
1473 | const struct phy_tdr_config *config); | |
a68a8138 AL |
1474 | #else |
1475 | static inline | |
1476 | int phy_start_cable_test(struct phy_device *phydev, | |
1477 | struct netlink_ext_ack *extack) | |
1478 | { | |
1479 | NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); | |
1480 | return -EOPNOTSUPP; | |
1481 | } | |
1a644de2 AL |
1482 | static inline |
1483 | int phy_start_cable_test_tdr(struct phy_device *phydev, | |
f2bc8ad3 AL |
1484 | struct netlink_ext_ack *extack, |
1485 | const struct phy_tdr_config *config) | |
1a644de2 AL |
1486 | { |
1487 | NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); | |
1488 | return -EOPNOTSUPP; | |
1489 | } | |
a68a8138 AL |
1490 | #endif |
1491 | ||
1e2dc145 AL |
1492 | int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result); |
1493 | int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair, | |
1494 | u16 cm); | |
1495 | ||
bafbdd52 SS |
1496 | static inline void phy_device_reset(struct phy_device *phydev, int value) |
1497 | { | |
1498 | mdio_device_reset(&phydev->mdio, value); | |
1499 | } | |
1500 | ||
72ba48be | 1501 | #define phydev_err(_phydev, format, args...) \ |
e5a03bfd | 1502 | dev_err(&_phydev->mdio.dev, format, ##args) |
72ba48be | 1503 | |
c4fabb8b AL |
1504 | #define phydev_info(_phydev, format, args...) \ |
1505 | dev_info(&_phydev->mdio.dev, format, ##args) | |
1506 | ||
ab2a605f AL |
1507 | #define phydev_warn(_phydev, format, args...) \ |
1508 | dev_warn(&_phydev->mdio.dev, format, ##args) | |
1509 | ||
72ba48be | 1510 | #define phydev_dbg(_phydev, format, args...) \ |
2eaa38d9 | 1511 | dev_dbg(&_phydev->mdio.dev, format, ##args) |
72ba48be | 1512 | |
84eff6d1 AL |
1513 | static inline const char *phydev_name(const struct phy_device *phydev) |
1514 | { | |
e5a03bfd | 1515 | return dev_name(&phydev->mdio.dev); |
84eff6d1 AL |
1516 | } |
1517 | ||
bec170e5 HK |
1518 | static inline void phy_lock_mdio_bus(struct phy_device *phydev) |
1519 | { | |
1520 | mutex_lock(&phydev->mdio.bus->mdio_lock); | |
1521 | } | |
1522 | ||
1523 | static inline void phy_unlock_mdio_bus(struct phy_device *phydev) | |
1524 | { | |
1525 | mutex_unlock(&phydev->mdio.bus->mdio_lock); | |
1526 | } | |
1527 | ||
2220943a AL |
1528 | void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) |
1529 | __printf(2, 3); | |
e27f1787 FF |
1530 | char *phy_attached_info_irq(struct phy_device *phydev) |
1531 | __malloc; | |
2220943a | 1532 | void phy_attached_info(struct phy_device *phydev); |
5acde34a RK |
1533 | |
1534 | /* Clause 22 PHY */ | |
045925e3 | 1535 | int genphy_read_abilities(struct phy_device *phydev); |
3fb69bca | 1536 | int genphy_setup_forced(struct phy_device *phydev); |
00db8189 | 1537 | int genphy_restart_aneg(struct phy_device *phydev); |
2a10ab04 | 1538 | int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); |
cd34499c | 1539 | int genphy_config_eee_advert(struct phy_device *phydev); |
f4069cd7 | 1540 | int __genphy_config_aneg(struct phy_device *phydev, bool changed); |
a9fa6e6a | 1541 | int genphy_aneg_done(struct phy_device *phydev); |
00db8189 | 1542 | int genphy_update_link(struct phy_device *phydev); |
8d3dc3ac | 1543 | int genphy_read_lpa(struct phy_device *phydev); |
0efc286a | 1544 | int genphy_read_status_fixed(struct phy_device *phydev); |
00db8189 | 1545 | int genphy_read_status(struct phy_device *phydev); |
0f0ca340 GC |
1546 | int genphy_suspend(struct phy_device *phydev); |
1547 | int genphy_resume(struct phy_device *phydev); | |
f0f9b4ed | 1548 | int genphy_loopback(struct phy_device *phydev, bool enable); |
797ac071 | 1549 | int genphy_soft_reset(struct phy_device *phydev); |
87de1f05 | 1550 | irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); |
f4069cd7 HK |
1551 | |
1552 | static inline int genphy_config_aneg(struct phy_device *phydev) | |
1553 | { | |
1554 | return __genphy_config_aneg(phydev, false); | |
1555 | } | |
1556 | ||
4c8e0459 LW |
1557 | static inline int genphy_no_config_intr(struct phy_device *phydev) |
1558 | { | |
1559 | return 0; | |
1560 | } | |
5df7af85 KH |
1561 | int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, |
1562 | u16 regnum); | |
1563 | int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, | |
1564 | u16 regnum, u16 val); | |
5acde34a | 1565 | |
fa6e98ce HK |
1566 | /* Clause 37 */ |
1567 | int genphy_c37_config_aneg(struct phy_device *phydev); | |
1568 | int genphy_c37_read_status(struct phy_device *phydev); | |
1569 | ||
5acde34a RK |
1570 | /* Clause 45 PHY */ |
1571 | int genphy_c45_restart_aneg(struct phy_device *phydev); | |
1af9f168 | 1572 | int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); |
5acde34a | 1573 | int genphy_c45_aneg_done(struct phy_device *phydev); |
998a8a83 | 1574 | int genphy_c45_read_link(struct phy_device *phydev); |
5acde34a RK |
1575 | int genphy_c45_read_lpa(struct phy_device *phydev); |
1576 | int genphy_c45_read_pma(struct phy_device *phydev); | |
1577 | int genphy_c45_pma_setup_forced(struct phy_device *phydev); | |
9a5dc8af | 1578 | int genphy_c45_an_config_aneg(struct phy_device *phydev); |
5acde34a | 1579 | int genphy_c45_an_disable_aneg(struct phy_device *phydev); |
ea4efe25 | 1580 | int genphy_c45_read_mdix(struct phy_device *phydev); |
ac3f5533 | 1581 | int genphy_c45_pma_read_abilities(struct phy_device *phydev); |
70fa3a96 | 1582 | int genphy_c45_read_status(struct phy_device *phydev); |
94acaeb5 | 1583 | int genphy_c45_config_aneg(struct phy_device *phydev); |
0ef25ed1 | 1584 | int genphy_c45_loopback(struct phy_device *phydev, bool enable); |
da702f34 RPNO |
1585 | int genphy_c45_pma_resume(struct phy_device *phydev); |
1586 | int genphy_c45_pma_suspend(struct phy_device *phydev); | |
5acde34a | 1587 | |
3970ed49 AL |
1588 | /* Generic C45 PHY driver */ |
1589 | extern struct phy_driver genphy_c45_driver; | |
1590 | ||
e8a714e0 FF |
1591 | /* The gen10g_* functions are the old Clause 45 stub */ |
1592 | int gen10g_config_aneg(struct phy_device *phydev); | |
e8a714e0 | 1593 | |
00fde795 HK |
1594 | static inline int phy_read_status(struct phy_device *phydev) |
1595 | { | |
1596 | if (!phydev->drv) | |
1597 | return -EIO; | |
1598 | ||
1599 | if (phydev->drv->read_status) | |
1600 | return phydev->drv->read_status(phydev); | |
1601 | else | |
1602 | return genphy_read_status(phydev); | |
1603 | } | |
1604 | ||
00db8189 | 1605 | void phy_driver_unregister(struct phy_driver *drv); |
d5bf9071 | 1606 | void phy_drivers_unregister(struct phy_driver *drv, int n); |
be01da72 AL |
1607 | int phy_driver_register(struct phy_driver *new_driver, struct module *owner); |
1608 | int phy_drivers_register(struct phy_driver *new_driver, int n, | |
1609 | struct module *owner); | |
293e9a3d | 1610 | void phy_error(struct phy_device *phydev); |
4f9c85a1 | 1611 | void phy_state_machine(struct work_struct *work); |
97b33bdf | 1612 | void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); |
293e9a3d | 1613 | void phy_trigger_machine(struct phy_device *phydev); |
28b2e0d2 | 1614 | void phy_mac_interrupt(struct phy_device *phydev); |
29935aeb | 1615 | void phy_start_machine(struct phy_device *phydev); |
00db8189 | 1616 | void phy_stop_machine(struct phy_device *phydev); |
5514174f | 1617 | void phy_ethtool_ksettings_get(struct phy_device *phydev, |
1618 | struct ethtool_link_ksettings *cmd); | |
2d55173e PR |
1619 | int phy_ethtool_ksettings_set(struct phy_device *phydev, |
1620 | const struct ethtool_link_ksettings *cmd); | |
4017b4d3 | 1621 | int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); |
bbbf8430 | 1622 | int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); |
3231e5d2 | 1623 | int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); |
3dd4ef1b | 1624 | int phy_disable_interrupts(struct phy_device *phydev); |
434a4315 | 1625 | void phy_request_interrupt(struct phy_device *phydev); |
07b09289 | 1626 | void phy_free_interrupt(struct phy_device *phydev); |
e1393456 | 1627 | void phy_print_status(struct phy_device *phydev); |
f3a6bd39 | 1628 | int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); |
41124fa6 | 1629 | void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); |
22c0ef6b | 1630 | void phy_advertise_supported(struct phy_device *phydev); |
c306ad36 | 1631 | void phy_support_sym_pause(struct phy_device *phydev); |
af8d9bb2 | 1632 | void phy_support_asym_pause(struct phy_device *phydev); |
0c122405 AL |
1633 | void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, |
1634 | bool autoneg); | |
70814e81 | 1635 | void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); |
22b7d299 AL |
1636 | bool phy_validate_pause(struct phy_device *phydev, |
1637 | struct ethtool_pauseparam *pp); | |
a87ae8a9 | 1638 | void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); |
92252eec DM |
1639 | |
1640 | s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, | |
1641 | const int *delay_values, int size, bool is_rx); | |
1642 | ||
a87ae8a9 RK |
1643 | void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, |
1644 | bool *tx_pause, bool *rx_pause); | |
00db8189 | 1645 | |
f62220d3 | 1646 | int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, |
4017b4d3 | 1647 | int (*run)(struct phy_device *)); |
f62220d3 | 1648 | int phy_register_fixup_for_id(const char *bus_id, |
4017b4d3 | 1649 | int (*run)(struct phy_device *)); |
f62220d3 | 1650 | int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, |
4017b4d3 | 1651 | int (*run)(struct phy_device *)); |
f62220d3 | 1652 | |
f38e7a32 WH |
1653 | int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); |
1654 | int phy_unregister_fixup_for_id(const char *bus_id); | |
1655 | int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); | |
1656 | ||
a59a4d19 GC |
1657 | int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); |
1658 | int phy_get_eee_err(struct phy_device *phydev); | |
1659 | int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); | |
1660 | int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); | |
42e836eb | 1661 | int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); |
4017b4d3 SS |
1662 | void phy_ethtool_get_wol(struct phy_device *phydev, |
1663 | struct ethtool_wolinfo *wol); | |
9d9a77ce PR |
1664 | int phy_ethtool_get_link_ksettings(struct net_device *ndev, |
1665 | struct ethtool_link_ksettings *cmd); | |
1666 | int phy_ethtool_set_link_ksettings(struct net_device *ndev, | |
1667 | const struct ethtool_link_ksettings *cmd); | |
e86a8987 | 1668 | int phy_ethtool_nway_reset(struct net_device *ndev); |
63490847 MW |
1669 | int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size); |
1670 | void phy_package_leave(struct phy_device *phydev); | |
1671 | int devm_phy_package_join(struct device *dev, struct phy_device *phydev, | |
1672 | int addr, size_t priv_size); | |
a59a4d19 | 1673 | |
90eff909 | 1674 | #if IS_ENABLED(CONFIG_PHYLIB) |
9b9a8bfc AF |
1675 | int __init mdio_bus_init(void); |
1676 | void mdio_bus_exit(void); | |
9e8d438e FF |
1677 | #endif |
1678 | ||
17809516 FF |
1679 | int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); |
1680 | int phy_ethtool_get_sset_count(struct phy_device *phydev); | |
1681 | int phy_ethtool_get_stats(struct phy_device *phydev, | |
1682 | struct ethtool_stats *stats, u64 *data); | |
9b9a8bfc | 1683 | |
63490847 MW |
1684 | static inline int phy_package_read(struct phy_device *phydev, u32 regnum) |
1685 | { | |
1686 | struct phy_package_shared *shared = phydev->shared; | |
1687 | ||
1688 | if (!shared) | |
1689 | return -EIO; | |
1690 | ||
1691 | return mdiobus_read(phydev->mdio.bus, shared->addr, regnum); | |
1692 | } | |
1693 | ||
1694 | static inline int __phy_package_read(struct phy_device *phydev, u32 regnum) | |
1695 | { | |
1696 | struct phy_package_shared *shared = phydev->shared; | |
1697 | ||
1698 | if (!shared) | |
1699 | return -EIO; | |
1700 | ||
1701 | return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum); | |
1702 | } | |
1703 | ||
1704 | static inline int phy_package_write(struct phy_device *phydev, | |
1705 | u32 regnum, u16 val) | |
1706 | { | |
1707 | struct phy_package_shared *shared = phydev->shared; | |
1708 | ||
1709 | if (!shared) | |
1710 | return -EIO; | |
1711 | ||
1712 | return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); | |
1713 | } | |
1714 | ||
1715 | static inline int __phy_package_write(struct phy_device *phydev, | |
1716 | u32 regnum, u16 val) | |
1717 | { | |
1718 | struct phy_package_shared *shared = phydev->shared; | |
1719 | ||
1720 | if (!shared) | |
1721 | return -EIO; | |
1722 | ||
1723 | return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); | |
1724 | } | |
1725 | ||
0ef44e5c AT |
1726 | static inline bool __phy_package_set_once(struct phy_device *phydev, |
1727 | unsigned int b) | |
63490847 MW |
1728 | { |
1729 | struct phy_package_shared *shared = phydev->shared; | |
1730 | ||
1731 | if (!shared) | |
1732 | return false; | |
1733 | ||
0ef44e5c AT |
1734 | return !test_and_set_bit(b, &shared->flags); |
1735 | } | |
1736 | ||
1737 | static inline bool phy_package_init_once(struct phy_device *phydev) | |
1738 | { | |
1739 | return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); | |
1740 | } | |
1741 | ||
1742 | static inline bool phy_package_probe_once(struct phy_device *phydev) | |
1743 | { | |
1744 | return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); | |
63490847 MW |
1745 | } |
1746 | ||
00db8189 | 1747 | extern struct bus_type mdio_bus_type; |
c31accd1 | 1748 | |
648ea013 FF |
1749 | struct mdio_board_info { |
1750 | const char *bus_id; | |
1751 | char modalias[MDIO_NAME_SIZE]; | |
1752 | int mdio_addr; | |
1753 | const void *platform_data; | |
1754 | }; | |
1755 | ||
90eff909 | 1756 | #if IS_ENABLED(CONFIG_MDIO_DEVICE) |
648ea013 FF |
1757 | int mdiobus_register_board_info(const struct mdio_board_info *info, |
1758 | unsigned int n); | |
1759 | #else | |
1760 | static inline int mdiobus_register_board_info(const struct mdio_board_info *i, | |
1761 | unsigned int n) | |
1762 | { | |
1763 | return 0; | |
1764 | } | |
1765 | #endif | |
1766 | ||
1767 | ||
c31accd1 | 1768 | /** |
39097ab6 | 1769 | * phy_module_driver() - Helper macro for registering PHY drivers |
c31accd1 | 1770 | * @__phy_drivers: array of PHY drivers to register |
39097ab6 | 1771 | * @__count: Numbers of members in array |
c31accd1 JH |
1772 | * |
1773 | * Helper macro for PHY drivers which do not do anything special in module | |
1774 | * init/exit. Each module may only use this macro once, and calling it | |
1775 | * replaces module_init() and module_exit(). | |
1776 | */ | |
1777 | #define phy_module_driver(__phy_drivers, __count) \ | |
1778 | static int __init phy_module_init(void) \ | |
1779 | { \ | |
be01da72 | 1780 | return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ |
c31accd1 JH |
1781 | } \ |
1782 | module_init(phy_module_init); \ | |
1783 | static void __exit phy_module_exit(void) \ | |
1784 | { \ | |
1785 | phy_drivers_unregister(__phy_drivers, __count); \ | |
1786 | } \ | |
1787 | module_exit(phy_module_exit) | |
1788 | ||
1789 | #define module_phy_driver(__phy_drivers) \ | |
1790 | phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) | |
1791 | ||
5db5ea99 FF |
1792 | bool phy_driver_is_genphy(struct phy_device *phydev); |
1793 | bool phy_driver_is_genphy_10g(struct phy_device *phydev); | |
1794 | ||
00db8189 | 1795 | #endif /* __PHY_H */ |