net: phy: enable interrupts when PHY is attached already
[linux-block.git] / include / linux / phy.h
CommitLineData
00db8189 1/*
00db8189 2 * Framework and drivers for configuring and reading different PHYs
d8de01b7 3 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
00db8189
AF
4 *
5 * Author: Andy Fleming
6 *
7 * Copyright (c) 2004 Freescale Semiconductor, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#ifndef __PHY_H
17#define __PHY_H
18
2220943a 19#include <linux/compiler.h>
00db8189 20#include <linux/spinlock.h>
13df29f6 21#include <linux/ethtool.h>
b31cdffa 22#include <linux/linkmode.h>
bac83c65 23#include <linux/mdio.h>
13df29f6 24#include <linux/mii.h>
3e3aaf64 25#include <linux/module.h>
13df29f6
MR
26#include <linux/timer.h>
27#include <linux/workqueue.h>
8626d3b4 28#include <linux/mod_devicetable.h>
00db8189 29
60063497 30#include <linux/atomic.h>
0ac49527 31
e9fbdf17 32#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
00db8189
AF
33 SUPPORTED_TP | \
34 SUPPORTED_MII)
35
e9fbdf17
FF
36#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
37 SUPPORTED_10baseT_Full)
38
39#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
40 SUPPORTED_100baseT_Full)
41
42#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
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43 SUPPORTED_1000baseT_Full)
44
719655a1
AL
45extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
46extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
47extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
48extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
49extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
50extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
9e857a40 51extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
719655a1
AL
52extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
53
54#define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
55#define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
56#define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
57#define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
58#define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
59#define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
9e857a40 60#define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
719655a1 61#define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
e9fbdf17 62
3c1bcc86
AL
63extern const int phy_10_100_features_array[4];
64extern const int phy_basic_t1_features_array[2];
65extern const int phy_gbit_features_array[2];
66extern const int phy_10gbit_features_array[1];
67
c5e38a94
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68/*
69 * Set phydev->irq to PHY_POLL if interrupts are not supported,
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70 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
71 * the attached driver handles the interrupt
72 */
73#define PHY_POLL -1
74#define PHY_IGNORE_INTERRUPT -2
75
a4307c0e
HK
76#define PHY_IS_INTERNAL 0x00000001
77#define PHY_RST_AFTER_CLK_EN 0x00000002
a9049e0c 78#define MDIO_DEVICE_IS_PHY 0x80000000
00db8189 79
e8a2b6a4
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80/* Interface Mode definitions */
81typedef enum {
4157ef1b 82 PHY_INTERFACE_MODE_NA,
735d8a18 83 PHY_INTERFACE_MODE_INTERNAL,
e8a2b6a4
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84 PHY_INTERFACE_MODE_MII,
85 PHY_INTERFACE_MODE_GMII,
86 PHY_INTERFACE_MODE_SGMII,
87 PHY_INTERFACE_MODE_TBI,
2cc70ba4 88 PHY_INTERFACE_MODE_REVMII,
e8a2b6a4
AF
89 PHY_INTERFACE_MODE_RMII,
90 PHY_INTERFACE_MODE_RGMII,
a999589c 91 PHY_INTERFACE_MODE_RGMII_ID,
7d400a4c
KP
92 PHY_INTERFACE_MODE_RGMII_RXID,
93 PHY_INTERFACE_MODE_RGMII_TXID,
4157ef1b
SG
94 PHY_INTERFACE_MODE_RTBI,
95 PHY_INTERFACE_MODE_SMII,
898dd0bd 96 PHY_INTERFACE_MODE_XGMII,
fd70f72c 97 PHY_INTERFACE_MODE_MOCA,
b9d12085 98 PHY_INTERFACE_MODE_QSGMII,
572de608 99 PHY_INTERFACE_MODE_TRGMII,
55601a88
AL
100 PHY_INTERFACE_MODE_1000BASEX,
101 PHY_INTERFACE_MODE_2500BASEX,
102 PHY_INTERFACE_MODE_RXAUI,
c125ca09
RK
103 PHY_INTERFACE_MODE_XAUI,
104 /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */
105 PHY_INTERFACE_MODE_10GKR,
4618d671 106 PHY_INTERFACE_MODE_USXGMII,
8a2fe56e 107 PHY_INTERFACE_MODE_MAX,
e8a2b6a4
AF
108} phy_interface_t;
109
1f9127ca
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110/**
111 * phy_supported_speeds - return all speeds currently supported by a phy device
112 * @phy: The phy device to return supported speeds of.
113 * @speeds: buffer to store supported speeds in.
114 * @size: size of speeds buffer.
115 *
d8de01b7
RD
116 * Description: Returns the number of supported speeds, and fills
117 * the speeds buffer with the supported speeds. If speeds buffer is
118 * too small to contain all currently supported speeds, will return as
1f9127ca
ZB
119 * many speeds as can fit.
120 */
121unsigned int phy_supported_speeds(struct phy_device *phy,
122 unsigned int *speeds,
123 unsigned int size);
124
8a2fe56e 125/**
d8de01b7
RD
126 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
127 * @interface: enum phy_interface_t value
128 *
129 * Description: maps 'enum phy_interface_t' defined in this file
8a2fe56e
FF
130 * into the device tree binding of 'phy-mode', so that Ethernet
131 * device driver can get phy interface from device tree.
132 */
133static inline const char *phy_modes(phy_interface_t interface)
134{
135 switch (interface) {
136 case PHY_INTERFACE_MODE_NA:
137 return "";
735d8a18
FF
138 case PHY_INTERFACE_MODE_INTERNAL:
139 return "internal";
8a2fe56e
FF
140 case PHY_INTERFACE_MODE_MII:
141 return "mii";
142 case PHY_INTERFACE_MODE_GMII:
143 return "gmii";
144 case PHY_INTERFACE_MODE_SGMII:
145 return "sgmii";
146 case PHY_INTERFACE_MODE_TBI:
147 return "tbi";
148 case PHY_INTERFACE_MODE_REVMII:
149 return "rev-mii";
150 case PHY_INTERFACE_MODE_RMII:
151 return "rmii";
152 case PHY_INTERFACE_MODE_RGMII:
153 return "rgmii";
154 case PHY_INTERFACE_MODE_RGMII_ID:
155 return "rgmii-id";
156 case PHY_INTERFACE_MODE_RGMII_RXID:
157 return "rgmii-rxid";
158 case PHY_INTERFACE_MODE_RGMII_TXID:
159 return "rgmii-txid";
160 case PHY_INTERFACE_MODE_RTBI:
161 return "rtbi";
162 case PHY_INTERFACE_MODE_SMII:
163 return "smii";
164 case PHY_INTERFACE_MODE_XGMII:
165 return "xgmii";
fd70f72c
FF
166 case PHY_INTERFACE_MODE_MOCA:
167 return "moca";
b9d12085
TP
168 case PHY_INTERFACE_MODE_QSGMII:
169 return "qsgmii";
572de608
SW
170 case PHY_INTERFACE_MODE_TRGMII:
171 return "trgmii";
55601a88
AL
172 case PHY_INTERFACE_MODE_1000BASEX:
173 return "1000base-x";
174 case PHY_INTERFACE_MODE_2500BASEX:
175 return "2500base-x";
176 case PHY_INTERFACE_MODE_RXAUI:
177 return "rxaui";
c125ca09
RK
178 case PHY_INTERFACE_MODE_XAUI:
179 return "xaui";
180 case PHY_INTERFACE_MODE_10GKR:
181 return "10gbase-kr";
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HK
182 case PHY_INTERFACE_MODE_USXGMII:
183 return "usxgmii";
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FF
184 default:
185 return "unknown";
186 }
187}
188
00db8189 189
e8a2b6a4 190#define PHY_INIT_TIMEOUT 100000
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191#define PHY_STATE_TIME 1
192#define PHY_FORCE_TIMEOUT 10
00db8189 193
e8a2b6a4 194#define PHY_MAX_ADDR 32
00db8189 195
a4d00f17 196/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
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197#define PHY_ID_FMT "%s:%02x"
198
4567d686 199#define MII_BUS_ID_SIZE 61
a4d00f17 200
abf35df2
JG
201/* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
202 IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
203#define MII_ADDR_C45 (1<<30)
204
313162d0 205struct device;
9525ae83 206struct phylink;
313162d0
PG
207struct sk_buff;
208
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209/*
210 * The Bus class for PHYs. Devices which provide access to
211 * PHYs should register using this structure
212 */
00db8189 213struct mii_bus {
3e3aaf64 214 struct module *owner;
00db8189 215 const char *name;
9d9326d3 216 char id[MII_BUS_ID_SIZE];
00db8189 217 void *priv;
ccaa953e
AL
218 int (*read)(struct mii_bus *bus, int addr, int regnum);
219 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
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220 int (*reset)(struct mii_bus *bus);
221
c5e38a94
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222 /*
223 * A lock to ensure that only one thing can read/write
224 * the MDIO bus at a time
225 */
35b5f6b1 226 struct mutex mdio_lock;
00db8189 227
18ee49dd 228 struct device *parent;
46abc021
LB
229 enum {
230 MDIOBUS_ALLOCATED = 1,
231 MDIOBUS_REGISTERED,
232 MDIOBUS_UNREGISTERED,
233 MDIOBUS_RELEASED,
234 } state;
235 struct device dev;
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AF
236
237 /* list of all PHYs on bus */
7f854420 238 struct mdio_device *mdio_map[PHY_MAX_ADDR];
00db8189 239
c6883996 240 /* PHY addresses to be ignored when probing */
f896424c
MP
241 u32 phy_mask;
242
922f2dd1
FF
243 /* PHY addresses to ignore the TA/read failure */
244 u32 phy_ignore_ta_mask;
245
c5e38a94 246 /*
e7f4dc35
AL
247 * An array of interrupts, each PHY's interrupt at the index
248 * matching its address
c5e38a94 249 */
e7f4dc35 250 int irq[PHY_MAX_ADDR];
69226896
RQ
251
252 /* GPIO reset pulse width in microseconds */
253 int reset_delay_us;
d396e84c
SS
254 /* RESET GPIO descriptor pointer */
255 struct gpio_desc *reset_gpiod;
00db8189 256};
46abc021 257#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
00db8189 258
eb8a54a7
TT
259struct mii_bus *mdiobus_alloc_size(size_t);
260static inline struct mii_bus *mdiobus_alloc(void)
261{
262 return mdiobus_alloc_size(0);
263}
264
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RK
265int __mdiobus_register(struct mii_bus *bus, struct module *owner);
266#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
2e888103
LB
267void mdiobus_unregister(struct mii_bus *bus);
268void mdiobus_free(struct mii_bus *bus);
6d48f44b
GS
269struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
270static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
271{
272 return devm_mdiobus_alloc_size(dev, 0);
273}
274
275void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
2e888103 276struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
2e888103 277
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HK
278#define PHY_INTERRUPT_DISABLED false
279#define PHY_INTERRUPT_ENABLED true
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280
281/* PHY state machine states:
282 *
283 * DOWN: PHY device and driver are not ready for anything. probe
284 * should be called if and only if the PHY is in this state,
285 * given that the PHY device exists.
899a3cbb 286 * - PHY driver probe function will set the state to READY
00db8189
AF
287 *
288 * READY: PHY is ready to send and receive packets, but the
289 * controller is not. By default, PHYs which do not implement
899a3cbb 290 * probe will be set to this state by phy_probe().
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AF
291 * - start will set the state to UP
292 *
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293 * UP: The PHY and attached device are ready to do work.
294 * Interrupts should be started here.
85a1f31d 295 * - timer moves to NOLINK or RUNNING
00db8189
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296 *
297 * NOLINK: PHY is up, but not currently plugged in.
8deeb630 298 * - irq or timer will set RUNNING if link comes back
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299 * - phy_stop moves to HALTED
300 *
301 * FORCING: PHY is being configured with forced settings
302 * - if link is up, move to RUNNING
303 * - If link is down, we drop to the next highest setting, and
304 * retry (FORCING) after a timeout
305 * - phy_stop moves to HALTED
306 *
307 * RUNNING: PHY is currently up, running, and possibly sending
308 * and/or receiving packets
8deeb630 309 * - irq or timer will set NOLINK if link goes down
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310 * - phy_stop moves to HALTED
311 *
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312 * HALTED: PHY is up, but no polling or interrupts are done. Or
313 * PHY is in an error state.
f24098f8 314 * - phy_start moves to UP
00db8189
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315 */
316enum phy_state {
4017b4d3 317 PHY_DOWN = 0,
00db8189 318 PHY_READY,
2b3e88ea 319 PHY_HALTED,
00db8189 320 PHY_UP,
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AF
321 PHY_RUNNING,
322 PHY_NOLINK,
323 PHY_FORCING,
00db8189
AF
324};
325
ac28b9f8
DD
326/**
327 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
328 * @devices_in_package: Bit vector of devices present.
329 * @device_ids: The device identifer for each present device.
330 */
331struct phy_c45_device_ids {
332 u32 devices_in_package;
333 u32 device_ids[8];
334};
c1f19b51 335
00db8189
AF
336/* phy_device: An instance of a PHY
337 *
338 * drv: Pointer to the driver for this PHY instance
00db8189 339 * phy_id: UID for this device found during discovery
ac28b9f8
DD
340 * c45_ids: 802.3-c45 Device Identifers if is_c45.
341 * is_c45: Set to true if this phy uses clause 45 addressing.
4284b6a5 342 * is_internal: Set to true if this phy is internal to a MAC.
5a11dd7d 343 * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc.
3b8b11f9 344 * is_gigabit_capable: Set to true if PHY supports 1000Mbps
aae88261 345 * has_fixups: Set to true if this phy has fixups/quirks.
8a477a6f 346 * suspended: Set to true if this phy has been suspended successfully.
a3995460 347 * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
f0f9b4ed 348 * loopback_enabled: Set true if this phy has been loopbacked successfully.
00db8189
AF
349 * state: state of the PHY for management purposes
350 * dev_flags: Device-specific flags used by the PHY driver.
00db8189
AF
351 * link_timeout: The number of timer firings to wait before the
352 * giving up on the current attempt at acquiring a link
353 * irq: IRQ number of the PHY's interrupt (-1 if none)
354 * phy_timer: The timer for handling the state machine
00db8189
AF
355 * attached_dev: The attached enet driver's device instance ptr
356 * adjust_link: Callback for the enet controller to respond to
357 * changes in the link state.
00db8189 358 *
114002bc
FF
359 * speed, duplex, pause, supported, advertising, lp_advertising,
360 * and autoneg are used like in mii_if_info
00db8189
AF
361 *
362 * interrupts currently only supports enabled or disabled,
363 * but could be changed in the future to support enabling
364 * and disabling specific interrupts
365 *
366 * Contains some infrastructure for polling and interrupt
367 * handling, as well as handling shifts in PHY hardware state
368 */
369struct phy_device {
e5a03bfd
AL
370 struct mdio_device mdio;
371
00db8189
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372 /* Information about the PHY type */
373 /* And management functions */
374 struct phy_driver *drv;
375
00db8189
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376 u32 phy_id;
377
ac28b9f8 378 struct phy_c45_device_ids c45_ids;
87e5808d
HK
379 unsigned is_c45:1;
380 unsigned is_internal:1;
381 unsigned is_pseudo_fixed_link:1;
3b8b11f9 382 unsigned is_gigabit_capable:1;
87e5808d
HK
383 unsigned has_fixups:1;
384 unsigned suspended:1;
385 unsigned sysfs_links:1;
386 unsigned loopback_enabled:1;
387
388 unsigned autoneg:1;
389 /* The most recently read link state */
390 unsigned link:1;
4950c2ba 391 unsigned autoneg_complete:1;
ac28b9f8 392
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393 /* Interrupts are enabled */
394 unsigned interrupts:1;
395
00db8189
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396 enum phy_state state;
397
398 u32 dev_flags;
399
e8a2b6a4
AF
400 phy_interface_t interface;
401
c5e38a94
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402 /*
403 * forced speed & duplex (no autoneg)
00db8189
AF
404 * partner speed & duplex & pause (autoneg)
405 */
406 int speed;
407 int duplex;
408 int pause;
409 int asym_pause;
410
3c1bcc86
AL
411 /* Union of PHY and Attached devices' supported link modes */
412 /* See ethtool.h for more info */
413 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
414 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
c0ec3c27 415 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
00db8189 416
d853d145 417 /* Energy efficient ethernet modes which should be prohibited */
418 u32 eee_broken_modes;
419
00db8189
AF
420 int link_timeout;
421
2e0bc452
ZB
422#ifdef CONFIG_LED_TRIGGER_PHY
423 struct phy_led_trigger *phy_led_triggers;
424 unsigned int phy_num_led_triggers;
425 struct phy_led_trigger *last_triggered;
3928ee64
MS
426
427 struct phy_led_trigger *led_link_trigger;
2e0bc452
ZB
428#endif
429
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430 /*
431 * Interrupt number for this PHY
432 * -1 means no interrupt
433 */
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434 int irq;
435
436 /* private data pointer */
437 /* For use by PHYs to maintain extra state */
438 void *priv;
439
440 /* Interrupt and Polling infrastructure */
a390d1f3 441 struct delayed_work state_queue;
00db8189 442
35b5f6b1 443 struct mutex lock;
00db8189 444
9525ae83 445 struct phylink *phylink;
00db8189
AF
446 struct net_device *attached_dev;
447
634ec36c 448 u8 mdix;
f4ed2fe3 449 u8 mdix_ctrl;
634ec36c 450
a81497be 451 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier);
00db8189 452 void (*adjust_link)(struct net_device *dev);
00db8189 453};
e5a03bfd
AL
454#define to_phy_device(d) container_of(to_mdio_device(d), \
455 struct phy_device, mdio)
00db8189
AF
456
457/* struct phy_driver: Driver structure for a particular PHY type
458 *
a9049e0c 459 * driver_data: static driver data
00db8189
AF
460 * phy_id: The result of reading the UID registers of this PHY
461 * type, and ANDing them with the phy_id_mask. This driver
462 * only works for PHYs with IDs which match this field
463 * name: The friendly name of this PHY type
464 * phy_id_mask: Defines the important bits of the phy_id
3e64cf7a
CG
465 * features: A mandatory list of features (speed, duplex, etc)
466 * supported by this PHY
00db8189
AF
467 * flags: A bitfield defining certain other features this PHY
468 * supports (like interrupts)
469 *
00fde795
HK
470 * All functions are optional. If config_aneg or read_status
471 * are not implemented, the phy core uses the genphy versions.
472 * Note that none of these functions should be called from
473 * interrupt time. The goal is for the bus read/write functions
474 * to be able to block when the bus transaction is happening,
475 * and be freed up by an interrupt (The MPC85xx has this ability,
476 * though it is not currently supported in the driver).
00db8189
AF
477 */
478struct phy_driver {
a9049e0c 479 struct mdio_driver_common mdiodrv;
00db8189
AF
480 u32 phy_id;
481 char *name;
511e3036 482 u32 phy_id_mask;
719655a1 483 const unsigned long * const features;
00db8189 484 u32 flags;
860f6e9e 485 const void *driver_data;
00db8189 486
c5e38a94 487 /*
9df81dd7
FF
488 * Called to issue a PHY software reset
489 */
490 int (*soft_reset)(struct phy_device *phydev);
491
492 /*
c5e38a94
AF
493 * Called to initialize the PHY,
494 * including after a reset
495 */
00db8189
AF
496 int (*config_init)(struct phy_device *phydev);
497
c5e38a94
AF
498 /*
499 * Called during discovery. Used to set
500 * up device-specific structures, if any
501 */
00db8189
AF
502 int (*probe)(struct phy_device *phydev);
503
efbdfdc2
AL
504 /*
505 * Probe the hardware to determine what abilities it has.
506 * Should only set phydev->supported.
507 */
508 int (*get_features)(struct phy_device *phydev);
509
00db8189
AF
510 /* PHY Power Management */
511 int (*suspend)(struct phy_device *phydev);
512 int (*resume)(struct phy_device *phydev);
513
c5e38a94
AF
514 /*
515 * Configures the advertisement and resets
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AF
516 * autonegotiation if phydev->autoneg is on,
517 * forces the speed to the current settings in phydev
c5e38a94
AF
518 * if phydev->autoneg is off
519 */
00db8189
AF
520 int (*config_aneg)(struct phy_device *phydev);
521
76a423a3
FF
522 /* Determines the auto negotiation result */
523 int (*aneg_done)(struct phy_device *phydev);
524
00db8189
AF
525 /* Determines the negotiated speed and duplex */
526 int (*read_status)(struct phy_device *phydev);
527
528 /* Clears any pending interrupts */
529 int (*ack_interrupt)(struct phy_device *phydev);
530
531 /* Enables or disables interrupts */
532 int (*config_intr)(struct phy_device *phydev);
533
a8729eb3
AG
534 /*
535 * Checks if the PHY generated an interrupt.
536 * For multi-PHY devices with shared PHY interrupt pin
537 */
538 int (*did_interrupt)(struct phy_device *phydev);
539
00db8189
AF
540 /* Clears up any memory if needed */
541 void (*remove)(struct phy_device *phydev);
542
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543 /* Returns true if this is a suitable driver for the given
544 * phydev. If NULL, matching is based on phy_id and
545 * phy_id_mask.
546 */
547 int (*match_phy_device)(struct phy_device *phydev);
548
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549 /* Handles ethtool queries for hardware time stamping. */
550 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
551
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552 /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
553 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
554
555 /*
556 * Requests a Rx timestamp for 'skb'. If the skb is accepted,
557 * the phy driver promises to deliver it using netif_rx() as
558 * soon as a timestamp becomes available. One of the
559 * PTP_CLASS_ values is passed in 'type'. The function must
560 * return true if the skb is accepted for delivery.
561 */
562 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
563
564 /*
565 * Requests a Tx timestamp for 'skb'. The phy driver promises
da92b194 566 * to deliver it using skb_complete_tx_timestamp() as soon as a
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567 * timestamp becomes available. One of the PTP_CLASS_ values
568 * is passed in 'type'.
569 */
570 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
571
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572 /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
573 * enable Wake on LAN, so set_wol is provided to be called in the
574 * ethernet driver's set_wol function. */
575 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
576
577 /* See set_wol, but for checking whether Wake on LAN is enabled. */
578 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
579
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580 /*
581 * Called to inform a PHY device driver when the core is about to
582 * change the link state. This callback is supposed to be used as
583 * fixup hook for drivers that need to take action when the link
584 * state changes. Drivers are by no means allowed to mess with the
585 * PHY device structure in their implementations.
586 */
587 void (*link_change_notify)(struct phy_device *dev);
588
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589 /*
590 * Phy specific driver override for reading a MMD register.
591 * This function is optional for PHY specific drivers. When
592 * not provided, the default MMD read function will be used
593 * by phy_read_mmd(), which will use either a direct read for
594 * Clause 45 PHYs or an indirect read for Clause 22 PHYs.
595 * devnum is the MMD device number within the PHY device,
596 * regnum is the register within the selected MMD device.
597 */
598 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
599
600 /*
601 * Phy specific driver override for writing a MMD register.
602 * This function is optional for PHY specific drivers. When
603 * not provided, the default MMD write function will be used
604 * by phy_write_mmd(), which will use either a direct write for
605 * Clause 45 PHYs, or an indirect write for Clause 22 PHYs.
606 * devnum is the MMD device number within the PHY device,
607 * regnum is the register within the selected MMD device.
608 * val is the value to be written.
609 */
610 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
611 u16 val);
612
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613 int (*read_page)(struct phy_device *dev);
614 int (*write_page)(struct phy_device *dev, int page);
615
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616 /* Get the size and type of the eeprom contained within a plug-in
617 * module */
618 int (*module_info)(struct phy_device *dev,
619 struct ethtool_modinfo *modinfo);
620
621 /* Get the eeprom information from the plug-in module */
622 int (*module_eeprom)(struct phy_device *dev,
623 struct ethtool_eeprom *ee, u8 *data);
624
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625 /* Get statistics from the phy using ethtool */
626 int (*get_sset_count)(struct phy_device *dev);
627 void (*get_strings)(struct phy_device *dev, u8 *data);
628 void (*get_stats)(struct phy_device *dev,
629 struct ethtool_stats *stats, u64 *data);
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RL
630
631 /* Get and Set PHY tunables */
632 int (*get_tunable)(struct phy_device *dev,
633 struct ethtool_tunable *tuna, void *data);
634 int (*set_tunable)(struct phy_device *dev,
635 struct ethtool_tunable *tuna,
636 const void *data);
f0f9b4ed 637 int (*set_loopback)(struct phy_device *dev, bool enable);
00db8189 638};
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639#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
640 struct phy_driver, mdiodrv)
00db8189 641
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AF
642#define PHY_ANY_ID "MATCH ANY PHY"
643#define PHY_ANY_UID 0xffffffff
644
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645#define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
646#define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
647#define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
648
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649/* A Structure for boards to register fixups with the PHY Lib */
650struct phy_fixup {
651 struct list_head list;
4567d686 652 char bus_id[MII_BUS_ID_SIZE + 3];
f62220d3
AF
653 u32 phy_uid;
654 u32 phy_uid_mask;
655 int (*run)(struct phy_device *phydev);
656};
657
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658const char *phy_speed_to_str(int speed);
659const char *phy_duplex_to_str(unsigned int duplex);
660
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661/* A structure for mapping a particular speed and duplex
662 * combination to a particular SUPPORTED and ADVERTISED value
663 */
664struct phy_setting {
665 u32 speed;
666 u8 duplex;
667 u8 bit;
668};
669
670const struct phy_setting *
671phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
3c1bcc86 672 bool exact);
0ccb4fc6 673size_t phy_speeds(unsigned int *speeds, size_t size,
3c1bcc86 674 unsigned long *mask);
a4eaed9f 675void of_set_phy_supported(struct phy_device *phydev);
3feb9b23 676void of_set_phy_eee_broken(struct phy_device *phydev);
0ccb4fc6 677
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HK
678/**
679 * phy_is_started - Convenience function to check whether PHY is started
680 * @phydev: The phy_device struct
681 */
682static inline bool phy_is_started(struct phy_device *phydev)
683{
a2fc9d7e 684 return phydev->state >= PHY_UP;
2b3e88ea
HK
685}
686
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RK
687void phy_resolve_aneg_linkmode(struct phy_device *phydev);
688
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LB
689/**
690 * phy_read - Convenience function for reading a given PHY register
691 * @phydev: the phy_device struct
692 * @regnum: register number to read
693 *
694 * NOTE: MUST NOT be called from interrupt context,
695 * because the bus read/write functions may wait for an interrupt
696 * to conclude the operation.
697 */
abf35df2 698static inline int phy_read(struct phy_device *phydev, u32 regnum)
2e888103 699{
e5a03bfd 700 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
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LB
701}
702
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703/**
704 * __phy_read - convenience function for reading a given PHY register
705 * @phydev: the phy_device struct
706 * @regnum: register number to read
707 *
708 * The caller must have taken the MDIO bus lock.
709 */
710static inline int __phy_read(struct phy_device *phydev, u32 regnum)
711{
712 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
713}
714
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LB
715/**
716 * phy_write - Convenience function for writing a given PHY register
717 * @phydev: the phy_device struct
718 * @regnum: register number to write
719 * @val: value to write to @regnum
720 *
721 * NOTE: MUST NOT be called from interrupt context,
722 * because the bus read/write functions may wait for an interrupt
723 * to conclude the operation.
724 */
abf35df2 725static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
2e888103 726{
e5a03bfd 727 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
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LB
728}
729
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730/**
731 * __phy_write - Convenience function for writing a given PHY register
732 * @phydev: the phy_device struct
733 * @regnum: register number to write
734 * @val: value to write to @regnum
735 *
736 * The caller must have taken the MDIO bus lock.
737 */
738static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
739{
740 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
741 val);
742}
743
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744/**
745 * phy_read_mmd - Convenience function for reading a register
746 * from an MMD on a given PHY.
747 * @phydev: The phy_device struct
748 * @devad: The MMD to read from
749 * @regnum: The register on the MMD to read
750 *
751 * Same rules as for phy_read();
752 */
753int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
754
755/**
756 * __phy_read_mmd - Convenience function for reading a register
757 * from an MMD on a given PHY.
758 * @phydev: The phy_device struct
759 * @devad: The MMD to read from
760 * @regnum: The register on the MMD to read
761 *
762 * Same rules as for __phy_read();
763 */
764int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
765
766/**
767 * phy_write_mmd - Convenience function for writing a register
768 * on an MMD on a given PHY.
769 * @phydev: The phy_device struct
770 * @devad: The MMD to write to
771 * @regnum: The register on the MMD to read
772 * @val: value to write to @regnum
773 *
774 * Same rules as for phy_write();
775 */
776int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
777
778/**
779 * __phy_write_mmd - Convenience function for writing a register
780 * on an MMD on a given PHY.
781 * @phydev: The phy_device struct
782 * @devad: The MMD to write to
783 * @regnum: The register on the MMD to read
784 * @val: value to write to @regnum
785 *
786 * Same rules as for __phy_write();
787 */
788int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
789
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HK
790int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
791 u16 set);
792int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
793 u16 set);
788f9933 794int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
2b74e5be 795int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
788f9933 796
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HK
797int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
798 u16 mask, u16 set);
799int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
800 u16 mask, u16 set);
1878f0dc 801int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
b8554d4f 802 u16 mask, u16 set);
1878f0dc 803int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
b8554d4f 804 u16 mask, u16 set);
1878f0dc 805
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HK
806/**
807 * __phy_set_bits - Convenience function for setting bits in a PHY register
808 * @phydev: the phy_device struct
809 * @regnum: register number to write
810 * @val: bits to set
811 *
812 * The caller must have taken the MDIO bus lock.
813 */
814static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
815{
816 return __phy_modify(phydev, regnum, 0, val);
817}
818
819/**
820 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
821 * @phydev: the phy_device struct
822 * @regnum: register number to write
823 * @val: bits to clear
824 *
825 * The caller must have taken the MDIO bus lock.
826 */
827static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
828 u16 val)
829{
830 return __phy_modify(phydev, regnum, val, 0);
831}
832
833/**
834 * phy_set_bits - Convenience function for setting bits in a PHY register
835 * @phydev: the phy_device struct
836 * @regnum: register number to write
837 * @val: bits to set
838 */
839static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
840{
841 return phy_modify(phydev, regnum, 0, val);
842}
843
844/**
845 * phy_clear_bits - Convenience function for clearing bits in a PHY register
846 * @phydev: the phy_device struct
847 * @regnum: register number to write
848 * @val: bits to clear
849 */
850static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
851{
852 return phy_modify(phydev, regnum, val, 0);
853}
854
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855/**
856 * __phy_set_bits_mmd - Convenience function for setting bits in a register
857 * on MMD
858 * @phydev: the phy_device struct
859 * @devad: the MMD containing register to modify
860 * @regnum: register number to modify
861 * @val: bits to set
862 *
863 * The caller must have taken the MDIO bus lock.
864 */
865static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
866 u32 regnum, u16 val)
867{
868 return __phy_modify_mmd(phydev, devad, regnum, 0, val);
869}
870
871/**
872 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
873 * on MMD
874 * @phydev: the phy_device struct
875 * @devad: the MMD containing register to modify
876 * @regnum: register number to modify
877 * @val: bits to clear
878 *
879 * The caller must have taken the MDIO bus lock.
880 */
881static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
882 u32 regnum, u16 val)
883{
884 return __phy_modify_mmd(phydev, devad, regnum, val, 0);
885}
886
887/**
888 * phy_set_bits_mmd - Convenience function for setting bits in a register
889 * on MMD
890 * @phydev: the phy_device struct
891 * @devad: the MMD containing register to modify
892 * @regnum: register number to modify
893 * @val: bits to set
894 */
895static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
896 u32 regnum, u16 val)
897{
898 return phy_modify_mmd(phydev, devad, regnum, 0, val);
899}
900
901/**
902 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
903 * on MMD
904 * @phydev: the phy_device struct
905 * @devad: the MMD containing register to modify
906 * @regnum: register number to modify
907 * @val: bits to clear
908 */
909static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
910 u32 regnum, u16 val)
911{
912 return phy_modify_mmd(phydev, devad, regnum, val, 0);
913}
914
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915/**
916 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
917 * @phydev: the phy_device struct
918 *
919 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
920 * PHY_IGNORE_INTERRUPT
921 */
922static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
923{
924 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
925}
926
3c507b8a
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927/**
928 * phy_polling_mode - Convenience function for testing whether polling is
929 * used to detect PHY status changes
930 * @phydev: the phy_device struct
931 */
932static inline bool phy_polling_mode(struct phy_device *phydev)
933{
934 return phydev->irq == PHY_POLL;
935}
936
4284b6a5
FF
937/**
938 * phy_is_internal - Convenience function for testing if a PHY is internal
939 * @phydev: the phy_device struct
940 */
941static inline bool phy_is_internal(struct phy_device *phydev)
942{
943 return phydev->is_internal;
944}
945
32d0f783
IS
946/**
947 * phy_interface_mode_is_rgmii - Convenience function for testing if a
948 * PHY interface mode is RGMII (all variants)
949 * @mode: the phy_interface_t enum
950 */
951static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
952{
953 return mode >= PHY_INTERFACE_MODE_RGMII &&
954 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
955};
956
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957/**
958 * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z
959 * negotiation
960 * @mode: one of &enum phy_interface_t
961 *
962 * Returns true if the phy interface mode uses the 16-bit negotiation
963 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
964 */
965static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
966{
967 return mode == PHY_INTERFACE_MODE_1000BASEX ||
968 mode == PHY_INTERFACE_MODE_2500BASEX;
969}
970
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971/**
972 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
973 * is RGMII (all variants)
974 * @phydev: the phy_device struct
975 */
976static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
977{
32d0f783 978 return phy_interface_mode_is_rgmii(phydev->interface);
5a11dd7d
FF
979};
980
981/*
982 * phy_is_pseudo_fixed_link - Convenience function for testing if this
983 * PHY is the CPU port facing side of an Ethernet switch, or similar.
984 * @phydev: the phy_device struct
985 */
986static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
987{
988 return phydev->is_pseudo_fixed_link;
e463d88c
FF
989}
990
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991int phy_save_page(struct phy_device *phydev);
992int phy_select_page(struct phy_device *phydev, int page);
993int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
994int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
995int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
996int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
997 u16 mask, u16 set);
998
ac28b9f8 999struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
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1000 bool is_c45,
1001 struct phy_c45_device_ids *c45_ids);
90eff909 1002#if IS_ENABLED(CONFIG_PHYLIB)
ac28b9f8 1003struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
4dea547f 1004int phy_device_register(struct phy_device *phy);
90eff909
FF
1005void phy_device_free(struct phy_device *phydev);
1006#else
1007static inline
1008struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1009{
1010 return NULL;
1011}
1012
1013static inline int phy_device_register(struct phy_device *phy)
1014{
1015 return 0;
1016}
1017
1018static inline void phy_device_free(struct phy_device *phydev) { }
1019#endif /* CONFIG_PHYLIB */
38737e49 1020void phy_device_remove(struct phy_device *phydev);
2f5cb434 1021int phy_init_hw(struct phy_device *phydev);
481b5d93
SH
1022int phy_suspend(struct phy_device *phydev);
1023int phy_resume(struct phy_device *phydev);
9c2c2e62 1024int __phy_resume(struct phy_device *phydev);
f0f9b4ed 1025int phy_loopback(struct phy_device *phydev, bool enable);
4017b4d3
SS
1026struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1027 phy_interface_t interface);
f8f76db1 1028struct phy_device *phy_find_first(struct mii_bus *bus);
257184d7
AF
1029int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1030 u32 flags, phy_interface_t interface);
fa94f6d9 1031int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
4017b4d3
SS
1032 void (*handler)(struct net_device *),
1033 phy_interface_t interface);
1034struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1035 void (*handler)(struct net_device *),
1036 phy_interface_t interface);
e1393456
AF
1037void phy_disconnect(struct phy_device *phydev);
1038void phy_detach(struct phy_device *phydev);
1039void phy_start(struct phy_device *phydev);
1040void phy_stop(struct phy_device *phydev);
1041int phy_start_aneg(struct phy_device *phydev);
372788f9 1042int phy_aneg_done(struct phy_device *phydev);
2b9672dd
HK
1043int phy_speed_down(struct phy_device *phydev, bool sync);
1044int phy_speed_up(struct phy_device *phydev);
e1393456 1045
002ba705 1046int phy_restart_aneg(struct phy_device *phydev);
a9668491 1047int phy_reset_after_clk_enable(struct phy_device *phydev);
00db8189 1048
bafbdd52
SS
1049static inline void phy_device_reset(struct phy_device *phydev, int value)
1050{
1051 mdio_device_reset(&phydev->mdio, value);
1052}
1053
72ba48be 1054#define phydev_err(_phydev, format, args...) \
e5a03bfd 1055 dev_err(&_phydev->mdio.dev, format, ##args)
72ba48be 1056
c4fabb8b
AL
1057#define phydev_info(_phydev, format, args...) \
1058 dev_info(&_phydev->mdio.dev, format, ##args)
1059
ab2a605f
AL
1060#define phydev_warn(_phydev, format, args...) \
1061 dev_warn(&_phydev->mdio.dev, format, ##args)
1062
72ba48be 1063#define phydev_dbg(_phydev, format, args...) \
2eaa38d9 1064 dev_dbg(&_phydev->mdio.dev, format, ##args)
72ba48be 1065
84eff6d1
AL
1066static inline const char *phydev_name(const struct phy_device *phydev)
1067{
e5a03bfd 1068 return dev_name(&phydev->mdio.dev);
84eff6d1
AL
1069}
1070
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AL
1071void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1072 __printf(2, 3);
1073void phy_attached_info(struct phy_device *phydev);
5acde34a
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1074
1075/* Clause 22 PHY */
af6b6967 1076int genphy_config_init(struct phy_device *phydev);
045925e3 1077int genphy_read_abilities(struct phy_device *phydev);
3fb69bca 1078int genphy_setup_forced(struct phy_device *phydev);
00db8189 1079int genphy_restart_aneg(struct phy_device *phydev);
cd34499c 1080int genphy_config_eee_advert(struct phy_device *phydev);
00db8189 1081int genphy_config_aneg(struct phy_device *phydev);
a9fa6e6a 1082int genphy_aneg_done(struct phy_device *phydev);
00db8189
AF
1083int genphy_update_link(struct phy_device *phydev);
1084int genphy_read_status(struct phy_device *phydev);
0f0ca340
GC
1085int genphy_suspend(struct phy_device *phydev);
1086int genphy_resume(struct phy_device *phydev);
f0f9b4ed 1087int genphy_loopback(struct phy_device *phydev, bool enable);
797ac071 1088int genphy_soft_reset(struct phy_device *phydev);
0878fff1
FF
1089static inline int genphy_no_soft_reset(struct phy_device *phydev)
1090{
1091 return 0;
1092}
4c8e0459
LW
1093static inline int genphy_no_ack_interrupt(struct phy_device *phydev)
1094{
1095 return 0;
1096}
1097static inline int genphy_no_config_intr(struct phy_device *phydev)
1098{
1099 return 0;
1100}
5df7af85
KH
1101int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1102 u16 regnum);
1103int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1104 u16 regnum, u16 val);
5acde34a
RK
1105
1106/* Clause 45 PHY */
1107int genphy_c45_restart_aneg(struct phy_device *phydev);
1af9f168 1108int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
5acde34a 1109int genphy_c45_aneg_done(struct phy_device *phydev);
998a8a83 1110int genphy_c45_read_link(struct phy_device *phydev);
5acde34a
RK
1111int genphy_c45_read_lpa(struct phy_device *phydev);
1112int genphy_c45_read_pma(struct phy_device *phydev);
1113int genphy_c45_pma_setup_forced(struct phy_device *phydev);
9a5dc8af 1114int genphy_c45_an_config_aneg(struct phy_device *phydev);
5acde34a 1115int genphy_c45_an_disable_aneg(struct phy_device *phydev);
ea4efe25 1116int genphy_c45_read_mdix(struct phy_device *phydev);
ac3f5533 1117int genphy_c45_pma_read_abilities(struct phy_device *phydev);
70fa3a96 1118int genphy_c45_read_status(struct phy_device *phydev);
5acde34a 1119
e8a714e0
FF
1120/* The gen10g_* functions are the old Clause 45 stub */
1121int gen10g_config_aneg(struct phy_device *phydev);
e8a714e0 1122
00fde795
HK
1123static inline int phy_read_status(struct phy_device *phydev)
1124{
1125 if (!phydev->drv)
1126 return -EIO;
1127
1128 if (phydev->drv->read_status)
1129 return phydev->drv->read_status(phydev);
1130 else
1131 return genphy_read_status(phydev);
1132}
1133
00db8189 1134void phy_driver_unregister(struct phy_driver *drv);
d5bf9071 1135void phy_drivers_unregister(struct phy_driver *drv, int n);
be01da72
AL
1136int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1137int phy_drivers_register(struct phy_driver *new_driver, int n,
1138 struct module *owner);
4f9c85a1 1139void phy_state_machine(struct work_struct *work);
28b2e0d2 1140void phy_mac_interrupt(struct phy_device *phydev);
29935aeb 1141void phy_start_machine(struct phy_device *phydev);
00db8189
AF
1142void phy_stop_machine(struct phy_device *phydev);
1143int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
5514174f 1144void phy_ethtool_ksettings_get(struct phy_device *phydev,
1145 struct ethtool_link_ksettings *cmd);
2d55173e
PR
1146int phy_ethtool_ksettings_set(struct phy_device *phydev,
1147 const struct ethtool_link_ksettings *cmd);
4017b4d3 1148int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
434a4315 1149void phy_request_interrupt(struct phy_device *phydev);
07b09289 1150void phy_free_interrupt(struct phy_device *phydev);
e1393456 1151void phy_print_status(struct phy_device *phydev);
f3a6bd39 1152int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
41124fa6 1153void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
22c0ef6b 1154void phy_advertise_supported(struct phy_device *phydev);
c306ad36 1155void phy_support_sym_pause(struct phy_device *phydev);
af8d9bb2 1156void phy_support_asym_pause(struct phy_device *phydev);
0c122405
AL
1157void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1158 bool autoneg);
70814e81 1159void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
22b7d299
AL
1160bool phy_validate_pause(struct phy_device *phydev,
1161 struct ethtool_pauseparam *pp);
00db8189 1162
f62220d3 1163int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1164 int (*run)(struct phy_device *));
f62220d3 1165int phy_register_fixup_for_id(const char *bus_id,
4017b4d3 1166 int (*run)(struct phy_device *));
f62220d3 1167int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
4017b4d3 1168 int (*run)(struct phy_device *));
f62220d3 1169
f38e7a32
WH
1170int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1171int phy_unregister_fixup_for_id(const char *bus_id);
1172int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1173
a59a4d19
GC
1174int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1175int phy_get_eee_err(struct phy_device *phydev);
1176int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1177int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
42e836eb 1178int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
4017b4d3
SS
1179void phy_ethtool_get_wol(struct phy_device *phydev,
1180 struct ethtool_wolinfo *wol);
9d9a77ce
PR
1181int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1182 struct ethtool_link_ksettings *cmd);
1183int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1184 const struct ethtool_link_ksettings *cmd);
e86a8987 1185int phy_ethtool_nway_reset(struct net_device *ndev);
a59a4d19 1186
90eff909 1187#if IS_ENABLED(CONFIG_PHYLIB)
9b9a8bfc
AF
1188int __init mdio_bus_init(void);
1189void mdio_bus_exit(void);
9e8d438e
FF
1190#endif
1191
1192/* Inline function for use within net/core/ethtool.c (built-in) */
1193static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data)
c59530d0 1194{
9e8d438e
FF
1195 if (!phydev->drv)
1196 return -EIO;
1197
1198 mutex_lock(&phydev->lock);
1199 phydev->drv->get_strings(phydev, data);
1200 mutex_unlock(&phydev->lock);
1201
1202 return 0;
c59530d0
FF
1203}
1204
9e8d438e 1205static inline int phy_ethtool_get_sset_count(struct phy_device *phydev)
c59530d0 1206{
9e8d438e
FF
1207 int ret;
1208
1209 if (!phydev->drv)
1210 return -EIO;
1211
1212 if (phydev->drv->get_sset_count &&
1213 phydev->drv->get_strings &&
1214 phydev->drv->get_stats) {
1215 mutex_lock(&phydev->lock);
1216 ret = phydev->drv->get_sset_count(phydev);
1217 mutex_unlock(&phydev->lock);
1218
1219 return ret;
1220 }
1221
c59530d0
FF
1222 return -EOPNOTSUPP;
1223}
1224
9e8d438e
FF
1225static inline int phy_ethtool_get_stats(struct phy_device *phydev,
1226 struct ethtool_stats *stats, u64 *data)
c59530d0 1227{
9e8d438e
FF
1228 if (!phydev->drv)
1229 return -EIO;
1230
1231 mutex_lock(&phydev->lock);
1232 phydev->drv->get_stats(phydev, stats, data);
1233 mutex_unlock(&phydev->lock);
1234
1235 return 0;
c59530d0 1236}
9b9a8bfc 1237
00db8189 1238extern struct bus_type mdio_bus_type;
c31accd1 1239
648ea013
FF
1240struct mdio_board_info {
1241 const char *bus_id;
1242 char modalias[MDIO_NAME_SIZE];
1243 int mdio_addr;
1244 const void *platform_data;
1245};
1246
90eff909 1247#if IS_ENABLED(CONFIG_MDIO_DEVICE)
648ea013
FF
1248int mdiobus_register_board_info(const struct mdio_board_info *info,
1249 unsigned int n);
1250#else
1251static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1252 unsigned int n)
1253{
1254 return 0;
1255}
1256#endif
1257
1258
c31accd1
JH
1259/**
1260 * module_phy_driver() - Helper macro for registering PHY drivers
1261 * @__phy_drivers: array of PHY drivers to register
1262 *
1263 * Helper macro for PHY drivers which do not do anything special in module
1264 * init/exit. Each module may only use this macro once, and calling it
1265 * replaces module_init() and module_exit().
1266 */
1267#define phy_module_driver(__phy_drivers, __count) \
1268static int __init phy_module_init(void) \
1269{ \
be01da72 1270 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
c31accd1
JH
1271} \
1272module_init(phy_module_init); \
1273static void __exit phy_module_exit(void) \
1274{ \
1275 phy_drivers_unregister(__phy_drivers, __count); \
1276} \
1277module_exit(phy_module_exit)
1278
1279#define module_phy_driver(__phy_drivers) \
1280 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1281
5db5ea99
FF
1282bool phy_driver_is_genphy(struct phy_device *phydev);
1283bool phy_driver_is_genphy_10g(struct phy_device *phydev);
1284
00db8189 1285#endif /* __PHY_H */