Commit | Line | Data |
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2874c5fd | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
00db8189 | 2 | /* |
00db8189 | 3 | * Framework and drivers for configuring and reading different PHYs |
d8de01b7 | 4 | * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c |
00db8189 AF |
5 | * |
6 | * Author: Andy Fleming | |
7 | * | |
8 | * Copyright (c) 2004 Freescale Semiconductor, Inc. | |
00db8189 AF |
9 | */ |
10 | ||
11 | #ifndef __PHY_H | |
12 | #define __PHY_H | |
13 | ||
2220943a | 14 | #include <linux/compiler.h> |
00db8189 | 15 | #include <linux/spinlock.h> |
13df29f6 | 16 | #include <linux/ethtool.h> |
b31cdffa | 17 | #include <linux/linkmode.h> |
a68a8138 | 18 | #include <linux/netlink.h> |
bac83c65 | 19 | #include <linux/mdio.h> |
13df29f6 | 20 | #include <linux/mii.h> |
4715f65f | 21 | #include <linux/mii_timestamper.h> |
3e3aaf64 | 22 | #include <linux/module.h> |
13df29f6 MR |
23 | #include <linux/timer.h> |
24 | #include <linux/workqueue.h> | |
8626d3b4 | 25 | #include <linux/mod_devicetable.h> |
080bb352 | 26 | #include <linux/u64_stats_sync.h> |
9010f9de | 27 | #include <linux/irqreturn.h> |
bd971ff0 | 28 | #include <linux/iopoll.h> |
63490847 | 29 | #include <linux/refcount.h> |
00db8189 | 30 | |
60063497 | 31 | #include <linux/atomic.h> |
0ac49527 | 32 | |
e9fbdf17 | 33 | #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ |
00db8189 AF |
34 | SUPPORTED_TP | \ |
35 | SUPPORTED_MII) | |
36 | ||
e9fbdf17 FF |
37 | #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ |
38 | SUPPORTED_10baseT_Full) | |
39 | ||
40 | #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ | |
41 | SUPPORTED_100baseT_Full) | |
42 | ||
43 | #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ | |
00db8189 AF |
44 | SUPPORTED_1000baseT_Full) |
45 | ||
719655a1 AL |
46 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; |
47 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; | |
48 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; | |
49 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; | |
50 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; | |
51 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; | |
9e857a40 | 52 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; |
719655a1 AL |
53 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; |
54 | ||
55 | #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) | |
56 | #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) | |
57 | #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) | |
58 | #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) | |
59 | #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) | |
60 | #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) | |
9e857a40 | 61 | #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) |
719655a1 | 62 | #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) |
e9fbdf17 | 63 | |
54638c6e DE |
64 | extern const int phy_basic_ports_array[3]; |
65 | extern const int phy_fibre_port_array[1]; | |
66 | extern const int phy_all_ports_features_array[7]; | |
3c1bcc86 | 67 | extern const int phy_10_100_features_array[4]; |
3254e0b9 | 68 | extern const int phy_basic_t1_features_array[3]; |
3c1bcc86 AL |
69 | extern const int phy_gbit_features_array[2]; |
70 | extern const int phy_10gbit_features_array[1]; | |
71 | ||
c5e38a94 AF |
72 | /* |
73 | * Set phydev->irq to PHY_POLL if interrupts are not supported, | |
93e8990c HK |
74 | * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if |
75 | * the attached MAC driver handles the interrupt | |
00db8189 AF |
76 | */ |
77 | #define PHY_POLL -1 | |
93e8990c | 78 | #define PHY_MAC_INTERRUPT -2 |
00db8189 | 79 | |
a4307c0e HK |
80 | #define PHY_IS_INTERNAL 0x00000001 |
81 | #define PHY_RST_AFTER_CLK_EN 0x00000002 | |
97c22438 | 82 | #define PHY_POLL_CABLE_TEST 0x00000004 |
a9049e0c | 83 | #define MDIO_DEVICE_IS_PHY 0x80000000 |
00db8189 | 84 | |
4069a572 AL |
85 | /** |
86 | * enum phy_interface_t - Interface Mode definitions | |
87 | * | |
88 | * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch | |
89 | * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined | |
26183cfe CF |
90 | * @PHY_INTERFACE_MODE_MII: Media-independent interface |
91 | * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface | |
4069a572 AL |
92 | * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface |
93 | * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface | |
94 | * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface | |
95 | * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface | |
c858d436 | 96 | * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role |
4069a572 AL |
97 | * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface |
98 | * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay | |
99 | * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay | |
100 | * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay | |
101 | * @PHY_INTERFACE_MODE_RTBI: Reduced TBI | |
b9241f54 | 102 | * @PHY_INTERFACE_MODE_SMII: Serial MII |
4069a572 AL |
103 | * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface |
104 | * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface | |
105 | * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax | |
106 | * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII | |
107 | * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII | |
b1ae3587 | 108 | * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX |
4069a572 AL |
109 | * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX |
110 | * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX | |
7331d1d4 | 111 | * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR |
4069a572 AL |
112 | * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI |
113 | * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface | |
114 | * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR | |
a56c2868 | 115 | * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR |
4069a572 AL |
116 | * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII |
117 | * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN | |
5e61fe15 | 118 | * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII |
05ad5d45 | 119 | * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN |
4069a572 AL |
120 | * @PHY_INTERFACE_MODE_MAX: Book keeping |
121 | * | |
122 | * Describes the interface between the MAC and PHY. | |
123 | */ | |
e8a2b6a4 | 124 | typedef enum { |
4157ef1b | 125 | PHY_INTERFACE_MODE_NA, |
735d8a18 | 126 | PHY_INTERFACE_MODE_INTERNAL, |
e8a2b6a4 AF |
127 | PHY_INTERFACE_MODE_MII, |
128 | PHY_INTERFACE_MODE_GMII, | |
129 | PHY_INTERFACE_MODE_SGMII, | |
130 | PHY_INTERFACE_MODE_TBI, | |
2cc70ba4 | 131 | PHY_INTERFACE_MODE_REVMII, |
e8a2b6a4 | 132 | PHY_INTERFACE_MODE_RMII, |
c858d436 | 133 | PHY_INTERFACE_MODE_REVRMII, |
e8a2b6a4 | 134 | PHY_INTERFACE_MODE_RGMII, |
a999589c | 135 | PHY_INTERFACE_MODE_RGMII_ID, |
7d400a4c KP |
136 | PHY_INTERFACE_MODE_RGMII_RXID, |
137 | PHY_INTERFACE_MODE_RGMII_TXID, | |
4157ef1b SG |
138 | PHY_INTERFACE_MODE_RTBI, |
139 | PHY_INTERFACE_MODE_SMII, | |
898dd0bd | 140 | PHY_INTERFACE_MODE_XGMII, |
58b05e58 | 141 | PHY_INTERFACE_MODE_XLGMII, |
fd70f72c | 142 | PHY_INTERFACE_MODE_MOCA, |
b9d12085 | 143 | PHY_INTERFACE_MODE_QSGMII, |
572de608 | 144 | PHY_INTERFACE_MODE_TRGMII, |
b1ae3587 | 145 | PHY_INTERFACE_MODE_100BASEX, |
55601a88 AL |
146 | PHY_INTERFACE_MODE_1000BASEX, |
147 | PHY_INTERFACE_MODE_2500BASEX, | |
7331d1d4 | 148 | PHY_INTERFACE_MODE_5GBASER, |
55601a88 | 149 | PHY_INTERFACE_MODE_RXAUI, |
c125ca09 | 150 | PHY_INTERFACE_MODE_XAUI, |
c114574e RK |
151 | /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ |
152 | PHY_INTERFACE_MODE_10GBASER, | |
a56c2868 | 153 | PHY_INTERFACE_MODE_25GBASER, |
4618d671 | 154 | PHY_INTERFACE_MODE_USXGMII, |
c114574e RK |
155 | /* 10GBASE-KR - with Clause 73 AN */ |
156 | PHY_INTERFACE_MODE_10GKR, | |
5e61fe15 | 157 | PHY_INTERFACE_MODE_QUSGMII, |
05ad5d45 | 158 | PHY_INTERFACE_MODE_1000BASEKX, |
8a2fe56e | 159 | PHY_INTERFACE_MODE_MAX, |
e8a2b6a4 AF |
160 | } phy_interface_t; |
161 | ||
8e20f591 RKO |
162 | /* PHY interface mode bitmap handling */ |
163 | #define DECLARE_PHY_INTERFACE_MASK(name) \ | |
164 | DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) | |
165 | ||
166 | static inline void phy_interface_zero(unsigned long *intf) | |
167 | { | |
168 | bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); | |
169 | } | |
170 | ||
171 | static inline bool phy_interface_empty(const unsigned long *intf) | |
172 | { | |
173 | return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); | |
174 | } | |
175 | ||
176 | static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, | |
177 | const unsigned long *b) | |
178 | { | |
179 | bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); | |
180 | } | |
181 | ||
182 | static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, | |
183 | const unsigned long *b) | |
184 | { | |
185 | bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); | |
186 | } | |
187 | ||
188 | static inline void phy_interface_set_rgmii(unsigned long *intf) | |
189 | { | |
190 | __set_bit(PHY_INTERFACE_MODE_RGMII, intf); | |
191 | __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); | |
192 | __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); | |
193 | __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); | |
194 | } | |
195 | ||
e86c6569 | 196 | /* |
4069a572 | 197 | * phy_supported_speeds - return all speeds currently supported by a PHY device |
1f9127ca ZB |
198 | */ |
199 | unsigned int phy_supported_speeds(struct phy_device *phy, | |
200 | unsigned int *speeds, | |
201 | unsigned int size); | |
202 | ||
8a2fe56e | 203 | /** |
d8de01b7 RD |
204 | * phy_modes - map phy_interface_t enum to device tree binding of phy-mode |
205 | * @interface: enum phy_interface_t value | |
206 | * | |
4069a572 | 207 | * Description: maps enum &phy_interface_t defined in this file |
8a2fe56e | 208 | * into the device tree binding of 'phy-mode', so that Ethernet |
4069a572 | 209 | * device driver can get PHY interface from device tree. |
8a2fe56e FF |
210 | */ |
211 | static inline const char *phy_modes(phy_interface_t interface) | |
212 | { | |
213 | switch (interface) { | |
214 | case PHY_INTERFACE_MODE_NA: | |
215 | return ""; | |
735d8a18 FF |
216 | case PHY_INTERFACE_MODE_INTERNAL: |
217 | return "internal"; | |
8a2fe56e FF |
218 | case PHY_INTERFACE_MODE_MII: |
219 | return "mii"; | |
220 | case PHY_INTERFACE_MODE_GMII: | |
221 | return "gmii"; | |
222 | case PHY_INTERFACE_MODE_SGMII: | |
223 | return "sgmii"; | |
224 | case PHY_INTERFACE_MODE_TBI: | |
225 | return "tbi"; | |
226 | case PHY_INTERFACE_MODE_REVMII: | |
227 | return "rev-mii"; | |
228 | case PHY_INTERFACE_MODE_RMII: | |
229 | return "rmii"; | |
c858d436 VO |
230 | case PHY_INTERFACE_MODE_REVRMII: |
231 | return "rev-rmii"; | |
8a2fe56e FF |
232 | case PHY_INTERFACE_MODE_RGMII: |
233 | return "rgmii"; | |
234 | case PHY_INTERFACE_MODE_RGMII_ID: | |
235 | return "rgmii-id"; | |
236 | case PHY_INTERFACE_MODE_RGMII_RXID: | |
237 | return "rgmii-rxid"; | |
238 | case PHY_INTERFACE_MODE_RGMII_TXID: | |
239 | return "rgmii-txid"; | |
240 | case PHY_INTERFACE_MODE_RTBI: | |
241 | return "rtbi"; | |
242 | case PHY_INTERFACE_MODE_SMII: | |
243 | return "smii"; | |
244 | case PHY_INTERFACE_MODE_XGMII: | |
245 | return "xgmii"; | |
58b05e58 JA |
246 | case PHY_INTERFACE_MODE_XLGMII: |
247 | return "xlgmii"; | |
fd70f72c FF |
248 | case PHY_INTERFACE_MODE_MOCA: |
249 | return "moca"; | |
b9d12085 TP |
250 | case PHY_INTERFACE_MODE_QSGMII: |
251 | return "qsgmii"; | |
572de608 SW |
252 | case PHY_INTERFACE_MODE_TRGMII: |
253 | return "trgmii"; | |
55601a88 AL |
254 | case PHY_INTERFACE_MODE_1000BASEX: |
255 | return "1000base-x"; | |
05ad5d45 SA |
256 | case PHY_INTERFACE_MODE_1000BASEKX: |
257 | return "1000base-kx"; | |
55601a88 AL |
258 | case PHY_INTERFACE_MODE_2500BASEX: |
259 | return "2500base-x"; | |
7331d1d4 PS |
260 | case PHY_INTERFACE_MODE_5GBASER: |
261 | return "5gbase-r"; | |
55601a88 AL |
262 | case PHY_INTERFACE_MODE_RXAUI: |
263 | return "rxaui"; | |
c125ca09 RK |
264 | case PHY_INTERFACE_MODE_XAUI: |
265 | return "xaui"; | |
c114574e RK |
266 | case PHY_INTERFACE_MODE_10GBASER: |
267 | return "10gbase-r"; | |
a56c2868 SH |
268 | case PHY_INTERFACE_MODE_25GBASER: |
269 | return "25gbase-r"; | |
4618d671 HK |
270 | case PHY_INTERFACE_MODE_USXGMII: |
271 | return "usxgmii"; | |
c114574e RK |
272 | case PHY_INTERFACE_MODE_10GKR: |
273 | return "10gbase-kr"; | |
b1ae3587 BJ |
274 | case PHY_INTERFACE_MODE_100BASEX: |
275 | return "100base-x"; | |
5e61fe15 MC |
276 | case PHY_INTERFACE_MODE_QUSGMII: |
277 | return "qusgmii"; | |
8a2fe56e FF |
278 | default: |
279 | return "unknown"; | |
280 | } | |
281 | } | |
282 | ||
e8a2b6a4 | 283 | #define PHY_INIT_TIMEOUT 100000 |
00db8189 | 284 | #define PHY_FORCE_TIMEOUT 10 |
00db8189 | 285 | |
e8a2b6a4 | 286 | #define PHY_MAX_ADDR 32 |
00db8189 | 287 | |
a4d00f17 | 288 | /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ |
9d9326d3 AF |
289 | #define PHY_ID_FMT "%s:%02x" |
290 | ||
4567d686 | 291 | #define MII_BUS_ID_SIZE 61 |
a4d00f17 | 292 | |
313162d0 | 293 | struct device; |
9525ae83 | 294 | struct phylink; |
298e54fa RK |
295 | struct sfp_bus; |
296 | struct sfp_upstream_ops; | |
313162d0 PG |
297 | struct sk_buff; |
298 | ||
4069a572 AL |
299 | /** |
300 | * struct mdio_bus_stats - Statistics counters for MDIO busses | |
301 | * @transfers: Total number of transfers, i.e. @writes + @reads | |
302 | * @errors: Number of MDIO transfers that returned an error | |
303 | * @writes: Number of write transfers | |
304 | * @reads: Number of read transfers | |
305 | * @syncp: Synchronisation for incrementing statistics | |
306 | */ | |
080bb352 FF |
307 | struct mdio_bus_stats { |
308 | u64_stats_t transfers; | |
309 | u64_stats_t errors; | |
310 | u64_stats_t writes; | |
311 | u64_stats_t reads; | |
312 | /* Must be last, add new statistics above */ | |
313 | struct u64_stats_sync syncp; | |
314 | }; | |
315 | ||
4069a572 AL |
316 | /** |
317 | * struct phy_package_shared - Shared information in PHY packages | |
318 | * @addr: Common PHY address used to combine PHYs in one package | |
319 | * @refcnt: Number of PHYs connected to this shared data | |
320 | * @flags: Initialization of PHY package | |
321 | * @priv_size: Size of the shared private data @priv | |
322 | * @priv: Driver private data shared across a PHY package | |
323 | * | |
324 | * Represents a shared structure between different phydev's in the same | |
63490847 MW |
325 | * package, for example a quad PHY. See phy_package_join() and |
326 | * phy_package_leave(). | |
327 | */ | |
328 | struct phy_package_shared { | |
329 | int addr; | |
330 | refcount_t refcnt; | |
331 | unsigned long flags; | |
332 | size_t priv_size; | |
333 | ||
334 | /* private data pointer */ | |
335 | /* note that this pointer is shared between different phydevs and | |
336 | * the user has to take care of appropriate locking. It is allocated | |
337 | * and freed automatically by phy_package_join() and | |
338 | * phy_package_leave(). | |
339 | */ | |
340 | void *priv; | |
341 | }; | |
342 | ||
343 | /* used as bit number in atomic bitops */ | |
0ef44e5c AT |
344 | #define PHY_SHARED_F_INIT_DONE 0 |
345 | #define PHY_SHARED_F_PROBE_DONE 1 | |
63490847 | 346 | |
4069a572 AL |
347 | /** |
348 | * struct mii_bus - Represents an MDIO bus | |
349 | * | |
350 | * @owner: Who owns this device | |
351 | * @name: User friendly name for this MDIO device, or driver name | |
352 | * @id: Unique identifier for this bus, typical from bus hierarchy | |
353 | * @priv: Driver private data | |
354 | * | |
c5e38a94 AF |
355 | * The Bus class for PHYs. Devices which provide access to |
356 | * PHYs should register using this structure | |
357 | */ | |
00db8189 | 358 | struct mii_bus { |
3e3aaf64 | 359 | struct module *owner; |
00db8189 | 360 | const char *name; |
9d9326d3 | 361 | char id[MII_BUS_ID_SIZE]; |
00db8189 | 362 | void *priv; |
4069a572 | 363 | /** @read: Perform a read transfer on the bus */ |
ccaa953e | 364 | int (*read)(struct mii_bus *bus, int addr, int regnum); |
4069a572 | 365 | /** @write: Perform a write transfer on the bus */ |
ccaa953e | 366 | int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); |
4069a572 | 367 | /** @reset: Perform a reset of the bus */ |
00db8189 | 368 | int (*reset)(struct mii_bus *bus); |
4069a572 AL |
369 | |
370 | /** @stats: Statistic counters per device on the bus */ | |
080bb352 | 371 | struct mdio_bus_stats stats[PHY_MAX_ADDR]; |
00db8189 | 372 | |
4069a572 AL |
373 | /** |
374 | * @mdio_lock: A lock to ensure that only one thing can read/write | |
c5e38a94 AF |
375 | * the MDIO bus at a time |
376 | */ | |
35b5f6b1 | 377 | struct mutex mdio_lock; |
00db8189 | 378 | |
4069a572 | 379 | /** @parent: Parent device of this bus */ |
18ee49dd | 380 | struct device *parent; |
4069a572 | 381 | /** @state: State of bus structure */ |
46abc021 LB |
382 | enum { |
383 | MDIOBUS_ALLOCATED = 1, | |
384 | MDIOBUS_REGISTERED, | |
385 | MDIOBUS_UNREGISTERED, | |
386 | MDIOBUS_RELEASED, | |
387 | } state; | |
4069a572 AL |
388 | |
389 | /** @dev: Kernel device representation */ | |
46abc021 | 390 | struct device dev; |
00db8189 | 391 | |
4069a572 | 392 | /** @mdio_map: list of all MDIO devices on bus */ |
7f854420 | 393 | struct mdio_device *mdio_map[PHY_MAX_ADDR]; |
00db8189 | 394 | |
4069a572 | 395 | /** @phy_mask: PHY addresses to be ignored when probing */ |
f896424c MP |
396 | u32 phy_mask; |
397 | ||
4069a572 | 398 | /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ |
922f2dd1 FF |
399 | u32 phy_ignore_ta_mask; |
400 | ||
4069a572 AL |
401 | /** |
402 | * @irq: An array of interrupts, each PHY's interrupt at the index | |
e7f4dc35 | 403 | * matching its address |
c5e38a94 | 404 | */ |
e7f4dc35 | 405 | int irq[PHY_MAX_ADDR]; |
69226896 | 406 | |
4069a572 | 407 | /** @reset_delay_us: GPIO reset pulse width in microseconds */ |
69226896 | 408 | int reset_delay_us; |
4069a572 | 409 | /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ |
bb383129 | 410 | int reset_post_delay_us; |
4069a572 | 411 | /** @reset_gpiod: Reset GPIO descriptor pointer */ |
d396e84c | 412 | struct gpio_desc *reset_gpiod; |
63490847 | 413 | |
4069a572 | 414 | /** @probe_capabilities: bus capabilities, used for probing */ |
0cc8fecf JL |
415 | enum { |
416 | MDIOBUS_NO_CAP = 0, | |
417 | MDIOBUS_C22, | |
418 | MDIOBUS_C45, | |
419 | MDIOBUS_C22_C45, | |
420 | } probe_capabilities; | |
421 | ||
4069a572 | 422 | /** @shared_lock: protect access to the shared element */ |
63490847 MW |
423 | struct mutex shared_lock; |
424 | ||
4069a572 | 425 | /** @shared: shared state across different PHYs */ |
63490847 | 426 | struct phy_package_shared *shared[PHY_MAX_ADDR]; |
00db8189 | 427 | }; |
46abc021 | 428 | #define to_mii_bus(d) container_of(d, struct mii_bus, dev) |
00db8189 | 429 | |
4069a572 AL |
430 | struct mii_bus *mdiobus_alloc_size(size_t size); |
431 | ||
432 | /** | |
433 | * mdiobus_alloc - Allocate an MDIO bus structure | |
434 | * | |
435 | * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready | |
436 | * for the driver to register the bus. | |
437 | */ | |
eb8a54a7 TT |
438 | static inline struct mii_bus *mdiobus_alloc(void) |
439 | { | |
440 | return mdiobus_alloc_size(0); | |
441 | } | |
442 | ||
3e3aaf64 | 443 | int __mdiobus_register(struct mii_bus *bus, struct module *owner); |
ac3a68d5 BG |
444 | int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, |
445 | struct module *owner); | |
3e3aaf64 | 446 | #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) |
ac3a68d5 BG |
447 | #define devm_mdiobus_register(dev, bus) \ |
448 | __devm_mdiobus_register(dev, bus, THIS_MODULE) | |
38f961e7 | 449 | |
2e888103 LB |
450 | void mdiobus_unregister(struct mii_bus *bus); |
451 | void mdiobus_free(struct mii_bus *bus); | |
6d48f44b GS |
452 | struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); |
453 | static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) | |
454 | { | |
455 | return devm_mdiobus_alloc_size(dev, 0); | |
456 | } | |
457 | ||
ce69e216 | 458 | struct mii_bus *mdio_find_bus(const char *mdio_name); |
2e888103 | 459 | struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); |
2e888103 | 460 | |
695bce8f HK |
461 | #define PHY_INTERRUPT_DISABLED false |
462 | #define PHY_INTERRUPT_ENABLED true | |
00db8189 | 463 | |
4069a572 AL |
464 | /** |
465 | * enum phy_state - PHY state machine states: | |
00db8189 | 466 | * |
4069a572 | 467 | * @PHY_DOWN: PHY device and driver are not ready for anything. probe |
00db8189 AF |
468 | * should be called if and only if the PHY is in this state, |
469 | * given that the PHY device exists. | |
4069a572 | 470 | * - PHY driver probe function will set the state to @PHY_READY |
00db8189 | 471 | * |
4069a572 | 472 | * @PHY_READY: PHY is ready to send and receive packets, but the |
00db8189 | 473 | * controller is not. By default, PHYs which do not implement |
899a3cbb | 474 | * probe will be set to this state by phy_probe(). |
00db8189 AF |
475 | * - start will set the state to UP |
476 | * | |
4069a572 | 477 | * @PHY_UP: The PHY and attached device are ready to do work. |
00db8189 | 478 | * Interrupts should be started here. |
4069a572 | 479 | * - timer moves to @PHY_NOLINK or @PHY_RUNNING |
00db8189 | 480 | * |
4069a572 AL |
481 | * @PHY_NOLINK: PHY is up, but not currently plugged in. |
482 | * - irq or timer will set @PHY_RUNNING if link comes back | |
483 | * - phy_stop moves to @PHY_HALTED | |
00db8189 | 484 | * |
4069a572 | 485 | * @PHY_RUNNING: PHY is currently up, running, and possibly sending |
00db8189 | 486 | * and/or receiving packets |
4069a572 AL |
487 | * - irq or timer will set @PHY_NOLINK if link goes down |
488 | * - phy_stop moves to @PHY_HALTED | |
00db8189 | 489 | * |
4069a572 | 490 | * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending |
a68a8138 AL |
491 | * is not expected to work, carrier will be indicated as down. PHY will be |
492 | * poll once per second, or on interrupt for it current state. | |
493 | * Once complete, move to UP to restart the PHY. | |
4069a572 | 494 | * - phy_stop aborts the running test and moves to @PHY_HALTED |
a68a8138 | 495 | * |
4069a572 | 496 | * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or |
00db8189 | 497 | * PHY is in an error state. |
4069a572 | 498 | * - phy_start moves to @PHY_UP |
00db8189 AF |
499 | */ |
500 | enum phy_state { | |
4017b4d3 | 501 | PHY_DOWN = 0, |
00db8189 | 502 | PHY_READY, |
2b3e88ea | 503 | PHY_HALTED, |
00db8189 | 504 | PHY_UP, |
00db8189 AF |
505 | PHY_RUNNING, |
506 | PHY_NOLINK, | |
a68a8138 | 507 | PHY_CABLETEST, |
00db8189 AF |
508 | }; |
509 | ||
c746053d RK |
510 | #define MDIO_MMD_NUM 32 |
511 | ||
ac28b9f8 DD |
512 | /** |
513 | * struct phy_c45_device_ids - 802.3-c45 Device Identifiers | |
320ed3bf RK |
514 | * @devices_in_package: IEEE 802.3 devices in package register value. |
515 | * @mmds_present: bit vector of MMDs present. | |
ac28b9f8 DD |
516 | * @device_ids: The device identifer for each present device. |
517 | */ | |
518 | struct phy_c45_device_ids { | |
519 | u32 devices_in_package; | |
320ed3bf | 520 | u32 mmds_present; |
389a3389 | 521 | u32 device_ids[MDIO_MMD_NUM]; |
ac28b9f8 | 522 | }; |
c1f19b51 | 523 | |
76564261 | 524 | struct macsec_context; |
2e181358 | 525 | struct macsec_ops; |
76564261 | 526 | |
4069a572 AL |
527 | /** |
528 | * struct phy_device - An instance of a PHY | |
00db8189 | 529 | * |
4069a572 AL |
530 | * @mdio: MDIO bus this PHY is on |
531 | * @drv: Pointer to the driver for this PHY instance | |
532 | * @phy_id: UID for this device found during discovery | |
533 | * @c45_ids: 802.3-c45 Device Identifiers if is_c45. | |
534 | * @is_c45: Set to true if this PHY uses clause 45 addressing. | |
535 | * @is_internal: Set to true if this PHY is internal to a MAC. | |
536 | * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. | |
537 | * @is_gigabit_capable: Set to true if PHY supports 1000Mbps | |
538 | * @has_fixups: Set to true if this PHY has fixups/quirks. | |
539 | * @suspended: Set to true if this PHY has been suspended successfully. | |
540 | * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. | |
541 | * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. | |
542 | * @loopback_enabled: Set true if this PHY has been loopbacked successfully. | |
543 | * @downshifted_rate: Set true if link speed has been downshifted. | |
b834489b | 544 | * @is_on_sfp_module: Set true if PHY is located on an SFP module. |
fba863b8 | 545 | * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY |
4069a572 AL |
546 | * @state: State of the PHY for management purposes |
547 | * @dev_flags: Device-specific flags used by the PHY driver. | |
a97770cc YS |
548 | * |
549 | * - Bits [15:0] are free to use by the PHY driver to communicate | |
550 | * driver specific behavior. | |
551 | * - Bits [23:16] are currently reserved for future use. | |
552 | * - Bits [31:24] are reserved for defining generic | |
553 | * PHY driver behavior. | |
4069a572 AL |
554 | * @irq: IRQ number of the PHY's interrupt (-1 if none) |
555 | * @phy_timer: The timer for handling the state machine | |
556 | * @phylink: Pointer to phylink instance for this PHY | |
557 | * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached | |
558 | * @sfp_bus: SFP bus attached to this PHY's fiber port | |
559 | * @attached_dev: The attached enet driver's device instance ptr | |
560 | * @adjust_link: Callback for the enet controller to respond to changes: in the | |
561 | * link state. | |
562 | * @phy_link_change: Callback for phylink for notification of link change | |
563 | * @macsec_ops: MACsec offloading ops. | |
00db8189 | 564 | * |
4069a572 AL |
565 | * @speed: Current link speed |
566 | * @duplex: Current duplex | |
4217a64e | 567 | * @port: Current port |
4069a572 AL |
568 | * @pause: Current pause |
569 | * @asym_pause: Current asymmetric pause | |
570 | * @supported: Combined MAC/PHY supported linkmodes | |
571 | * @advertising: Currently advertised linkmodes | |
572 | * @adv_old: Saved advertised while power saving for WoL | |
573 | * @lp_advertising: Current link partner advertised linkmodes | |
eca68a3c | 574 | * @host_interfaces: PHY interface modes supported by host |
4069a572 AL |
575 | * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited |
576 | * @autoneg: Flag autoneg being used | |
0c3e10cb | 577 | * @rate_matching: Current rate matching mode |
4069a572 AL |
578 | * @link: Current link state |
579 | * @autoneg_complete: Flag auto negotiation of the link has completed | |
580 | * @mdix: Current crossover | |
581 | * @mdix_ctrl: User setting of crossover | |
3da8ffd8 | 582 | * @pma_extable: Cached value of PMA/PMD Extended Abilities Register |
4069a572 | 583 | * @interrupts: Flag interrupts have been enabled |
1758bde2 LW |
584 | * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt |
585 | * handling shall be postponed until PHY has resumed | |
586 | * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, | |
587 | * requiring a rerun of the interrupt handler after resume | |
4069a572 AL |
588 | * @interface: enum phy_interface_t value |
589 | * @skb: Netlink message for cable diagnostics | |
590 | * @nest: Netlink nest used for cable diagnostics | |
591 | * @ehdr: nNtlink header for cable diagnostics | |
592 | * @phy_led_triggers: Array of LED triggers | |
593 | * @phy_num_led_triggers: Number of triggers in @phy_led_triggers | |
594 | * @led_link_trigger: LED trigger for link up/down | |
595 | * @last_triggered: last LED trigger for link speed | |
596 | * @master_slave_set: User requested master/slave configuration | |
597 | * @master_slave_get: Current master/slave advertisement | |
598 | * @master_slave_state: Current master/slave configuration | |
599 | * @mii_ts: Pointer to time stamper callbacks | |
5e82147d | 600 | * @psec: Pointer to Power Sourcing Equipment control struct |
4069a572 AL |
601 | * @lock: Mutex for serialization access to PHY |
602 | * @state_queue: Work queue for state machine | |
603 | * @shared: Pointer to private data shared by phys in one package | |
604 | * @priv: Pointer to driver private data | |
00db8189 AF |
605 | * |
606 | * interrupts currently only supports enabled or disabled, | |
607 | * but could be changed in the future to support enabling | |
608 | * and disabling specific interrupts | |
609 | * | |
610 | * Contains some infrastructure for polling and interrupt | |
611 | * handling, as well as handling shifts in PHY hardware state | |
612 | */ | |
613 | struct phy_device { | |
e5a03bfd AL |
614 | struct mdio_device mdio; |
615 | ||
00db8189 AF |
616 | /* Information about the PHY type */ |
617 | /* And management functions */ | |
618 | struct phy_driver *drv; | |
619 | ||
00db8189 AF |
620 | u32 phy_id; |
621 | ||
ac28b9f8 | 622 | struct phy_c45_device_ids c45_ids; |
87e5808d HK |
623 | unsigned is_c45:1; |
624 | unsigned is_internal:1; | |
625 | unsigned is_pseudo_fixed_link:1; | |
3b8b11f9 | 626 | unsigned is_gigabit_capable:1; |
87e5808d HK |
627 | unsigned has_fixups:1; |
628 | unsigned suspended:1; | |
611d779a | 629 | unsigned suspended_by_mdio_bus:1; |
87e5808d HK |
630 | unsigned sysfs_links:1; |
631 | unsigned loopback_enabled:1; | |
5eee3bb7 | 632 | unsigned downshifted_rate:1; |
b834489b | 633 | unsigned is_on_sfp_module:1; |
fba863b8 | 634 | unsigned mac_managed_pm:1; |
87e5808d HK |
635 | |
636 | unsigned autoneg:1; | |
637 | /* The most recently read link state */ | |
638 | unsigned link:1; | |
4950c2ba | 639 | unsigned autoneg_complete:1; |
ac28b9f8 | 640 | |
695bce8f HK |
641 | /* Interrupts are enabled */ |
642 | unsigned interrupts:1; | |
1758bde2 LW |
643 | unsigned irq_suspended:1; |
644 | unsigned irq_rerun:1; | |
695bce8f | 645 | |
0c3e10cb SA |
646 | int rate_matching; |
647 | ||
00db8189 AF |
648 | enum phy_state state; |
649 | ||
650 | u32 dev_flags; | |
651 | ||
e8a2b6a4 AF |
652 | phy_interface_t interface; |
653 | ||
c5e38a94 AF |
654 | /* |
655 | * forced speed & duplex (no autoneg) | |
00db8189 AF |
656 | * partner speed & duplex & pause (autoneg) |
657 | */ | |
658 | int speed; | |
659 | int duplex; | |
4217a64e | 660 | int port; |
00db8189 AF |
661 | int pause; |
662 | int asym_pause; | |
bdbdac76 OR |
663 | u8 master_slave_get; |
664 | u8 master_slave_set; | |
665 | u8 master_slave_state; | |
00db8189 | 666 | |
3c1bcc86 AL |
667 | /* Union of PHY and Attached devices' supported link modes */ |
668 | /* See ethtool.h for more info */ | |
669 | __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); | |
670 | __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); | |
c0ec3c27 | 671 | __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); |
65b27995 HK |
672 | /* used with phy_speed_down */ |
673 | __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); | |
00db8189 | 674 | |
eca68a3c MB |
675 | /* Host supported PHY interface types. Should be ignored if empty. */ |
676 | DECLARE_PHY_INTERFACE_MASK(host_interfaces); | |
677 | ||
d853d145 | 678 | /* Energy efficient ethernet modes which should be prohibited */ |
679 | u32 eee_broken_modes; | |
680 | ||
2e0bc452 ZB |
681 | #ifdef CONFIG_LED_TRIGGER_PHY |
682 | struct phy_led_trigger *phy_led_triggers; | |
683 | unsigned int phy_num_led_triggers; | |
684 | struct phy_led_trigger *last_triggered; | |
3928ee64 MS |
685 | |
686 | struct phy_led_trigger *led_link_trigger; | |
2e0bc452 ZB |
687 | #endif |
688 | ||
c5e38a94 AF |
689 | /* |
690 | * Interrupt number for this PHY | |
691 | * -1 means no interrupt | |
692 | */ | |
00db8189 AF |
693 | int irq; |
694 | ||
695 | /* private data pointer */ | |
696 | /* For use by PHYs to maintain extra state */ | |
697 | void *priv; | |
698 | ||
63490847 MW |
699 | /* shared data pointer */ |
700 | /* For use by PHYs inside the same package that need a shared state. */ | |
701 | struct phy_package_shared *shared; | |
702 | ||
1dd3f212 AL |
703 | /* Reporting cable test results */ |
704 | struct sk_buff *skb; | |
705 | void *ehdr; | |
706 | struct nlattr *nest; | |
707 | ||
00db8189 | 708 | /* Interrupt and Polling infrastructure */ |
a390d1f3 | 709 | struct delayed_work state_queue; |
00db8189 | 710 | |
35b5f6b1 | 711 | struct mutex lock; |
00db8189 | 712 | |
298e54fa RK |
713 | /* This may be modified under the rtnl lock */ |
714 | bool sfp_bus_attached; | |
715 | struct sfp_bus *sfp_bus; | |
9525ae83 | 716 | struct phylink *phylink; |
00db8189 | 717 | struct net_device *attached_dev; |
4715f65f | 718 | struct mii_timestamper *mii_ts; |
5e82147d | 719 | struct pse_control *psec; |
00db8189 | 720 | |
634ec36c | 721 | u8 mdix; |
f4ed2fe3 | 722 | u8 mdix_ctrl; |
634ec36c | 723 | |
3da8ffd8 AT |
724 | int pma_extable; |
725 | ||
a307593a | 726 | void (*phy_link_change)(struct phy_device *phydev, bool up); |
00db8189 | 727 | void (*adjust_link)(struct net_device *dev); |
2e181358 AT |
728 | |
729 | #if IS_ENABLED(CONFIG_MACSEC) | |
730 | /* MACsec management functions */ | |
731 | const struct macsec_ops *macsec_ops; | |
732 | #endif | |
00db8189 | 733 | }; |
7eab14de AL |
734 | |
735 | static inline struct phy_device *to_phy_device(const struct device *dev) | |
736 | { | |
737 | return container_of(to_mdio_device(dev), struct phy_device, mdio); | |
738 | } | |
00db8189 | 739 | |
4069a572 AL |
740 | /** |
741 | * struct phy_tdr_config - Configuration of a TDR raw test | |
742 | * | |
743 | * @first: Distance for first data collection point | |
744 | * @last: Distance for last data collection point | |
745 | * @step: Step between data collection points | |
746 | * @pair: Bitmap of cable pairs to collect data for | |
747 | * | |
748 | * A structure containing possible configuration parameters | |
f2bc8ad3 AL |
749 | * for a TDR cable test. The driver does not need to implement |
750 | * all the parameters, but should report what is actually used. | |
4069a572 | 751 | * All distances are in centimeters. |
f2bc8ad3 AL |
752 | */ |
753 | struct phy_tdr_config { | |
754 | u32 first; | |
755 | u32 last; | |
756 | u32 step; | |
757 | s8 pair; | |
758 | }; | |
759 | #define PHY_PAIR_ALL -1 | |
760 | ||
4069a572 AL |
761 | /** |
762 | * struct phy_driver - Driver structure for a particular PHY type | |
00db8189 | 763 | * |
4069a572 AL |
764 | * @mdiodrv: Data common to all MDIO devices |
765 | * @phy_id: The result of reading the UID registers of this PHY | |
00db8189 AF |
766 | * type, and ANDing them with the phy_id_mask. This driver |
767 | * only works for PHYs with IDs which match this field | |
4069a572 AL |
768 | * @name: The friendly name of this PHY type |
769 | * @phy_id_mask: Defines the important bits of the phy_id | |
770 | * @features: A mandatory list of features (speed, duplex, etc) | |
3e64cf7a | 771 | * supported by this PHY |
4069a572 | 772 | * @flags: A bitfield defining certain other features this PHY |
00db8189 | 773 | * supports (like interrupts) |
4069a572 | 774 | * @driver_data: Static driver data |
00db8189 | 775 | * |
00fde795 HK |
776 | * All functions are optional. If config_aneg or read_status |
777 | * are not implemented, the phy core uses the genphy versions. | |
778 | * Note that none of these functions should be called from | |
779 | * interrupt time. The goal is for the bus read/write functions | |
780 | * to be able to block when the bus transaction is happening, | |
781 | * and be freed up by an interrupt (The MPC85xx has this ability, | |
782 | * though it is not currently supported in the driver). | |
00db8189 AF |
783 | */ |
784 | struct phy_driver { | |
a9049e0c | 785 | struct mdio_driver_common mdiodrv; |
00db8189 AF |
786 | u32 phy_id; |
787 | char *name; | |
511e3036 | 788 | u32 phy_id_mask; |
719655a1 | 789 | const unsigned long * const features; |
00db8189 | 790 | u32 flags; |
860f6e9e | 791 | const void *driver_data; |
00db8189 | 792 | |
4069a572 AL |
793 | /** |
794 | * @soft_reset: Called to issue a PHY software reset | |
9df81dd7 FF |
795 | */ |
796 | int (*soft_reset)(struct phy_device *phydev); | |
797 | ||
4069a572 AL |
798 | /** |
799 | * @config_init: Called to initialize the PHY, | |
c5e38a94 AF |
800 | * including after a reset |
801 | */ | |
00db8189 AF |
802 | int (*config_init)(struct phy_device *phydev); |
803 | ||
4069a572 AL |
804 | /** |
805 | * @probe: Called during discovery. Used to set | |
c5e38a94 AF |
806 | * up device-specific structures, if any |
807 | */ | |
00db8189 AF |
808 | int (*probe)(struct phy_device *phydev); |
809 | ||
4069a572 AL |
810 | /** |
811 | * @get_features: Probe the hardware to determine what | |
812 | * abilities it has. Should only set phydev->supported. | |
efbdfdc2 AL |
813 | */ |
814 | int (*get_features)(struct phy_device *phydev); | |
815 | ||
0c3e10cb SA |
816 | /** |
817 | * @get_rate_matching: Get the supported type of rate matching for a | |
818 | * particular phy interface. This is used by phy consumers to determine | |
819 | * whether to advertise lower-speed modes for that interface. It is | |
820 | * assumed that if a rate matching mode is supported on an interface, | |
821 | * then that interface's rate can be adapted to all slower link speeds | |
822 | * supported by the phy. If iface is %PHY_INTERFACE_MODE_NA, and the phy | |
823 | * supports any kind of rate matching for any interface, then it must | |
824 | * return that rate matching mode (preferring %RATE_MATCH_PAUSE to | |
825 | * %RATE_MATCH_CRS). If the interface is not supported, this should | |
826 | * return %RATE_MATCH_NONE. | |
827 | */ | |
828 | int (*get_rate_matching)(struct phy_device *phydev, | |
829 | phy_interface_t iface); | |
830 | ||
00db8189 | 831 | /* PHY Power Management */ |
4069a572 | 832 | /** @suspend: Suspend the hardware, saving state if needed */ |
00db8189 | 833 | int (*suspend)(struct phy_device *phydev); |
4069a572 | 834 | /** @resume: Resume the hardware, restoring state if needed */ |
00db8189 AF |
835 | int (*resume)(struct phy_device *phydev); |
836 | ||
4069a572 AL |
837 | /** |
838 | * @config_aneg: Configures the advertisement and resets | |
00db8189 AF |
839 | * autonegotiation if phydev->autoneg is on, |
840 | * forces the speed to the current settings in phydev | |
c5e38a94 AF |
841 | * if phydev->autoneg is off |
842 | */ | |
00db8189 AF |
843 | int (*config_aneg)(struct phy_device *phydev); |
844 | ||
4069a572 | 845 | /** @aneg_done: Determines the auto negotiation result */ |
76a423a3 FF |
846 | int (*aneg_done)(struct phy_device *phydev); |
847 | ||
4069a572 | 848 | /** @read_status: Determines the negotiated speed and duplex */ |
00db8189 AF |
849 | int (*read_status)(struct phy_device *phydev); |
850 | ||
767143a1 JK |
851 | /** |
852 | * @config_intr: Enables or disables interrupts. | |
6527b938 IC |
853 | * It should also clear any pending interrupts prior to enabling the |
854 | * IRQs and after disabling them. | |
a8729eb3 | 855 | */ |
6527b938 | 856 | int (*config_intr)(struct phy_device *phydev); |
a8729eb3 | 857 | |
4069a572 | 858 | /** @handle_interrupt: Override default interrupt handling */ |
9010f9de | 859 | irqreturn_t (*handle_interrupt)(struct phy_device *phydev); |
49644e68 | 860 | |
4069a572 | 861 | /** @remove: Clears up any memory if needed */ |
00db8189 AF |
862 | void (*remove)(struct phy_device *phydev); |
863 | ||
4069a572 AL |
864 | /** |
865 | * @match_phy_device: Returns true if this is a suitable | |
866 | * driver for the given phydev. If NULL, matching is based on | |
867 | * phy_id and phy_id_mask. | |
a30e2c18 DD |
868 | */ |
869 | int (*match_phy_device)(struct phy_device *phydev); | |
870 | ||
4069a572 AL |
871 | /** |
872 | * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY | |
873 | * register changes to enable Wake on LAN, so set_wol is | |
874 | * provided to be called in the ethernet driver's set_wol | |
875 | * function. | |
876 | */ | |
42e836eb MS |
877 | int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); |
878 | ||
4069a572 AL |
879 | /** |
880 | * @get_wol: See set_wol, but for checking whether Wake on LAN | |
881 | * is enabled. | |
882 | */ | |
42e836eb MS |
883 | void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); |
884 | ||
4069a572 AL |
885 | /** |
886 | * @link_change_notify: Called to inform a PHY device driver | |
887 | * when the core is about to change the link state. This | |
888 | * callback is supposed to be used as fixup hook for drivers | |
889 | * that need to take action when the link state | |
890 | * changes. Drivers are by no means allowed to mess with the | |
2b8f2a28 DM |
891 | * PHY device structure in their implementations. |
892 | */ | |
893 | void (*link_change_notify)(struct phy_device *dev); | |
894 | ||
4069a572 AL |
895 | /** |
896 | * @read_mmd: PHY specific driver override for reading a MMD | |
897 | * register. This function is optional for PHY specific | |
898 | * drivers. When not provided, the default MMD read function | |
899 | * will be used by phy_read_mmd(), which will use either a | |
900 | * direct read for Clause 45 PHYs or an indirect read for | |
901 | * Clause 22 PHYs. devnum is the MMD device number within the | |
902 | * PHY device, regnum is the register within the selected MMD | |
903 | * device. | |
1ee6b9bc RK |
904 | */ |
905 | int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); | |
906 | ||
4069a572 AL |
907 | /** |
908 | * @write_mmd: PHY specific driver override for writing a MMD | |
909 | * register. This function is optional for PHY specific | |
910 | * drivers. When not provided, the default MMD write function | |
911 | * will be used by phy_write_mmd(), which will use either a | |
912 | * direct write for Clause 45 PHYs, or an indirect write for | |
913 | * Clause 22 PHYs. devnum is the MMD device number within the | |
914 | * PHY device, regnum is the register within the selected MMD | |
915 | * device. val is the value to be written. | |
1ee6b9bc RK |
916 | */ |
917 | int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, | |
918 | u16 val); | |
919 | ||
4069a572 | 920 | /** @read_page: Return the current PHY register page number */ |
78ffc4ac | 921 | int (*read_page)(struct phy_device *dev); |
4069a572 | 922 | /** @write_page: Set the current PHY register page number */ |
78ffc4ac RK |
923 | int (*write_page)(struct phy_device *dev, int page); |
924 | ||
4069a572 AL |
925 | /** |
926 | * @module_info: Get the size and type of the eeprom contained | |
927 | * within a plug-in module | |
928 | */ | |
2f438366 ES |
929 | int (*module_info)(struct phy_device *dev, |
930 | struct ethtool_modinfo *modinfo); | |
931 | ||
4069a572 AL |
932 | /** |
933 | * @module_eeprom: Get the eeprom information from the plug-in | |
934 | * module | |
935 | */ | |
2f438366 ES |
936 | int (*module_eeprom)(struct phy_device *dev, |
937 | struct ethtool_eeprom *ee, u8 *data); | |
938 | ||
4069a572 | 939 | /** @cable_test_start: Start a cable test */ |
a68a8138 | 940 | int (*cable_test_start)(struct phy_device *dev); |
1a644de2 | 941 | |
4069a572 | 942 | /** @cable_test_tdr_start: Start a raw TDR cable test */ |
f2bc8ad3 AL |
943 | int (*cable_test_tdr_start)(struct phy_device *dev, |
944 | const struct phy_tdr_config *config); | |
1a644de2 | 945 | |
4069a572 AL |
946 | /** |
947 | * @cable_test_get_status: Once per second, or on interrupt, | |
948 | * request the status of the test. | |
a68a8138 AL |
949 | */ |
950 | int (*cable_test_get_status)(struct phy_device *dev, bool *finished); | |
951 | ||
4069a572 AL |
952 | /* Get statistics from the PHY using ethtool */ |
953 | /** @get_sset_count: Number of statistic counters */ | |
f3a40945 | 954 | int (*get_sset_count)(struct phy_device *dev); |
4069a572 | 955 | /** @get_strings: Names of the statistic counters */ |
f3a40945 | 956 | void (*get_strings)(struct phy_device *dev, u8 *data); |
4069a572 | 957 | /** @get_stats: Return the statistic counter values */ |
f3a40945 AL |
958 | void (*get_stats)(struct phy_device *dev, |
959 | struct ethtool_stats *stats, u64 *data); | |
968ad9da RL |
960 | |
961 | /* Get and Set PHY tunables */ | |
4069a572 | 962 | /** @get_tunable: Return the value of a tunable */ |
968ad9da RL |
963 | int (*get_tunable)(struct phy_device *dev, |
964 | struct ethtool_tunable *tuna, void *data); | |
4069a572 | 965 | /** @set_tunable: Set the value of a tunable */ |
968ad9da RL |
966 | int (*set_tunable)(struct phy_device *dev, |
967 | struct ethtool_tunable *tuna, | |
968 | const void *data); | |
4069a572 | 969 | /** @set_loopback: Set the loopback mood of the PHY */ |
f0f9b4ed | 970 | int (*set_loopback)(struct phy_device *dev, bool enable); |
4069a572 | 971 | /** @get_sqi: Get the signal quality indication */ |
80660219 | 972 | int (*get_sqi)(struct phy_device *dev); |
4069a572 | 973 | /** @get_sqi_max: Get the maximum signal quality indication */ |
80660219 | 974 | int (*get_sqi_max)(struct phy_device *dev); |
00db8189 | 975 | }; |
a9049e0c AL |
976 | #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ |
977 | struct phy_driver, mdiodrv) | |
00db8189 | 978 | |
f62220d3 AF |
979 | #define PHY_ANY_ID "MATCH ANY PHY" |
980 | #define PHY_ANY_UID 0xffffffff | |
981 | ||
aa2af2eb HK |
982 | #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) |
983 | #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) | |
984 | #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) | |
985 | ||
f62220d3 AF |
986 | /* A Structure for boards to register fixups with the PHY Lib */ |
987 | struct phy_fixup { | |
988 | struct list_head list; | |
4567d686 | 989 | char bus_id[MII_BUS_ID_SIZE + 3]; |
f62220d3 AF |
990 | u32 phy_uid; |
991 | u32 phy_uid_mask; | |
992 | int (*run)(struct phy_device *phydev); | |
993 | }; | |
994 | ||
da4625ac RK |
995 | const char *phy_speed_to_str(int speed); |
996 | const char *phy_duplex_to_str(unsigned int duplex); | |
0c3e10cb | 997 | const char *phy_rate_matching_to_str(int rate_matching); |
da4625ac | 998 | |
c04ade27 MC |
999 | int phy_interface_num_ports(phy_interface_t interface); |
1000 | ||
0ccb4fc6 RK |
1001 | /* A structure for mapping a particular speed and duplex |
1002 | * combination to a particular SUPPORTED and ADVERTISED value | |
1003 | */ | |
1004 | struct phy_setting { | |
1005 | u32 speed; | |
1006 | u8 duplex; | |
1007 | u8 bit; | |
1008 | }; | |
1009 | ||
1010 | const struct phy_setting * | |
1011 | phy_lookup_setting(int speed, int duplex, const unsigned long *mask, | |
3c1bcc86 | 1012 | bool exact); |
0ccb4fc6 | 1013 | size_t phy_speeds(unsigned int *speeds, size_t size, |
3c1bcc86 | 1014 | unsigned long *mask); |
a4eaed9f | 1015 | void of_set_phy_supported(struct phy_device *phydev); |
3feb9b23 | 1016 | void of_set_phy_eee_broken(struct phy_device *phydev); |
331c56ac | 1017 | int phy_speed_down_core(struct phy_device *phydev); |
0ccb4fc6 | 1018 | |
2b3e88ea HK |
1019 | /** |
1020 | * phy_is_started - Convenience function to check whether PHY is started | |
1021 | * @phydev: The phy_device struct | |
1022 | */ | |
1023 | static inline bool phy_is_started(struct phy_device *phydev) | |
1024 | { | |
a2fc9d7e | 1025 | return phydev->state >= PHY_UP; |
2b3e88ea HK |
1026 | } |
1027 | ||
2d880b87 | 1028 | void phy_resolve_aneg_pause(struct phy_device *phydev); |
8c5e850c | 1029 | void phy_resolve_aneg_linkmode(struct phy_device *phydev); |
5eee3bb7 | 1030 | void phy_check_downshift(struct phy_device *phydev); |
8c5e850c | 1031 | |
2e888103 LB |
1032 | /** |
1033 | * phy_read - Convenience function for reading a given PHY register | |
1034 | * @phydev: the phy_device struct | |
1035 | * @regnum: register number to read | |
1036 | * | |
1037 | * NOTE: MUST NOT be called from interrupt context, | |
1038 | * because the bus read/write functions may wait for an interrupt | |
1039 | * to conclude the operation. | |
1040 | */ | |
abf35df2 | 1041 | static inline int phy_read(struct phy_device *phydev, u32 regnum) |
2e888103 | 1042 | { |
e5a03bfd | 1043 | return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); |
2e888103 LB |
1044 | } |
1045 | ||
fcbd30d0 DZ |
1046 | #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ |
1047 | timeout_us, sleep_before_read) \ | |
1048 | ({ \ | |
1049 | int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \ | |
1050 | sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ | |
1051 | if (val < 0) \ | |
1052 | __ret = val; \ | |
1053 | if (__ret) \ | |
1054 | phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ | |
1055 | __ret; \ | |
1056 | }) | |
1057 | ||
1058 | ||
788f9933 RK |
1059 | /** |
1060 | * __phy_read - convenience function for reading a given PHY register | |
1061 | * @phydev: the phy_device struct | |
1062 | * @regnum: register number to read | |
1063 | * | |
1064 | * The caller must have taken the MDIO bus lock. | |
1065 | */ | |
1066 | static inline int __phy_read(struct phy_device *phydev, u32 regnum) | |
1067 | { | |
1068 | return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); | |
1069 | } | |
1070 | ||
2e888103 LB |
1071 | /** |
1072 | * phy_write - Convenience function for writing a given PHY register | |
1073 | * @phydev: the phy_device struct | |
1074 | * @regnum: register number to write | |
1075 | * @val: value to write to @regnum | |
1076 | * | |
1077 | * NOTE: MUST NOT be called from interrupt context, | |
1078 | * because the bus read/write functions may wait for an interrupt | |
1079 | * to conclude the operation. | |
1080 | */ | |
abf35df2 | 1081 | static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) |
2e888103 | 1082 | { |
e5a03bfd | 1083 | return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); |
2e888103 LB |
1084 | } |
1085 | ||
788f9933 RK |
1086 | /** |
1087 | * __phy_write - Convenience function for writing a given PHY register | |
1088 | * @phydev: the phy_device struct | |
1089 | * @regnum: register number to write | |
1090 | * @val: value to write to @regnum | |
1091 | * | |
1092 | * The caller must have taken the MDIO bus lock. | |
1093 | */ | |
1094 | static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) | |
1095 | { | |
1096 | return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, | |
1097 | val); | |
1098 | } | |
1099 | ||
6cc7cf81 RK |
1100 | /** |
1101 | * __phy_modify_changed() - Convenience function for modifying a PHY register | |
1102 | * @phydev: a pointer to a &struct phy_device | |
1103 | * @regnum: register number | |
1104 | * @mask: bit mask of bits to clear | |
1105 | * @set: bit mask of bits to set | |
1106 | * | |
1107 | * Unlocked helper function which allows a PHY register to be modified as | |
1108 | * new register value = (old register value & ~mask) | set | |
1109 | * | |
1110 | * Returns negative errno, 0 if there was no change, and 1 in case of change | |
1111 | */ | |
1112 | static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, | |
1113 | u16 mask, u16 set) | |
1114 | { | |
1115 | return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, | |
1116 | regnum, mask, set); | |
1117 | } | |
1118 | ||
e86c6569 | 1119 | /* |
1878f0dc NY |
1120 | * phy_read_mmd - Convenience function for reading a register |
1121 | * from an MMD on a given PHY. | |
1878f0dc NY |
1122 | */ |
1123 | int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); | |
1124 | ||
4069a572 AL |
1125 | /** |
1126 | * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a | |
1127 | * condition is met or a timeout occurs | |
1128 | * | |
1129 | * @phydev: The phy_device struct | |
1130 | * @devaddr: The MMD to read from | |
1131 | * @regnum: The register on the MMD to read | |
1132 | * @val: Variable to read the register into | |
1133 | * @cond: Break condition (usually involving @val) | |
1134 | * @sleep_us: Maximum time to sleep between reads in us (0 | |
1135 | * tight-loops). Should be less than ~20ms since usleep_range | |
1136 | * is used (see Documentation/timers/timers-howto.rst). | |
1137 | * @timeout_us: Timeout in us, 0 means never timeout | |
1138 | * @sleep_before_read: if it is true, sleep @sleep_us before read. | |
1139 | * Returns 0 on success and -ETIMEDOUT upon a timeout. In either | |
1140 | * case, the last read value at @args is stored in @val. Must not | |
1141 | * be called from atomic context if sleep_us or timeout_us are used. | |
1142 | */ | |
bd971ff0 DZ |
1143 | #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ |
1144 | sleep_us, timeout_us, sleep_before_read) \ | |
1145 | ({ \ | |
1146 | int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \ | |
1147 | sleep_us, timeout_us, sleep_before_read, \ | |
1148 | phydev, devaddr, regnum); \ | |
1149 | if (val < 0) \ | |
1150 | __ret = val; \ | |
1151 | if (__ret) \ | |
1152 | phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ | |
1153 | __ret; \ | |
1154 | }) | |
1155 | ||
e86c6569 | 1156 | /* |
1878f0dc NY |
1157 | * __phy_read_mmd - Convenience function for reading a register |
1158 | * from an MMD on a given PHY. | |
1878f0dc NY |
1159 | */ |
1160 | int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); | |
1161 | ||
e86c6569 | 1162 | /* |
1878f0dc NY |
1163 | * phy_write_mmd - Convenience function for writing a register |
1164 | * on an MMD on a given PHY. | |
1878f0dc NY |
1165 | */ |
1166 | int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); | |
1167 | ||
e86c6569 | 1168 | /* |
1878f0dc NY |
1169 | * __phy_write_mmd - Convenience function for writing a register |
1170 | * on an MMD on a given PHY. | |
1878f0dc NY |
1171 | */ |
1172 | int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); | |
1173 | ||
b8554d4f HK |
1174 | int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, |
1175 | u16 set); | |
1176 | int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, | |
1177 | u16 set); | |
788f9933 | 1178 | int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); |
2b74e5be | 1179 | int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); |
788f9933 | 1180 | |
b8554d4f HK |
1181 | int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, |
1182 | u16 mask, u16 set); | |
1183 | int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, | |
1184 | u16 mask, u16 set); | |
1878f0dc | 1185 | int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, |
b8554d4f | 1186 | u16 mask, u16 set); |
1878f0dc | 1187 | int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, |
b8554d4f | 1188 | u16 mask, u16 set); |
1878f0dc | 1189 | |
ac8322d8 HK |
1190 | /** |
1191 | * __phy_set_bits - Convenience function for setting bits in a PHY register | |
1192 | * @phydev: the phy_device struct | |
1193 | * @regnum: register number to write | |
1194 | * @val: bits to set | |
1195 | * | |
1196 | * The caller must have taken the MDIO bus lock. | |
1197 | */ | |
1198 | static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) | |
1199 | { | |
1200 | return __phy_modify(phydev, regnum, 0, val); | |
1201 | } | |
1202 | ||
1203 | /** | |
1204 | * __phy_clear_bits - Convenience function for clearing bits in a PHY register | |
1205 | * @phydev: the phy_device struct | |
1206 | * @regnum: register number to write | |
1207 | * @val: bits to clear | |
1208 | * | |
1209 | * The caller must have taken the MDIO bus lock. | |
1210 | */ | |
1211 | static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, | |
1212 | u16 val) | |
1213 | { | |
1214 | return __phy_modify(phydev, regnum, val, 0); | |
1215 | } | |
1216 | ||
1217 | /** | |
1218 | * phy_set_bits - Convenience function for setting bits in a PHY register | |
1219 | * @phydev: the phy_device struct | |
1220 | * @regnum: register number to write | |
1221 | * @val: bits to set | |
1222 | */ | |
1223 | static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) | |
1224 | { | |
1225 | return phy_modify(phydev, regnum, 0, val); | |
1226 | } | |
1227 | ||
1228 | /** | |
1229 | * phy_clear_bits - Convenience function for clearing bits in a PHY register | |
1230 | * @phydev: the phy_device struct | |
1231 | * @regnum: register number to write | |
1232 | * @val: bits to clear | |
1233 | */ | |
1234 | static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) | |
1235 | { | |
1236 | return phy_modify(phydev, regnum, val, 0); | |
1237 | } | |
1238 | ||
1878f0dc NY |
1239 | /** |
1240 | * __phy_set_bits_mmd - Convenience function for setting bits in a register | |
1241 | * on MMD | |
1242 | * @phydev: the phy_device struct | |
1243 | * @devad: the MMD containing register to modify | |
1244 | * @regnum: register number to modify | |
1245 | * @val: bits to set | |
1246 | * | |
1247 | * The caller must have taken the MDIO bus lock. | |
1248 | */ | |
1249 | static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, | |
1250 | u32 regnum, u16 val) | |
1251 | { | |
1252 | return __phy_modify_mmd(phydev, devad, regnum, 0, val); | |
1253 | } | |
1254 | ||
1255 | /** | |
1256 | * __phy_clear_bits_mmd - Convenience function for clearing bits in a register | |
1257 | * on MMD | |
1258 | * @phydev: the phy_device struct | |
1259 | * @devad: the MMD containing register to modify | |
1260 | * @regnum: register number to modify | |
1261 | * @val: bits to clear | |
1262 | * | |
1263 | * The caller must have taken the MDIO bus lock. | |
1264 | */ | |
1265 | static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, | |
1266 | u32 regnum, u16 val) | |
1267 | { | |
1268 | return __phy_modify_mmd(phydev, devad, regnum, val, 0); | |
1269 | } | |
1270 | ||
1271 | /** | |
1272 | * phy_set_bits_mmd - Convenience function for setting bits in a register | |
1273 | * on MMD | |
1274 | * @phydev: the phy_device struct | |
1275 | * @devad: the MMD containing register to modify | |
1276 | * @regnum: register number to modify | |
1277 | * @val: bits to set | |
1278 | */ | |
1279 | static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, | |
1280 | u32 regnum, u16 val) | |
1281 | { | |
1282 | return phy_modify_mmd(phydev, devad, regnum, 0, val); | |
1283 | } | |
1284 | ||
1285 | /** | |
1286 | * phy_clear_bits_mmd - Convenience function for clearing bits in a register | |
1287 | * on MMD | |
1288 | * @phydev: the phy_device struct | |
1289 | * @devad: the MMD containing register to modify | |
1290 | * @regnum: register number to modify | |
1291 | * @val: bits to clear | |
1292 | */ | |
1293 | static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, | |
1294 | u32 regnum, u16 val) | |
1295 | { | |
1296 | return phy_modify_mmd(phydev, devad, regnum, val, 0); | |
1297 | } | |
1298 | ||
2c7b4921 FF |
1299 | /** |
1300 | * phy_interrupt_is_valid - Convenience function for testing a given PHY irq | |
1301 | * @phydev: the phy_device struct | |
1302 | * | |
1303 | * NOTE: must be kept in sync with addition/removal of PHY_POLL and | |
93e8990c | 1304 | * PHY_MAC_INTERRUPT |
2c7b4921 FF |
1305 | */ |
1306 | static inline bool phy_interrupt_is_valid(struct phy_device *phydev) | |
1307 | { | |
93e8990c | 1308 | return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; |
2c7b4921 FF |
1309 | } |
1310 | ||
3c507b8a HK |
1311 | /** |
1312 | * phy_polling_mode - Convenience function for testing whether polling is | |
1313 | * used to detect PHY status changes | |
1314 | * @phydev: the phy_device struct | |
1315 | */ | |
1316 | static inline bool phy_polling_mode(struct phy_device *phydev) | |
1317 | { | |
97c22438 AL |
1318 | if (phydev->state == PHY_CABLETEST) |
1319 | if (phydev->drv->flags & PHY_POLL_CABLE_TEST) | |
1320 | return true; | |
1321 | ||
3c507b8a HK |
1322 | return phydev->irq == PHY_POLL; |
1323 | } | |
1324 | ||
0e5dafc8 RC |
1325 | /** |
1326 | * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. | |
1327 | * @phydev: the phy_device struct | |
1328 | */ | |
1329 | static inline bool phy_has_hwtstamp(struct phy_device *phydev) | |
1330 | { | |
4715f65f | 1331 | return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; |
0e5dafc8 RC |
1332 | } |
1333 | ||
1334 | /** | |
1335 | * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. | |
1336 | * @phydev: the phy_device struct | |
1337 | */ | |
1338 | static inline bool phy_has_rxtstamp(struct phy_device *phydev) | |
1339 | { | |
4715f65f | 1340 | return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; |
0e5dafc8 RC |
1341 | } |
1342 | ||
1343 | /** | |
1344 | * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or | |
1345 | * PTP hardware clock capabilities. | |
1346 | * @phydev: the phy_device struct | |
1347 | */ | |
1348 | static inline bool phy_has_tsinfo(struct phy_device *phydev) | |
1349 | { | |
4715f65f | 1350 | return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; |
0e5dafc8 RC |
1351 | } |
1352 | ||
1353 | /** | |
1354 | * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. | |
1355 | * @phydev: the phy_device struct | |
1356 | */ | |
1357 | static inline bool phy_has_txtstamp(struct phy_device *phydev) | |
1358 | { | |
4715f65f | 1359 | return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; |
0e5dafc8 RC |
1360 | } |
1361 | ||
1362 | static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr) | |
1363 | { | |
4715f65f | 1364 | return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr); |
0e5dafc8 RC |
1365 | } |
1366 | ||
1367 | static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, | |
1368 | int type) | |
1369 | { | |
4715f65f | 1370 | return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); |
0e5dafc8 RC |
1371 | } |
1372 | ||
1373 | static inline int phy_ts_info(struct phy_device *phydev, | |
1374 | struct ethtool_ts_info *tsinfo) | |
1375 | { | |
4715f65f | 1376 | return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); |
0e5dafc8 RC |
1377 | } |
1378 | ||
1379 | static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, | |
1380 | int type) | |
1381 | { | |
4715f65f | 1382 | phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); |
0e5dafc8 RC |
1383 | } |
1384 | ||
4284b6a5 FF |
1385 | /** |
1386 | * phy_is_internal - Convenience function for testing if a PHY is internal | |
1387 | * @phydev: the phy_device struct | |
1388 | */ | |
1389 | static inline bool phy_is_internal(struct phy_device *phydev) | |
1390 | { | |
1391 | return phydev->is_internal; | |
1392 | } | |
1393 | ||
b834489b RH |
1394 | /** |
1395 | * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module | |
1396 | * @phydev: the phy_device struct | |
1397 | */ | |
1398 | static inline bool phy_on_sfp(struct phy_device *phydev) | |
1399 | { | |
1400 | return phydev->is_on_sfp_module; | |
1401 | } | |
1402 | ||
32d0f783 IS |
1403 | /** |
1404 | * phy_interface_mode_is_rgmii - Convenience function for testing if a | |
1405 | * PHY interface mode is RGMII (all variants) | |
4069a572 | 1406 | * @mode: the &phy_interface_t enum |
32d0f783 IS |
1407 | */ |
1408 | static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) | |
1409 | { | |
1410 | return mode >= PHY_INTERFACE_MODE_RGMII && | |
1411 | mode <= PHY_INTERFACE_MODE_RGMII_TXID; | |
1412 | }; | |
1413 | ||
365c1e64 | 1414 | /** |
4069a572 | 1415 | * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z |
365c1e64 RK |
1416 | * negotiation |
1417 | * @mode: one of &enum phy_interface_t | |
1418 | * | |
4069a572 | 1419 | * Returns true if the PHY interface mode uses the 16-bit negotiation |
365c1e64 RK |
1420 | * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) |
1421 | */ | |
1422 | static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) | |
1423 | { | |
1424 | return mode == PHY_INTERFACE_MODE_1000BASEX || | |
1425 | mode == PHY_INTERFACE_MODE_2500BASEX; | |
1426 | } | |
1427 | ||
e463d88c FF |
1428 | /** |
1429 | * phy_interface_is_rgmii - Convenience function for testing if a PHY interface | |
1430 | * is RGMII (all variants) | |
1431 | * @phydev: the phy_device struct | |
1432 | */ | |
1433 | static inline bool phy_interface_is_rgmii(struct phy_device *phydev) | |
1434 | { | |
32d0f783 | 1435 | return phy_interface_mode_is_rgmii(phydev->interface); |
5a11dd7d FF |
1436 | }; |
1437 | ||
4069a572 | 1438 | /** |
5a11dd7d FF |
1439 | * phy_is_pseudo_fixed_link - Convenience function for testing if this |
1440 | * PHY is the CPU port facing side of an Ethernet switch, or similar. | |
1441 | * @phydev: the phy_device struct | |
1442 | */ | |
1443 | static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) | |
1444 | { | |
1445 | return phydev->is_pseudo_fixed_link; | |
e463d88c FF |
1446 | } |
1447 | ||
78ffc4ac RK |
1448 | int phy_save_page(struct phy_device *phydev); |
1449 | int phy_select_page(struct phy_device *phydev, int page); | |
1450 | int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); | |
1451 | int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); | |
1452 | int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); | |
bf22b343 HK |
1453 | int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, |
1454 | u16 mask, u16 set); | |
78ffc4ac RK |
1455 | int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, |
1456 | u16 mask, u16 set); | |
1457 | ||
7d49a32a | 1458 | struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, |
4017b4d3 SS |
1459 | bool is_c45, |
1460 | struct phy_c45_device_ids *c45_ids); | |
90eff909 | 1461 | #if IS_ENABLED(CONFIG_PHYLIB) |
114dea60 | 1462 | int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); |
0fb16976 | 1463 | struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); |
425775ed CJ |
1464 | struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); |
1465 | struct phy_device *device_phy_find_device(struct device *dev); | |
1466 | struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode); | |
ac28b9f8 | 1467 | struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); |
4dea547f | 1468 | int phy_device_register(struct phy_device *phy); |
90eff909 FF |
1469 | void phy_device_free(struct phy_device *phydev); |
1470 | #else | |
114dea60 CJ |
1471 | static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) |
1472 | { | |
1473 | return 0; | |
1474 | } | |
0fb16976 CJ |
1475 | static inline |
1476 | struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) | |
1477 | { | |
1478 | return 0; | |
1479 | } | |
1480 | ||
425775ed CJ |
1481 | static inline |
1482 | struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) | |
1483 | { | |
1484 | return NULL; | |
1485 | } | |
1486 | ||
1487 | static inline struct phy_device *device_phy_find_device(struct device *dev) | |
1488 | { | |
1489 | return NULL; | |
1490 | } | |
1491 | ||
1492 | static inline | |
1493 | struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) | |
1494 | { | |
1495 | return NULL; | |
1496 | } | |
1497 | ||
90eff909 FF |
1498 | static inline |
1499 | struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) | |
1500 | { | |
1501 | return NULL; | |
1502 | } | |
1503 | ||
1504 | static inline int phy_device_register(struct phy_device *phy) | |
1505 | { | |
1506 | return 0; | |
1507 | } | |
1508 | ||
1509 | static inline void phy_device_free(struct phy_device *phydev) { } | |
1510 | #endif /* CONFIG_PHYLIB */ | |
38737e49 | 1511 | void phy_device_remove(struct phy_device *phydev); |
8b72b301 | 1512 | int phy_get_c45_ids(struct phy_device *phydev); |
2f5cb434 | 1513 | int phy_init_hw(struct phy_device *phydev); |
481b5d93 SH |
1514 | int phy_suspend(struct phy_device *phydev); |
1515 | int phy_resume(struct phy_device *phydev); | |
9c2c2e62 | 1516 | int __phy_resume(struct phy_device *phydev); |
f0f9b4ed | 1517 | int phy_loopback(struct phy_device *phydev, bool enable); |
298e54fa RK |
1518 | void phy_sfp_attach(void *upstream, struct sfp_bus *bus); |
1519 | void phy_sfp_detach(void *upstream, struct sfp_bus *bus); | |
1520 | int phy_sfp_probe(struct phy_device *phydev, | |
1521 | const struct sfp_upstream_ops *ops); | |
4017b4d3 SS |
1522 | struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, |
1523 | phy_interface_t interface); | |
f8f76db1 | 1524 | struct phy_device *phy_find_first(struct mii_bus *bus); |
257184d7 AF |
1525 | int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, |
1526 | u32 flags, phy_interface_t interface); | |
fa94f6d9 | 1527 | int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, |
4017b4d3 SS |
1528 | void (*handler)(struct net_device *), |
1529 | phy_interface_t interface); | |
1530 | struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, | |
1531 | void (*handler)(struct net_device *), | |
1532 | phy_interface_t interface); | |
e1393456 AF |
1533 | void phy_disconnect(struct phy_device *phydev); |
1534 | void phy_detach(struct phy_device *phydev); | |
1535 | void phy_start(struct phy_device *phydev); | |
1536 | void phy_stop(struct phy_device *phydev); | |
014068dc | 1537 | int phy_config_aneg(struct phy_device *phydev); |
e1393456 | 1538 | int phy_start_aneg(struct phy_device *phydev); |
372788f9 | 1539 | int phy_aneg_done(struct phy_device *phydev); |
2b9672dd HK |
1540 | int phy_speed_down(struct phy_device *phydev, bool sync); |
1541 | int phy_speed_up(struct phy_device *phydev); | |
e1393456 | 1542 | |
002ba705 | 1543 | int phy_restart_aneg(struct phy_device *phydev); |
a9668491 | 1544 | int phy_reset_after_clk_enable(struct phy_device *phydev); |
00db8189 | 1545 | |
a68a8138 AL |
1546 | #if IS_ENABLED(CONFIG_PHYLIB) |
1547 | int phy_start_cable_test(struct phy_device *phydev, | |
1548 | struct netlink_ext_ack *extack); | |
1a644de2 | 1549 | int phy_start_cable_test_tdr(struct phy_device *phydev, |
f2bc8ad3 AL |
1550 | struct netlink_ext_ack *extack, |
1551 | const struct phy_tdr_config *config); | |
a68a8138 AL |
1552 | #else |
1553 | static inline | |
1554 | int phy_start_cable_test(struct phy_device *phydev, | |
1555 | struct netlink_ext_ack *extack) | |
1556 | { | |
1557 | NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); | |
1558 | return -EOPNOTSUPP; | |
1559 | } | |
1a644de2 AL |
1560 | static inline |
1561 | int phy_start_cable_test_tdr(struct phy_device *phydev, | |
f2bc8ad3 AL |
1562 | struct netlink_ext_ack *extack, |
1563 | const struct phy_tdr_config *config) | |
1a644de2 AL |
1564 | { |
1565 | NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); | |
1566 | return -EOPNOTSUPP; | |
1567 | } | |
a68a8138 AL |
1568 | #endif |
1569 | ||
1e2dc145 AL |
1570 | int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result); |
1571 | int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair, | |
1572 | u16 cm); | |
1573 | ||
bafbdd52 SS |
1574 | static inline void phy_device_reset(struct phy_device *phydev, int value) |
1575 | { | |
1576 | mdio_device_reset(&phydev->mdio, value); | |
1577 | } | |
1578 | ||
72ba48be | 1579 | #define phydev_err(_phydev, format, args...) \ |
e5a03bfd | 1580 | dev_err(&_phydev->mdio.dev, format, ##args) |
72ba48be | 1581 | |
a7936798 RV |
1582 | #define phydev_err_probe(_phydev, err, format, args...) \ |
1583 | dev_err_probe(&_phydev->mdio.dev, err, format, ##args) | |
1584 | ||
c4fabb8b AL |
1585 | #define phydev_info(_phydev, format, args...) \ |
1586 | dev_info(&_phydev->mdio.dev, format, ##args) | |
1587 | ||
ab2a605f AL |
1588 | #define phydev_warn(_phydev, format, args...) \ |
1589 | dev_warn(&_phydev->mdio.dev, format, ##args) | |
1590 | ||
72ba48be | 1591 | #define phydev_dbg(_phydev, format, args...) \ |
2eaa38d9 | 1592 | dev_dbg(&_phydev->mdio.dev, format, ##args) |
72ba48be | 1593 | |
84eff6d1 AL |
1594 | static inline const char *phydev_name(const struct phy_device *phydev) |
1595 | { | |
e5a03bfd | 1596 | return dev_name(&phydev->mdio.dev); |
84eff6d1 AL |
1597 | } |
1598 | ||
bec170e5 HK |
1599 | static inline void phy_lock_mdio_bus(struct phy_device *phydev) |
1600 | { | |
1601 | mutex_lock(&phydev->mdio.bus->mdio_lock); | |
1602 | } | |
1603 | ||
1604 | static inline void phy_unlock_mdio_bus(struct phy_device *phydev) | |
1605 | { | |
1606 | mutex_unlock(&phydev->mdio.bus->mdio_lock); | |
1607 | } | |
1608 | ||
2220943a AL |
1609 | void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) |
1610 | __printf(2, 3); | |
e27f1787 FF |
1611 | char *phy_attached_info_irq(struct phy_device *phydev) |
1612 | __malloc; | |
2220943a | 1613 | void phy_attached_info(struct phy_device *phydev); |
5acde34a RK |
1614 | |
1615 | /* Clause 22 PHY */ | |
045925e3 | 1616 | int genphy_read_abilities(struct phy_device *phydev); |
3fb69bca | 1617 | int genphy_setup_forced(struct phy_device *phydev); |
00db8189 | 1618 | int genphy_restart_aneg(struct phy_device *phydev); |
2a10ab04 | 1619 | int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); |
cd34499c | 1620 | int genphy_config_eee_advert(struct phy_device *phydev); |
f4069cd7 | 1621 | int __genphy_config_aneg(struct phy_device *phydev, bool changed); |
a9fa6e6a | 1622 | int genphy_aneg_done(struct phy_device *phydev); |
00db8189 | 1623 | int genphy_update_link(struct phy_device *phydev); |
8d3dc3ac | 1624 | int genphy_read_lpa(struct phy_device *phydev); |
0efc286a | 1625 | int genphy_read_status_fixed(struct phy_device *phydev); |
00db8189 | 1626 | int genphy_read_status(struct phy_device *phydev); |
64807c23 | 1627 | int genphy_read_master_slave(struct phy_device *phydev); |
0f0ca340 GC |
1628 | int genphy_suspend(struct phy_device *phydev); |
1629 | int genphy_resume(struct phy_device *phydev); | |
f0f9b4ed | 1630 | int genphy_loopback(struct phy_device *phydev, bool enable); |
797ac071 | 1631 | int genphy_soft_reset(struct phy_device *phydev); |
87de1f05 | 1632 | irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); |
f4069cd7 HK |
1633 | |
1634 | static inline int genphy_config_aneg(struct phy_device *phydev) | |
1635 | { | |
1636 | return __genphy_config_aneg(phydev, false); | |
1637 | } | |
1638 | ||
4c8e0459 LW |
1639 | static inline int genphy_no_config_intr(struct phy_device *phydev) |
1640 | { | |
1641 | return 0; | |
1642 | } | |
5df7af85 KH |
1643 | int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, |
1644 | u16 regnum); | |
1645 | int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, | |
1646 | u16 regnum, u16 val); | |
5acde34a | 1647 | |
fa6e98ce HK |
1648 | /* Clause 37 */ |
1649 | int genphy_c37_config_aneg(struct phy_device *phydev); | |
1650 | int genphy_c37_read_status(struct phy_device *phydev); | |
1651 | ||
5acde34a RK |
1652 | /* Clause 45 PHY */ |
1653 | int genphy_c45_restart_aneg(struct phy_device *phydev); | |
1af9f168 | 1654 | int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); |
5acde34a | 1655 | int genphy_c45_aneg_done(struct phy_device *phydev); |
998a8a83 | 1656 | int genphy_c45_read_link(struct phy_device *phydev); |
5acde34a RK |
1657 | int genphy_c45_read_lpa(struct phy_device *phydev); |
1658 | int genphy_c45_read_pma(struct phy_device *phydev); | |
1659 | int genphy_c45_pma_setup_forced(struct phy_device *phydev); | |
90532850 | 1660 | int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); |
9a5dc8af | 1661 | int genphy_c45_an_config_aneg(struct phy_device *phydev); |
5acde34a | 1662 | int genphy_c45_an_disable_aneg(struct phy_device *phydev); |
ea4efe25 | 1663 | int genphy_c45_read_mdix(struct phy_device *phydev); |
ac3f5533 | 1664 | int genphy_c45_pma_read_abilities(struct phy_device *phydev); |
b9a366f3 | 1665 | int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); |
70fa3a96 | 1666 | int genphy_c45_read_status(struct phy_device *phydev); |
2013ad88 | 1667 | int genphy_c45_baset1_read_status(struct phy_device *phydev); |
94acaeb5 | 1668 | int genphy_c45_config_aneg(struct phy_device *phydev); |
0ef25ed1 | 1669 | int genphy_c45_loopback(struct phy_device *phydev, bool enable); |
da702f34 RPNO |
1670 | int genphy_c45_pma_resume(struct phy_device *phydev); |
1671 | int genphy_c45_pma_suspend(struct phy_device *phydev); | |
63c67f52 | 1672 | int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); |
5acde34a | 1673 | |
3970ed49 AL |
1674 | /* Generic C45 PHY driver */ |
1675 | extern struct phy_driver genphy_c45_driver; | |
1676 | ||
e8a714e0 FF |
1677 | /* The gen10g_* functions are the old Clause 45 stub */ |
1678 | int gen10g_config_aneg(struct phy_device *phydev); | |
e8a714e0 | 1679 | |
00fde795 HK |
1680 | static inline int phy_read_status(struct phy_device *phydev) |
1681 | { | |
1682 | if (!phydev->drv) | |
1683 | return -EIO; | |
1684 | ||
1685 | if (phydev->drv->read_status) | |
1686 | return phydev->drv->read_status(phydev); | |
1687 | else | |
1688 | return genphy_read_status(phydev); | |
1689 | } | |
1690 | ||
00db8189 | 1691 | void phy_driver_unregister(struct phy_driver *drv); |
d5bf9071 | 1692 | void phy_drivers_unregister(struct phy_driver *drv, int n); |
be01da72 AL |
1693 | int phy_driver_register(struct phy_driver *new_driver, struct module *owner); |
1694 | int phy_drivers_register(struct phy_driver *new_driver, int n, | |
1695 | struct module *owner); | |
293e9a3d | 1696 | void phy_error(struct phy_device *phydev); |
4f9c85a1 | 1697 | void phy_state_machine(struct work_struct *work); |
97b33bdf | 1698 | void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); |
293e9a3d | 1699 | void phy_trigger_machine(struct phy_device *phydev); |
28b2e0d2 | 1700 | void phy_mac_interrupt(struct phy_device *phydev); |
29935aeb | 1701 | void phy_start_machine(struct phy_device *phydev); |
00db8189 | 1702 | void phy_stop_machine(struct phy_device *phydev); |
5514174f | 1703 | void phy_ethtool_ksettings_get(struct phy_device *phydev, |
1704 | struct ethtool_link_ksettings *cmd); | |
2d55173e PR |
1705 | int phy_ethtool_ksettings_set(struct phy_device *phydev, |
1706 | const struct ethtool_link_ksettings *cmd); | |
4017b4d3 | 1707 | int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); |
bbbf8430 | 1708 | int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); |
3231e5d2 | 1709 | int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); |
3dd4ef1b | 1710 | int phy_disable_interrupts(struct phy_device *phydev); |
434a4315 | 1711 | void phy_request_interrupt(struct phy_device *phydev); |
07b09289 | 1712 | void phy_free_interrupt(struct phy_device *phydev); |
e1393456 | 1713 | void phy_print_status(struct phy_device *phydev); |
0c3e10cb SA |
1714 | int phy_get_rate_matching(struct phy_device *phydev, |
1715 | phy_interface_t iface); | |
73c105ad | 1716 | void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); |
41124fa6 | 1717 | void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); |
22c0ef6b | 1718 | void phy_advertise_supported(struct phy_device *phydev); |
c306ad36 | 1719 | void phy_support_sym_pause(struct phy_device *phydev); |
af8d9bb2 | 1720 | void phy_support_asym_pause(struct phy_device *phydev); |
0c122405 AL |
1721 | void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, |
1722 | bool autoneg); | |
70814e81 | 1723 | void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); |
22b7d299 AL |
1724 | bool phy_validate_pause(struct phy_device *phydev, |
1725 | struct ethtool_pauseparam *pp); | |
a87ae8a9 | 1726 | void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); |
92252eec DM |
1727 | |
1728 | s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, | |
1729 | const int *delay_values, int size, bool is_rx); | |
1730 | ||
a87ae8a9 RK |
1731 | void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, |
1732 | bool *tx_pause, bool *rx_pause); | |
00db8189 | 1733 | |
f62220d3 | 1734 | int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, |
4017b4d3 | 1735 | int (*run)(struct phy_device *)); |
f62220d3 | 1736 | int phy_register_fixup_for_id(const char *bus_id, |
4017b4d3 | 1737 | int (*run)(struct phy_device *)); |
f62220d3 | 1738 | int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, |
4017b4d3 | 1739 | int (*run)(struct phy_device *)); |
f62220d3 | 1740 | |
f38e7a32 WH |
1741 | int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); |
1742 | int phy_unregister_fixup_for_id(const char *bus_id); | |
1743 | int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); | |
1744 | ||
a59a4d19 GC |
1745 | int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); |
1746 | int phy_get_eee_err(struct phy_device *phydev); | |
1747 | int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); | |
1748 | int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); | |
42e836eb | 1749 | int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); |
4017b4d3 SS |
1750 | void phy_ethtool_get_wol(struct phy_device *phydev, |
1751 | struct ethtool_wolinfo *wol); | |
9d9a77ce PR |
1752 | int phy_ethtool_get_link_ksettings(struct net_device *ndev, |
1753 | struct ethtool_link_ksettings *cmd); | |
1754 | int phy_ethtool_set_link_ksettings(struct net_device *ndev, | |
1755 | const struct ethtool_link_ksettings *cmd); | |
e86a8987 | 1756 | int phy_ethtool_nway_reset(struct net_device *ndev); |
63490847 MW |
1757 | int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size); |
1758 | void phy_package_leave(struct phy_device *phydev); | |
1759 | int devm_phy_package_join(struct device *dev, struct phy_device *phydev, | |
1760 | int addr, size_t priv_size); | |
a59a4d19 | 1761 | |
90eff909 | 1762 | #if IS_ENABLED(CONFIG_PHYLIB) |
9b9a8bfc AF |
1763 | int __init mdio_bus_init(void); |
1764 | void mdio_bus_exit(void); | |
9e8d438e FF |
1765 | #endif |
1766 | ||
17809516 FF |
1767 | int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); |
1768 | int phy_ethtool_get_sset_count(struct phy_device *phydev); | |
1769 | int phy_ethtool_get_stats(struct phy_device *phydev, | |
1770 | struct ethtool_stats *stats, u64 *data); | |
9b9a8bfc | 1771 | |
63490847 MW |
1772 | static inline int phy_package_read(struct phy_device *phydev, u32 regnum) |
1773 | { | |
1774 | struct phy_package_shared *shared = phydev->shared; | |
1775 | ||
1776 | if (!shared) | |
1777 | return -EIO; | |
1778 | ||
1779 | return mdiobus_read(phydev->mdio.bus, shared->addr, regnum); | |
1780 | } | |
1781 | ||
1782 | static inline int __phy_package_read(struct phy_device *phydev, u32 regnum) | |
1783 | { | |
1784 | struct phy_package_shared *shared = phydev->shared; | |
1785 | ||
1786 | if (!shared) | |
1787 | return -EIO; | |
1788 | ||
1789 | return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum); | |
1790 | } | |
1791 | ||
1792 | static inline int phy_package_write(struct phy_device *phydev, | |
1793 | u32 regnum, u16 val) | |
1794 | { | |
1795 | struct phy_package_shared *shared = phydev->shared; | |
1796 | ||
1797 | if (!shared) | |
1798 | return -EIO; | |
1799 | ||
1800 | return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); | |
1801 | } | |
1802 | ||
1803 | static inline int __phy_package_write(struct phy_device *phydev, | |
1804 | u32 regnum, u16 val) | |
1805 | { | |
1806 | struct phy_package_shared *shared = phydev->shared; | |
1807 | ||
1808 | if (!shared) | |
1809 | return -EIO; | |
1810 | ||
1811 | return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); | |
1812 | } | |
1813 | ||
0ef44e5c AT |
1814 | static inline bool __phy_package_set_once(struct phy_device *phydev, |
1815 | unsigned int b) | |
63490847 MW |
1816 | { |
1817 | struct phy_package_shared *shared = phydev->shared; | |
1818 | ||
1819 | if (!shared) | |
1820 | return false; | |
1821 | ||
0ef44e5c AT |
1822 | return !test_and_set_bit(b, &shared->flags); |
1823 | } | |
1824 | ||
1825 | static inline bool phy_package_init_once(struct phy_device *phydev) | |
1826 | { | |
1827 | return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); | |
1828 | } | |
1829 | ||
1830 | static inline bool phy_package_probe_once(struct phy_device *phydev) | |
1831 | { | |
1832 | return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); | |
63490847 MW |
1833 | } |
1834 | ||
00db8189 | 1835 | extern struct bus_type mdio_bus_type; |
c31accd1 | 1836 | |
648ea013 FF |
1837 | struct mdio_board_info { |
1838 | const char *bus_id; | |
1839 | char modalias[MDIO_NAME_SIZE]; | |
1840 | int mdio_addr; | |
1841 | const void *platform_data; | |
1842 | }; | |
1843 | ||
90eff909 | 1844 | #if IS_ENABLED(CONFIG_MDIO_DEVICE) |
648ea013 FF |
1845 | int mdiobus_register_board_info(const struct mdio_board_info *info, |
1846 | unsigned int n); | |
1847 | #else | |
1848 | static inline int mdiobus_register_board_info(const struct mdio_board_info *i, | |
1849 | unsigned int n) | |
1850 | { | |
1851 | return 0; | |
1852 | } | |
1853 | #endif | |
1854 | ||
1855 | ||
c31accd1 | 1856 | /** |
39097ab6 | 1857 | * phy_module_driver() - Helper macro for registering PHY drivers |
c31accd1 | 1858 | * @__phy_drivers: array of PHY drivers to register |
39097ab6 | 1859 | * @__count: Numbers of members in array |
c31accd1 JH |
1860 | * |
1861 | * Helper macro for PHY drivers which do not do anything special in module | |
1862 | * init/exit. Each module may only use this macro once, and calling it | |
1863 | * replaces module_init() and module_exit(). | |
1864 | */ | |
1865 | #define phy_module_driver(__phy_drivers, __count) \ | |
1866 | static int __init phy_module_init(void) \ | |
1867 | { \ | |
be01da72 | 1868 | return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ |
c31accd1 JH |
1869 | } \ |
1870 | module_init(phy_module_init); \ | |
1871 | static void __exit phy_module_exit(void) \ | |
1872 | { \ | |
1873 | phy_drivers_unregister(__phy_drivers, __count); \ | |
1874 | } \ | |
1875 | module_exit(phy_module_exit) | |
1876 | ||
1877 | #define module_phy_driver(__phy_drivers) \ | |
1878 | phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) | |
1879 | ||
5db5ea99 FF |
1880 | bool phy_driver_is_genphy(struct phy_device *phydev); |
1881 | bool phy_driver_is_genphy_10g(struct phy_device *phydev); | |
1882 | ||
00db8189 | 1883 | #endif /* __PHY_H */ |