Commit | Line | Data |
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2874c5fd | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
00db8189 | 2 | /* |
00db8189 | 3 | * Framework and drivers for configuring and reading different PHYs |
d8de01b7 | 4 | * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c |
00db8189 AF |
5 | * |
6 | * Author: Andy Fleming | |
7 | * | |
8 | * Copyright (c) 2004 Freescale Semiconductor, Inc. | |
00db8189 AF |
9 | */ |
10 | ||
11 | #ifndef __PHY_H | |
12 | #define __PHY_H | |
13 | ||
2220943a | 14 | #include <linux/compiler.h> |
00db8189 | 15 | #include <linux/spinlock.h> |
13df29f6 | 16 | #include <linux/ethtool.h> |
01e5b728 | 17 | #include <linux/leds.h> |
b31cdffa | 18 | #include <linux/linkmode.h> |
a68a8138 | 19 | #include <linux/netlink.h> |
bac83c65 | 20 | #include <linux/mdio.h> |
13df29f6 | 21 | #include <linux/mii.h> |
4715f65f | 22 | #include <linux/mii_timestamper.h> |
3e3aaf64 | 23 | #include <linux/module.h> |
13df29f6 MR |
24 | #include <linux/timer.h> |
25 | #include <linux/workqueue.h> | |
8626d3b4 | 26 | #include <linux/mod_devicetable.h> |
080bb352 | 27 | #include <linux/u64_stats_sync.h> |
9010f9de | 28 | #include <linux/irqreturn.h> |
bd971ff0 | 29 | #include <linux/iopoll.h> |
63490847 | 30 | #include <linux/refcount.h> |
00db8189 | 31 | |
60063497 | 32 | #include <linux/atomic.h> |
fe0d4fd9 | 33 | #include <net/eee.h> |
0ac49527 | 34 | |
e9fbdf17 | 35 | #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ |
00db8189 AF |
36 | SUPPORTED_TP | \ |
37 | SUPPORTED_MII) | |
38 | ||
e9fbdf17 FF |
39 | #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ |
40 | SUPPORTED_10baseT_Full) | |
41 | ||
42 | #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ | |
43 | SUPPORTED_100baseT_Full) | |
44 | ||
45 | #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ | |
00db8189 AF |
46 | SUPPORTED_1000baseT_Full) |
47 | ||
719655a1 AL |
48 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; |
49 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; | |
16178c8e | 50 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init; |
719655a1 AL |
51 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; |
52 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; | |
53 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; | |
54 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; | |
9e857a40 | 55 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; |
719655a1 | 56 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; |
14e47d1f | 57 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init; |
ef6ee3a3 | 58 | extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap2_features) __ro_after_init; |
719655a1 AL |
59 | |
60 | #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) | |
61 | #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) | |
16178c8e | 62 | #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features) |
719655a1 AL |
63 | #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) |
64 | #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) | |
65 | #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) | |
66 | #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) | |
9e857a40 | 67 | #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) |
719655a1 | 68 | #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) |
14e47d1f | 69 | #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features) |
ef6ee3a3 | 70 | #define PHY_EEE_CAP2_FEATURES ((unsigned long *)&phy_eee_cap2_features) |
e9fbdf17 | 71 | |
54638c6e DE |
72 | extern const int phy_basic_ports_array[3]; |
73 | extern const int phy_fibre_port_array[1]; | |
74 | extern const int phy_all_ports_features_array[7]; | |
3c1bcc86 | 75 | extern const int phy_10_100_features_array[4]; |
3254e0b9 | 76 | extern const int phy_basic_t1_features_array[3]; |
16178c8e | 77 | extern const int phy_basic_t1s_p2mp_features_array[2]; |
3c1bcc86 AL |
78 | extern const int phy_gbit_features_array[2]; |
79 | extern const int phy_10gbit_features_array[1]; | |
80 | ||
c5e38a94 AF |
81 | /* |
82 | * Set phydev->irq to PHY_POLL if interrupts are not supported, | |
93e8990c HK |
83 | * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if |
84 | * the attached MAC driver handles the interrupt | |
00db8189 AF |
85 | */ |
86 | #define PHY_POLL -1 | |
93e8990c | 87 | #define PHY_MAC_INTERRUPT -2 |
00db8189 | 88 | |
a4307c0e HK |
89 | #define PHY_IS_INTERNAL 0x00000001 |
90 | #define PHY_RST_AFTER_CLK_EN 0x00000002 | |
97c22438 | 91 | #define PHY_POLL_CABLE_TEST 0x00000004 |
a7e34480 | 92 | #define PHY_ALWAYS_CALL_SUSPEND 0x00000008 |
a9049e0c | 93 | #define MDIO_DEVICE_IS_PHY 0x80000000 |
00db8189 | 94 | |
4069a572 AL |
95 | /** |
96 | * enum phy_interface_t - Interface Mode definitions | |
97 | * | |
98 | * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch | |
99 | * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined | |
26183cfe CF |
100 | * @PHY_INTERFACE_MODE_MII: Media-independent interface |
101 | * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface | |
4069a572 AL |
102 | * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface |
103 | * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface | |
104 | * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface | |
105 | * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface | |
c858d436 | 106 | * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role |
4069a572 AL |
107 | * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface |
108 | * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay | |
109 | * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay | |
110 | * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay | |
111 | * @PHY_INTERFACE_MODE_RTBI: Reduced TBI | |
b9241f54 | 112 | * @PHY_INTERFACE_MODE_SMII: Serial MII |
4069a572 AL |
113 | * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface |
114 | * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface | |
115 | * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax | |
83b5f025 | 116 | * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII |
4069a572 AL |
117 | * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII |
118 | * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII | |
b1ae3587 | 119 | * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX |
4069a572 AL |
120 | * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX |
121 | * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX | |
7331d1d4 | 122 | * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR |
4069a572 AL |
123 | * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI |
124 | * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface | |
125 | * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR | |
a56c2868 | 126 | * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR |
4069a572 AL |
127 | * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII |
128 | * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN | |
5e61fe15 | 129 | * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII |
05ad5d45 | 130 | * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN |
4069a572 AL |
131 | * @PHY_INTERFACE_MODE_MAX: Book keeping |
132 | * | |
133 | * Describes the interface between the MAC and PHY. | |
134 | */ | |
e8a2b6a4 | 135 | typedef enum { |
4157ef1b | 136 | PHY_INTERFACE_MODE_NA, |
735d8a18 | 137 | PHY_INTERFACE_MODE_INTERNAL, |
e8a2b6a4 AF |
138 | PHY_INTERFACE_MODE_MII, |
139 | PHY_INTERFACE_MODE_GMII, | |
140 | PHY_INTERFACE_MODE_SGMII, | |
141 | PHY_INTERFACE_MODE_TBI, | |
2cc70ba4 | 142 | PHY_INTERFACE_MODE_REVMII, |
e8a2b6a4 | 143 | PHY_INTERFACE_MODE_RMII, |
c858d436 | 144 | PHY_INTERFACE_MODE_REVRMII, |
e8a2b6a4 | 145 | PHY_INTERFACE_MODE_RGMII, |
a999589c | 146 | PHY_INTERFACE_MODE_RGMII_ID, |
7d400a4c KP |
147 | PHY_INTERFACE_MODE_RGMII_RXID, |
148 | PHY_INTERFACE_MODE_RGMII_TXID, | |
4157ef1b SG |
149 | PHY_INTERFACE_MODE_RTBI, |
150 | PHY_INTERFACE_MODE_SMII, | |
898dd0bd | 151 | PHY_INTERFACE_MODE_XGMII, |
58b05e58 | 152 | PHY_INTERFACE_MODE_XLGMII, |
fd70f72c | 153 | PHY_INTERFACE_MODE_MOCA, |
83b5f025 | 154 | PHY_INTERFACE_MODE_PSGMII, |
b9d12085 | 155 | PHY_INTERFACE_MODE_QSGMII, |
572de608 | 156 | PHY_INTERFACE_MODE_TRGMII, |
b1ae3587 | 157 | PHY_INTERFACE_MODE_100BASEX, |
55601a88 AL |
158 | PHY_INTERFACE_MODE_1000BASEX, |
159 | PHY_INTERFACE_MODE_2500BASEX, | |
7331d1d4 | 160 | PHY_INTERFACE_MODE_5GBASER, |
55601a88 | 161 | PHY_INTERFACE_MODE_RXAUI, |
c125ca09 | 162 | PHY_INTERFACE_MODE_XAUI, |
c114574e RK |
163 | /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ |
164 | PHY_INTERFACE_MODE_10GBASER, | |
a56c2868 | 165 | PHY_INTERFACE_MODE_25GBASER, |
4618d671 | 166 | PHY_INTERFACE_MODE_USXGMII, |
c114574e RK |
167 | /* 10GBASE-KR - with Clause 73 AN */ |
168 | PHY_INTERFACE_MODE_10GKR, | |
5e61fe15 | 169 | PHY_INTERFACE_MODE_QUSGMII, |
05ad5d45 | 170 | PHY_INTERFACE_MODE_1000BASEKX, |
8a2fe56e | 171 | PHY_INTERFACE_MODE_MAX, |
e8a2b6a4 AF |
172 | } phy_interface_t; |
173 | ||
8e20f591 RKO |
174 | /* PHY interface mode bitmap handling */ |
175 | #define DECLARE_PHY_INTERFACE_MASK(name) \ | |
176 | DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) | |
177 | ||
178 | static inline void phy_interface_zero(unsigned long *intf) | |
179 | { | |
180 | bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); | |
181 | } | |
182 | ||
183 | static inline bool phy_interface_empty(const unsigned long *intf) | |
184 | { | |
185 | return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); | |
186 | } | |
187 | ||
188 | static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, | |
189 | const unsigned long *b) | |
190 | { | |
191 | bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); | |
192 | } | |
193 | ||
194 | static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, | |
195 | const unsigned long *b) | |
196 | { | |
197 | bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); | |
198 | } | |
199 | ||
200 | static inline void phy_interface_set_rgmii(unsigned long *intf) | |
201 | { | |
202 | __set_bit(PHY_INTERFACE_MODE_RGMII, intf); | |
203 | __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); | |
204 | __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); | |
205 | __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); | |
206 | } | |
207 | ||
e86c6569 | 208 | /* |
4069a572 | 209 | * phy_supported_speeds - return all speeds currently supported by a PHY device |
1f9127ca ZB |
210 | */ |
211 | unsigned int phy_supported_speeds(struct phy_device *phy, | |
212 | unsigned int *speeds, | |
213 | unsigned int size); | |
214 | ||
8a2fe56e | 215 | /** |
d8de01b7 RD |
216 | * phy_modes - map phy_interface_t enum to device tree binding of phy-mode |
217 | * @interface: enum phy_interface_t value | |
218 | * | |
4069a572 | 219 | * Description: maps enum &phy_interface_t defined in this file |
8a2fe56e | 220 | * into the device tree binding of 'phy-mode', so that Ethernet |
4069a572 | 221 | * device driver can get PHY interface from device tree. |
8a2fe56e FF |
222 | */ |
223 | static inline const char *phy_modes(phy_interface_t interface) | |
224 | { | |
225 | switch (interface) { | |
226 | case PHY_INTERFACE_MODE_NA: | |
227 | return ""; | |
735d8a18 FF |
228 | case PHY_INTERFACE_MODE_INTERNAL: |
229 | return "internal"; | |
8a2fe56e FF |
230 | case PHY_INTERFACE_MODE_MII: |
231 | return "mii"; | |
232 | case PHY_INTERFACE_MODE_GMII: | |
233 | return "gmii"; | |
234 | case PHY_INTERFACE_MODE_SGMII: | |
235 | return "sgmii"; | |
236 | case PHY_INTERFACE_MODE_TBI: | |
237 | return "tbi"; | |
238 | case PHY_INTERFACE_MODE_REVMII: | |
239 | return "rev-mii"; | |
240 | case PHY_INTERFACE_MODE_RMII: | |
241 | return "rmii"; | |
c858d436 VO |
242 | case PHY_INTERFACE_MODE_REVRMII: |
243 | return "rev-rmii"; | |
8a2fe56e FF |
244 | case PHY_INTERFACE_MODE_RGMII: |
245 | return "rgmii"; | |
246 | case PHY_INTERFACE_MODE_RGMII_ID: | |
247 | return "rgmii-id"; | |
248 | case PHY_INTERFACE_MODE_RGMII_RXID: | |
249 | return "rgmii-rxid"; | |
250 | case PHY_INTERFACE_MODE_RGMII_TXID: | |
251 | return "rgmii-txid"; | |
252 | case PHY_INTERFACE_MODE_RTBI: | |
253 | return "rtbi"; | |
254 | case PHY_INTERFACE_MODE_SMII: | |
255 | return "smii"; | |
256 | case PHY_INTERFACE_MODE_XGMII: | |
257 | return "xgmii"; | |
58b05e58 JA |
258 | case PHY_INTERFACE_MODE_XLGMII: |
259 | return "xlgmii"; | |
fd70f72c FF |
260 | case PHY_INTERFACE_MODE_MOCA: |
261 | return "moca"; | |
83b5f025 GJ |
262 | case PHY_INTERFACE_MODE_PSGMII: |
263 | return "psgmii"; | |
b9d12085 TP |
264 | case PHY_INTERFACE_MODE_QSGMII: |
265 | return "qsgmii"; | |
572de608 SW |
266 | case PHY_INTERFACE_MODE_TRGMII: |
267 | return "trgmii"; | |
55601a88 AL |
268 | case PHY_INTERFACE_MODE_1000BASEX: |
269 | return "1000base-x"; | |
05ad5d45 SA |
270 | case PHY_INTERFACE_MODE_1000BASEKX: |
271 | return "1000base-kx"; | |
55601a88 AL |
272 | case PHY_INTERFACE_MODE_2500BASEX: |
273 | return "2500base-x"; | |
7331d1d4 PS |
274 | case PHY_INTERFACE_MODE_5GBASER: |
275 | return "5gbase-r"; | |
55601a88 AL |
276 | case PHY_INTERFACE_MODE_RXAUI: |
277 | return "rxaui"; | |
c125ca09 RK |
278 | case PHY_INTERFACE_MODE_XAUI: |
279 | return "xaui"; | |
c114574e RK |
280 | case PHY_INTERFACE_MODE_10GBASER: |
281 | return "10gbase-r"; | |
a56c2868 SH |
282 | case PHY_INTERFACE_MODE_25GBASER: |
283 | return "25gbase-r"; | |
4618d671 HK |
284 | case PHY_INTERFACE_MODE_USXGMII: |
285 | return "usxgmii"; | |
c114574e RK |
286 | case PHY_INTERFACE_MODE_10GKR: |
287 | return "10gbase-kr"; | |
b1ae3587 BJ |
288 | case PHY_INTERFACE_MODE_100BASEX: |
289 | return "100base-x"; | |
5e61fe15 MC |
290 | case PHY_INTERFACE_MODE_QUSGMII: |
291 | return "qusgmii"; | |
8a2fe56e FF |
292 | default: |
293 | return "unknown"; | |
294 | } | |
295 | } | |
296 | ||
e8a2b6a4 | 297 | #define PHY_INIT_TIMEOUT 100000 |
00db8189 | 298 | #define PHY_FORCE_TIMEOUT 10 |
00db8189 | 299 | |
e8a2b6a4 | 300 | #define PHY_MAX_ADDR 32 |
00db8189 | 301 | |
a4d00f17 | 302 | /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ |
9d9326d3 AF |
303 | #define PHY_ID_FMT "%s:%02x" |
304 | ||
4567d686 | 305 | #define MII_BUS_ID_SIZE 61 |
a4d00f17 | 306 | |
313162d0 | 307 | struct device; |
60495b66 | 308 | struct kernel_hwtstamp_config; |
9525ae83 | 309 | struct phylink; |
298e54fa RK |
310 | struct sfp_bus; |
311 | struct sfp_upstream_ops; | |
313162d0 PG |
312 | struct sk_buff; |
313 | ||
4069a572 AL |
314 | /** |
315 | * struct mdio_bus_stats - Statistics counters for MDIO busses | |
316 | * @transfers: Total number of transfers, i.e. @writes + @reads | |
317 | * @errors: Number of MDIO transfers that returned an error | |
318 | * @writes: Number of write transfers | |
319 | * @reads: Number of read transfers | |
320 | * @syncp: Synchronisation for incrementing statistics | |
321 | */ | |
080bb352 FF |
322 | struct mdio_bus_stats { |
323 | u64_stats_t transfers; | |
324 | u64_stats_t errors; | |
325 | u64_stats_t writes; | |
326 | u64_stats_t reads; | |
327 | /* Must be last, add new statistics above */ | |
328 | struct u64_stats_sync syncp; | |
329 | }; | |
330 | ||
4069a572 AL |
331 | /** |
332 | * struct phy_package_shared - Shared information in PHY packages | |
9eea577e CM |
333 | * @base_addr: Base PHY address of PHY package used to combine PHYs |
334 | * in one package and for offset calculation of phy_package_read/write | |
471e8fd3 | 335 | * @np: Pointer to the Device Node if PHY package defined in DT |
4069a572 AL |
336 | * @refcnt: Number of PHYs connected to this shared data |
337 | * @flags: Initialization of PHY package | |
338 | * @priv_size: Size of the shared private data @priv | |
339 | * @priv: Driver private data shared across a PHY package | |
340 | * | |
341 | * Represents a shared structure between different phydev's in the same | |
63490847 MW |
342 | * package, for example a quad PHY. See phy_package_join() and |
343 | * phy_package_leave(). | |
344 | */ | |
345 | struct phy_package_shared { | |
9eea577e | 346 | u8 base_addr; |
471e8fd3 CM |
347 | /* With PHY package defined in DT this points to the PHY package node */ |
348 | struct device_node *np; | |
63490847 MW |
349 | refcount_t refcnt; |
350 | unsigned long flags; | |
351 | size_t priv_size; | |
352 | ||
353 | /* private data pointer */ | |
354 | /* note that this pointer is shared between different phydevs and | |
355 | * the user has to take care of appropriate locking. It is allocated | |
356 | * and freed automatically by phy_package_join() and | |
357 | * phy_package_leave(). | |
358 | */ | |
359 | void *priv; | |
360 | }; | |
361 | ||
362 | /* used as bit number in atomic bitops */ | |
0ef44e5c AT |
363 | #define PHY_SHARED_F_INIT_DONE 0 |
364 | #define PHY_SHARED_F_PROBE_DONE 1 | |
63490847 | 365 | |
4069a572 AL |
366 | /** |
367 | * struct mii_bus - Represents an MDIO bus | |
368 | * | |
369 | * @owner: Who owns this device | |
370 | * @name: User friendly name for this MDIO device, or driver name | |
371 | * @id: Unique identifier for this bus, typical from bus hierarchy | |
372 | * @priv: Driver private data | |
373 | * | |
c5e38a94 AF |
374 | * The Bus class for PHYs. Devices which provide access to |
375 | * PHYs should register using this structure | |
376 | */ | |
00db8189 | 377 | struct mii_bus { |
3e3aaf64 | 378 | struct module *owner; |
00db8189 | 379 | const char *name; |
9d9326d3 | 380 | char id[MII_BUS_ID_SIZE]; |
00db8189 | 381 | void *priv; |
4069a572 | 382 | /** @read: Perform a read transfer on the bus */ |
ccaa953e | 383 | int (*read)(struct mii_bus *bus, int addr, int regnum); |
4069a572 | 384 | /** @write: Perform a write transfer on the bus */ |
ccaa953e | 385 | int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); |
4e4aafcd AL |
386 | /** @read_c45: Perform a C45 read transfer on the bus */ |
387 | int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum); | |
388 | /** @write_c45: Perform a C45 write transfer on the bus */ | |
389 | int (*write_c45)(struct mii_bus *bus, int addr, int devnum, | |
390 | int regnum, u16 val); | |
4069a572 | 391 | /** @reset: Perform a reset of the bus */ |
00db8189 | 392 | int (*reset)(struct mii_bus *bus); |
4069a572 AL |
393 | |
394 | /** @stats: Statistic counters per device on the bus */ | |
080bb352 | 395 | struct mdio_bus_stats stats[PHY_MAX_ADDR]; |
00db8189 | 396 | |
4069a572 AL |
397 | /** |
398 | * @mdio_lock: A lock to ensure that only one thing can read/write | |
c5e38a94 AF |
399 | * the MDIO bus at a time |
400 | */ | |
35b5f6b1 | 401 | struct mutex mdio_lock; |
00db8189 | 402 | |
4069a572 | 403 | /** @parent: Parent device of this bus */ |
18ee49dd | 404 | struct device *parent; |
4069a572 | 405 | /** @state: State of bus structure */ |
46abc021 LB |
406 | enum { |
407 | MDIOBUS_ALLOCATED = 1, | |
408 | MDIOBUS_REGISTERED, | |
409 | MDIOBUS_UNREGISTERED, | |
410 | MDIOBUS_RELEASED, | |
411 | } state; | |
4069a572 AL |
412 | |
413 | /** @dev: Kernel device representation */ | |
46abc021 | 414 | struct device dev; |
00db8189 | 415 | |
4069a572 | 416 | /** @mdio_map: list of all MDIO devices on bus */ |
7f854420 | 417 | struct mdio_device *mdio_map[PHY_MAX_ADDR]; |
00db8189 | 418 | |
4069a572 | 419 | /** @phy_mask: PHY addresses to be ignored when probing */ |
f896424c MP |
420 | u32 phy_mask; |
421 | ||
4069a572 | 422 | /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ |
922f2dd1 FF |
423 | u32 phy_ignore_ta_mask; |
424 | ||
4069a572 AL |
425 | /** |
426 | * @irq: An array of interrupts, each PHY's interrupt at the index | |
e7f4dc35 | 427 | * matching its address |
c5e38a94 | 428 | */ |
e7f4dc35 | 429 | int irq[PHY_MAX_ADDR]; |
69226896 | 430 | |
4069a572 | 431 | /** @reset_delay_us: GPIO reset pulse width in microseconds */ |
69226896 | 432 | int reset_delay_us; |
4069a572 | 433 | /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ |
bb383129 | 434 | int reset_post_delay_us; |
4069a572 | 435 | /** @reset_gpiod: Reset GPIO descriptor pointer */ |
d396e84c | 436 | struct gpio_desc *reset_gpiod; |
63490847 | 437 | |
4069a572 | 438 | /** @shared_lock: protect access to the shared element */ |
63490847 MW |
439 | struct mutex shared_lock; |
440 | ||
4069a572 | 441 | /** @shared: shared state across different PHYs */ |
63490847 | 442 | struct phy_package_shared *shared[PHY_MAX_ADDR]; |
00db8189 | 443 | }; |
46abc021 | 444 | #define to_mii_bus(d) container_of(d, struct mii_bus, dev) |
00db8189 | 445 | |
4069a572 AL |
446 | struct mii_bus *mdiobus_alloc_size(size_t size); |
447 | ||
448 | /** | |
449 | * mdiobus_alloc - Allocate an MDIO bus structure | |
450 | * | |
451 | * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready | |
452 | * for the driver to register the bus. | |
453 | */ | |
eb8a54a7 TT |
454 | static inline struct mii_bus *mdiobus_alloc(void) |
455 | { | |
456 | return mdiobus_alloc_size(0); | |
457 | } | |
458 | ||
3e3aaf64 | 459 | int __mdiobus_register(struct mii_bus *bus, struct module *owner); |
ac3a68d5 BG |
460 | int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, |
461 | struct module *owner); | |
3e3aaf64 | 462 | #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) |
ac3a68d5 BG |
463 | #define devm_mdiobus_register(dev, bus) \ |
464 | __devm_mdiobus_register(dev, bus, THIS_MODULE) | |
38f961e7 | 465 | |
2e888103 LB |
466 | void mdiobus_unregister(struct mii_bus *bus); |
467 | void mdiobus_free(struct mii_bus *bus); | |
6d48f44b GS |
468 | struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); |
469 | static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) | |
470 | { | |
471 | return devm_mdiobus_alloc_size(dev, 0); | |
472 | } | |
473 | ||
ce69e216 | 474 | struct mii_bus *mdio_find_bus(const char *mdio_name); |
d41e1277 | 475 | struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr); |
2e888103 | 476 | |
695bce8f HK |
477 | #define PHY_INTERRUPT_DISABLED false |
478 | #define PHY_INTERRUPT_ENABLED true | |
00db8189 | 479 | |
4069a572 AL |
480 | /** |
481 | * enum phy_state - PHY state machine states: | |
00db8189 | 482 | * |
4069a572 | 483 | * @PHY_DOWN: PHY device and driver are not ready for anything. probe |
00db8189 AF |
484 | * should be called if and only if the PHY is in this state, |
485 | * given that the PHY device exists. | |
4069a572 | 486 | * - PHY driver probe function will set the state to @PHY_READY |
00db8189 | 487 | * |
4069a572 | 488 | * @PHY_READY: PHY is ready to send and receive packets, but the |
00db8189 | 489 | * controller is not. By default, PHYs which do not implement |
899a3cbb | 490 | * probe will be set to this state by phy_probe(). |
00db8189 AF |
491 | * - start will set the state to UP |
492 | * | |
4069a572 | 493 | * @PHY_UP: The PHY and attached device are ready to do work. |
00db8189 | 494 | * Interrupts should be started here. |
4069a572 | 495 | * - timer moves to @PHY_NOLINK or @PHY_RUNNING |
00db8189 | 496 | * |
4069a572 AL |
497 | * @PHY_NOLINK: PHY is up, but not currently plugged in. |
498 | * - irq or timer will set @PHY_RUNNING if link comes back | |
499 | * - phy_stop moves to @PHY_HALTED | |
00db8189 | 500 | * |
4069a572 | 501 | * @PHY_RUNNING: PHY is currently up, running, and possibly sending |
00db8189 | 502 | * and/or receiving packets |
4069a572 AL |
503 | * - irq or timer will set @PHY_NOLINK if link goes down |
504 | * - phy_stop moves to @PHY_HALTED | |
00db8189 | 505 | * |
4069a572 | 506 | * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending |
a68a8138 AL |
507 | * is not expected to work, carrier will be indicated as down. PHY will be |
508 | * poll once per second, or on interrupt for it current state. | |
509 | * Once complete, move to UP to restart the PHY. | |
4069a572 | 510 | * - phy_stop aborts the running test and moves to @PHY_HALTED |
a68a8138 | 511 | * |
59088b5a | 512 | * @PHY_HALTED: PHY is up, but no polling or interrupts are done. |
4069a572 | 513 | * - phy_start moves to @PHY_UP |
59088b5a RKO |
514 | * |
515 | * @PHY_ERROR: PHY is up, but is in an error state. | |
516 | * - phy_stop moves to @PHY_HALTED | |
00db8189 AF |
517 | */ |
518 | enum phy_state { | |
4017b4d3 | 519 | PHY_DOWN = 0, |
00db8189 | 520 | PHY_READY, |
2b3e88ea | 521 | PHY_HALTED, |
59088b5a | 522 | PHY_ERROR, |
00db8189 | 523 | PHY_UP, |
00db8189 AF |
524 | PHY_RUNNING, |
525 | PHY_NOLINK, | |
a68a8138 | 526 | PHY_CABLETEST, |
00db8189 AF |
527 | }; |
528 | ||
c746053d RK |
529 | #define MDIO_MMD_NUM 32 |
530 | ||
ac28b9f8 DD |
531 | /** |
532 | * struct phy_c45_device_ids - 802.3-c45 Device Identifiers | |
320ed3bf RK |
533 | * @devices_in_package: IEEE 802.3 devices in package register value. |
534 | * @mmds_present: bit vector of MMDs present. | |
ac28b9f8 DD |
535 | * @device_ids: The device identifer for each present device. |
536 | */ | |
537 | struct phy_c45_device_ids { | |
538 | u32 devices_in_package; | |
320ed3bf | 539 | u32 mmds_present; |
389a3389 | 540 | u32 device_ids[MDIO_MMD_NUM]; |
ac28b9f8 | 541 | }; |
c1f19b51 | 542 | |
76564261 | 543 | struct macsec_context; |
2e181358 | 544 | struct macsec_ops; |
76564261 | 545 | |
4069a572 AL |
546 | /** |
547 | * struct phy_device - An instance of a PHY | |
00db8189 | 548 | * |
4069a572 AL |
549 | * @mdio: MDIO bus this PHY is on |
550 | * @drv: Pointer to the driver for this PHY instance | |
bc66fa87 XW |
551 | * @devlink: Create a link between phy dev and mac dev, if the external phy |
552 | * used by current mac interface is managed by another mac interface. | |
4069a572 AL |
553 | * @phy_id: UID for this device found during discovery |
554 | * @c45_ids: 802.3-c45 Device Identifiers if is_c45. | |
555 | * @is_c45: Set to true if this PHY uses clause 45 addressing. | |
556 | * @is_internal: Set to true if this PHY is internal to a MAC. | |
557 | * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. | |
558 | * @is_gigabit_capable: Set to true if PHY supports 1000Mbps | |
559 | * @has_fixups: Set to true if this PHY has fixups/quirks. | |
560 | * @suspended: Set to true if this PHY has been suspended successfully. | |
561 | * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. | |
562 | * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. | |
563 | * @loopback_enabled: Set true if this PHY has been loopbacked successfully. | |
564 | * @downshifted_rate: Set true if link speed has been downshifted. | |
b834489b | 565 | * @is_on_sfp_module: Set true if PHY is located on an SFP module. |
fba863b8 | 566 | * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY |
a7e34480 FF |
567 | * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN |
568 | * enabled. | |
4069a572 AL |
569 | * @state: State of the PHY for management purposes |
570 | * @dev_flags: Device-specific flags used by the PHY driver. | |
a97770cc YS |
571 | * |
572 | * - Bits [15:0] are free to use by the PHY driver to communicate | |
573 | * driver specific behavior. | |
574 | * - Bits [23:16] are currently reserved for future use. | |
575 | * - Bits [31:24] are reserved for defining generic | |
576 | * PHY driver behavior. | |
4069a572 | 577 | * @irq: IRQ number of the PHY's interrupt (-1 if none) |
4069a572 AL |
578 | * @phylink: Pointer to phylink instance for this PHY |
579 | * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached | |
580 | * @sfp_bus: SFP bus attached to this PHY's fiber port | |
581 | * @attached_dev: The attached enet driver's device instance ptr | |
582 | * @adjust_link: Callback for the enet controller to respond to changes: in the | |
583 | * link state. | |
584 | * @phy_link_change: Callback for phylink for notification of link change | |
585 | * @macsec_ops: MACsec offloading ops. | |
00db8189 | 586 | * |
4069a572 AL |
587 | * @speed: Current link speed |
588 | * @duplex: Current duplex | |
4217a64e | 589 | * @port: Current port |
4069a572 AL |
590 | * @pause: Current pause |
591 | * @asym_pause: Current asymmetric pause | |
592 | * @supported: Combined MAC/PHY supported linkmodes | |
593 | * @advertising: Currently advertised linkmodes | |
594 | * @adv_old: Saved advertised while power saving for WoL | |
14e47d1f | 595 | * @supported_eee: supported PHY EEE linkmodes |
3eeca4e1 OR |
596 | * @advertising_eee: Currently advertised EEE linkmodes |
597 | * @eee_enabled: Flag indicating whether the EEE feature is enabled | |
e3b6876a | 598 | * @enable_tx_lpi: When True, MAC should transmit LPI to PHY |
fe0d4fd9 | 599 | * @eee_cfg: User configuration of EEE |
4069a572 | 600 | * @lp_advertising: Current link partner advertised linkmodes |
eca68a3c | 601 | * @host_interfaces: PHY interface modes supported by host |
4069a572 AL |
602 | * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited |
603 | * @autoneg: Flag autoneg being used | |
0c3e10cb | 604 | * @rate_matching: Current rate matching mode |
4069a572 AL |
605 | * @link: Current link state |
606 | * @autoneg_complete: Flag auto negotiation of the link has completed | |
607 | * @mdix: Current crossover | |
608 | * @mdix_ctrl: User setting of crossover | |
3da8ffd8 | 609 | * @pma_extable: Cached value of PMA/PMD Extended Abilities Register |
4069a572 | 610 | * @interrupts: Flag interrupts have been enabled |
1758bde2 LW |
611 | * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt |
612 | * handling shall be postponed until PHY has resumed | |
613 | * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended, | |
614 | * requiring a rerun of the interrupt handler after resume | |
4069a572 | 615 | * @interface: enum phy_interface_t value |
243ad8df RKO |
616 | * @possible_interfaces: bitmap if interface modes that the attached PHY |
617 | * will switch between depending on media speed. | |
4069a572 AL |
618 | * @skb: Netlink message for cable diagnostics |
619 | * @nest: Netlink nest used for cable diagnostics | |
620 | * @ehdr: nNtlink header for cable diagnostics | |
621 | * @phy_led_triggers: Array of LED triggers | |
622 | * @phy_num_led_triggers: Number of triggers in @phy_led_triggers | |
623 | * @led_link_trigger: LED trigger for link up/down | |
624 | * @last_triggered: last LED trigger for link speed | |
01e5b728 | 625 | * @leds: list of PHY LED structures |
4069a572 AL |
626 | * @master_slave_set: User requested master/slave configuration |
627 | * @master_slave_get: Current master/slave advertisement | |
628 | * @master_slave_state: Current master/slave configuration | |
629 | * @mii_ts: Pointer to time stamper callbacks | |
5e82147d | 630 | * @psec: Pointer to Power Sourcing Equipment control struct |
4069a572 AL |
631 | * @lock: Mutex for serialization access to PHY |
632 | * @state_queue: Work queue for state machine | |
9a0f830f | 633 | * @link_down_events: Number of times link was lost |
4069a572 AL |
634 | * @shared: Pointer to private data shared by phys in one package |
635 | * @priv: Pointer to driver private data | |
00db8189 AF |
636 | * |
637 | * interrupts currently only supports enabled or disabled, | |
638 | * but could be changed in the future to support enabling | |
639 | * and disabling specific interrupts | |
640 | * | |
641 | * Contains some infrastructure for polling and interrupt | |
642 | * handling, as well as handling shifts in PHY hardware state | |
643 | */ | |
644 | struct phy_device { | |
e5a03bfd AL |
645 | struct mdio_device mdio; |
646 | ||
00db8189 AF |
647 | /* Information about the PHY type */ |
648 | /* And management functions */ | |
0bd199fd | 649 | const struct phy_driver *drv; |
00db8189 | 650 | |
bc66fa87 XW |
651 | struct device_link *devlink; |
652 | ||
00db8189 AF |
653 | u32 phy_id; |
654 | ||
ac28b9f8 | 655 | struct phy_c45_device_ids c45_ids; |
87e5808d HK |
656 | unsigned is_c45:1; |
657 | unsigned is_internal:1; | |
658 | unsigned is_pseudo_fixed_link:1; | |
3b8b11f9 | 659 | unsigned is_gigabit_capable:1; |
87e5808d HK |
660 | unsigned has_fixups:1; |
661 | unsigned suspended:1; | |
611d779a | 662 | unsigned suspended_by_mdio_bus:1; |
87e5808d HK |
663 | unsigned sysfs_links:1; |
664 | unsigned loopback_enabled:1; | |
5eee3bb7 | 665 | unsigned downshifted_rate:1; |
b834489b | 666 | unsigned is_on_sfp_module:1; |
fba863b8 | 667 | unsigned mac_managed_pm:1; |
a7e34480 | 668 | unsigned wol_enabled:1; |
87e5808d HK |
669 | |
670 | unsigned autoneg:1; | |
671 | /* The most recently read link state */ | |
672 | unsigned link:1; | |
4950c2ba | 673 | unsigned autoneg_complete:1; |
ac28b9f8 | 674 | |
695bce8f HK |
675 | /* Interrupts are enabled */ |
676 | unsigned interrupts:1; | |
1758bde2 LW |
677 | unsigned irq_suspended:1; |
678 | unsigned irq_rerun:1; | |
695bce8f | 679 | |
0c3e10cb SA |
680 | int rate_matching; |
681 | ||
00db8189 AF |
682 | enum phy_state state; |
683 | ||
684 | u32 dev_flags; | |
685 | ||
e8a2b6a4 | 686 | phy_interface_t interface; |
243ad8df | 687 | DECLARE_PHY_INTERFACE_MASK(possible_interfaces); |
e8a2b6a4 | 688 | |
c5e38a94 AF |
689 | /* |
690 | * forced speed & duplex (no autoneg) | |
00db8189 AF |
691 | * partner speed & duplex & pause (autoneg) |
692 | */ | |
693 | int speed; | |
694 | int duplex; | |
4217a64e | 695 | int port; |
00db8189 AF |
696 | int pause; |
697 | int asym_pause; | |
bdbdac76 OR |
698 | u8 master_slave_get; |
699 | u8 master_slave_set; | |
700 | u8 master_slave_state; | |
00db8189 | 701 | |
3c1bcc86 AL |
702 | /* Union of PHY and Attached devices' supported link modes */ |
703 | /* See ethtool.h for more info */ | |
704 | __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); | |
705 | __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); | |
c0ec3c27 | 706 | __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); |
65b27995 HK |
707 | /* used with phy_speed_down */ |
708 | __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); | |
49168d19 | 709 | /* used for eee validation and configuration*/ |
14e47d1f | 710 | __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee); |
3eeca4e1 OR |
711 | __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee); |
712 | bool eee_enabled; | |
00db8189 | 713 | |
eca68a3c MB |
714 | /* Host supported PHY interface types. Should be ignored if empty. */ |
715 | DECLARE_PHY_INTERFACE_MASK(host_interfaces); | |
716 | ||
d853d145 | 717 | /* Energy efficient ethernet modes which should be prohibited */ |
718 | u32 eee_broken_modes; | |
e3b6876a | 719 | bool enable_tx_lpi; |
fe0d4fd9 | 720 | struct eee_config eee_cfg; |
d853d145 | 721 | |
2e0bc452 ZB |
722 | #ifdef CONFIG_LED_TRIGGER_PHY |
723 | struct phy_led_trigger *phy_led_triggers; | |
724 | unsigned int phy_num_led_triggers; | |
725 | struct phy_led_trigger *last_triggered; | |
3928ee64 MS |
726 | |
727 | struct phy_led_trigger *led_link_trigger; | |
2e0bc452 | 728 | #endif |
01e5b728 | 729 | struct list_head leds; |
2e0bc452 | 730 | |
c5e38a94 AF |
731 | /* |
732 | * Interrupt number for this PHY | |
733 | * -1 means no interrupt | |
734 | */ | |
00db8189 AF |
735 | int irq; |
736 | ||
737 | /* private data pointer */ | |
738 | /* For use by PHYs to maintain extra state */ | |
739 | void *priv; | |
740 | ||
63490847 MW |
741 | /* shared data pointer */ |
742 | /* For use by PHYs inside the same package that need a shared state. */ | |
743 | struct phy_package_shared *shared; | |
744 | ||
1dd3f212 AL |
745 | /* Reporting cable test results */ |
746 | struct sk_buff *skb; | |
747 | void *ehdr; | |
748 | struct nlattr *nest; | |
749 | ||
00db8189 | 750 | /* Interrupt and Polling infrastructure */ |
a390d1f3 | 751 | struct delayed_work state_queue; |
00db8189 | 752 | |
35b5f6b1 | 753 | struct mutex lock; |
00db8189 | 754 | |
298e54fa RK |
755 | /* This may be modified under the rtnl lock */ |
756 | bool sfp_bus_attached; | |
757 | struct sfp_bus *sfp_bus; | |
9525ae83 | 758 | struct phylink *phylink; |
00db8189 | 759 | struct net_device *attached_dev; |
4715f65f | 760 | struct mii_timestamper *mii_ts; |
5e82147d | 761 | struct pse_control *psec; |
00db8189 | 762 | |
634ec36c | 763 | u8 mdix; |
f4ed2fe3 | 764 | u8 mdix_ctrl; |
634ec36c | 765 | |
3da8ffd8 AT |
766 | int pma_extable; |
767 | ||
9a0f830f JK |
768 | unsigned int link_down_events; |
769 | ||
a307593a | 770 | void (*phy_link_change)(struct phy_device *phydev, bool up); |
00db8189 | 771 | void (*adjust_link)(struct net_device *dev); |
2e181358 AT |
772 | |
773 | #if IS_ENABLED(CONFIG_MACSEC) | |
774 | /* MACsec management functions */ | |
775 | const struct macsec_ops *macsec_ops; | |
776 | #endif | |
00db8189 | 777 | }; |
7eab14de | 778 | |
7d885863 MW |
779 | /* Generic phy_device::dev_flags */ |
780 | #define PHY_F_NO_IRQ 0x80000000 | |
781 | ||
7eab14de AL |
782 | static inline struct phy_device *to_phy_device(const struct device *dev) |
783 | { | |
784 | return container_of(to_mdio_device(dev), struct phy_device, mdio); | |
785 | } | |
00db8189 | 786 | |
4069a572 AL |
787 | /** |
788 | * struct phy_tdr_config - Configuration of a TDR raw test | |
789 | * | |
790 | * @first: Distance for first data collection point | |
791 | * @last: Distance for last data collection point | |
792 | * @step: Step between data collection points | |
793 | * @pair: Bitmap of cable pairs to collect data for | |
794 | * | |
795 | * A structure containing possible configuration parameters | |
f2bc8ad3 AL |
796 | * for a TDR cable test. The driver does not need to implement |
797 | * all the parameters, but should report what is actually used. | |
4069a572 | 798 | * All distances are in centimeters. |
f2bc8ad3 AL |
799 | */ |
800 | struct phy_tdr_config { | |
801 | u32 first; | |
802 | u32 last; | |
803 | u32 step; | |
804 | s8 pair; | |
805 | }; | |
806 | #define PHY_PAIR_ALL -1 | |
807 | ||
8580e16c PB |
808 | /** |
809 | * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision | |
810 | * Avoidance) Reconciliation Sublayer. | |
811 | * | |
812 | * @version: read-only PLCA register map version. -1 = not available. Ignored | |
813 | * when setting the configuration. Format is the same as reported by the PLCA | |
814 | * IDVER register (31.CA00). -1 = not available. | |
815 | * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't | |
816 | * set. 0 = disabled, anything else = enabled. | |
817 | * @node_id: the PLCA local node identifier. -1 = not available / don't set. | |
818 | * Allowed values [0 .. 254]. 255 = node disabled. | |
819 | * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only | |
820 | * meaningful for the coordinator (node_id = 0). -1 = not available / don't | |
821 | * set. Allowed values [1 .. 255]. | |
822 | * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the | |
823 | * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for | |
824 | * more details. The to_timer shall be set equal over all nodes. | |
825 | * -1 = not available / don't set. Allowed values [0 .. 255]. | |
826 | * @burst_cnt: controls how many additional frames a node is allowed to send in | |
827 | * single transmit opportunity (TO). The default value of 0 means that the | |
828 | * node is allowed exactly one frame per TO. A value of 1 allows two frames | |
829 | * per TO, and so on. -1 = not available / don't set. | |
830 | * Allowed values [0 .. 255]. | |
831 | * @burst_tmr: controls how many bit times to wait for the MAC to send a new | |
832 | * frame before interrupting the burst. This value should be set to a value | |
833 | * greater than the MAC inter-packet gap (which is typically 96 bits). | |
834 | * -1 = not available / don't set. Allowed values [0 .. 255]. | |
835 | * | |
836 | * A structure containing configuration parameters for setting/getting the PLCA | |
837 | * RS configuration. The driver does not need to implement all the parameters, | |
838 | * but should report what is actually used. | |
839 | */ | |
840 | struct phy_plca_cfg { | |
841 | int version; | |
842 | int enabled; | |
843 | int node_id; | |
844 | int node_cnt; | |
845 | int to_tmr; | |
846 | int burst_cnt; | |
847 | int burst_tmr; | |
848 | }; | |
849 | ||
850 | /** | |
851 | * struct phy_plca_status - Status of the PLCA (Physical Layer Collision | |
852 | * Avoidance) Reconciliation Sublayer. | |
853 | * | |
854 | * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS | |
855 | * register(31.CA03), indicating BEACON activity. | |
856 | * | |
857 | * A structure containing status information of the PLCA RS configuration. | |
858 | * The driver does not need to implement all the parameters, but should report | |
859 | * what is actually used. | |
860 | */ | |
861 | struct phy_plca_status { | |
862 | bool pst; | |
863 | }; | |
864 | ||
7ae215ee CM |
865 | /* Modes for PHY LED configuration */ |
866 | enum phy_led_modes { | |
867 | PHY_LED_ACTIVE_LOW = 0, | |
868 | PHY_LED_INACTIVE_HIGH_IMPEDANCE = 1, | |
869 | ||
870 | /* keep it last */ | |
871 | __PHY_LED_MODES_NUM, | |
872 | }; | |
873 | ||
01e5b728 AL |
874 | /** |
875 | * struct phy_led: An LED driven by the PHY | |
876 | * | |
877 | * @list: List of LEDs | |
68481818 | 878 | * @phydev: PHY this LED is attached to |
01e5b728 AL |
879 | * @led_cdev: Standard LED class structure |
880 | * @index: Number of the LED | |
881 | */ | |
882 | struct phy_led { | |
883 | struct list_head list; | |
68481818 | 884 | struct phy_device *phydev; |
01e5b728 AL |
885 | struct led_classdev led_cdev; |
886 | u8 index; | |
887 | }; | |
888 | ||
68481818 AL |
889 | #define to_phy_led(d) container_of(d, struct phy_led, led_cdev) |
890 | ||
4069a572 AL |
891 | /** |
892 | * struct phy_driver - Driver structure for a particular PHY type | |
00db8189 | 893 | * |
4069a572 AL |
894 | * @mdiodrv: Data common to all MDIO devices |
895 | * @phy_id: The result of reading the UID registers of this PHY | |
00db8189 AF |
896 | * type, and ANDing them with the phy_id_mask. This driver |
897 | * only works for PHYs with IDs which match this field | |
4069a572 AL |
898 | * @name: The friendly name of this PHY type |
899 | * @phy_id_mask: Defines the important bits of the phy_id | |
900 | * @features: A mandatory list of features (speed, duplex, etc) | |
3e64cf7a | 901 | * supported by this PHY |
4069a572 | 902 | * @flags: A bitfield defining certain other features this PHY |
00db8189 | 903 | * supports (like interrupts) |
4069a572 | 904 | * @driver_data: Static driver data |
00db8189 | 905 | * |
00fde795 HK |
906 | * All functions are optional. If config_aneg or read_status |
907 | * are not implemented, the phy core uses the genphy versions. | |
908 | * Note that none of these functions should be called from | |
909 | * interrupt time. The goal is for the bus read/write functions | |
910 | * to be able to block when the bus transaction is happening, | |
911 | * and be freed up by an interrupt (The MPC85xx has this ability, | |
912 | * though it is not currently supported in the driver). | |
00db8189 AF |
913 | */ |
914 | struct phy_driver { | |
a9049e0c | 915 | struct mdio_driver_common mdiodrv; |
00db8189 AF |
916 | u32 phy_id; |
917 | char *name; | |
511e3036 | 918 | u32 phy_id_mask; |
719655a1 | 919 | const unsigned long * const features; |
00db8189 | 920 | u32 flags; |
860f6e9e | 921 | const void *driver_data; |
00db8189 | 922 | |
4069a572 AL |
923 | /** |
924 | * @soft_reset: Called to issue a PHY software reset | |
9df81dd7 FF |
925 | */ |
926 | int (*soft_reset)(struct phy_device *phydev); | |
927 | ||
4069a572 AL |
928 | /** |
929 | * @config_init: Called to initialize the PHY, | |
c5e38a94 AF |
930 | * including after a reset |
931 | */ | |
00db8189 AF |
932 | int (*config_init)(struct phy_device *phydev); |
933 | ||
4069a572 AL |
934 | /** |
935 | * @probe: Called during discovery. Used to set | |
c5e38a94 AF |
936 | * up device-specific structures, if any |
937 | */ | |
00db8189 AF |
938 | int (*probe)(struct phy_device *phydev); |
939 | ||
4069a572 AL |
940 | /** |
941 | * @get_features: Probe the hardware to determine what | |
942 | * abilities it has. Should only set phydev->supported. | |
efbdfdc2 AL |
943 | */ |
944 | int (*get_features)(struct phy_device *phydev); | |
945 | ||
0c3e10cb SA |
946 | /** |
947 | * @get_rate_matching: Get the supported type of rate matching for a | |
948 | * particular phy interface. This is used by phy consumers to determine | |
949 | * whether to advertise lower-speed modes for that interface. It is | |
950 | * assumed that if a rate matching mode is supported on an interface, | |
951 | * then that interface's rate can be adapted to all slower link speeds | |
6d4cfcf9 | 952 | * supported by the phy. If the interface is not supported, this should |
0c3e10cb SA |
953 | * return %RATE_MATCH_NONE. |
954 | */ | |
955 | int (*get_rate_matching)(struct phy_device *phydev, | |
956 | phy_interface_t iface); | |
957 | ||
00db8189 | 958 | /* PHY Power Management */ |
4069a572 | 959 | /** @suspend: Suspend the hardware, saving state if needed */ |
00db8189 | 960 | int (*suspend)(struct phy_device *phydev); |
4069a572 | 961 | /** @resume: Resume the hardware, restoring state if needed */ |
00db8189 AF |
962 | int (*resume)(struct phy_device *phydev); |
963 | ||
4069a572 AL |
964 | /** |
965 | * @config_aneg: Configures the advertisement and resets | |
00db8189 AF |
966 | * autonegotiation if phydev->autoneg is on, |
967 | * forces the speed to the current settings in phydev | |
c5e38a94 AF |
968 | * if phydev->autoneg is off |
969 | */ | |
00db8189 AF |
970 | int (*config_aneg)(struct phy_device *phydev); |
971 | ||
4069a572 | 972 | /** @aneg_done: Determines the auto negotiation result */ |
76a423a3 FF |
973 | int (*aneg_done)(struct phy_device *phydev); |
974 | ||
4069a572 | 975 | /** @read_status: Determines the negotiated speed and duplex */ |
00db8189 AF |
976 | int (*read_status)(struct phy_device *phydev); |
977 | ||
767143a1 JK |
978 | /** |
979 | * @config_intr: Enables or disables interrupts. | |
6527b938 IC |
980 | * It should also clear any pending interrupts prior to enabling the |
981 | * IRQs and after disabling them. | |
a8729eb3 | 982 | */ |
6527b938 | 983 | int (*config_intr)(struct phy_device *phydev); |
a8729eb3 | 984 | |
4069a572 | 985 | /** @handle_interrupt: Override default interrupt handling */ |
9010f9de | 986 | irqreturn_t (*handle_interrupt)(struct phy_device *phydev); |
49644e68 | 987 | |
4069a572 | 988 | /** @remove: Clears up any memory if needed */ |
00db8189 AF |
989 | void (*remove)(struct phy_device *phydev); |
990 | ||
4069a572 AL |
991 | /** |
992 | * @match_phy_device: Returns true if this is a suitable | |
993 | * driver for the given phydev. If NULL, matching is based on | |
994 | * phy_id and phy_id_mask. | |
a30e2c18 DD |
995 | */ |
996 | int (*match_phy_device)(struct phy_device *phydev); | |
997 | ||
4069a572 AL |
998 | /** |
999 | * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY | |
1000 | * register changes to enable Wake on LAN, so set_wol is | |
1001 | * provided to be called in the ethernet driver's set_wol | |
1002 | * function. | |
1003 | */ | |
42e836eb MS |
1004 | int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); |
1005 | ||
4069a572 AL |
1006 | /** |
1007 | * @get_wol: See set_wol, but for checking whether Wake on LAN | |
1008 | * is enabled. | |
1009 | */ | |
42e836eb MS |
1010 | void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); |
1011 | ||
4069a572 AL |
1012 | /** |
1013 | * @link_change_notify: Called to inform a PHY device driver | |
1014 | * when the core is about to change the link state. This | |
1015 | * callback is supposed to be used as fixup hook for drivers | |
1016 | * that need to take action when the link state | |
1017 | * changes. Drivers are by no means allowed to mess with the | |
2b8f2a28 DM |
1018 | * PHY device structure in their implementations. |
1019 | */ | |
1020 | void (*link_change_notify)(struct phy_device *dev); | |
1021 | ||
4069a572 AL |
1022 | /** |
1023 | * @read_mmd: PHY specific driver override for reading a MMD | |
1024 | * register. This function is optional for PHY specific | |
1025 | * drivers. When not provided, the default MMD read function | |
1026 | * will be used by phy_read_mmd(), which will use either a | |
1027 | * direct read for Clause 45 PHYs or an indirect read for | |
1028 | * Clause 22 PHYs. devnum is the MMD device number within the | |
1029 | * PHY device, regnum is the register within the selected MMD | |
1030 | * device. | |
1ee6b9bc RK |
1031 | */ |
1032 | int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); | |
1033 | ||
4069a572 AL |
1034 | /** |
1035 | * @write_mmd: PHY specific driver override for writing a MMD | |
1036 | * register. This function is optional for PHY specific | |
1037 | * drivers. When not provided, the default MMD write function | |
1038 | * will be used by phy_write_mmd(), which will use either a | |
1039 | * direct write for Clause 45 PHYs, or an indirect write for | |
1040 | * Clause 22 PHYs. devnum is the MMD device number within the | |
1041 | * PHY device, regnum is the register within the selected MMD | |
1042 | * device. val is the value to be written. | |
1ee6b9bc RK |
1043 | */ |
1044 | int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, | |
1045 | u16 val); | |
1046 | ||
4069a572 | 1047 | /** @read_page: Return the current PHY register page number */ |
78ffc4ac | 1048 | int (*read_page)(struct phy_device *dev); |
4069a572 | 1049 | /** @write_page: Set the current PHY register page number */ |
78ffc4ac RK |
1050 | int (*write_page)(struct phy_device *dev, int page); |
1051 | ||
4069a572 AL |
1052 | /** |
1053 | * @module_info: Get the size and type of the eeprom contained | |
1054 | * within a plug-in module | |
1055 | */ | |
2f438366 ES |
1056 | int (*module_info)(struct phy_device *dev, |
1057 | struct ethtool_modinfo *modinfo); | |
1058 | ||
4069a572 AL |
1059 | /** |
1060 | * @module_eeprom: Get the eeprom information from the plug-in | |
1061 | * module | |
1062 | */ | |
2f438366 ES |
1063 | int (*module_eeprom)(struct phy_device *dev, |
1064 | struct ethtool_eeprom *ee, u8 *data); | |
1065 | ||
4069a572 | 1066 | /** @cable_test_start: Start a cable test */ |
a68a8138 | 1067 | int (*cable_test_start)(struct phy_device *dev); |
1a644de2 | 1068 | |
4069a572 | 1069 | /** @cable_test_tdr_start: Start a raw TDR cable test */ |
f2bc8ad3 AL |
1070 | int (*cable_test_tdr_start)(struct phy_device *dev, |
1071 | const struct phy_tdr_config *config); | |
1a644de2 | 1072 | |
4069a572 AL |
1073 | /** |
1074 | * @cable_test_get_status: Once per second, or on interrupt, | |
1075 | * request the status of the test. | |
a68a8138 AL |
1076 | */ |
1077 | int (*cable_test_get_status)(struct phy_device *dev, bool *finished); | |
1078 | ||
4069a572 AL |
1079 | /* Get statistics from the PHY using ethtool */ |
1080 | /** @get_sset_count: Number of statistic counters */ | |
f3a40945 | 1081 | int (*get_sset_count)(struct phy_device *dev); |
4069a572 | 1082 | /** @get_strings: Names of the statistic counters */ |
f3a40945 | 1083 | void (*get_strings)(struct phy_device *dev, u8 *data); |
4069a572 | 1084 | /** @get_stats: Return the statistic counter values */ |
f3a40945 AL |
1085 | void (*get_stats)(struct phy_device *dev, |
1086 | struct ethtool_stats *stats, u64 *data); | |
968ad9da RL |
1087 | |
1088 | /* Get and Set PHY tunables */ | |
4069a572 | 1089 | /** @get_tunable: Return the value of a tunable */ |
968ad9da RL |
1090 | int (*get_tunable)(struct phy_device *dev, |
1091 | struct ethtool_tunable *tuna, void *data); | |
4069a572 | 1092 | /** @set_tunable: Set the value of a tunable */ |
968ad9da RL |
1093 | int (*set_tunable)(struct phy_device *dev, |
1094 | struct ethtool_tunable *tuna, | |
1095 | const void *data); | |
4069a572 | 1096 | /** @set_loopback: Set the loopback mood of the PHY */ |
f0f9b4ed | 1097 | int (*set_loopback)(struct phy_device *dev, bool enable); |
4069a572 | 1098 | /** @get_sqi: Get the signal quality indication */ |
80660219 | 1099 | int (*get_sqi)(struct phy_device *dev); |
4069a572 | 1100 | /** @get_sqi_max: Get the maximum signal quality indication */ |
80660219 | 1101 | int (*get_sqi_max)(struct phy_device *dev); |
16178c8e PB |
1102 | |
1103 | /* PLCA RS interface */ | |
1104 | /** @get_plca_cfg: Return the current PLCA configuration */ | |
1105 | int (*get_plca_cfg)(struct phy_device *dev, | |
1106 | struct phy_plca_cfg *plca_cfg); | |
1107 | /** @set_plca_cfg: Set the PLCA configuration */ | |
1108 | int (*set_plca_cfg)(struct phy_device *dev, | |
1109 | const struct phy_plca_cfg *plca_cfg); | |
1110 | /** @get_plca_status: Return the current PLCA status info */ | |
1111 | int (*get_plca_status)(struct phy_device *dev, | |
1112 | struct phy_plca_status *plca_st); | |
68481818 AL |
1113 | |
1114 | /** | |
1115 | * @led_brightness_set: Set a PHY LED brightness. Index | |
1116 | * indicates which of the PHYs led should be set. Value | |
1117 | * follows the standard LED class meaning, e.g. LED_OFF, | |
1118 | * LED_HALF, LED_FULL. | |
1119 | */ | |
1120 | int (*led_brightness_set)(struct phy_device *dev, | |
1121 | u8 index, enum led_brightness value); | |
4e901018 AL |
1122 | |
1123 | /** | |
1124 | * @led_blink_set: Set a PHY LED brightness. Index indicates | |
1125 | * which of the PHYs led should be configured to blink. Delays | |
1126 | * are in milliseconds and if both are zero then a sensible | |
1127 | * default should be chosen. The call should adjust the | |
1128 | * timings in that case and if it can't match the values | |
1129 | * specified exactly. | |
1130 | */ | |
1131 | int (*led_blink_set)(struct phy_device *dev, u8 index, | |
1132 | unsigned long *delay_on, | |
1133 | unsigned long *delay_off); | |
1dcc03c9 AL |
1134 | /** |
1135 | * @led_hw_is_supported: Can the HW support the given rules. | |
1136 | * @dev: PHY device which has the LED | |
1137 | * @index: Which LED of the PHY device | |
1138 | * @rules The core is interested in these rules | |
1139 | * | |
1140 | * Return 0 if yes, -EOPNOTSUPP if not, or an error code. | |
1141 | */ | |
1142 | int (*led_hw_is_supported)(struct phy_device *dev, u8 index, | |
1143 | unsigned long rules); | |
1144 | /** | |
1145 | * @led_hw_control_set: Set the HW to control the LED | |
1146 | * @dev: PHY device which has the LED | |
1147 | * @index: Which LED of the PHY device | |
1148 | * @rules The rules used to control the LED | |
1149 | * | |
1150 | * Returns 0, or a an error code. | |
1151 | */ | |
1152 | int (*led_hw_control_set)(struct phy_device *dev, u8 index, | |
1153 | unsigned long rules); | |
1154 | /** | |
1155 | * @led_hw_control_get: Get how the HW is controlling the LED | |
1156 | * @dev: PHY device which has the LED | |
1157 | * @index: Which LED of the PHY device | |
1158 | * @rules Pointer to the rules used to control the LED | |
1159 | * | |
1160 | * Set *@rules to how the HW is currently blinking. Returns 0 | |
1161 | * on success, or a error code if the current blinking cannot | |
1162 | * be represented in rules, or some other error happens. | |
1163 | */ | |
1164 | int (*led_hw_control_get)(struct phy_device *dev, u8 index, | |
1165 | unsigned long *rules); | |
1166 | ||
7ae215ee CM |
1167 | /** |
1168 | * @led_polarity_set: Set the LED polarity modes | |
1169 | * @dev: PHY device which has the LED | |
1170 | * @index: Which LED of the PHY device | |
1171 | * @modes: bitmap of LED polarity modes | |
1172 | * | |
1173 | * Configure LED with all the required polarity modes in @modes | |
1174 | * to make it correctly turn ON or OFF. | |
1175 | * | |
1176 | * Returns 0, or an error code. | |
1177 | */ | |
1178 | int (*led_polarity_set)(struct phy_device *dev, int index, | |
1179 | unsigned long modes); | |
00db8189 | 1180 | }; |
a9049e0c AL |
1181 | #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ |
1182 | struct phy_driver, mdiodrv) | |
00db8189 | 1183 | |
f62220d3 AF |
1184 | #define PHY_ANY_ID "MATCH ANY PHY" |
1185 | #define PHY_ANY_UID 0xffffffff | |
1186 | ||
aa2af2eb HK |
1187 | #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) |
1188 | #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) | |
1189 | #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) | |
1190 | ||
4b159f50 RK |
1191 | /** |
1192 | * phy_id_compare - compare @id1 with @id2 taking account of @mask | |
1193 | * @id1: first PHY ID | |
1194 | * @id2: second PHY ID | |
1195 | * @mask: the PHY ID mask, set bits are significant in matching | |
1196 | * | |
1197 | * Return true if the bits from @id1 and @id2 specified by @mask match. | |
1198 | * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask). | |
1199 | */ | |
1200 | static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask) | |
1201 | { | |
1202 | return !((id1 ^ id2) & mask); | |
1203 | } | |
1204 | ||
1205 | /** | |
1206 | * phydev_id_compare - compare @id with the PHY's Clause 22 ID | |
1207 | * @phydev: the PHY device | |
1208 | * @id: the PHY ID to be matched | |
1209 | * | |
1210 | * Compare the @phydev clause 22 ID with the provided @id and return true or | |
1211 | * false depending whether it matches, using the bound driver mask. The | |
1212 | * @phydev must be bound to a driver. | |
1213 | */ | |
1214 | static inline bool phydev_id_compare(struct phy_device *phydev, u32 id) | |
1215 | { | |
1216 | return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask); | |
1217 | } | |
1218 | ||
f62220d3 AF |
1219 | /* A Structure for boards to register fixups with the PHY Lib */ |
1220 | struct phy_fixup { | |
1221 | struct list_head list; | |
4567d686 | 1222 | char bus_id[MII_BUS_ID_SIZE + 3]; |
f62220d3 AF |
1223 | u32 phy_uid; |
1224 | u32 phy_uid_mask; | |
1225 | int (*run)(struct phy_device *phydev); | |
1226 | }; | |
1227 | ||
da4625ac RK |
1228 | const char *phy_speed_to_str(int speed); |
1229 | const char *phy_duplex_to_str(unsigned int duplex); | |
0c3e10cb | 1230 | const char *phy_rate_matching_to_str(int rate_matching); |
da4625ac | 1231 | |
c04ade27 MC |
1232 | int phy_interface_num_ports(phy_interface_t interface); |
1233 | ||
0ccb4fc6 RK |
1234 | /* A structure for mapping a particular speed and duplex |
1235 | * combination to a particular SUPPORTED and ADVERTISED value | |
1236 | */ | |
1237 | struct phy_setting { | |
1238 | u32 speed; | |
1239 | u8 duplex; | |
1240 | u8 bit; | |
1241 | }; | |
1242 | ||
1243 | const struct phy_setting * | |
1244 | phy_lookup_setting(int speed, int duplex, const unsigned long *mask, | |
3c1bcc86 | 1245 | bool exact); |
0ccb4fc6 | 1246 | size_t phy_speeds(unsigned int *speeds, size_t size, |
3c1bcc86 | 1247 | unsigned long *mask); |
a4eaed9f | 1248 | void of_set_phy_supported(struct phy_device *phydev); |
3feb9b23 | 1249 | void of_set_phy_eee_broken(struct phy_device *phydev); |
331c56ac | 1250 | int phy_speed_down_core(struct phy_device *phydev); |
0ccb4fc6 | 1251 | |
2b3e88ea HK |
1252 | /** |
1253 | * phy_is_started - Convenience function to check whether PHY is started | |
1254 | * @phydev: The phy_device struct | |
1255 | */ | |
1256 | static inline bool phy_is_started(struct phy_device *phydev) | |
1257 | { | |
a2fc9d7e | 1258 | return phydev->state >= PHY_UP; |
2b3e88ea HK |
1259 | } |
1260 | ||
2d880b87 | 1261 | void phy_resolve_aneg_pause(struct phy_device *phydev); |
8c5e850c | 1262 | void phy_resolve_aneg_linkmode(struct phy_device *phydev); |
5eee3bb7 | 1263 | void phy_check_downshift(struct phy_device *phydev); |
8c5e850c | 1264 | |
2e888103 LB |
1265 | /** |
1266 | * phy_read - Convenience function for reading a given PHY register | |
1267 | * @phydev: the phy_device struct | |
1268 | * @regnum: register number to read | |
1269 | * | |
1270 | * NOTE: MUST NOT be called from interrupt context, | |
1271 | * because the bus read/write functions may wait for an interrupt | |
1272 | * to conclude the operation. | |
1273 | */ | |
abf35df2 | 1274 | static inline int phy_read(struct phy_device *phydev, u32 regnum) |
2e888103 | 1275 | { |
e5a03bfd | 1276 | return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); |
2e888103 LB |
1277 | } |
1278 | ||
fcbd30d0 DZ |
1279 | #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ |
1280 | timeout_us, sleep_before_read) \ | |
1281 | ({ \ | |
4ec73295 RKO |
1282 | int __ret, __val; \ |
1283 | __ret = read_poll_timeout(__val = phy_read, val, \ | |
1284 | __val < 0 || (cond), \ | |
fcbd30d0 | 1285 | sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ |
4ec73295 RKO |
1286 | if (__val < 0) \ |
1287 | __ret = __val; \ | |
fcbd30d0 DZ |
1288 | if (__ret) \ |
1289 | phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ | |
1290 | __ret; \ | |
1291 | }) | |
1292 | ||
788f9933 RK |
1293 | /** |
1294 | * __phy_read - convenience function for reading a given PHY register | |
1295 | * @phydev: the phy_device struct | |
1296 | * @regnum: register number to read | |
1297 | * | |
1298 | * The caller must have taken the MDIO bus lock. | |
1299 | */ | |
1300 | static inline int __phy_read(struct phy_device *phydev, u32 regnum) | |
1301 | { | |
1302 | return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); | |
1303 | } | |
1304 | ||
2e888103 LB |
1305 | /** |
1306 | * phy_write - Convenience function for writing a given PHY register | |
1307 | * @phydev: the phy_device struct | |
1308 | * @regnum: register number to write | |
1309 | * @val: value to write to @regnum | |
1310 | * | |
1311 | * NOTE: MUST NOT be called from interrupt context, | |
1312 | * because the bus read/write functions may wait for an interrupt | |
1313 | * to conclude the operation. | |
1314 | */ | |
abf35df2 | 1315 | static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) |
2e888103 | 1316 | { |
e5a03bfd | 1317 | return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); |
2e888103 LB |
1318 | } |
1319 | ||
788f9933 RK |
1320 | /** |
1321 | * __phy_write - Convenience function for writing a given PHY register | |
1322 | * @phydev: the phy_device struct | |
1323 | * @regnum: register number to write | |
1324 | * @val: value to write to @regnum | |
1325 | * | |
1326 | * The caller must have taken the MDIO bus lock. | |
1327 | */ | |
1328 | static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) | |
1329 | { | |
1330 | return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, | |
1331 | val); | |
1332 | } | |
1333 | ||
6cc7cf81 RK |
1334 | /** |
1335 | * __phy_modify_changed() - Convenience function for modifying a PHY register | |
1336 | * @phydev: a pointer to a &struct phy_device | |
1337 | * @regnum: register number | |
1338 | * @mask: bit mask of bits to clear | |
1339 | * @set: bit mask of bits to set | |
1340 | * | |
1341 | * Unlocked helper function which allows a PHY register to be modified as | |
1342 | * new register value = (old register value & ~mask) | set | |
1343 | * | |
1344 | * Returns negative errno, 0 if there was no change, and 1 in case of change | |
1345 | */ | |
1346 | static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, | |
1347 | u16 mask, u16 set) | |
1348 | { | |
1349 | return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, | |
1350 | regnum, mask, set); | |
1351 | } | |
1352 | ||
e86c6569 | 1353 | /* |
1878f0dc NY |
1354 | * phy_read_mmd - Convenience function for reading a register |
1355 | * from an MMD on a given PHY. | |
1878f0dc NY |
1356 | */ |
1357 | int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); | |
1358 | ||
4069a572 AL |
1359 | /** |
1360 | * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a | |
1361 | * condition is met or a timeout occurs | |
1362 | * | |
1363 | * @phydev: The phy_device struct | |
1364 | * @devaddr: The MMD to read from | |
1365 | * @regnum: The register on the MMD to read | |
1366 | * @val: Variable to read the register into | |
1367 | * @cond: Break condition (usually involving @val) | |
1368 | * @sleep_us: Maximum time to sleep between reads in us (0 | |
1369 | * tight-loops). Should be less than ~20ms since usleep_range | |
1370 | * is used (see Documentation/timers/timers-howto.rst). | |
1371 | * @timeout_us: Timeout in us, 0 means never timeout | |
1372 | * @sleep_before_read: if it is true, sleep @sleep_us before read. | |
1373 | * Returns 0 on success and -ETIMEDOUT upon a timeout. In either | |
1374 | * case, the last read value at @args is stored in @val. Must not | |
1375 | * be called from atomic context if sleep_us or timeout_us are used. | |
1376 | */ | |
bd971ff0 DZ |
1377 | #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ |
1378 | sleep_us, timeout_us, sleep_before_read) \ | |
1379 | ({ \ | |
4ec73295 RKO |
1380 | int __ret, __val; \ |
1381 | __ret = read_poll_timeout(__val = phy_read_mmd, val, \ | |
1382 | __val < 0 || (cond), \ | |
bd971ff0 DZ |
1383 | sleep_us, timeout_us, sleep_before_read, \ |
1384 | phydev, devaddr, regnum); \ | |
4ec73295 RKO |
1385 | if (__val < 0) \ |
1386 | __ret = __val; \ | |
bd971ff0 DZ |
1387 | if (__ret) \ |
1388 | phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ | |
1389 | __ret; \ | |
1390 | }) | |
1391 | ||
e86c6569 | 1392 | /* |
1878f0dc NY |
1393 | * __phy_read_mmd - Convenience function for reading a register |
1394 | * from an MMD on a given PHY. | |
1878f0dc NY |
1395 | */ |
1396 | int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); | |
1397 | ||
e86c6569 | 1398 | /* |
1878f0dc NY |
1399 | * phy_write_mmd - Convenience function for writing a register |
1400 | * on an MMD on a given PHY. | |
1878f0dc NY |
1401 | */ |
1402 | int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); | |
1403 | ||
e86c6569 | 1404 | /* |
1878f0dc NY |
1405 | * __phy_write_mmd - Convenience function for writing a register |
1406 | * on an MMD on a given PHY. | |
1878f0dc NY |
1407 | */ |
1408 | int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); | |
1409 | ||
b8554d4f HK |
1410 | int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, |
1411 | u16 set); | |
1412 | int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, | |
1413 | u16 set); | |
788f9933 | 1414 | int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); |
2b74e5be | 1415 | int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); |
788f9933 | 1416 | |
b8554d4f HK |
1417 | int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, |
1418 | u16 mask, u16 set); | |
1419 | int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, | |
1420 | u16 mask, u16 set); | |
1878f0dc | 1421 | int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, |
b8554d4f | 1422 | u16 mask, u16 set); |
1878f0dc | 1423 | int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, |
b8554d4f | 1424 | u16 mask, u16 set); |
1878f0dc | 1425 | |
ac8322d8 HK |
1426 | /** |
1427 | * __phy_set_bits - Convenience function for setting bits in a PHY register | |
1428 | * @phydev: the phy_device struct | |
1429 | * @regnum: register number to write | |
1430 | * @val: bits to set | |
1431 | * | |
1432 | * The caller must have taken the MDIO bus lock. | |
1433 | */ | |
1434 | static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) | |
1435 | { | |
1436 | return __phy_modify(phydev, regnum, 0, val); | |
1437 | } | |
1438 | ||
1439 | /** | |
1440 | * __phy_clear_bits - Convenience function for clearing bits in a PHY register | |
1441 | * @phydev: the phy_device struct | |
1442 | * @regnum: register number to write | |
1443 | * @val: bits to clear | |
1444 | * | |
1445 | * The caller must have taken the MDIO bus lock. | |
1446 | */ | |
1447 | static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, | |
1448 | u16 val) | |
1449 | { | |
1450 | return __phy_modify(phydev, regnum, val, 0); | |
1451 | } | |
1452 | ||
1453 | /** | |
1454 | * phy_set_bits - Convenience function for setting bits in a PHY register | |
1455 | * @phydev: the phy_device struct | |
1456 | * @regnum: register number to write | |
1457 | * @val: bits to set | |
1458 | */ | |
1459 | static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) | |
1460 | { | |
1461 | return phy_modify(phydev, regnum, 0, val); | |
1462 | } | |
1463 | ||
1464 | /** | |
1465 | * phy_clear_bits - Convenience function for clearing bits in a PHY register | |
1466 | * @phydev: the phy_device struct | |
1467 | * @regnum: register number to write | |
1468 | * @val: bits to clear | |
1469 | */ | |
1470 | static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) | |
1471 | { | |
1472 | return phy_modify(phydev, regnum, val, 0); | |
1473 | } | |
1474 | ||
1878f0dc NY |
1475 | /** |
1476 | * __phy_set_bits_mmd - Convenience function for setting bits in a register | |
1477 | * on MMD | |
1478 | * @phydev: the phy_device struct | |
1479 | * @devad: the MMD containing register to modify | |
1480 | * @regnum: register number to modify | |
1481 | * @val: bits to set | |
1482 | * | |
1483 | * The caller must have taken the MDIO bus lock. | |
1484 | */ | |
1485 | static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, | |
1486 | u32 regnum, u16 val) | |
1487 | { | |
1488 | return __phy_modify_mmd(phydev, devad, regnum, 0, val); | |
1489 | } | |
1490 | ||
1491 | /** | |
1492 | * __phy_clear_bits_mmd - Convenience function for clearing bits in a register | |
1493 | * on MMD | |
1494 | * @phydev: the phy_device struct | |
1495 | * @devad: the MMD containing register to modify | |
1496 | * @regnum: register number to modify | |
1497 | * @val: bits to clear | |
1498 | * | |
1499 | * The caller must have taken the MDIO bus lock. | |
1500 | */ | |
1501 | static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, | |
1502 | u32 regnum, u16 val) | |
1503 | { | |
1504 | return __phy_modify_mmd(phydev, devad, regnum, val, 0); | |
1505 | } | |
1506 | ||
1507 | /** | |
1508 | * phy_set_bits_mmd - Convenience function for setting bits in a register | |
1509 | * on MMD | |
1510 | * @phydev: the phy_device struct | |
1511 | * @devad: the MMD containing register to modify | |
1512 | * @regnum: register number to modify | |
1513 | * @val: bits to set | |
1514 | */ | |
1515 | static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, | |
1516 | u32 regnum, u16 val) | |
1517 | { | |
1518 | return phy_modify_mmd(phydev, devad, regnum, 0, val); | |
1519 | } | |
1520 | ||
1521 | /** | |
1522 | * phy_clear_bits_mmd - Convenience function for clearing bits in a register | |
1523 | * on MMD | |
1524 | * @phydev: the phy_device struct | |
1525 | * @devad: the MMD containing register to modify | |
1526 | * @regnum: register number to modify | |
1527 | * @val: bits to clear | |
1528 | */ | |
1529 | static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, | |
1530 | u32 regnum, u16 val) | |
1531 | { | |
1532 | return phy_modify_mmd(phydev, devad, regnum, val, 0); | |
1533 | } | |
1534 | ||
2c7b4921 FF |
1535 | /** |
1536 | * phy_interrupt_is_valid - Convenience function for testing a given PHY irq | |
1537 | * @phydev: the phy_device struct | |
1538 | * | |
1539 | * NOTE: must be kept in sync with addition/removal of PHY_POLL and | |
93e8990c | 1540 | * PHY_MAC_INTERRUPT |
2c7b4921 FF |
1541 | */ |
1542 | static inline bool phy_interrupt_is_valid(struct phy_device *phydev) | |
1543 | { | |
93e8990c | 1544 | return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; |
2c7b4921 FF |
1545 | } |
1546 | ||
3c507b8a HK |
1547 | /** |
1548 | * phy_polling_mode - Convenience function for testing whether polling is | |
1549 | * used to detect PHY status changes | |
1550 | * @phydev: the phy_device struct | |
1551 | */ | |
1552 | static inline bool phy_polling_mode(struct phy_device *phydev) | |
1553 | { | |
97c22438 AL |
1554 | if (phydev->state == PHY_CABLETEST) |
1555 | if (phydev->drv->flags & PHY_POLL_CABLE_TEST) | |
1556 | return true; | |
1557 | ||
3c507b8a HK |
1558 | return phydev->irq == PHY_POLL; |
1559 | } | |
1560 | ||
0e5dafc8 RC |
1561 | /** |
1562 | * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. | |
1563 | * @phydev: the phy_device struct | |
1564 | */ | |
1565 | static inline bool phy_has_hwtstamp(struct phy_device *phydev) | |
1566 | { | |
4715f65f | 1567 | return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; |
0e5dafc8 RC |
1568 | } |
1569 | ||
1570 | /** | |
1571 | * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. | |
1572 | * @phydev: the phy_device struct | |
1573 | */ | |
1574 | static inline bool phy_has_rxtstamp(struct phy_device *phydev) | |
1575 | { | |
4715f65f | 1576 | return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; |
0e5dafc8 RC |
1577 | } |
1578 | ||
1579 | /** | |
1580 | * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or | |
1581 | * PTP hardware clock capabilities. | |
1582 | * @phydev: the phy_device struct | |
1583 | */ | |
1584 | static inline bool phy_has_tsinfo(struct phy_device *phydev) | |
1585 | { | |
4715f65f | 1586 | return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; |
0e5dafc8 RC |
1587 | } |
1588 | ||
1589 | /** | |
1590 | * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. | |
1591 | * @phydev: the phy_device struct | |
1592 | */ | |
1593 | static inline bool phy_has_txtstamp(struct phy_device *phydev) | |
1594 | { | |
4715f65f | 1595 | return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; |
0e5dafc8 RC |
1596 | } |
1597 | ||
446e2305 KM |
1598 | static inline int phy_hwtstamp(struct phy_device *phydev, |
1599 | struct kernel_hwtstamp_config *cfg, | |
1600 | struct netlink_ext_ack *extack) | |
0e5dafc8 | 1601 | { |
446e2305 | 1602 | return phydev->mii_ts->hwtstamp(phydev->mii_ts, cfg, extack); |
0e5dafc8 RC |
1603 | } |
1604 | ||
1605 | static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, | |
1606 | int type) | |
1607 | { | |
4715f65f | 1608 | return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); |
0e5dafc8 RC |
1609 | } |
1610 | ||
1611 | static inline int phy_ts_info(struct phy_device *phydev, | |
1612 | struct ethtool_ts_info *tsinfo) | |
1613 | { | |
4715f65f | 1614 | return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); |
0e5dafc8 RC |
1615 | } |
1616 | ||
1617 | static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, | |
1618 | int type) | |
1619 | { | |
4715f65f | 1620 | phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); |
0e5dafc8 RC |
1621 | } |
1622 | ||
4284b6a5 FF |
1623 | /** |
1624 | * phy_is_internal - Convenience function for testing if a PHY is internal | |
1625 | * @phydev: the phy_device struct | |
1626 | */ | |
1627 | static inline bool phy_is_internal(struct phy_device *phydev) | |
1628 | { | |
1629 | return phydev->is_internal; | |
1630 | } | |
1631 | ||
b834489b RH |
1632 | /** |
1633 | * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module | |
1634 | * @phydev: the phy_device struct | |
1635 | */ | |
1636 | static inline bool phy_on_sfp(struct phy_device *phydev) | |
1637 | { | |
1638 | return phydev->is_on_sfp_module; | |
1639 | } | |
1640 | ||
32d0f783 IS |
1641 | /** |
1642 | * phy_interface_mode_is_rgmii - Convenience function for testing if a | |
1643 | * PHY interface mode is RGMII (all variants) | |
4069a572 | 1644 | * @mode: the &phy_interface_t enum |
32d0f783 IS |
1645 | */ |
1646 | static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) | |
1647 | { | |
1648 | return mode >= PHY_INTERFACE_MODE_RGMII && | |
1649 | mode <= PHY_INTERFACE_MODE_RGMII_TXID; | |
1650 | }; | |
1651 | ||
365c1e64 | 1652 | /** |
4069a572 | 1653 | * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z |
365c1e64 RK |
1654 | * negotiation |
1655 | * @mode: one of &enum phy_interface_t | |
1656 | * | |
4069a572 | 1657 | * Returns true if the PHY interface mode uses the 16-bit negotiation |
365c1e64 RK |
1658 | * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) |
1659 | */ | |
1660 | static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) | |
1661 | { | |
1662 | return mode == PHY_INTERFACE_MODE_1000BASEX || | |
1663 | mode == PHY_INTERFACE_MODE_2500BASEX; | |
1664 | } | |
1665 | ||
e463d88c FF |
1666 | /** |
1667 | * phy_interface_is_rgmii - Convenience function for testing if a PHY interface | |
1668 | * is RGMII (all variants) | |
1669 | * @phydev: the phy_device struct | |
1670 | */ | |
1671 | static inline bool phy_interface_is_rgmii(struct phy_device *phydev) | |
1672 | { | |
32d0f783 | 1673 | return phy_interface_mode_is_rgmii(phydev->interface); |
5a11dd7d FF |
1674 | }; |
1675 | ||
4069a572 | 1676 | /** |
5a11dd7d FF |
1677 | * phy_is_pseudo_fixed_link - Convenience function for testing if this |
1678 | * PHY is the CPU port facing side of an Ethernet switch, or similar. | |
1679 | * @phydev: the phy_device struct | |
1680 | */ | |
1681 | static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) | |
1682 | { | |
1683 | return phydev->is_pseudo_fixed_link; | |
e463d88c FF |
1684 | } |
1685 | ||
78ffc4ac RK |
1686 | int phy_save_page(struct phy_device *phydev); |
1687 | int phy_select_page(struct phy_device *phydev, int page); | |
1688 | int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); | |
1689 | int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); | |
1690 | int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); | |
bf22b343 HK |
1691 | int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, |
1692 | u16 mask, u16 set); | |
78ffc4ac RK |
1693 | int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, |
1694 | u16 mask, u16 set); | |
1695 | ||
7d49a32a | 1696 | struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, |
4017b4d3 SS |
1697 | bool is_c45, |
1698 | struct phy_c45_device_ids *c45_ids); | |
90eff909 | 1699 | #if IS_ENABLED(CONFIG_PHYLIB) |
114dea60 | 1700 | int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); |
0fb16976 | 1701 | struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); |
425775ed CJ |
1702 | struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); |
1703 | struct phy_device *device_phy_find_device(struct device *dev); | |
4a0faa02 | 1704 | struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode); |
ac28b9f8 | 1705 | struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); |
4dea547f | 1706 | int phy_device_register(struct phy_device *phy); |
90eff909 FF |
1707 | void phy_device_free(struct phy_device *phydev); |
1708 | #else | |
114dea60 CJ |
1709 | static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) |
1710 | { | |
1711 | return 0; | |
1712 | } | |
0fb16976 CJ |
1713 | static inline |
1714 | struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) | |
1715 | { | |
1716 | return 0; | |
1717 | } | |
1718 | ||
425775ed CJ |
1719 | static inline |
1720 | struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) | |
1721 | { | |
1722 | return NULL; | |
1723 | } | |
1724 | ||
1725 | static inline struct phy_device *device_phy_find_device(struct device *dev) | |
1726 | { | |
1727 | return NULL; | |
1728 | } | |
1729 | ||
1730 | static inline | |
1731 | struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) | |
1732 | { | |
1733 | return NULL; | |
1734 | } | |
1735 | ||
90eff909 FF |
1736 | static inline |
1737 | struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) | |
1738 | { | |
1739 | return NULL; | |
1740 | } | |
1741 | ||
1742 | static inline int phy_device_register(struct phy_device *phy) | |
1743 | { | |
1744 | return 0; | |
1745 | } | |
1746 | ||
1747 | static inline void phy_device_free(struct phy_device *phydev) { } | |
1748 | #endif /* CONFIG_PHYLIB */ | |
38737e49 | 1749 | void phy_device_remove(struct phy_device *phydev); |
8b72b301 | 1750 | int phy_get_c45_ids(struct phy_device *phydev); |
2f5cb434 | 1751 | int phy_init_hw(struct phy_device *phydev); |
481b5d93 SH |
1752 | int phy_suspend(struct phy_device *phydev); |
1753 | int phy_resume(struct phy_device *phydev); | |
9c2c2e62 | 1754 | int __phy_resume(struct phy_device *phydev); |
f0f9b4ed | 1755 | int phy_loopback(struct phy_device *phydev, bool enable); |
298e54fa RK |
1756 | void phy_sfp_attach(void *upstream, struct sfp_bus *bus); |
1757 | void phy_sfp_detach(void *upstream, struct sfp_bus *bus); | |
1758 | int phy_sfp_probe(struct phy_device *phydev, | |
1759 | const struct sfp_upstream_ops *ops); | |
4017b4d3 SS |
1760 | struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, |
1761 | phy_interface_t interface); | |
f8f76db1 | 1762 | struct phy_device *phy_find_first(struct mii_bus *bus); |
257184d7 AF |
1763 | int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, |
1764 | u32 flags, phy_interface_t interface); | |
fa94f6d9 | 1765 | int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, |
4017b4d3 SS |
1766 | void (*handler)(struct net_device *), |
1767 | phy_interface_t interface); | |
1768 | struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, | |
1769 | void (*handler)(struct net_device *), | |
1770 | phy_interface_t interface); | |
e1393456 AF |
1771 | void phy_disconnect(struct phy_device *phydev); |
1772 | void phy_detach(struct phy_device *phydev); | |
1773 | void phy_start(struct phy_device *phydev); | |
1774 | void phy_stop(struct phy_device *phydev); | |
014068dc | 1775 | int phy_config_aneg(struct phy_device *phydev); |
6a23c555 | 1776 | int _phy_start_aneg(struct phy_device *phydev); |
e1393456 | 1777 | int phy_start_aneg(struct phy_device *phydev); |
372788f9 | 1778 | int phy_aneg_done(struct phy_device *phydev); |
2b9672dd HK |
1779 | int phy_speed_down(struct phy_device *phydev, bool sync); |
1780 | int phy_speed_up(struct phy_device *phydev); | |
cf9f6079 | 1781 | bool phy_check_valid(int speed, int duplex, unsigned long *features); |
e1393456 | 1782 | |
002ba705 | 1783 | int phy_restart_aneg(struct phy_device *phydev); |
a9668491 | 1784 | int phy_reset_after_clk_enable(struct phy_device *phydev); |
00db8189 | 1785 | |
a68a8138 AL |
1786 | #if IS_ENABLED(CONFIG_PHYLIB) |
1787 | int phy_start_cable_test(struct phy_device *phydev, | |
1788 | struct netlink_ext_ack *extack); | |
1a644de2 | 1789 | int phy_start_cable_test_tdr(struct phy_device *phydev, |
f2bc8ad3 AL |
1790 | struct netlink_ext_ack *extack, |
1791 | const struct phy_tdr_config *config); | |
a68a8138 AL |
1792 | #else |
1793 | static inline | |
1794 | int phy_start_cable_test(struct phy_device *phydev, | |
1795 | struct netlink_ext_ack *extack) | |
1796 | { | |
1797 | NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); | |
1798 | return -EOPNOTSUPP; | |
1799 | } | |
1a644de2 AL |
1800 | static inline |
1801 | int phy_start_cable_test_tdr(struct phy_device *phydev, | |
f2bc8ad3 AL |
1802 | struct netlink_ext_ack *extack, |
1803 | const struct phy_tdr_config *config) | |
1a644de2 AL |
1804 | { |
1805 | NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); | |
1806 | return -EOPNOTSUPP; | |
1807 | } | |
a68a8138 AL |
1808 | #endif |
1809 | ||
bafbdd52 SS |
1810 | static inline void phy_device_reset(struct phy_device *phydev, int value) |
1811 | { | |
1812 | mdio_device_reset(&phydev->mdio, value); | |
1813 | } | |
1814 | ||
72ba48be | 1815 | #define phydev_err(_phydev, format, args...) \ |
e5a03bfd | 1816 | dev_err(&_phydev->mdio.dev, format, ##args) |
72ba48be | 1817 | |
a7936798 RV |
1818 | #define phydev_err_probe(_phydev, err, format, args...) \ |
1819 | dev_err_probe(&_phydev->mdio.dev, err, format, ##args) | |
1820 | ||
c4fabb8b AL |
1821 | #define phydev_info(_phydev, format, args...) \ |
1822 | dev_info(&_phydev->mdio.dev, format, ##args) | |
1823 | ||
ab2a605f AL |
1824 | #define phydev_warn(_phydev, format, args...) \ |
1825 | dev_warn(&_phydev->mdio.dev, format, ##args) | |
1826 | ||
72ba48be | 1827 | #define phydev_dbg(_phydev, format, args...) \ |
2eaa38d9 | 1828 | dev_dbg(&_phydev->mdio.dev, format, ##args) |
72ba48be | 1829 | |
84eff6d1 AL |
1830 | static inline const char *phydev_name(const struct phy_device *phydev) |
1831 | { | |
e5a03bfd | 1832 | return dev_name(&phydev->mdio.dev); |
84eff6d1 AL |
1833 | } |
1834 | ||
bec170e5 HK |
1835 | static inline void phy_lock_mdio_bus(struct phy_device *phydev) |
1836 | { | |
1837 | mutex_lock(&phydev->mdio.bus->mdio_lock); | |
1838 | } | |
1839 | ||
1840 | static inline void phy_unlock_mdio_bus(struct phy_device *phydev) | |
1841 | { | |
1842 | mutex_unlock(&phydev->mdio.bus->mdio_lock); | |
1843 | } | |
1844 | ||
2220943a AL |
1845 | void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) |
1846 | __printf(2, 3); | |
e27f1787 FF |
1847 | char *phy_attached_info_irq(struct phy_device *phydev) |
1848 | __malloc; | |
2220943a | 1849 | void phy_attached_info(struct phy_device *phydev); |
5acde34a RK |
1850 | |
1851 | /* Clause 22 PHY */ | |
045925e3 | 1852 | int genphy_read_abilities(struct phy_device *phydev); |
3fb69bca | 1853 | int genphy_setup_forced(struct phy_device *phydev); |
00db8189 | 1854 | int genphy_restart_aneg(struct phy_device *phydev); |
2a10ab04 | 1855 | int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); |
cd34499c | 1856 | int genphy_config_eee_advert(struct phy_device *phydev); |
f4069cd7 | 1857 | int __genphy_config_aneg(struct phy_device *phydev, bool changed); |
a9fa6e6a | 1858 | int genphy_aneg_done(struct phy_device *phydev); |
00db8189 | 1859 | int genphy_update_link(struct phy_device *phydev); |
8d3dc3ac | 1860 | int genphy_read_lpa(struct phy_device *phydev); |
0efc286a | 1861 | int genphy_read_status_fixed(struct phy_device *phydev); |
00db8189 | 1862 | int genphy_read_status(struct phy_device *phydev); |
64807c23 | 1863 | int genphy_read_master_slave(struct phy_device *phydev); |
0f0ca340 GC |
1864 | int genphy_suspend(struct phy_device *phydev); |
1865 | int genphy_resume(struct phy_device *phydev); | |
f0f9b4ed | 1866 | int genphy_loopback(struct phy_device *phydev, bool enable); |
797ac071 | 1867 | int genphy_soft_reset(struct phy_device *phydev); |
87de1f05 | 1868 | irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); |
f4069cd7 HK |
1869 | |
1870 | static inline int genphy_config_aneg(struct phy_device *phydev) | |
1871 | { | |
1872 | return __genphy_config_aneg(phydev, false); | |
1873 | } | |
1874 | ||
4c8e0459 LW |
1875 | static inline int genphy_no_config_intr(struct phy_device *phydev) |
1876 | { | |
1877 | return 0; | |
1878 | } | |
5df7af85 KH |
1879 | int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, |
1880 | u16 regnum); | |
1881 | int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, | |
1882 | u16 regnum, u16 val); | |
5acde34a | 1883 | |
fa6e98ce HK |
1884 | /* Clause 37 */ |
1885 | int genphy_c37_config_aneg(struct phy_device *phydev); | |
9b1d5e05 | 1886 | int genphy_c37_read_status(struct phy_device *phydev, bool *changed); |
fa6e98ce | 1887 | |
5acde34a RK |
1888 | /* Clause 45 PHY */ |
1889 | int genphy_c45_restart_aneg(struct phy_device *phydev); | |
1af9f168 | 1890 | int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); |
5acde34a | 1891 | int genphy_c45_aneg_done(struct phy_device *phydev); |
998a8a83 | 1892 | int genphy_c45_read_link(struct phy_device *phydev); |
5acde34a RK |
1893 | int genphy_c45_read_lpa(struct phy_device *phydev); |
1894 | int genphy_c45_read_pma(struct phy_device *phydev); | |
1895 | int genphy_c45_pma_setup_forced(struct phy_device *phydev); | |
90532850 | 1896 | int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev); |
9a5dc8af | 1897 | int genphy_c45_an_config_aneg(struct phy_device *phydev); |
5acde34a | 1898 | int genphy_c45_an_disable_aneg(struct phy_device *phydev); |
ea4efe25 | 1899 | int genphy_c45_read_mdix(struct phy_device *phydev); |
ac3f5533 | 1900 | int genphy_c45_pma_read_abilities(struct phy_device *phydev); |
0c476157 | 1901 | int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev); |
eba2e4c2 | 1902 | int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev); |
14e47d1f | 1903 | int genphy_c45_read_eee_abilities(struct phy_device *phydev); |
b9a366f3 | 1904 | int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev); |
70fa3a96 | 1905 | int genphy_c45_read_status(struct phy_device *phydev); |
2013ad88 | 1906 | int genphy_c45_baset1_read_status(struct phy_device *phydev); |
94acaeb5 | 1907 | int genphy_c45_config_aneg(struct phy_device *phydev); |
0ef25ed1 | 1908 | int genphy_c45_loopback(struct phy_device *phydev, bool enable); |
da702f34 RPNO |
1909 | int genphy_c45_pma_resume(struct phy_device *phydev); |
1910 | int genphy_c45_pma_suspend(struct phy_device *phydev); | |
63c67f52 | 1911 | int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); |
49332341 PB |
1912 | int genphy_c45_plca_get_cfg(struct phy_device *phydev, |
1913 | struct phy_plca_cfg *plca_cfg); | |
1914 | int genphy_c45_plca_set_cfg(struct phy_device *phydev, | |
1915 | const struct phy_plca_cfg *plca_cfg); | |
1916 | int genphy_c45_plca_get_status(struct phy_device *phydev, | |
1917 | struct phy_plca_status *plca_st); | |
022c3f87 OR |
1918 | int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *adv, |
1919 | unsigned long *lp, bool *is_enabled); | |
1920 | int genphy_c45_ethtool_get_eee(struct phy_device *phydev, | |
d80a5233 | 1921 | struct ethtool_keee *data); |
022c3f87 | 1922 | int genphy_c45_ethtool_set_eee(struct phy_device *phydev, |
d80a5233 | 1923 | struct ethtool_keee *data); |
022c3f87 | 1924 | int genphy_c45_write_eee_adv(struct phy_device *phydev, unsigned long *adv); |
b6478b8c | 1925 | int genphy_c45_an_config_eee_aneg(struct phy_device *phydev); |
3eeca4e1 | 1926 | int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv); |
5acde34a | 1927 | |
3970ed49 AL |
1928 | /* Generic C45 PHY driver */ |
1929 | extern struct phy_driver genphy_c45_driver; | |
1930 | ||
e8a714e0 FF |
1931 | /* The gen10g_* functions are the old Clause 45 stub */ |
1932 | int gen10g_config_aneg(struct phy_device *phydev); | |
e8a714e0 | 1933 | |
00fde795 HK |
1934 | static inline int phy_read_status(struct phy_device *phydev) |
1935 | { | |
1936 | if (!phydev->drv) | |
1937 | return -EIO; | |
1938 | ||
1939 | if (phydev->drv->read_status) | |
1940 | return phydev->drv->read_status(phydev); | |
1941 | else | |
1942 | return genphy_read_status(phydev); | |
1943 | } | |
1944 | ||
00db8189 | 1945 | void phy_driver_unregister(struct phy_driver *drv); |
d5bf9071 | 1946 | void phy_drivers_unregister(struct phy_driver *drv, int n); |
be01da72 AL |
1947 | int phy_driver_register(struct phy_driver *new_driver, struct module *owner); |
1948 | int phy_drivers_register(struct phy_driver *new_driver, int n, | |
1949 | struct module *owner); | |
293e9a3d | 1950 | void phy_error(struct phy_device *phydev); |
4f9c85a1 | 1951 | void phy_state_machine(struct work_struct *work); |
97b33bdf | 1952 | void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); |
293e9a3d | 1953 | void phy_trigger_machine(struct phy_device *phydev); |
28b2e0d2 | 1954 | void phy_mac_interrupt(struct phy_device *phydev); |
29935aeb | 1955 | void phy_start_machine(struct phy_device *phydev); |
00db8189 | 1956 | void phy_stop_machine(struct phy_device *phydev); |
5514174f | 1957 | void phy_ethtool_ksettings_get(struct phy_device *phydev, |
1958 | struct ethtool_link_ksettings *cmd); | |
2d55173e PR |
1959 | int phy_ethtool_ksettings_set(struct phy_device *phydev, |
1960 | const struct ethtool_link_ksettings *cmd); | |
4017b4d3 | 1961 | int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); |
bbbf8430 | 1962 | int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); |
3231e5d2 | 1963 | int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); |
3dd4ef1b | 1964 | int phy_disable_interrupts(struct phy_device *phydev); |
434a4315 | 1965 | void phy_request_interrupt(struct phy_device *phydev); |
07b09289 | 1966 | void phy_free_interrupt(struct phy_device *phydev); |
e1393456 | 1967 | void phy_print_status(struct phy_device *phydev); |
0c3e10cb SA |
1968 | int phy_get_rate_matching(struct phy_device *phydev, |
1969 | phy_interface_t iface); | |
73c105ad | 1970 | void phy_set_max_speed(struct phy_device *phydev, u32 max_speed); |
41124fa6 | 1971 | void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); |
22c0ef6b | 1972 | void phy_advertise_supported(struct phy_device *phydev); |
b6469127 | 1973 | void phy_advertise_eee_all(struct phy_device *phydev); |
c306ad36 | 1974 | void phy_support_sym_pause(struct phy_device *phydev); |
af8d9bb2 | 1975 | void phy_support_asym_pause(struct phy_device *phydev); |
49168d19 | 1976 | void phy_support_eee(struct phy_device *phydev); |
0c122405 AL |
1977 | void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, |
1978 | bool autoneg); | |
70814e81 | 1979 | void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); |
22b7d299 AL |
1980 | bool phy_validate_pause(struct phy_device *phydev, |
1981 | struct ethtool_pauseparam *pp); | |
a87ae8a9 | 1982 | void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); |
92252eec DM |
1983 | |
1984 | s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, | |
1985 | const int *delay_values, int size, bool is_rx); | |
1986 | ||
a87ae8a9 RK |
1987 | void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, |
1988 | bool *tx_pause, bool *rx_pause); | |
00db8189 | 1989 | |
f62220d3 | 1990 | int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, |
4017b4d3 | 1991 | int (*run)(struct phy_device *)); |
f62220d3 | 1992 | int phy_register_fixup_for_id(const char *bus_id, |
4017b4d3 | 1993 | int (*run)(struct phy_device *)); |
f62220d3 | 1994 | int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, |
4017b4d3 | 1995 | int (*run)(struct phy_device *)); |
f62220d3 | 1996 | |
f38e7a32 WH |
1997 | int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); |
1998 | int phy_unregister_fixup_for_id(const char *bus_id); | |
1999 | int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); | |
2000 | ||
a59a4d19 GC |
2001 | int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); |
2002 | int phy_get_eee_err(struct phy_device *phydev); | |
d80a5233 HK |
2003 | int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_keee *data); |
2004 | int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_keee *data); | |
42e836eb | 2005 | int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); |
4017b4d3 SS |
2006 | void phy_ethtool_get_wol(struct phy_device *phydev, |
2007 | struct ethtool_wolinfo *wol); | |
9d9a77ce PR |
2008 | int phy_ethtool_get_link_ksettings(struct net_device *ndev, |
2009 | struct ethtool_link_ksettings *cmd); | |
2010 | int phy_ethtool_set_link_ksettings(struct net_device *ndev, | |
2011 | const struct ethtool_link_ksettings *cmd); | |
e86a8987 | 2012 | int phy_ethtool_nway_reset(struct net_device *ndev); |
9eea577e | 2013 | int phy_package_join(struct phy_device *phydev, int base_addr, size_t priv_size); |
471e8fd3 | 2014 | int of_phy_package_join(struct phy_device *phydev, size_t priv_size); |
63490847 MW |
2015 | void phy_package_leave(struct phy_device *phydev); |
2016 | int devm_phy_package_join(struct device *dev, struct phy_device *phydev, | |
9eea577e | 2017 | int base_addr, size_t priv_size); |
471e8fd3 CM |
2018 | int devm_of_phy_package_join(struct device *dev, struct phy_device *phydev, |
2019 | size_t priv_size); | |
a59a4d19 | 2020 | |
9b9a8bfc AF |
2021 | int __init mdio_bus_init(void); |
2022 | void mdio_bus_exit(void); | |
9e8d438e | 2023 | |
17809516 FF |
2024 | int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); |
2025 | int phy_ethtool_get_sset_count(struct phy_device *phydev); | |
2026 | int phy_ethtool_get_stats(struct phy_device *phydev, | |
2027 | struct ethtool_stats *stats, u64 *data); | |
a23a1e57 PB |
2028 | int phy_ethtool_get_plca_cfg(struct phy_device *phydev, |
2029 | struct phy_plca_cfg *plca_cfg); | |
2030 | int phy_ethtool_set_plca_cfg(struct phy_device *phydev, | |
2031 | const struct phy_plca_cfg *plca_cfg, | |
2032 | struct netlink_ext_ack *extack); | |
2033 | int phy_ethtool_get_plca_status(struct phy_device *phydev, | |
2034 | struct phy_plca_status *plca_st); | |
9b9a8bfc | 2035 | |
60495b66 VO |
2036 | int __phy_hwtstamp_get(struct phy_device *phydev, |
2037 | struct kernel_hwtstamp_config *config); | |
2038 | int __phy_hwtstamp_set(struct phy_device *phydev, | |
2039 | struct kernel_hwtstamp_config *config, | |
2040 | struct netlink_ext_ack *extack); | |
2041 | ||
9eea577e CM |
2042 | static inline int phy_package_address(struct phy_device *phydev, |
2043 | unsigned int addr_offset) | |
63490847 MW |
2044 | { |
2045 | struct phy_package_shared *shared = phydev->shared; | |
9eea577e | 2046 | u8 base_addr = shared->base_addr; |
63490847 | 2047 | |
9eea577e | 2048 | if (addr_offset >= PHY_MAX_ADDR - base_addr) |
63490847 MW |
2049 | return -EIO; |
2050 | ||
9eea577e CM |
2051 | /* we know that addr will be in the range 0..31 and thus the |
2052 | * implicit cast to a signed int is not a problem. | |
2053 | */ | |
2054 | return base_addr + addr_offset; | |
63490847 MW |
2055 | } |
2056 | ||
9eea577e CM |
2057 | static inline int phy_package_read(struct phy_device *phydev, |
2058 | unsigned int addr_offset, u32 regnum) | |
63490847 | 2059 | { |
9eea577e | 2060 | int addr = phy_package_address(phydev, addr_offset); |
63490847 | 2061 | |
9eea577e CM |
2062 | if (addr < 0) |
2063 | return addr; | |
2064 | ||
2065 | return mdiobus_read(phydev->mdio.bus, addr, regnum); | |
2066 | } | |
2067 | ||
2068 | static inline int __phy_package_read(struct phy_device *phydev, | |
2069 | unsigned int addr_offset, u32 regnum) | |
2070 | { | |
2071 | int addr = phy_package_address(phydev, addr_offset); | |
2072 | ||
2073 | if (addr < 0) | |
2074 | return addr; | |
63490847 | 2075 | |
9eea577e | 2076 | return __mdiobus_read(phydev->mdio.bus, addr, regnum); |
63490847 MW |
2077 | } |
2078 | ||
2079 | static inline int phy_package_write(struct phy_device *phydev, | |
9eea577e CM |
2080 | unsigned int addr_offset, u32 regnum, |
2081 | u16 val) | |
63490847 | 2082 | { |
9eea577e | 2083 | int addr = phy_package_address(phydev, addr_offset); |
63490847 | 2084 | |
9eea577e CM |
2085 | if (addr < 0) |
2086 | return addr; | |
63490847 | 2087 | |
9eea577e | 2088 | return mdiobus_write(phydev->mdio.bus, addr, regnum, val); |
63490847 MW |
2089 | } |
2090 | ||
2091 | static inline int __phy_package_write(struct phy_device *phydev, | |
9eea577e CM |
2092 | unsigned int addr_offset, u32 regnum, |
2093 | u16 val) | |
63490847 | 2094 | { |
9eea577e | 2095 | int addr = phy_package_address(phydev, addr_offset); |
63490847 | 2096 | |
9eea577e CM |
2097 | if (addr < 0) |
2098 | return addr; | |
63490847 | 2099 | |
9eea577e | 2100 | return __mdiobus_write(phydev->mdio.bus, addr, regnum, val); |
63490847 MW |
2101 | } |
2102 | ||
d63710fc CM |
2103 | int __phy_package_read_mmd(struct phy_device *phydev, |
2104 | unsigned int addr_offset, int devad, | |
2105 | u32 regnum); | |
2106 | ||
2107 | int phy_package_read_mmd(struct phy_device *phydev, | |
2108 | unsigned int addr_offset, int devad, | |
2109 | u32 regnum); | |
2110 | ||
2111 | int __phy_package_write_mmd(struct phy_device *phydev, | |
2112 | unsigned int addr_offset, int devad, | |
2113 | u32 regnum, u16 val); | |
2114 | ||
2115 | int phy_package_write_mmd(struct phy_device *phydev, | |
2116 | unsigned int addr_offset, int devad, | |
2117 | u32 regnum, u16 val); | |
2118 | ||
0ef44e5c AT |
2119 | static inline bool __phy_package_set_once(struct phy_device *phydev, |
2120 | unsigned int b) | |
63490847 MW |
2121 | { |
2122 | struct phy_package_shared *shared = phydev->shared; | |
2123 | ||
2124 | if (!shared) | |
2125 | return false; | |
2126 | ||
0ef44e5c AT |
2127 | return !test_and_set_bit(b, &shared->flags); |
2128 | } | |
2129 | ||
2130 | static inline bool phy_package_init_once(struct phy_device *phydev) | |
2131 | { | |
2132 | return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); | |
2133 | } | |
2134 | ||
2135 | static inline bool phy_package_probe_once(struct phy_device *phydev) | |
2136 | { | |
2137 | return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); | |
63490847 MW |
2138 | } |
2139 | ||
81800aef | 2140 | extern const struct bus_type mdio_bus_type; |
c31accd1 | 2141 | |
648ea013 FF |
2142 | struct mdio_board_info { |
2143 | const char *bus_id; | |
2144 | char modalias[MDIO_NAME_SIZE]; | |
2145 | int mdio_addr; | |
2146 | const void *platform_data; | |
2147 | }; | |
2148 | ||
90eff909 | 2149 | #if IS_ENABLED(CONFIG_MDIO_DEVICE) |
648ea013 FF |
2150 | int mdiobus_register_board_info(const struct mdio_board_info *info, |
2151 | unsigned int n); | |
2152 | #else | |
2153 | static inline int mdiobus_register_board_info(const struct mdio_board_info *i, | |
2154 | unsigned int n) | |
2155 | { | |
2156 | return 0; | |
2157 | } | |
2158 | #endif | |
2159 | ||
2160 | ||
c31accd1 | 2161 | /** |
39097ab6 | 2162 | * phy_module_driver() - Helper macro for registering PHY drivers |
c31accd1 | 2163 | * @__phy_drivers: array of PHY drivers to register |
39097ab6 | 2164 | * @__count: Numbers of members in array |
c31accd1 JH |
2165 | * |
2166 | * Helper macro for PHY drivers which do not do anything special in module | |
2167 | * init/exit. Each module may only use this macro once, and calling it | |
2168 | * replaces module_init() and module_exit(). | |
2169 | */ | |
2170 | #define phy_module_driver(__phy_drivers, __count) \ | |
2171 | static int __init phy_module_init(void) \ | |
2172 | { \ | |
be01da72 | 2173 | return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ |
c31accd1 JH |
2174 | } \ |
2175 | module_init(phy_module_init); \ | |
2176 | static void __exit phy_module_exit(void) \ | |
2177 | { \ | |
2178 | phy_drivers_unregister(__phy_drivers, __count); \ | |
2179 | } \ | |
2180 | module_exit(phy_module_exit) | |
2181 | ||
2182 | #define module_phy_driver(__phy_drivers) \ | |
2183 | phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) | |
2184 | ||
5db5ea99 FF |
2185 | bool phy_driver_is_genphy(struct phy_device *phydev); |
2186 | bool phy_driver_is_genphy_10g(struct phy_device *phydev); | |
2187 | ||
00db8189 | 2188 | #endif /* __PHY_H */ |