Commit | Line | Data |
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0793a61d | 1 | /* |
57c0c15b | 2 | * Performance events: |
0793a61d | 3 | * |
a308444c | 4 | * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de> |
e7e7ee2e IM |
5 | * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar |
6 | * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra | |
0793a61d | 7 | * |
57c0c15b | 8 | * Data type definitions, declarations, prototypes. |
0793a61d | 9 | * |
a308444c | 10 | * Started by: Thomas Gleixner and Ingo Molnar |
0793a61d | 11 | * |
57c0c15b | 12 | * For licencing details see kernel-base/COPYING |
0793a61d | 13 | */ |
cdd6c482 IM |
14 | #ifndef _LINUX_PERF_EVENT_H |
15 | #define _LINUX_PERF_EVENT_H | |
0793a61d | 16 | |
f3dfd265 PM |
17 | #include <linux/types.h> |
18 | #include <linux/ioctl.h> | |
9aaa131a | 19 | #include <asm/byteorder.h> |
0793a61d TG |
20 | |
21 | /* | |
9f66a381 IM |
22 | * User-space ABI bits: |
23 | */ | |
24 | ||
25 | /* | |
0d48696f | 26 | * attr.type |
0793a61d | 27 | */ |
1c432d89 | 28 | enum perf_type_id { |
a308444c IM |
29 | PERF_TYPE_HARDWARE = 0, |
30 | PERF_TYPE_SOFTWARE = 1, | |
31 | PERF_TYPE_TRACEPOINT = 2, | |
32 | PERF_TYPE_HW_CACHE = 3, | |
33 | PERF_TYPE_RAW = 4, | |
24f1e32c | 34 | PERF_TYPE_BREAKPOINT = 5, |
b8e83514 | 35 | |
a308444c | 36 | PERF_TYPE_MAX, /* non-ABI */ |
b8e83514 | 37 | }; |
6c594c21 | 38 | |
b8e83514 | 39 | /* |
cdd6c482 IM |
40 | * Generalized performance event event_id types, used by the |
41 | * attr.event_id parameter of the sys_perf_event_open() | |
a308444c | 42 | * syscall: |
b8e83514 | 43 | */ |
1c432d89 | 44 | enum perf_hw_id { |
9f66a381 | 45 | /* |
b8e83514 | 46 | * Common hardware events, generalized by the kernel: |
9f66a381 | 47 | */ |
f4dbfa8f PZ |
48 | PERF_COUNT_HW_CPU_CYCLES = 0, |
49 | PERF_COUNT_HW_INSTRUCTIONS = 1, | |
50 | PERF_COUNT_HW_CACHE_REFERENCES = 2, | |
51 | PERF_COUNT_HW_CACHE_MISSES = 3, | |
52 | PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4, | |
53 | PERF_COUNT_HW_BRANCH_MISSES = 5, | |
54 | PERF_COUNT_HW_BUS_CYCLES = 6, | |
8f622422 IM |
55 | PERF_COUNT_HW_STALLED_CYCLES_FRONTEND = 7, |
56 | PERF_COUNT_HW_STALLED_CYCLES_BACKEND = 8, | |
c37e1749 | 57 | PERF_COUNT_HW_REF_CPU_CYCLES = 9, |
f4dbfa8f | 58 | |
a308444c | 59 | PERF_COUNT_HW_MAX, /* non-ABI */ |
b8e83514 | 60 | }; |
e077df4f | 61 | |
8326f44d | 62 | /* |
cdd6c482 | 63 | * Generalized hardware cache events: |
8326f44d | 64 | * |
89d6c0b5 | 65 | * { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x |
8326f44d IM |
66 | * { read, write, prefetch } x |
67 | * { accesses, misses } | |
68 | */ | |
1c432d89 | 69 | enum perf_hw_cache_id { |
a308444c IM |
70 | PERF_COUNT_HW_CACHE_L1D = 0, |
71 | PERF_COUNT_HW_CACHE_L1I = 1, | |
72 | PERF_COUNT_HW_CACHE_LL = 2, | |
73 | PERF_COUNT_HW_CACHE_DTLB = 3, | |
74 | PERF_COUNT_HW_CACHE_ITLB = 4, | |
75 | PERF_COUNT_HW_CACHE_BPU = 5, | |
89d6c0b5 | 76 | PERF_COUNT_HW_CACHE_NODE = 6, |
a308444c IM |
77 | |
78 | PERF_COUNT_HW_CACHE_MAX, /* non-ABI */ | |
8326f44d IM |
79 | }; |
80 | ||
1c432d89 | 81 | enum perf_hw_cache_op_id { |
a308444c IM |
82 | PERF_COUNT_HW_CACHE_OP_READ = 0, |
83 | PERF_COUNT_HW_CACHE_OP_WRITE = 1, | |
84 | PERF_COUNT_HW_CACHE_OP_PREFETCH = 2, | |
8326f44d | 85 | |
a308444c | 86 | PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */ |
8326f44d IM |
87 | }; |
88 | ||
1c432d89 PZ |
89 | enum perf_hw_cache_op_result_id { |
90 | PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0, | |
91 | PERF_COUNT_HW_CACHE_RESULT_MISS = 1, | |
8326f44d | 92 | |
a308444c | 93 | PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */ |
8326f44d IM |
94 | }; |
95 | ||
b8e83514 | 96 | /* |
cdd6c482 IM |
97 | * Special "software" events provided by the kernel, even if the hardware |
98 | * does not support performance events. These events measure various | |
b8e83514 PZ |
99 | * physical and sw events of the kernel (and allow the profiling of them as |
100 | * well): | |
101 | */ | |
1c432d89 | 102 | enum perf_sw_ids { |
a308444c IM |
103 | PERF_COUNT_SW_CPU_CLOCK = 0, |
104 | PERF_COUNT_SW_TASK_CLOCK = 1, | |
105 | PERF_COUNT_SW_PAGE_FAULTS = 2, | |
106 | PERF_COUNT_SW_CONTEXT_SWITCHES = 3, | |
107 | PERF_COUNT_SW_CPU_MIGRATIONS = 4, | |
108 | PERF_COUNT_SW_PAGE_FAULTS_MIN = 5, | |
109 | PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6, | |
f7d79860 AB |
110 | PERF_COUNT_SW_ALIGNMENT_FAULTS = 7, |
111 | PERF_COUNT_SW_EMULATION_FAULTS = 8, | |
a308444c IM |
112 | |
113 | PERF_COUNT_SW_MAX, /* non-ABI */ | |
0793a61d TG |
114 | }; |
115 | ||
8a057d84 | 116 | /* |
0d48696f | 117 | * Bits that can be set in attr.sample_type to request information |
8a057d84 PZ |
118 | * in the overflow packets. |
119 | */ | |
cdd6c482 | 120 | enum perf_event_sample_format { |
a308444c IM |
121 | PERF_SAMPLE_IP = 1U << 0, |
122 | PERF_SAMPLE_TID = 1U << 1, | |
123 | PERF_SAMPLE_TIME = 1U << 2, | |
124 | PERF_SAMPLE_ADDR = 1U << 3, | |
3dab77fb | 125 | PERF_SAMPLE_READ = 1U << 4, |
a308444c IM |
126 | PERF_SAMPLE_CALLCHAIN = 1U << 5, |
127 | PERF_SAMPLE_ID = 1U << 6, | |
128 | PERF_SAMPLE_CPU = 1U << 7, | |
129 | PERF_SAMPLE_PERIOD = 1U << 8, | |
7f453c24 | 130 | PERF_SAMPLE_STREAM_ID = 1U << 9, |
3a43ce68 | 131 | PERF_SAMPLE_RAW = 1U << 10, |
bce38cd5 | 132 | PERF_SAMPLE_BRANCH_STACK = 1U << 11, |
974802ea | 133 | |
bce38cd5 | 134 | PERF_SAMPLE_MAX = 1U << 12, /* non-ABI */ |
8a057d84 PZ |
135 | }; |
136 | ||
bce38cd5 SE |
137 | /* |
138 | * values to program into branch_sample_type when PERF_SAMPLE_BRANCH is set | |
139 | * | |
140 | * If the user does not pass priv level information via branch_sample_type, | |
141 | * the kernel uses the event's priv level. Branch and event priv levels do | |
142 | * not have to match. Branch priv level is checked for permissions. | |
143 | * | |
144 | * The branch types can be combined, however BRANCH_ANY covers all types | |
145 | * of branches and therefore it supersedes all the other types. | |
146 | */ | |
147 | enum perf_branch_sample_type { | |
148 | PERF_SAMPLE_BRANCH_USER = 1U << 0, /* user branches */ | |
149 | PERF_SAMPLE_BRANCH_KERNEL = 1U << 1, /* kernel branches */ | |
150 | PERF_SAMPLE_BRANCH_HV = 1U << 2, /* hypervisor branches */ | |
151 | ||
152 | PERF_SAMPLE_BRANCH_ANY = 1U << 3, /* any branch types */ | |
153 | PERF_SAMPLE_BRANCH_ANY_CALL = 1U << 4, /* any call branch */ | |
154 | PERF_SAMPLE_BRANCH_ANY_RETURN = 1U << 5, /* any return branch */ | |
155 | PERF_SAMPLE_BRANCH_IND_CALL = 1U << 6, /* indirect calls */ | |
156 | ||
157 | PERF_SAMPLE_BRANCH_MAX = 1U << 7, /* non-ABI */ | |
158 | }; | |
159 | ||
160 | #define PERF_SAMPLE_BRANCH_PLM_ALL \ | |
161 | (PERF_SAMPLE_BRANCH_USER|\ | |
162 | PERF_SAMPLE_BRANCH_KERNEL|\ | |
163 | PERF_SAMPLE_BRANCH_HV) | |
164 | ||
53cfbf59 | 165 | /* |
cdd6c482 | 166 | * The format of the data returned by read() on a perf event fd, |
3dab77fb PZ |
167 | * as specified by attr.read_format: |
168 | * | |
169 | * struct read_format { | |
57c0c15b | 170 | * { u64 value; |
d7ebe75b VW |
171 | * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED |
172 | * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING | |
57c0c15b IM |
173 | * { u64 id; } && PERF_FORMAT_ID |
174 | * } && !PERF_FORMAT_GROUP | |
3dab77fb | 175 | * |
57c0c15b | 176 | * { u64 nr; |
d7ebe75b VW |
177 | * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED |
178 | * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING | |
57c0c15b IM |
179 | * { u64 value; |
180 | * { u64 id; } && PERF_FORMAT_ID | |
181 | * } cntr[nr]; | |
182 | * } && PERF_FORMAT_GROUP | |
3dab77fb | 183 | * }; |
53cfbf59 | 184 | */ |
cdd6c482 | 185 | enum perf_event_read_format { |
a308444c IM |
186 | PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0, |
187 | PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1, | |
188 | PERF_FORMAT_ID = 1U << 2, | |
3dab77fb | 189 | PERF_FORMAT_GROUP = 1U << 3, |
974802ea | 190 | |
57c0c15b | 191 | PERF_FORMAT_MAX = 1U << 4, /* non-ABI */ |
53cfbf59 PM |
192 | }; |
193 | ||
974802ea | 194 | #define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */ |
cb5d7699 SE |
195 | #define PERF_ATTR_SIZE_VER1 72 /* add: config2 */ |
196 | #define PERF_ATTR_SIZE_VER2 80 /* add: branch_sample_type */ | |
974802ea | 197 | |
9f66a381 | 198 | /* |
cdd6c482 | 199 | * Hardware event_id to monitor via a performance monitoring event: |
9f66a381 | 200 | */ |
cdd6c482 | 201 | struct perf_event_attr { |
974802ea | 202 | |
f4a2deb4 | 203 | /* |
a21ca2ca IM |
204 | * Major type: hardware/software/tracepoint/etc. |
205 | */ | |
206 | __u32 type; | |
974802ea PZ |
207 | |
208 | /* | |
209 | * Size of the attr structure, for fwd/bwd compat. | |
210 | */ | |
211 | __u32 size; | |
a21ca2ca IM |
212 | |
213 | /* | |
214 | * Type specific configuration information. | |
f4a2deb4 PZ |
215 | */ |
216 | __u64 config; | |
9f66a381 | 217 | |
60db5e09 | 218 | union { |
b23f3325 PZ |
219 | __u64 sample_period; |
220 | __u64 sample_freq; | |
60db5e09 PZ |
221 | }; |
222 | ||
b23f3325 PZ |
223 | __u64 sample_type; |
224 | __u64 read_format; | |
9f66a381 | 225 | |
2743a5b0 | 226 | __u64 disabled : 1, /* off by default */ |
0475f9ea PM |
227 | inherit : 1, /* children inherit it */ |
228 | pinned : 1, /* must always be on PMU */ | |
229 | exclusive : 1, /* only group on PMU */ | |
230 | exclude_user : 1, /* don't count user */ | |
231 | exclude_kernel : 1, /* ditto kernel */ | |
232 | exclude_hv : 1, /* ditto hypervisor */ | |
2743a5b0 | 233 | exclude_idle : 1, /* don't count when idle */ |
0a4a9391 | 234 | mmap : 1, /* include mmap data */ |
8d1b2d93 | 235 | comm : 1, /* include comm data */ |
60db5e09 | 236 | freq : 1, /* use freq, not period */ |
bfbd3381 | 237 | inherit_stat : 1, /* per task counts */ |
57e7986e | 238 | enable_on_exec : 1, /* next exec enables */ |
9f498cc5 | 239 | task : 1, /* trace fork/exit */ |
2667de81 | 240 | watermark : 1, /* wakeup_watermark */ |
ab608344 PZ |
241 | /* |
242 | * precise_ip: | |
243 | * | |
244 | * 0 - SAMPLE_IP can have arbitrary skid | |
245 | * 1 - SAMPLE_IP must have constant skid | |
246 | * 2 - SAMPLE_IP requested to have 0 skid | |
247 | * 3 - SAMPLE_IP must have 0 skid | |
248 | * | |
249 | * See also PERF_RECORD_MISC_EXACT_IP | |
250 | */ | |
251 | precise_ip : 2, /* skid constraint */ | |
3af9e859 | 252 | mmap_data : 1, /* non-exec mmap data */ |
c980d109 | 253 | sample_id_all : 1, /* sample_type all events */ |
ab608344 | 254 | |
a240f761 JR |
255 | exclude_host : 1, /* don't count in host */ |
256 | exclude_guest : 1, /* don't count in guest */ | |
257 | ||
258 | __reserved_1 : 43; | |
2743a5b0 | 259 | |
2667de81 PZ |
260 | union { |
261 | __u32 wakeup_events; /* wakeup every n events */ | |
262 | __u32 wakeup_watermark; /* bytes before wakeup */ | |
263 | }; | |
24f1e32c | 264 | |
f13c12c6 | 265 | __u32 bp_type; |
a7e3ed1e AK |
266 | union { |
267 | __u64 bp_addr; | |
268 | __u64 config1; /* extension of config */ | |
269 | }; | |
270 | union { | |
271 | __u64 bp_len; | |
272 | __u64 config2; /* extension of config1 */ | |
273 | }; | |
bce38cd5 | 274 | __u64 branch_sample_type; /* enum branch_sample_type */ |
eab656ae TG |
275 | }; |
276 | ||
d859e29f | 277 | /* |
cdd6c482 | 278 | * Ioctls that can be done on a perf event fd: |
d859e29f | 279 | */ |
cdd6c482 | 280 | #define PERF_EVENT_IOC_ENABLE _IO ('$', 0) |
57c0c15b IM |
281 | #define PERF_EVENT_IOC_DISABLE _IO ('$', 1) |
282 | #define PERF_EVENT_IOC_REFRESH _IO ('$', 2) | |
cdd6c482 | 283 | #define PERF_EVENT_IOC_RESET _IO ('$', 3) |
4c49b128 | 284 | #define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64) |
cdd6c482 | 285 | #define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5) |
6fb2915d | 286 | #define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *) |
cdd6c482 IM |
287 | |
288 | enum perf_event_ioc_flags { | |
3df5edad PZ |
289 | PERF_IOC_FLAG_GROUP = 1U << 0, |
290 | }; | |
d859e29f | 291 | |
37d81828 PM |
292 | /* |
293 | * Structure of the page that can be mapped via mmap | |
294 | */ | |
cdd6c482 | 295 | struct perf_event_mmap_page { |
37d81828 PM |
296 | __u32 version; /* version number of this structure */ |
297 | __u32 compat_version; /* lowest version this is compat with */ | |
38ff667b PZ |
298 | |
299 | /* | |
cdd6c482 | 300 | * Bits needed to read the hw events in user-space. |
38ff667b | 301 | * |
92f22a38 PZ |
302 | * u32 seq; |
303 | * s64 count; | |
38ff667b | 304 | * |
a2e87d06 PZ |
305 | * do { |
306 | * seq = pc->lock; | |
38ff667b | 307 | * |
a2e87d06 PZ |
308 | * barrier() |
309 | * if (pc->index) { | |
310 | * count = pmc_read(pc->index - 1); | |
311 | * count += pc->offset; | |
312 | * } else | |
313 | * goto regular_read; | |
38ff667b | 314 | * |
a2e87d06 PZ |
315 | * barrier(); |
316 | * } while (pc->lock != seq); | |
38ff667b | 317 | * |
92f22a38 PZ |
318 | * NOTE: for obvious reason this only works on self-monitoring |
319 | * processes. | |
38ff667b | 320 | */ |
37d81828 | 321 | __u32 lock; /* seqlock for synchronization */ |
cdd6c482 IM |
322 | __u32 index; /* hardware event identifier */ |
323 | __s64 offset; /* add to hardware event value */ | |
324 | __u64 time_enabled; /* time event active */ | |
325 | __u64 time_running; /* time event on cpu */ | |
e3f3541c PZ |
326 | __u32 time_mult, time_shift; |
327 | __u64 time_offset; | |
7b732a75 | 328 | |
41f95331 PZ |
329 | /* |
330 | * Hole for extension of the self monitor capabilities | |
331 | */ | |
332 | ||
e3f3541c | 333 | __u64 __reserved[121]; /* align to 1k */ |
41f95331 | 334 | |
38ff667b PZ |
335 | /* |
336 | * Control data for the mmap() data buffer. | |
337 | * | |
43a21ea8 PZ |
338 | * User-space reading the @data_head value should issue an rmb(), on |
339 | * SMP capable platforms, after reading this value -- see | |
cdd6c482 | 340 | * perf_event_wakeup(). |
43a21ea8 PZ |
341 | * |
342 | * When the mapping is PROT_WRITE the @data_tail value should be | |
343 | * written by userspace to reflect the last read data. In this case | |
344 | * the kernel will not over-write unread data. | |
38ff667b | 345 | */ |
8e3747c1 | 346 | __u64 data_head; /* head in the data section */ |
43a21ea8 | 347 | __u64 data_tail; /* user-space written tail */ |
37d81828 PM |
348 | }; |
349 | ||
39447b38 | 350 | #define PERF_RECORD_MISC_CPUMODE_MASK (7 << 0) |
184f412c | 351 | #define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0) |
cdd6c482 IM |
352 | #define PERF_RECORD_MISC_KERNEL (1 << 0) |
353 | #define PERF_RECORD_MISC_USER (2 << 0) | |
354 | #define PERF_RECORD_MISC_HYPERVISOR (3 << 0) | |
39447b38 ZY |
355 | #define PERF_RECORD_MISC_GUEST_KERNEL (4 << 0) |
356 | #define PERF_RECORD_MISC_GUEST_USER (5 << 0) | |
6fab0192 | 357 | |
ab608344 PZ |
358 | /* |
359 | * Indicates that the content of PERF_SAMPLE_IP points to | |
360 | * the actual instruction that triggered the event. See also | |
361 | * perf_event_attr::precise_ip. | |
362 | */ | |
363 | #define PERF_RECORD_MISC_EXACT_IP (1 << 14) | |
ef21f683 PZ |
364 | /* |
365 | * Reserve the last bit to indicate some extended misc field | |
366 | */ | |
367 | #define PERF_RECORD_MISC_EXT_RESERVED (1 << 15) | |
368 | ||
5c148194 PZ |
369 | struct perf_event_header { |
370 | __u32 type; | |
6fab0192 PZ |
371 | __u16 misc; |
372 | __u16 size; | |
5c148194 PZ |
373 | }; |
374 | ||
375 | enum perf_event_type { | |
5ed00415 | 376 | |
0c593b34 | 377 | /* |
c980d109 ACM |
378 | * If perf_event_attr.sample_id_all is set then all event types will |
379 | * have the sample_type selected fields related to where/when | |
380 | * (identity) an event took place (TID, TIME, ID, CPU, STREAM_ID) | |
381 | * described in PERF_RECORD_SAMPLE below, it will be stashed just after | |
382 | * the perf_event_header and the fields already present for the existing | |
383 | * fields, i.e. at the end of the payload. That way a newer perf.data | |
384 | * file will be supported by older perf tools, with these new optional | |
385 | * fields being ignored. | |
386 | * | |
0c593b34 PZ |
387 | * The MMAP events record the PROT_EXEC mappings so that we can |
388 | * correlate userspace IPs to code. They have the following structure: | |
389 | * | |
390 | * struct { | |
0127c3ea | 391 | * struct perf_event_header header; |
0c593b34 | 392 | * |
0127c3ea IM |
393 | * u32 pid, tid; |
394 | * u64 addr; | |
395 | * u64 len; | |
396 | * u64 pgoff; | |
397 | * char filename[]; | |
0c593b34 PZ |
398 | * }; |
399 | */ | |
cdd6c482 | 400 | PERF_RECORD_MMAP = 1, |
0a4a9391 | 401 | |
43a21ea8 PZ |
402 | /* |
403 | * struct { | |
57c0c15b IM |
404 | * struct perf_event_header header; |
405 | * u64 id; | |
406 | * u64 lost; | |
43a21ea8 PZ |
407 | * }; |
408 | */ | |
cdd6c482 | 409 | PERF_RECORD_LOST = 2, |
43a21ea8 | 410 | |
8d1b2d93 PZ |
411 | /* |
412 | * struct { | |
0127c3ea | 413 | * struct perf_event_header header; |
8d1b2d93 | 414 | * |
0127c3ea IM |
415 | * u32 pid, tid; |
416 | * char comm[]; | |
8d1b2d93 PZ |
417 | * }; |
418 | */ | |
cdd6c482 | 419 | PERF_RECORD_COMM = 3, |
8d1b2d93 | 420 | |
9f498cc5 PZ |
421 | /* |
422 | * struct { | |
423 | * struct perf_event_header header; | |
424 | * u32 pid, ppid; | |
425 | * u32 tid, ptid; | |
393b2ad8 | 426 | * u64 time; |
9f498cc5 PZ |
427 | * }; |
428 | */ | |
cdd6c482 | 429 | PERF_RECORD_EXIT = 4, |
9f498cc5 | 430 | |
26b119bc PZ |
431 | /* |
432 | * struct { | |
0127c3ea IM |
433 | * struct perf_event_header header; |
434 | * u64 time; | |
689802b2 | 435 | * u64 id; |
7f453c24 | 436 | * u64 stream_id; |
a78ac325 PZ |
437 | * }; |
438 | */ | |
184f412c IM |
439 | PERF_RECORD_THROTTLE = 5, |
440 | PERF_RECORD_UNTHROTTLE = 6, | |
a78ac325 | 441 | |
60313ebe PZ |
442 | /* |
443 | * struct { | |
a21ca2ca IM |
444 | * struct perf_event_header header; |
445 | * u32 pid, ppid; | |
9f498cc5 | 446 | * u32 tid, ptid; |
a6f10a2f | 447 | * u64 time; |
60313ebe PZ |
448 | * }; |
449 | */ | |
cdd6c482 | 450 | PERF_RECORD_FORK = 7, |
60313ebe | 451 | |
38b200d6 PZ |
452 | /* |
453 | * struct { | |
184f412c IM |
454 | * struct perf_event_header header; |
455 | * u32 pid, tid; | |
3dab77fb | 456 | * |
184f412c | 457 | * struct read_format values; |
38b200d6 PZ |
458 | * }; |
459 | */ | |
cdd6c482 | 460 | PERF_RECORD_READ = 8, |
38b200d6 | 461 | |
8a057d84 | 462 | /* |
0c593b34 | 463 | * struct { |
0127c3ea | 464 | * struct perf_event_header header; |
0c593b34 | 465 | * |
43a21ea8 PZ |
466 | * { u64 ip; } && PERF_SAMPLE_IP |
467 | * { u32 pid, tid; } && PERF_SAMPLE_TID | |
468 | * { u64 time; } && PERF_SAMPLE_TIME | |
469 | * { u64 addr; } && PERF_SAMPLE_ADDR | |
e6e18ec7 | 470 | * { u64 id; } && PERF_SAMPLE_ID |
7f453c24 | 471 | * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID |
43a21ea8 | 472 | * { u32 cpu, res; } && PERF_SAMPLE_CPU |
57c0c15b | 473 | * { u64 period; } && PERF_SAMPLE_PERIOD |
0c593b34 | 474 | * |
3dab77fb | 475 | * { struct read_format values; } && PERF_SAMPLE_READ |
0c593b34 | 476 | * |
f9188e02 | 477 | * { u64 nr, |
43a21ea8 | 478 | * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN |
3dab77fb | 479 | * |
57c0c15b IM |
480 | * # |
481 | * # The RAW record below is opaque data wrt the ABI | |
482 | * # | |
483 | * # That is, the ABI doesn't make any promises wrt to | |
484 | * # the stability of its content, it may vary depending | |
485 | * # on event, hardware, kernel version and phase of | |
486 | * # the moon. | |
487 | * # | |
488 | * # In other words, PERF_SAMPLE_RAW contents are not an ABI. | |
489 | * # | |
3dab77fb | 490 | * |
a044560c PZ |
491 | * { u32 size; |
492 | * char data[size];}&& PERF_SAMPLE_RAW | |
bce38cd5 SE |
493 | * |
494 | * { u64 from, to, flags } lbr[nr];} && PERF_SAMPLE_BRANCH_STACK | |
0c593b34 | 495 | * }; |
8a057d84 | 496 | */ |
184f412c | 497 | PERF_RECORD_SAMPLE = 9, |
e6e18ec7 | 498 | |
cdd6c482 | 499 | PERF_RECORD_MAX, /* non-ABI */ |
5c148194 PZ |
500 | }; |
501 | ||
f9188e02 PZ |
502 | enum perf_callchain_context { |
503 | PERF_CONTEXT_HV = (__u64)-32, | |
504 | PERF_CONTEXT_KERNEL = (__u64)-128, | |
505 | PERF_CONTEXT_USER = (__u64)-512, | |
7522060c | 506 | |
f9188e02 PZ |
507 | PERF_CONTEXT_GUEST = (__u64)-2048, |
508 | PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176, | |
509 | PERF_CONTEXT_GUEST_USER = (__u64)-2560, | |
510 | ||
511 | PERF_CONTEXT_MAX = (__u64)-4095, | |
7522060c IM |
512 | }; |
513 | ||
e7e7ee2e IM |
514 | #define PERF_FLAG_FD_NO_GROUP (1U << 0) |
515 | #define PERF_FLAG_FD_OUTPUT (1U << 1) | |
516 | #define PERF_FLAG_PID_CGROUP (1U << 2) /* pid=cgroup id, per-cpu mode only */ | |
a4be7c27 | 517 | |
f3dfd265 | 518 | #ifdef __KERNEL__ |
9f66a381 | 519 | /* |
f3dfd265 | 520 | * Kernel-internal data types and definitions: |
9f66a381 IM |
521 | */ |
522 | ||
cdd6c482 | 523 | #ifdef CONFIG_PERF_EVENTS |
e5d1367f | 524 | # include <linux/cgroup.h> |
cdd6c482 | 525 | # include <asm/perf_event.h> |
7be79236 | 526 | # include <asm/local64.h> |
f3dfd265 PM |
527 | #endif |
528 | ||
39447b38 | 529 | struct perf_guest_info_callbacks { |
e7e7ee2e IM |
530 | int (*is_in_guest)(void); |
531 | int (*is_user_mode)(void); | |
532 | unsigned long (*get_guest_ip)(void); | |
39447b38 ZY |
533 | }; |
534 | ||
2ff6cfd7 AB |
535 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
536 | #include <asm/hw_breakpoint.h> | |
537 | #endif | |
538 | ||
f3dfd265 PM |
539 | #include <linux/list.h> |
540 | #include <linux/mutex.h> | |
541 | #include <linux/rculist.h> | |
542 | #include <linux/rcupdate.h> | |
543 | #include <linux/spinlock.h> | |
d6d020e9 | 544 | #include <linux/hrtimer.h> |
3c446b3d | 545 | #include <linux/fs.h> |
709e50cf | 546 | #include <linux/pid_namespace.h> |
906010b2 | 547 | #include <linux/workqueue.h> |
5331d7b8 | 548 | #include <linux/ftrace.h> |
85cfabbc | 549 | #include <linux/cpu.h> |
e360adbe | 550 | #include <linux/irq_work.h> |
c5905afb | 551 | #include <linux/static_key.h> |
60063497 | 552 | #include <linux/atomic.h> |
641cc938 | 553 | #include <linux/sysfs.h> |
fa588151 | 554 | #include <asm/local.h> |
f3dfd265 | 555 | |
f9188e02 PZ |
556 | #define PERF_MAX_STACK_DEPTH 255 |
557 | ||
558 | struct perf_callchain_entry { | |
559 | __u64 nr; | |
560 | __u64 ip[PERF_MAX_STACK_DEPTH]; | |
561 | }; | |
562 | ||
3a43ce68 FW |
563 | struct perf_raw_record { |
564 | u32 size; | |
565 | void *data; | |
f413cdb8 FW |
566 | }; |
567 | ||
bce38cd5 SE |
568 | /* |
569 | * single taken branch record layout: | |
570 | * | |
571 | * from: source instruction (may not always be a branch insn) | |
572 | * to: branch target | |
573 | * mispred: branch target was mispredicted | |
574 | * predicted: branch target was predicted | |
575 | * | |
576 | * support for mispred, predicted is optional. In case it | |
577 | * is not supported mispred = predicted = 0. | |
578 | */ | |
caff2bef | 579 | struct perf_branch_entry { |
bce38cd5 SE |
580 | __u64 from; |
581 | __u64 to; | |
582 | __u64 mispred:1, /* target mispredicted */ | |
583 | predicted:1,/* target predicted */ | |
584 | reserved:62; | |
caff2bef PZ |
585 | }; |
586 | ||
bce38cd5 SE |
587 | /* |
588 | * branch stack layout: | |
589 | * nr: number of taken branches stored in entries[] | |
590 | * | |
591 | * Note that nr can vary from sample to sample | |
592 | * branches (to, from) are stored from most recent | |
593 | * to least recent, i.e., entries[0] contains the most | |
594 | * recent branch. | |
595 | */ | |
caff2bef PZ |
596 | struct perf_branch_stack { |
597 | __u64 nr; | |
598 | struct perf_branch_entry entries[0]; | |
599 | }; | |
600 | ||
f3dfd265 PM |
601 | struct task_struct; |
602 | ||
efc9f05d SE |
603 | /* |
604 | * extra PMU register associated with an event | |
605 | */ | |
606 | struct hw_perf_event_extra { | |
607 | u64 config; /* register value */ | |
608 | unsigned int reg; /* register address or index */ | |
609 | int alloc; /* extra register already allocated */ | |
610 | int idx; /* index in shared_regs->regs[] */ | |
611 | }; | |
612 | ||
0793a61d | 613 | /** |
cdd6c482 | 614 | * struct hw_perf_event - performance event hardware details: |
0793a61d | 615 | */ |
cdd6c482 IM |
616 | struct hw_perf_event { |
617 | #ifdef CONFIG_PERF_EVENTS | |
d6d020e9 PZ |
618 | union { |
619 | struct { /* hardware */ | |
a308444c | 620 | u64 config; |
447a194b | 621 | u64 last_tag; |
a308444c | 622 | unsigned long config_base; |
cdd6c482 | 623 | unsigned long event_base; |
a308444c | 624 | int idx; |
447a194b | 625 | int last_cpu; |
bce38cd5 | 626 | |
efc9f05d | 627 | struct hw_perf_event_extra extra_reg; |
bce38cd5 | 628 | struct hw_perf_event_extra branch_reg; |
d6d020e9 | 629 | }; |
721a669b | 630 | struct { /* software */ |
a308444c | 631 | struct hrtimer hrtimer; |
d6d020e9 | 632 | }; |
24f1e32c | 633 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
45a73372 FW |
634 | struct { /* breakpoint */ |
635 | struct arch_hw_breakpoint info; | |
636 | struct list_head bp_list; | |
d580ff86 PZ |
637 | /* |
638 | * Crufty hack to avoid the chicken and egg | |
639 | * problem hw_breakpoint has with context | |
640 | * creation and event initalization. | |
641 | */ | |
642 | struct task_struct *bp_target; | |
45a73372 | 643 | }; |
24f1e32c | 644 | #endif |
d6d020e9 | 645 | }; |
a4eaf7f1 | 646 | int state; |
e7850595 | 647 | local64_t prev_count; |
b23f3325 | 648 | u64 sample_period; |
9e350de3 | 649 | u64 last_period; |
e7850595 | 650 | local64_t period_left; |
e050e3f0 | 651 | u64 interrupts_seq; |
60db5e09 | 652 | u64 interrupts; |
6a24ed6c | 653 | |
abd50713 PZ |
654 | u64 freq_time_stamp; |
655 | u64 freq_count_stamp; | |
ee06094f | 656 | #endif |
0793a61d TG |
657 | }; |
658 | ||
a4eaf7f1 PZ |
659 | /* |
660 | * hw_perf_event::state flags | |
661 | */ | |
662 | #define PERF_HES_STOPPED 0x01 /* the counter is stopped */ | |
663 | #define PERF_HES_UPTODATE 0x02 /* event->count up-to-date */ | |
664 | #define PERF_HES_ARCH 0x04 | |
665 | ||
cdd6c482 | 666 | struct perf_event; |
621a01ea | 667 | |
8d2cacbb PZ |
668 | /* |
669 | * Common implementation detail of pmu::{start,commit,cancel}_txn | |
670 | */ | |
671 | #define PERF_EVENT_TXN 0x1 | |
6bde9b6c | 672 | |
621a01ea | 673 | /** |
4aeb0b42 | 674 | * struct pmu - generic performance monitoring unit |
621a01ea | 675 | */ |
4aeb0b42 | 676 | struct pmu { |
b0a873eb PZ |
677 | struct list_head entry; |
678 | ||
abe43400 | 679 | struct device *dev; |
0c9d42ed | 680 | const struct attribute_group **attr_groups; |
2e80a82a PZ |
681 | char *name; |
682 | int type; | |
683 | ||
108b02cf PZ |
684 | int * __percpu pmu_disable_count; |
685 | struct perf_cpu_context * __percpu pmu_cpu_context; | |
8dc85d54 | 686 | int task_ctx_nr; |
6bde9b6c LM |
687 | |
688 | /* | |
a4eaf7f1 PZ |
689 | * Fully disable/enable this PMU, can be used to protect from the PMI |
690 | * as well as for lazy/batch writing of the MSRs. | |
6bde9b6c | 691 | */ |
ad5133b7 PZ |
692 | void (*pmu_enable) (struct pmu *pmu); /* optional */ |
693 | void (*pmu_disable) (struct pmu *pmu); /* optional */ | |
6bde9b6c | 694 | |
8d2cacbb | 695 | /* |
a4eaf7f1 | 696 | * Try and initialize the event for this PMU. |
24cd7f54 | 697 | * Should return -ENOENT when the @event doesn't match this PMU. |
8d2cacbb | 698 | */ |
b0a873eb PZ |
699 | int (*event_init) (struct perf_event *event); |
700 | ||
a4eaf7f1 PZ |
701 | #define PERF_EF_START 0x01 /* start the counter when adding */ |
702 | #define PERF_EF_RELOAD 0x02 /* reload the counter when starting */ | |
703 | #define PERF_EF_UPDATE 0x04 /* update the counter when stopping */ | |
704 | ||
8d2cacbb | 705 | /* |
a4eaf7f1 PZ |
706 | * Adds/Removes a counter to/from the PMU, can be done inside |
707 | * a transaction, see the ->*_txn() methods. | |
708 | */ | |
709 | int (*add) (struct perf_event *event, int flags); | |
710 | void (*del) (struct perf_event *event, int flags); | |
711 | ||
712 | /* | |
713 | * Starts/Stops a counter present on the PMU. The PMI handler | |
714 | * should stop the counter when perf_event_overflow() returns | |
715 | * !0. ->start() will be used to continue. | |
716 | */ | |
717 | void (*start) (struct perf_event *event, int flags); | |
718 | void (*stop) (struct perf_event *event, int flags); | |
719 | ||
720 | /* | |
721 | * Updates the counter value of the event. | |
722 | */ | |
cdd6c482 | 723 | void (*read) (struct perf_event *event); |
6bde9b6c LM |
724 | |
725 | /* | |
24cd7f54 PZ |
726 | * Group events scheduling is treated as a transaction, add |
727 | * group events as a whole and perform one schedulability test. | |
728 | * If the test fails, roll back the whole group | |
a4eaf7f1 PZ |
729 | * |
730 | * Start the transaction, after this ->add() doesn't need to | |
24cd7f54 | 731 | * do schedulability tests. |
8d2cacbb | 732 | */ |
e7e7ee2e | 733 | void (*start_txn) (struct pmu *pmu); /* optional */ |
8d2cacbb | 734 | /* |
a4eaf7f1 | 735 | * If ->start_txn() disabled the ->add() schedulability test |
8d2cacbb PZ |
736 | * then ->commit_txn() is required to perform one. On success |
737 | * the transaction is closed. On error the transaction is kept | |
738 | * open until ->cancel_txn() is called. | |
739 | */ | |
e7e7ee2e | 740 | int (*commit_txn) (struct pmu *pmu); /* optional */ |
8d2cacbb | 741 | /* |
a4eaf7f1 | 742 | * Will cancel the transaction, assumes ->del() is called |
25985edc | 743 | * for each successful ->add() during the transaction. |
8d2cacbb | 744 | */ |
e7e7ee2e | 745 | void (*cancel_txn) (struct pmu *pmu); /* optional */ |
35edc2a5 PZ |
746 | |
747 | /* | |
748 | * Will return the value for perf_event_mmap_page::index for this event, | |
749 | * if no implementation is provided it will default to: event->hw.idx + 1. | |
750 | */ | |
751 | int (*event_idx) (struct perf_event *event); /*optional */ | |
d010b332 SE |
752 | |
753 | /* | |
754 | * flush branch stack on context-switches (needed in cpu-wide mode) | |
755 | */ | |
756 | void (*flush_branch_stack) (void); | |
621a01ea IM |
757 | }; |
758 | ||
6a930700 | 759 | /** |
cdd6c482 | 760 | * enum perf_event_active_state - the states of a event |
6a930700 | 761 | */ |
cdd6c482 | 762 | enum perf_event_active_state { |
57c0c15b | 763 | PERF_EVENT_STATE_ERROR = -2, |
cdd6c482 IM |
764 | PERF_EVENT_STATE_OFF = -1, |
765 | PERF_EVENT_STATE_INACTIVE = 0, | |
57c0c15b | 766 | PERF_EVENT_STATE_ACTIVE = 1, |
6a930700 IM |
767 | }; |
768 | ||
9b51f66d | 769 | struct file; |
453f19ee PZ |
770 | struct perf_sample_data; |
771 | ||
a8b0ca17 | 772 | typedef void (*perf_overflow_handler_t)(struct perf_event *, |
b326e956 FW |
773 | struct perf_sample_data *, |
774 | struct pt_regs *regs); | |
775 | ||
d6f962b5 | 776 | enum perf_group_flag { |
e7e7ee2e | 777 | PERF_GROUP_SOFTWARE = 0x1, |
d6f962b5 FW |
778 | }; |
779 | ||
e7e7ee2e IM |
780 | #define SWEVENT_HLIST_BITS 8 |
781 | #define SWEVENT_HLIST_SIZE (1 << SWEVENT_HLIST_BITS) | |
76e1d904 FW |
782 | |
783 | struct swevent_hlist { | |
e7e7ee2e IM |
784 | struct hlist_head heads[SWEVENT_HLIST_SIZE]; |
785 | struct rcu_head rcu_head; | |
76e1d904 FW |
786 | }; |
787 | ||
8a49542c PZ |
788 | #define PERF_ATTACH_CONTEXT 0x01 |
789 | #define PERF_ATTACH_GROUP 0x02 | |
d580ff86 | 790 | #define PERF_ATTACH_TASK 0x04 |
8a49542c | 791 | |
e5d1367f SE |
792 | #ifdef CONFIG_CGROUP_PERF |
793 | /* | |
794 | * perf_cgroup_info keeps track of time_enabled for a cgroup. | |
795 | * This is a per-cpu dynamically allocated data structure. | |
796 | */ | |
797 | struct perf_cgroup_info { | |
e7e7ee2e IM |
798 | u64 time; |
799 | u64 timestamp; | |
e5d1367f SE |
800 | }; |
801 | ||
802 | struct perf_cgroup { | |
e7e7ee2e IM |
803 | struct cgroup_subsys_state css; |
804 | struct perf_cgroup_info *info; /* timing info, one per cpu */ | |
e5d1367f SE |
805 | }; |
806 | #endif | |
807 | ||
76369139 FW |
808 | struct ring_buffer; |
809 | ||
0793a61d | 810 | /** |
cdd6c482 | 811 | * struct perf_event - performance event kernel representation: |
0793a61d | 812 | */ |
cdd6c482 IM |
813 | struct perf_event { |
814 | #ifdef CONFIG_PERF_EVENTS | |
65abc865 | 815 | struct list_head group_entry; |
592903cd | 816 | struct list_head event_entry; |
04289bb9 | 817 | struct list_head sibling_list; |
76e1d904 | 818 | struct hlist_node hlist_entry; |
0127c3ea | 819 | int nr_siblings; |
d6f962b5 | 820 | int group_flags; |
cdd6c482 | 821 | struct perf_event *group_leader; |
a4eaf7f1 | 822 | struct pmu *pmu; |
04289bb9 | 823 | |
cdd6c482 | 824 | enum perf_event_active_state state; |
8a49542c | 825 | unsigned int attach_state; |
e7850595 | 826 | local64_t count; |
a6e6dea6 | 827 | atomic64_t child_count; |
ee06094f | 828 | |
53cfbf59 | 829 | /* |
cdd6c482 | 830 | * These are the total time in nanoseconds that the event |
53cfbf59 | 831 | * has been enabled (i.e. eligible to run, and the task has |
cdd6c482 | 832 | * been scheduled in, if this is a per-task event) |
53cfbf59 PM |
833 | * and running (scheduled onto the CPU), respectively. |
834 | * | |
835 | * They are computed from tstamp_enabled, tstamp_running and | |
cdd6c482 | 836 | * tstamp_stopped when the event is in INACTIVE or ACTIVE state. |
53cfbf59 PM |
837 | */ |
838 | u64 total_time_enabled; | |
839 | u64 total_time_running; | |
840 | ||
841 | /* | |
842 | * These are timestamps used for computing total_time_enabled | |
cdd6c482 | 843 | * and total_time_running when the event is in INACTIVE or |
53cfbf59 PM |
844 | * ACTIVE state, measured in nanoseconds from an arbitrary point |
845 | * in time. | |
cdd6c482 IM |
846 | * tstamp_enabled: the notional time when the event was enabled |
847 | * tstamp_running: the notional time when the event was scheduled on | |
53cfbf59 | 848 | * tstamp_stopped: in INACTIVE state, the notional time when the |
cdd6c482 | 849 | * event was scheduled off. |
53cfbf59 PM |
850 | */ |
851 | u64 tstamp_enabled; | |
852 | u64 tstamp_running; | |
853 | u64 tstamp_stopped; | |
854 | ||
eed01528 SE |
855 | /* |
856 | * timestamp shadows the actual context timing but it can | |
857 | * be safely used in NMI interrupt context. It reflects the | |
858 | * context time as it was when the event was last scheduled in. | |
859 | * | |
860 | * ctx_time already accounts for ctx->timestamp. Therefore to | |
861 | * compute ctx_time for a sample, simply add perf_clock(). | |
862 | */ | |
863 | u64 shadow_ctx_time; | |
864 | ||
24f1e32c | 865 | struct perf_event_attr attr; |
c320c7b7 | 866 | u16 header_size; |
6844c09d | 867 | u16 id_header_size; |
c320c7b7 | 868 | u16 read_size; |
cdd6c482 | 869 | struct hw_perf_event hw; |
0793a61d | 870 | |
cdd6c482 | 871 | struct perf_event_context *ctx; |
9b51f66d | 872 | struct file *filp; |
0793a61d | 873 | |
53cfbf59 PM |
874 | /* |
875 | * These accumulate total time (in nanoseconds) that children | |
cdd6c482 | 876 | * events have been enabled and running, respectively. |
53cfbf59 PM |
877 | */ |
878 | atomic64_t child_total_time_enabled; | |
879 | atomic64_t child_total_time_running; | |
880 | ||
0793a61d | 881 | /* |
d859e29f | 882 | * Protect attach/detach and child_list: |
0793a61d | 883 | */ |
fccc714b PZ |
884 | struct mutex child_mutex; |
885 | struct list_head child_list; | |
cdd6c482 | 886 | struct perf_event *parent; |
0793a61d TG |
887 | |
888 | int oncpu; | |
889 | int cpu; | |
890 | ||
082ff5a2 PZ |
891 | struct list_head owner_entry; |
892 | struct task_struct *owner; | |
893 | ||
7b732a75 PZ |
894 | /* mmap bits */ |
895 | struct mutex mmap_mutex; | |
896 | atomic_t mmap_count; | |
ac9721f3 PZ |
897 | int mmap_locked; |
898 | struct user_struct *mmap_user; | |
76369139 | 899 | struct ring_buffer *rb; |
10c6db11 | 900 | struct list_head rb_entry; |
37d81828 | 901 | |
7b732a75 | 902 | /* poll related */ |
0793a61d | 903 | wait_queue_head_t waitq; |
3c446b3d | 904 | struct fasync_struct *fasync; |
79f14641 PZ |
905 | |
906 | /* delayed work for NMIs and such */ | |
907 | int pending_wakeup; | |
4c9e2542 | 908 | int pending_kill; |
79f14641 | 909 | int pending_disable; |
e360adbe | 910 | struct irq_work pending; |
592903cd | 911 | |
79f14641 PZ |
912 | atomic_t event_limit; |
913 | ||
cdd6c482 | 914 | void (*destroy)(struct perf_event *); |
592903cd | 915 | struct rcu_head rcu_head; |
709e50cf PZ |
916 | |
917 | struct pid_namespace *ns; | |
8e5799b1 | 918 | u64 id; |
6fb2915d | 919 | |
b326e956 | 920 | perf_overflow_handler_t overflow_handler; |
4dc0da86 | 921 | void *overflow_handler_context; |
453f19ee | 922 | |
07b139c8 | 923 | #ifdef CONFIG_EVENT_TRACING |
1c024eca | 924 | struct ftrace_event_call *tp_event; |
6fb2915d | 925 | struct event_filter *filter; |
ced39002 JO |
926 | #ifdef CONFIG_FUNCTION_TRACER |
927 | struct ftrace_ops ftrace_ops; | |
928 | #endif | |
ee06094f | 929 | #endif |
6fb2915d | 930 | |
e5d1367f SE |
931 | #ifdef CONFIG_CGROUP_PERF |
932 | struct perf_cgroup *cgrp; /* cgroup event is attach to */ | |
933 | int cgrp_defer_enabled; | |
934 | #endif | |
935 | ||
6fb2915d | 936 | #endif /* CONFIG_PERF_EVENTS */ |
0793a61d TG |
937 | }; |
938 | ||
b04243ef PZ |
939 | enum perf_event_context_type { |
940 | task_context, | |
941 | cpu_context, | |
942 | }; | |
943 | ||
0793a61d | 944 | /** |
cdd6c482 | 945 | * struct perf_event_context - event context structure |
0793a61d | 946 | * |
cdd6c482 | 947 | * Used as a container for task events and CPU events as well: |
0793a61d | 948 | */ |
cdd6c482 | 949 | struct perf_event_context { |
108b02cf | 950 | struct pmu *pmu; |
ee643c41 | 951 | enum perf_event_context_type type; |
0793a61d | 952 | /* |
cdd6c482 | 953 | * Protect the states of the events in the list, |
d859e29f | 954 | * nr_active, and the list: |
0793a61d | 955 | */ |
e625cce1 | 956 | raw_spinlock_t lock; |
d859e29f | 957 | /* |
cdd6c482 | 958 | * Protect the list of events. Locking either mutex or lock |
d859e29f PM |
959 | * is sufficient to ensure the list doesn't change; to change |
960 | * the list you need to lock both the mutex and the spinlock. | |
961 | */ | |
a308444c | 962 | struct mutex mutex; |
04289bb9 | 963 | |
889ff015 FW |
964 | struct list_head pinned_groups; |
965 | struct list_head flexible_groups; | |
a308444c | 966 | struct list_head event_list; |
cdd6c482 | 967 | int nr_events; |
a308444c IM |
968 | int nr_active; |
969 | int is_active; | |
bfbd3381 | 970 | int nr_stat; |
0f5a2601 | 971 | int nr_freq; |
dddd3379 | 972 | int rotate_disable; |
a308444c IM |
973 | atomic_t refcount; |
974 | struct task_struct *task; | |
53cfbf59 PM |
975 | |
976 | /* | |
4af4998b | 977 | * Context clock, runs when context enabled. |
53cfbf59 | 978 | */ |
a308444c IM |
979 | u64 time; |
980 | u64 timestamp; | |
564c2b21 PM |
981 | |
982 | /* | |
983 | * These fields let us detect when two contexts have both | |
984 | * been cloned (inherited) from a common ancestor. | |
985 | */ | |
cdd6c482 | 986 | struct perf_event_context *parent_ctx; |
a308444c IM |
987 | u64 parent_gen; |
988 | u64 generation; | |
989 | int pin_count; | |
d010b332 SE |
990 | int nr_cgroups; /* cgroup evts */ |
991 | int nr_branch_stack; /* branch_stack evt */ | |
28009ce4 | 992 | struct rcu_head rcu_head; |
0793a61d TG |
993 | }; |
994 | ||
7ae07ea3 FW |
995 | /* |
996 | * Number of contexts where an event can trigger: | |
e7e7ee2e | 997 | * task, softirq, hardirq, nmi. |
7ae07ea3 FW |
998 | */ |
999 | #define PERF_NR_CONTEXTS 4 | |
1000 | ||
0793a61d | 1001 | /** |
cdd6c482 | 1002 | * struct perf_event_cpu_context - per cpu event context structure |
0793a61d TG |
1003 | */ |
1004 | struct perf_cpu_context { | |
cdd6c482 IM |
1005 | struct perf_event_context ctx; |
1006 | struct perf_event_context *task_ctx; | |
0793a61d | 1007 | int active_oncpu; |
3b6f9e5c | 1008 | int exclusive; |
e9d2b064 PZ |
1009 | struct list_head rotation_list; |
1010 | int jiffies_interval; | |
51676957 | 1011 | struct pmu *active_pmu; |
e5d1367f | 1012 | struct perf_cgroup *cgrp; |
0793a61d TG |
1013 | }; |
1014 | ||
5622f295 | 1015 | struct perf_output_handle { |
57c0c15b | 1016 | struct perf_event *event; |
76369139 | 1017 | struct ring_buffer *rb; |
6d1acfd5 | 1018 | unsigned long wakeup; |
5d967a8b PZ |
1019 | unsigned long size; |
1020 | void *addr; | |
1021 | int page; | |
5622f295 MM |
1022 | }; |
1023 | ||
cdd6c482 | 1024 | #ifdef CONFIG_PERF_EVENTS |
829b42dd | 1025 | |
2e80a82a | 1026 | extern int perf_pmu_register(struct pmu *pmu, char *name, int type); |
b0a873eb | 1027 | extern void perf_pmu_unregister(struct pmu *pmu); |
621a01ea | 1028 | |
3bf101ba | 1029 | extern int perf_num_counters(void); |
84c79910 | 1030 | extern const char *perf_pmu_name(void); |
a8d757ef SE |
1031 | extern void __perf_event_task_sched_in(struct task_struct *prev, |
1032 | struct task_struct *task); | |
1033 | extern void __perf_event_task_sched_out(struct task_struct *prev, | |
1034 | struct task_struct *next); | |
cdd6c482 IM |
1035 | extern int perf_event_init_task(struct task_struct *child); |
1036 | extern void perf_event_exit_task(struct task_struct *child); | |
1037 | extern void perf_event_free_task(struct task_struct *task); | |
4e231c79 | 1038 | extern void perf_event_delayed_put(struct task_struct *task); |
cdd6c482 | 1039 | extern void perf_event_print_debug(void); |
33696fc0 PZ |
1040 | extern void perf_pmu_disable(struct pmu *pmu); |
1041 | extern void perf_pmu_enable(struct pmu *pmu); | |
cdd6c482 IM |
1042 | extern int perf_event_task_disable(void); |
1043 | extern int perf_event_task_enable(void); | |
26ca5c11 | 1044 | extern int perf_event_refresh(struct perf_event *event, int refresh); |
cdd6c482 | 1045 | extern void perf_event_update_userpage(struct perf_event *event); |
fb0459d7 AV |
1046 | extern int perf_event_release_kernel(struct perf_event *event); |
1047 | extern struct perf_event * | |
1048 | perf_event_create_kernel_counter(struct perf_event_attr *attr, | |
1049 | int cpu, | |
38a81da2 | 1050 | struct task_struct *task, |
4dc0da86 AK |
1051 | perf_overflow_handler_t callback, |
1052 | void *context); | |
59ed446f PZ |
1053 | extern u64 perf_event_read_value(struct perf_event *event, |
1054 | u64 *enabled, u64 *running); | |
5c92d124 | 1055 | |
d010b332 | 1056 | |
df1a132b | 1057 | struct perf_sample_data { |
5622f295 MM |
1058 | u64 type; |
1059 | ||
1060 | u64 ip; | |
1061 | struct { | |
1062 | u32 pid; | |
1063 | u32 tid; | |
1064 | } tid_entry; | |
1065 | u64 time; | |
a308444c | 1066 | u64 addr; |
5622f295 MM |
1067 | u64 id; |
1068 | u64 stream_id; | |
1069 | struct { | |
1070 | u32 cpu; | |
1071 | u32 reserved; | |
1072 | } cpu_entry; | |
a308444c | 1073 | u64 period; |
5622f295 | 1074 | struct perf_callchain_entry *callchain; |
3a43ce68 | 1075 | struct perf_raw_record *raw; |
bce38cd5 | 1076 | struct perf_branch_stack *br_stack; |
df1a132b PZ |
1077 | }; |
1078 | ||
e7e7ee2e | 1079 | static inline void perf_sample_data_init(struct perf_sample_data *data, u64 addr) |
dc1d628a PZ |
1080 | { |
1081 | data->addr = addr; | |
1082 | data->raw = NULL; | |
bce38cd5 | 1083 | data->br_stack = NULL; |
dc1d628a PZ |
1084 | } |
1085 | ||
5622f295 MM |
1086 | extern void perf_output_sample(struct perf_output_handle *handle, |
1087 | struct perf_event_header *header, | |
1088 | struct perf_sample_data *data, | |
cdd6c482 | 1089 | struct perf_event *event); |
5622f295 MM |
1090 | extern void perf_prepare_sample(struct perf_event_header *header, |
1091 | struct perf_sample_data *data, | |
cdd6c482 | 1092 | struct perf_event *event, |
5622f295 MM |
1093 | struct pt_regs *regs); |
1094 | ||
a8b0ca17 | 1095 | extern int perf_event_overflow(struct perf_event *event, |
5622f295 MM |
1096 | struct perf_sample_data *data, |
1097 | struct pt_regs *regs); | |
df1a132b | 1098 | |
6c7e550f FBH |
1099 | static inline bool is_sampling_event(struct perf_event *event) |
1100 | { | |
1101 | return event->attr.sample_period != 0; | |
1102 | } | |
1103 | ||
3b6f9e5c | 1104 | /* |
cdd6c482 | 1105 | * Return 1 for a software event, 0 for a hardware event |
3b6f9e5c | 1106 | */ |
cdd6c482 | 1107 | static inline int is_software_event(struct perf_event *event) |
3b6f9e5c | 1108 | { |
89a1e187 | 1109 | return event->pmu->task_ctx_nr == perf_sw_context; |
3b6f9e5c PM |
1110 | } |
1111 | ||
c5905afb | 1112 | extern struct static_key perf_swevent_enabled[PERF_COUNT_SW_MAX]; |
f29ac756 | 1113 | |
a8b0ca17 | 1114 | extern void __perf_sw_event(u32, u64, struct pt_regs *, u64); |
f29ac756 | 1115 | |
b0f82b81 | 1116 | #ifndef perf_arch_fetch_caller_regs |
e7e7ee2e | 1117 | static inline void perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip) { } |
b0f82b81 | 1118 | #endif |
5331d7b8 FW |
1119 | |
1120 | /* | |
1121 | * Take a snapshot of the regs. Skip ip and frame pointer to | |
1122 | * the nth caller. We only need a few of the regs: | |
1123 | * - ip for PERF_SAMPLE_IP | |
1124 | * - cs for user_mode() tests | |
1125 | * - bp for callchains | |
1126 | * - eflags, for future purposes, just in case | |
1127 | */ | |
b0f82b81 | 1128 | static inline void perf_fetch_caller_regs(struct pt_regs *regs) |
5331d7b8 | 1129 | { |
5331d7b8 FW |
1130 | memset(regs, 0, sizeof(*regs)); |
1131 | ||
b0f82b81 | 1132 | perf_arch_fetch_caller_regs(regs, CALLER_ADDR0); |
5331d7b8 FW |
1133 | } |
1134 | ||
7e54a5a0 | 1135 | static __always_inline void |
a8b0ca17 | 1136 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) |
e49a5bd3 | 1137 | { |
7e54a5a0 PZ |
1138 | struct pt_regs hot_regs; |
1139 | ||
c5905afb | 1140 | if (static_key_false(&perf_swevent_enabled[event_id])) { |
d430d3d7 JB |
1141 | if (!regs) { |
1142 | perf_fetch_caller_regs(&hot_regs); | |
1143 | regs = &hot_regs; | |
1144 | } | |
a8b0ca17 | 1145 | __perf_sw_event(event_id, nr, regs, addr); |
e49a5bd3 FW |
1146 | } |
1147 | } | |
1148 | ||
c5905afb | 1149 | extern struct static_key_deferred perf_sched_events; |
ee6dcfa4 | 1150 | |
a8d757ef SE |
1151 | static inline void perf_event_task_sched_in(struct task_struct *prev, |
1152 | struct task_struct *task) | |
ee6dcfa4 | 1153 | { |
c5905afb | 1154 | if (static_key_false(&perf_sched_events.key)) |
a8d757ef | 1155 | __perf_event_task_sched_in(prev, task); |
ee6dcfa4 PZ |
1156 | } |
1157 | ||
a8d757ef SE |
1158 | static inline void perf_event_task_sched_out(struct task_struct *prev, |
1159 | struct task_struct *next) | |
ee6dcfa4 | 1160 | { |
a8b0ca17 | 1161 | perf_sw_event(PERF_COUNT_SW_CONTEXT_SWITCHES, 1, NULL, 0); |
ee6dcfa4 | 1162 | |
c5905afb | 1163 | if (static_key_false(&perf_sched_events.key)) |
a8d757ef | 1164 | __perf_event_task_sched_out(prev, next); |
ee6dcfa4 PZ |
1165 | } |
1166 | ||
3af9e859 | 1167 | extern void perf_event_mmap(struct vm_area_struct *vma); |
39447b38 | 1168 | extern struct perf_guest_info_callbacks *perf_guest_cbs; |
dcf46b94 ZY |
1169 | extern int perf_register_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); |
1170 | extern int perf_unregister_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); | |
39447b38 | 1171 | |
cdd6c482 IM |
1172 | extern void perf_event_comm(struct task_struct *tsk); |
1173 | extern void perf_event_fork(struct task_struct *tsk); | |
8d1b2d93 | 1174 | |
56962b44 FW |
1175 | /* Callchains */ |
1176 | DECLARE_PER_CPU(struct perf_callchain_entry, perf_callchain_entry); | |
1177 | ||
e7e7ee2e IM |
1178 | extern void perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs); |
1179 | extern void perf_callchain_kernel(struct perf_callchain_entry *entry, struct pt_regs *regs); | |
394ee076 | 1180 | |
e7e7ee2e | 1181 | static inline void perf_callchain_store(struct perf_callchain_entry *entry, u64 ip) |
70791ce9 FW |
1182 | { |
1183 | if (entry->nr < PERF_MAX_STACK_DEPTH) | |
1184 | entry->ip[entry->nr++] = ip; | |
1185 | } | |
394ee076 | 1186 | |
cdd6c482 IM |
1187 | extern int sysctl_perf_event_paranoid; |
1188 | extern int sysctl_perf_event_mlock; | |
1189 | extern int sysctl_perf_event_sample_rate; | |
1ccd1549 | 1190 | |
163ec435 PZ |
1191 | extern int perf_proc_update_handler(struct ctl_table *table, int write, |
1192 | void __user *buffer, size_t *lenp, | |
1193 | loff_t *ppos); | |
1194 | ||
320ebf09 PZ |
1195 | static inline bool perf_paranoid_tracepoint_raw(void) |
1196 | { | |
1197 | return sysctl_perf_event_paranoid > -1; | |
1198 | } | |
1199 | ||
1200 | static inline bool perf_paranoid_cpu(void) | |
1201 | { | |
1202 | return sysctl_perf_event_paranoid > 0; | |
1203 | } | |
1204 | ||
1205 | static inline bool perf_paranoid_kernel(void) | |
1206 | { | |
1207 | return sysctl_perf_event_paranoid > 1; | |
1208 | } | |
1209 | ||
cdd6c482 | 1210 | extern void perf_event_init(void); |
1c024eca PZ |
1211 | extern void perf_tp_event(u64 addr, u64 count, void *record, |
1212 | int entry_size, struct pt_regs *regs, | |
ecc55f84 | 1213 | struct hlist_head *head, int rctx); |
24f1e32c | 1214 | extern void perf_bp_event(struct perf_event *event, void *data); |
0d905bca | 1215 | |
9d23a90a | 1216 | #ifndef perf_misc_flags |
e7e7ee2e IM |
1217 | # define perf_misc_flags(regs) \ |
1218 | (user_mode(regs) ? PERF_RECORD_MISC_USER : PERF_RECORD_MISC_KERNEL) | |
1219 | # define perf_instruction_pointer(regs) instruction_pointer(regs) | |
9d23a90a PM |
1220 | #endif |
1221 | ||
bce38cd5 SE |
1222 | static inline bool has_branch_stack(struct perf_event *event) |
1223 | { | |
1224 | return event->attr.sample_type & PERF_SAMPLE_BRANCH_STACK; | |
1225 | } | |
1226 | ||
5622f295 | 1227 | extern int perf_output_begin(struct perf_output_handle *handle, |
a7ac67ea | 1228 | struct perf_event *event, unsigned int size); |
5622f295 MM |
1229 | extern void perf_output_end(struct perf_output_handle *handle); |
1230 | extern void perf_output_copy(struct perf_output_handle *handle, | |
1231 | const void *buf, unsigned int len); | |
4ed7c92d PZ |
1232 | extern int perf_swevent_get_recursion_context(void); |
1233 | extern void perf_swevent_put_recursion_context(int rctx); | |
44234adc FW |
1234 | extern void perf_event_enable(struct perf_event *event); |
1235 | extern void perf_event_disable(struct perf_event *event); | |
e9d2b064 | 1236 | extern void perf_event_task_tick(void); |
0793a61d TG |
1237 | #else |
1238 | static inline void | |
a8d757ef SE |
1239 | perf_event_task_sched_in(struct task_struct *prev, |
1240 | struct task_struct *task) { } | |
0793a61d | 1241 | static inline void |
a8d757ef SE |
1242 | perf_event_task_sched_out(struct task_struct *prev, |
1243 | struct task_struct *next) { } | |
cdd6c482 IM |
1244 | static inline int perf_event_init_task(struct task_struct *child) { return 0; } |
1245 | static inline void perf_event_exit_task(struct task_struct *child) { } | |
1246 | static inline void perf_event_free_task(struct task_struct *task) { } | |
4e231c79 | 1247 | static inline void perf_event_delayed_put(struct task_struct *task) { } |
57c0c15b | 1248 | static inline void perf_event_print_debug(void) { } |
57c0c15b IM |
1249 | static inline int perf_event_task_disable(void) { return -EINVAL; } |
1250 | static inline int perf_event_task_enable(void) { return -EINVAL; } | |
26ca5c11 AK |
1251 | static inline int perf_event_refresh(struct perf_event *event, int refresh) |
1252 | { | |
1253 | return -EINVAL; | |
1254 | } | |
15dbf27c | 1255 | |
925d519a | 1256 | static inline void |
a8b0ca17 | 1257 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) { } |
24f1e32c | 1258 | static inline void |
184f412c | 1259 | perf_bp_event(struct perf_event *event, void *data) { } |
0a4a9391 | 1260 | |
39447b38 | 1261 | static inline int perf_register_guest_info_callbacks |
e7e7ee2e | 1262 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 1263 | static inline int perf_unregister_guest_info_callbacks |
e7e7ee2e | 1264 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 1265 | |
57c0c15b | 1266 | static inline void perf_event_mmap(struct vm_area_struct *vma) { } |
cdd6c482 IM |
1267 | static inline void perf_event_comm(struct task_struct *tsk) { } |
1268 | static inline void perf_event_fork(struct task_struct *tsk) { } | |
1269 | static inline void perf_event_init(void) { } | |
184f412c | 1270 | static inline int perf_swevent_get_recursion_context(void) { return -1; } |
4ed7c92d | 1271 | static inline void perf_swevent_put_recursion_context(int rctx) { } |
44234adc FW |
1272 | static inline void perf_event_enable(struct perf_event *event) { } |
1273 | static inline void perf_event_disable(struct perf_event *event) { } | |
e9d2b064 | 1274 | static inline void perf_event_task_tick(void) { } |
0793a61d TG |
1275 | #endif |
1276 | ||
e7e7ee2e | 1277 | #define perf_output_put(handle, x) perf_output_copy((handle), &(x), sizeof(x)) |
5622f295 | 1278 | |
3f6da390 PZ |
1279 | /* |
1280 | * This has to have a higher priority than migration_notifier in sched.c. | |
1281 | */ | |
e7e7ee2e IM |
1282 | #define perf_cpu_notifier(fn) \ |
1283 | do { \ | |
1284 | static struct notifier_block fn##_nb __cpuinitdata = \ | |
1285 | { .notifier_call = fn, .priority = CPU_PRI_PERF }; \ | |
1286 | fn(&fn##_nb, (unsigned long)CPU_UP_PREPARE, \ | |
1287 | (void *)(unsigned long)smp_processor_id()); \ | |
1288 | fn(&fn##_nb, (unsigned long)CPU_STARTING, \ | |
1289 | (void *)(unsigned long)smp_processor_id()); \ | |
1290 | fn(&fn##_nb, (unsigned long)CPU_ONLINE, \ | |
1291 | (void *)(unsigned long)smp_processor_id()); \ | |
1292 | register_cpu_notifier(&fn##_nb); \ | |
3f6da390 PZ |
1293 | } while (0) |
1294 | ||
641cc938 JO |
1295 | |
1296 | #define PMU_FORMAT_ATTR(_name, _format) \ | |
1297 | static ssize_t \ | |
1298 | _name##_show(struct device *dev, \ | |
1299 | struct device_attribute *attr, \ | |
1300 | char *page) \ | |
1301 | { \ | |
1302 | BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE); \ | |
1303 | return sprintf(page, _format "\n"); \ | |
1304 | } \ | |
1305 | \ | |
1306 | static struct device_attribute format_attr_##_name = __ATTR_RO(_name) | |
1307 | ||
f3dfd265 | 1308 | #endif /* __KERNEL__ */ |
cdd6c482 | 1309 | #endif /* _LINUX_PERF_EVENT_H */ |