Commit | Line | Data |
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0793a61d | 1 | /* |
57c0c15b | 2 | * Performance events: |
0793a61d | 3 | * |
a308444c | 4 | * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de> |
e7e7ee2e IM |
5 | * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar |
6 | * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra | |
0793a61d | 7 | * |
57c0c15b | 8 | * Data type definitions, declarations, prototypes. |
0793a61d | 9 | * |
a308444c | 10 | * Started by: Thomas Gleixner and Ingo Molnar |
0793a61d | 11 | * |
57c0c15b | 12 | * For licencing details see kernel-base/COPYING |
0793a61d | 13 | */ |
cdd6c482 IM |
14 | #ifndef _LINUX_PERF_EVENT_H |
15 | #define _LINUX_PERF_EVENT_H | |
0793a61d | 16 | |
607ca46e | 17 | #include <uapi/linux/perf_event.h> |
0793a61d | 18 | |
9f66a381 | 19 | /* |
f3dfd265 | 20 | * Kernel-internal data types and definitions: |
9f66a381 IM |
21 | */ |
22 | ||
cdd6c482 IM |
23 | #ifdef CONFIG_PERF_EVENTS |
24 | # include <asm/perf_event.h> | |
7be79236 | 25 | # include <asm/local64.h> |
f3dfd265 PM |
26 | #endif |
27 | ||
39447b38 | 28 | struct perf_guest_info_callbacks { |
e7e7ee2e IM |
29 | int (*is_in_guest)(void); |
30 | int (*is_user_mode)(void); | |
31 | unsigned long (*get_guest_ip)(void); | |
39447b38 ZY |
32 | }; |
33 | ||
2ff6cfd7 AB |
34 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
35 | #include <asm/hw_breakpoint.h> | |
36 | #endif | |
37 | ||
f3dfd265 PM |
38 | #include <linux/list.h> |
39 | #include <linux/mutex.h> | |
40 | #include <linux/rculist.h> | |
41 | #include <linux/rcupdate.h> | |
42 | #include <linux/spinlock.h> | |
d6d020e9 | 43 | #include <linux/hrtimer.h> |
3c446b3d | 44 | #include <linux/fs.h> |
709e50cf | 45 | #include <linux/pid_namespace.h> |
906010b2 | 46 | #include <linux/workqueue.h> |
5331d7b8 | 47 | #include <linux/ftrace.h> |
85cfabbc | 48 | #include <linux/cpu.h> |
e360adbe | 49 | #include <linux/irq_work.h> |
c5905afb | 50 | #include <linux/static_key.h> |
851cf6e7 | 51 | #include <linux/jump_label_ratelimit.h> |
60063497 | 52 | #include <linux/atomic.h> |
641cc938 | 53 | #include <linux/sysfs.h> |
4018994f | 54 | #include <linux/perf_regs.h> |
fadfe7be | 55 | #include <linux/workqueue.h> |
39bed6cb | 56 | #include <linux/cgroup.h> |
fa588151 | 57 | #include <asm/local.h> |
f3dfd265 | 58 | |
f9188e02 PZ |
59 | struct perf_callchain_entry { |
60 | __u64 nr; | |
c5dfd78e | 61 | __u64 ip[0]; /* /proc/sys/kernel/perf_event_max_stack */ |
f9188e02 PZ |
62 | }; |
63 | ||
cfbcf468 ACM |
64 | struct perf_callchain_entry_ctx { |
65 | struct perf_callchain_entry *entry; | |
66 | u32 max_stack; | |
3b1fff08 | 67 | u32 nr; |
c85b0334 ACM |
68 | short contexts; |
69 | bool contexts_maxed; | |
cfbcf468 ACM |
70 | }; |
71 | ||
7e3f977e | 72 | typedef unsigned long (*perf_copy_f)(void *dst, const void *src, |
aa7145c1 | 73 | unsigned long off, unsigned long len); |
7e3f977e DB |
74 | |
75 | struct perf_raw_frag { | |
76 | union { | |
77 | struct perf_raw_frag *next; | |
78 | unsigned long pad; | |
79 | }; | |
80 | perf_copy_f copy; | |
81 | void *data; | |
82 | u32 size; | |
83 | } __packed; | |
84 | ||
3a43ce68 | 85 | struct perf_raw_record { |
7e3f977e | 86 | struct perf_raw_frag frag; |
3a43ce68 | 87 | u32 size; |
f413cdb8 FW |
88 | }; |
89 | ||
bce38cd5 SE |
90 | /* |
91 | * branch stack layout: | |
92 | * nr: number of taken branches stored in entries[] | |
93 | * | |
94 | * Note that nr can vary from sample to sample | |
95 | * branches (to, from) are stored from most recent | |
96 | * to least recent, i.e., entries[0] contains the most | |
97 | * recent branch. | |
98 | */ | |
caff2bef PZ |
99 | struct perf_branch_stack { |
100 | __u64 nr; | |
101 | struct perf_branch_entry entries[0]; | |
102 | }; | |
103 | ||
f3dfd265 PM |
104 | struct task_struct; |
105 | ||
efc9f05d SE |
106 | /* |
107 | * extra PMU register associated with an event | |
108 | */ | |
109 | struct hw_perf_event_extra { | |
110 | u64 config; /* register value */ | |
111 | unsigned int reg; /* register address or index */ | |
112 | int alloc; /* extra register already allocated */ | |
113 | int idx; /* index in shared_regs->regs[] */ | |
114 | }; | |
115 | ||
0793a61d | 116 | /** |
cdd6c482 | 117 | * struct hw_perf_event - performance event hardware details: |
0793a61d | 118 | */ |
cdd6c482 IM |
119 | struct hw_perf_event { |
120 | #ifdef CONFIG_PERF_EVENTS | |
d6d020e9 PZ |
121 | union { |
122 | struct { /* hardware */ | |
a308444c | 123 | u64 config; |
447a194b | 124 | u64 last_tag; |
a308444c | 125 | unsigned long config_base; |
cdd6c482 | 126 | unsigned long event_base; |
c48b6053 | 127 | int event_base_rdpmc; |
a308444c | 128 | int idx; |
447a194b | 129 | int last_cpu; |
9fac2cf3 | 130 | int flags; |
bce38cd5 | 131 | |
efc9f05d | 132 | struct hw_perf_event_extra extra_reg; |
bce38cd5 | 133 | struct hw_perf_event_extra branch_reg; |
d6d020e9 | 134 | }; |
721a669b | 135 | struct { /* software */ |
a308444c | 136 | struct hrtimer hrtimer; |
d6d020e9 | 137 | }; |
f22c1bb6 | 138 | struct { /* tracepoint */ |
f22c1bb6 ON |
139 | /* for tp_event->class */ |
140 | struct list_head tp_list; | |
141 | }; | |
4afbb24c MF |
142 | struct { /* intel_cqm */ |
143 | int cqm_state; | |
b3df4ec4 | 144 | u32 cqm_rmid; |
a223c1c7 | 145 | int is_group_event; |
4afbb24c MF |
146 | struct list_head cqm_events_entry; |
147 | struct list_head cqm_groups_entry; | |
148 | struct list_head cqm_group_entry; | |
149 | }; | |
ec0d7729 AS |
150 | struct { /* itrace */ |
151 | int itrace_started; | |
152 | }; | |
c7ab62bf HR |
153 | struct { /* amd_power */ |
154 | u64 pwr_acc; | |
155 | u64 ptsc; | |
156 | }; | |
24f1e32c | 157 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
45a73372 | 158 | struct { /* breakpoint */ |
d580ff86 PZ |
159 | /* |
160 | * Crufty hack to avoid the chicken and egg | |
161 | * problem hw_breakpoint has with context | |
162 | * creation and event initalization. | |
163 | */ | |
f22c1bb6 ON |
164 | struct arch_hw_breakpoint info; |
165 | struct list_head bp_list; | |
45a73372 | 166 | }; |
24f1e32c | 167 | #endif |
cf25f904 SS |
168 | struct { /* amd_iommu */ |
169 | u8 iommu_bank; | |
170 | u8 iommu_cntr; | |
171 | u16 padding; | |
172 | u64 conf; | |
173 | u64 conf1; | |
174 | }; | |
d6d020e9 | 175 | }; |
b0e87875 PZ |
176 | /* |
177 | * If the event is a per task event, this will point to the task in | |
178 | * question. See the comment in perf_event_alloc(). | |
179 | */ | |
50f16a8b | 180 | struct task_struct *target; |
b0e87875 | 181 | |
375637bc AS |
182 | /* |
183 | * PMU would store hardware filter configuration | |
184 | * here. | |
185 | */ | |
186 | void *addr_filters; | |
187 | ||
188 | /* Last sync'ed generation of filters */ | |
189 | unsigned long addr_filters_gen; | |
190 | ||
b0e87875 PZ |
191 | /* |
192 | * hw_perf_event::state flags; used to track the PERF_EF_* state. | |
193 | */ | |
194 | #define PERF_HES_STOPPED 0x01 /* the counter is stopped */ | |
195 | #define PERF_HES_UPTODATE 0x02 /* event->count up-to-date */ | |
196 | #define PERF_HES_ARCH 0x04 | |
197 | ||
a4eaf7f1 | 198 | int state; |
b0e87875 PZ |
199 | |
200 | /* | |
201 | * The last observed hardware counter value, updated with a | |
202 | * local64_cmpxchg() such that pmu::read() can be called nested. | |
203 | */ | |
e7850595 | 204 | local64_t prev_count; |
b0e87875 PZ |
205 | |
206 | /* | |
207 | * The period to start the next sample with. | |
208 | */ | |
b23f3325 | 209 | u64 sample_period; |
b0e87875 PZ |
210 | |
211 | /* | |
212 | * The period we started this sample with. | |
213 | */ | |
9e350de3 | 214 | u64 last_period; |
b0e87875 PZ |
215 | |
216 | /* | |
217 | * However much is left of the current period; note that this is | |
218 | * a full 64bit value and allows for generation of periods longer | |
219 | * than hardware might allow. | |
220 | */ | |
e7850595 | 221 | local64_t period_left; |
b0e87875 PZ |
222 | |
223 | /* | |
224 | * State for throttling the event, see __perf_event_overflow() and | |
225 | * perf_adjust_freq_unthr_context(). | |
226 | */ | |
e050e3f0 | 227 | u64 interrupts_seq; |
60db5e09 | 228 | u64 interrupts; |
6a24ed6c | 229 | |
b0e87875 PZ |
230 | /* |
231 | * State for freq target events, see __perf_event_overflow() and | |
232 | * perf_adjust_freq_unthr_context(). | |
233 | */ | |
abd50713 PZ |
234 | u64 freq_time_stamp; |
235 | u64 freq_count_stamp; | |
ee06094f | 236 | #endif |
0793a61d TG |
237 | }; |
238 | ||
cdd6c482 | 239 | struct perf_event; |
621a01ea | 240 | |
8d2cacbb PZ |
241 | /* |
242 | * Common implementation detail of pmu::{start,commit,cancel}_txn | |
243 | */ | |
fbbe0701 | 244 | #define PERF_PMU_TXN_ADD 0x1 /* txn to add/schedule event on PMU */ |
4a00c16e | 245 | #define PERF_PMU_TXN_READ 0x2 /* txn to read event group from PMU */ |
fbbe0701 | 246 | |
53b25335 VW |
247 | /** |
248 | * pmu::capabilities flags | |
249 | */ | |
250 | #define PERF_PMU_CAP_NO_INTERRUPT 0x01 | |
34f43927 | 251 | #define PERF_PMU_CAP_NO_NMI 0x02 |
0a4e38e6 | 252 | #define PERF_PMU_CAP_AUX_NO_SG 0x04 |
6a279230 | 253 | #define PERF_PMU_CAP_AUX_SW_DOUBLEBUF 0x08 |
bed5b25a | 254 | #define PERF_PMU_CAP_EXCLUSIVE 0x10 |
ec0d7729 | 255 | #define PERF_PMU_CAP_ITRACE 0x20 |
5101ef20 | 256 | #define PERF_PMU_CAP_HETEROGENEOUS_CPUS 0x40 |
53b25335 | 257 | |
621a01ea | 258 | /** |
4aeb0b42 | 259 | * struct pmu - generic performance monitoring unit |
621a01ea | 260 | */ |
4aeb0b42 | 261 | struct pmu { |
b0a873eb PZ |
262 | struct list_head entry; |
263 | ||
c464c76e | 264 | struct module *module; |
abe43400 | 265 | struct device *dev; |
0c9d42ed | 266 | const struct attribute_group **attr_groups; |
03d8e80b | 267 | const char *name; |
2e80a82a PZ |
268 | int type; |
269 | ||
53b25335 VW |
270 | /* |
271 | * various common per-pmu feature flags | |
272 | */ | |
273 | int capabilities; | |
274 | ||
108b02cf PZ |
275 | int * __percpu pmu_disable_count; |
276 | struct perf_cpu_context * __percpu pmu_cpu_context; | |
bed5b25a | 277 | atomic_t exclusive_cnt; /* < 0: cpu; > 0: tsk */ |
8dc85d54 | 278 | int task_ctx_nr; |
62b85639 | 279 | int hrtimer_interval_ms; |
6bde9b6c | 280 | |
375637bc AS |
281 | /* number of address filters this PMU can do */ |
282 | unsigned int nr_addr_filters; | |
283 | ||
6bde9b6c | 284 | /* |
a4eaf7f1 PZ |
285 | * Fully disable/enable this PMU, can be used to protect from the PMI |
286 | * as well as for lazy/batch writing of the MSRs. | |
6bde9b6c | 287 | */ |
ad5133b7 PZ |
288 | void (*pmu_enable) (struct pmu *pmu); /* optional */ |
289 | void (*pmu_disable) (struct pmu *pmu); /* optional */ | |
6bde9b6c | 290 | |
8d2cacbb | 291 | /* |
a4eaf7f1 | 292 | * Try and initialize the event for this PMU. |
b0e87875 PZ |
293 | * |
294 | * Returns: | |
295 | * -ENOENT -- @event is not for this PMU | |
296 | * | |
297 | * -ENODEV -- @event is for this PMU but PMU not present | |
298 | * -EBUSY -- @event is for this PMU but PMU temporarily unavailable | |
299 | * -EINVAL -- @event is for this PMU but @event is not valid | |
300 | * -EOPNOTSUPP -- @event is for this PMU, @event is valid, but not supported | |
301 | * -EACCESS -- @event is for this PMU, @event is valid, but no privilidges | |
302 | * | |
303 | * 0 -- @event is for this PMU and valid | |
304 | * | |
305 | * Other error return values are allowed. | |
8d2cacbb | 306 | */ |
b0a873eb PZ |
307 | int (*event_init) (struct perf_event *event); |
308 | ||
1e0fb9ec AL |
309 | /* |
310 | * Notification that the event was mapped or unmapped. Called | |
311 | * in the context of the mapping task. | |
312 | */ | |
313 | void (*event_mapped) (struct perf_event *event); /*optional*/ | |
314 | void (*event_unmapped) (struct perf_event *event); /*optional*/ | |
315 | ||
b0e87875 PZ |
316 | /* |
317 | * Flags for ->add()/->del()/ ->start()/->stop(). There are | |
318 | * matching hw_perf_event::state flags. | |
319 | */ | |
a4eaf7f1 PZ |
320 | #define PERF_EF_START 0x01 /* start the counter when adding */ |
321 | #define PERF_EF_RELOAD 0x02 /* reload the counter when starting */ | |
322 | #define PERF_EF_UPDATE 0x04 /* update the counter when stopping */ | |
323 | ||
8d2cacbb | 324 | /* |
b0e87875 PZ |
325 | * Adds/Removes a counter to/from the PMU, can be done inside a |
326 | * transaction, see the ->*_txn() methods. | |
327 | * | |
328 | * The add/del callbacks will reserve all hardware resources required | |
329 | * to service the event, this includes any counter constraint | |
330 | * scheduling etc. | |
331 | * | |
332 | * Called with IRQs disabled and the PMU disabled on the CPU the event | |
333 | * is on. | |
334 | * | |
335 | * ->add() called without PERF_EF_START should result in the same state | |
336 | * as ->add() followed by ->stop(). | |
337 | * | |
338 | * ->del() must always PERF_EF_UPDATE stop an event. If it calls | |
339 | * ->stop() that must deal with already being stopped without | |
340 | * PERF_EF_UPDATE. | |
a4eaf7f1 PZ |
341 | */ |
342 | int (*add) (struct perf_event *event, int flags); | |
343 | void (*del) (struct perf_event *event, int flags); | |
344 | ||
345 | /* | |
b0e87875 PZ |
346 | * Starts/Stops a counter present on the PMU. |
347 | * | |
348 | * The PMI handler should stop the counter when perf_event_overflow() | |
349 | * returns !0. ->start() will be used to continue. | |
350 | * | |
351 | * Also used to change the sample period. | |
352 | * | |
353 | * Called with IRQs disabled and the PMU disabled on the CPU the event | |
354 | * is on -- will be called from NMI context with the PMU generates | |
355 | * NMIs. | |
356 | * | |
357 | * ->stop() with PERF_EF_UPDATE will read the counter and update | |
358 | * period/count values like ->read() would. | |
359 | * | |
360 | * ->start() with PERF_EF_RELOAD will reprogram the the counter | |
361 | * value, must be preceded by a ->stop() with PERF_EF_UPDATE. | |
a4eaf7f1 PZ |
362 | */ |
363 | void (*start) (struct perf_event *event, int flags); | |
364 | void (*stop) (struct perf_event *event, int flags); | |
365 | ||
366 | /* | |
367 | * Updates the counter value of the event. | |
b0e87875 PZ |
368 | * |
369 | * For sampling capable PMUs this will also update the software period | |
370 | * hw_perf_event::period_left field. | |
a4eaf7f1 | 371 | */ |
cdd6c482 | 372 | void (*read) (struct perf_event *event); |
6bde9b6c LM |
373 | |
374 | /* | |
24cd7f54 PZ |
375 | * Group events scheduling is treated as a transaction, add |
376 | * group events as a whole and perform one schedulability test. | |
377 | * If the test fails, roll back the whole group | |
a4eaf7f1 PZ |
378 | * |
379 | * Start the transaction, after this ->add() doesn't need to | |
24cd7f54 | 380 | * do schedulability tests. |
fbbe0701 SB |
381 | * |
382 | * Optional. | |
8d2cacbb | 383 | */ |
fbbe0701 | 384 | void (*start_txn) (struct pmu *pmu, unsigned int txn_flags); |
8d2cacbb | 385 | /* |
a4eaf7f1 | 386 | * If ->start_txn() disabled the ->add() schedulability test |
8d2cacbb PZ |
387 | * then ->commit_txn() is required to perform one. On success |
388 | * the transaction is closed. On error the transaction is kept | |
389 | * open until ->cancel_txn() is called. | |
fbbe0701 SB |
390 | * |
391 | * Optional. | |
8d2cacbb | 392 | */ |
fbbe0701 | 393 | int (*commit_txn) (struct pmu *pmu); |
8d2cacbb | 394 | /* |
a4eaf7f1 | 395 | * Will cancel the transaction, assumes ->del() is called |
25985edc | 396 | * for each successful ->add() during the transaction. |
fbbe0701 SB |
397 | * |
398 | * Optional. | |
8d2cacbb | 399 | */ |
fbbe0701 | 400 | void (*cancel_txn) (struct pmu *pmu); |
35edc2a5 PZ |
401 | |
402 | /* | |
403 | * Will return the value for perf_event_mmap_page::index for this event, | |
404 | * if no implementation is provided it will default to: event->hw.idx + 1. | |
405 | */ | |
406 | int (*event_idx) (struct perf_event *event); /*optional */ | |
d010b332 | 407 | |
ba532500 YZ |
408 | /* |
409 | * context-switches callback | |
410 | */ | |
411 | void (*sched_task) (struct perf_event_context *ctx, | |
412 | bool sched_in); | |
4af57ef2 YZ |
413 | /* |
414 | * PMU specific data size | |
415 | */ | |
416 | size_t task_ctx_size; | |
ba532500 | 417 | |
eacd3ecc MF |
418 | |
419 | /* | |
420 | * Return the count value for a counter. | |
421 | */ | |
422 | u64 (*count) (struct perf_event *event); /*optional*/ | |
45bfb2e5 PZ |
423 | |
424 | /* | |
425 | * Set up pmu-private data structures for an AUX area | |
426 | */ | |
427 | void *(*setup_aux) (int cpu, void **pages, | |
428 | int nr_pages, bool overwrite); | |
429 | /* optional */ | |
430 | ||
431 | /* | |
432 | * Free pmu-private AUX data structures | |
433 | */ | |
434 | void (*free_aux) (void *aux); /* optional */ | |
66eb579e | 435 | |
375637bc AS |
436 | /* |
437 | * Validate address range filters: make sure the HW supports the | |
438 | * requested configuration and number of filters; return 0 if the | |
439 | * supplied filters are valid, -errno otherwise. | |
440 | * | |
441 | * Runs in the context of the ioctl()ing process and is not serialized | |
442 | * with the rest of the PMU callbacks. | |
443 | */ | |
444 | int (*addr_filters_validate) (struct list_head *filters); | |
445 | /* optional */ | |
446 | ||
447 | /* | |
448 | * Synchronize address range filter configuration: | |
449 | * translate hw-agnostic filters into hardware configuration in | |
450 | * event::hw::addr_filters. | |
451 | * | |
452 | * Runs as a part of filter sync sequence that is done in ->start() | |
453 | * callback by calling perf_event_addr_filters_sync(). | |
454 | * | |
455 | * May (and should) traverse event::addr_filters::list, for which its | |
456 | * caller provides necessary serialization. | |
457 | */ | |
458 | void (*addr_filters_sync) (struct perf_event *event); | |
459 | /* optional */ | |
460 | ||
66eb579e MR |
461 | /* |
462 | * Filter events for PMU-specific reasons. | |
463 | */ | |
464 | int (*filter_match) (struct perf_event *event); /* optional */ | |
621a01ea IM |
465 | }; |
466 | ||
375637bc AS |
467 | /** |
468 | * struct perf_addr_filter - address range filter definition | |
469 | * @entry: event's filter list linkage | |
470 | * @inode: object file's inode for file-based filters | |
471 | * @offset: filter range offset | |
472 | * @size: filter range size | |
473 | * @range: 1: range, 0: address | |
474 | * @filter: 1: filter/start, 0: stop | |
475 | * | |
476 | * This is a hardware-agnostic filter configuration as specified by the user. | |
477 | */ | |
478 | struct perf_addr_filter { | |
479 | struct list_head entry; | |
480 | struct inode *inode; | |
481 | unsigned long offset; | |
482 | unsigned long size; | |
483 | unsigned int range : 1, | |
484 | filter : 1; | |
485 | }; | |
486 | ||
487 | /** | |
488 | * struct perf_addr_filters_head - container for address range filters | |
489 | * @list: list of filters for this event | |
490 | * @lock: spinlock that serializes accesses to the @list and event's | |
491 | * (and its children's) filter generations. | |
6ce77bfd | 492 | * @nr_file_filters: number of file-based filters |
375637bc AS |
493 | * |
494 | * A child event will use parent's @list (and therefore @lock), so they are | |
495 | * bundled together; see perf_event_addr_filters(). | |
496 | */ | |
497 | struct perf_addr_filters_head { | |
498 | struct list_head list; | |
499 | raw_spinlock_t lock; | |
6ce77bfd | 500 | unsigned int nr_file_filters; |
375637bc AS |
501 | }; |
502 | ||
6a930700 | 503 | /** |
cdd6c482 | 504 | * enum perf_event_active_state - the states of a event |
6a930700 | 505 | */ |
cdd6c482 | 506 | enum perf_event_active_state { |
a69b0ca4 | 507 | PERF_EVENT_STATE_DEAD = -4, |
179033b3 | 508 | PERF_EVENT_STATE_EXIT = -3, |
57c0c15b | 509 | PERF_EVENT_STATE_ERROR = -2, |
cdd6c482 IM |
510 | PERF_EVENT_STATE_OFF = -1, |
511 | PERF_EVENT_STATE_INACTIVE = 0, | |
57c0c15b | 512 | PERF_EVENT_STATE_ACTIVE = 1, |
6a930700 IM |
513 | }; |
514 | ||
9b51f66d | 515 | struct file; |
453f19ee PZ |
516 | struct perf_sample_data; |
517 | ||
a8b0ca17 | 518 | typedef void (*perf_overflow_handler_t)(struct perf_event *, |
b326e956 FW |
519 | struct perf_sample_data *, |
520 | struct pt_regs *regs); | |
521 | ||
4ff6a8de DCC |
522 | /* |
523 | * Event capabilities. For event_caps and groups caps. | |
524 | * | |
525 | * PERF_EV_CAP_SOFTWARE: Is a software event. | |
d6a2f903 DCC |
526 | * PERF_EV_CAP_READ_ACTIVE_PKG: A CPU event (or cgroup event) that can be read |
527 | * from any CPU in the package where it is active. | |
4ff6a8de DCC |
528 | */ |
529 | #define PERF_EV_CAP_SOFTWARE BIT(0) | |
d6a2f903 | 530 | #define PERF_EV_CAP_READ_ACTIVE_PKG BIT(1) |
d6f962b5 | 531 | |
e7e7ee2e IM |
532 | #define SWEVENT_HLIST_BITS 8 |
533 | #define SWEVENT_HLIST_SIZE (1 << SWEVENT_HLIST_BITS) | |
76e1d904 FW |
534 | |
535 | struct swevent_hlist { | |
e7e7ee2e IM |
536 | struct hlist_head heads[SWEVENT_HLIST_SIZE]; |
537 | struct rcu_head rcu_head; | |
76e1d904 FW |
538 | }; |
539 | ||
8a49542c PZ |
540 | #define PERF_ATTACH_CONTEXT 0x01 |
541 | #define PERF_ATTACH_GROUP 0x02 | |
d580ff86 | 542 | #define PERF_ATTACH_TASK 0x04 |
4af57ef2 | 543 | #define PERF_ATTACH_TASK_DATA 0x08 |
8a49542c | 544 | |
877c6856 | 545 | struct perf_cgroup; |
76369139 FW |
546 | struct ring_buffer; |
547 | ||
f2fb6bef KL |
548 | struct pmu_event_list { |
549 | raw_spinlock_t lock; | |
550 | struct list_head list; | |
551 | }; | |
552 | ||
0793a61d | 553 | /** |
cdd6c482 | 554 | * struct perf_event - performance event kernel representation: |
0793a61d | 555 | */ |
cdd6c482 IM |
556 | struct perf_event { |
557 | #ifdef CONFIG_PERF_EVENTS | |
9886167d PZ |
558 | /* |
559 | * entry onto perf_event_context::event_list; | |
560 | * modifications require ctx->lock | |
561 | * RCU safe iterations. | |
562 | */ | |
592903cd | 563 | struct list_head event_entry; |
9886167d PZ |
564 | |
565 | /* | |
566 | * XXX: group_entry and sibling_list should be mutually exclusive; | |
567 | * either you're a sibling on a group, or you're the group leader. | |
568 | * Rework the code to always use the same list element. | |
569 | * | |
570 | * Locked for modification by both ctx->mutex and ctx->lock; holding | |
571 | * either sufficies for read. | |
572 | */ | |
573 | struct list_head group_entry; | |
04289bb9 | 574 | struct list_head sibling_list; |
9886167d PZ |
575 | |
576 | /* | |
577 | * We need storage to track the entries in perf_pmu_migrate_context; we | |
578 | * cannot use the event_entry because of RCU and we want to keep the | |
579 | * group in tact which avoids us using the other two entries. | |
580 | */ | |
581 | struct list_head migrate_entry; | |
582 | ||
f3ae75de SE |
583 | struct hlist_node hlist_entry; |
584 | struct list_head active_entry; | |
0127c3ea | 585 | int nr_siblings; |
4ff6a8de DCC |
586 | |
587 | /* Not serialized. Only written during event initialization. */ | |
588 | int event_caps; | |
589 | /* The cumulative AND of all event_caps for events in this group. */ | |
590 | int group_caps; | |
591 | ||
cdd6c482 | 592 | struct perf_event *group_leader; |
a4eaf7f1 | 593 | struct pmu *pmu; |
54d751d4 | 594 | void *pmu_private; |
04289bb9 | 595 | |
cdd6c482 | 596 | enum perf_event_active_state state; |
8a49542c | 597 | unsigned int attach_state; |
e7850595 | 598 | local64_t count; |
a6e6dea6 | 599 | atomic64_t child_count; |
ee06094f | 600 | |
53cfbf59 | 601 | /* |
cdd6c482 | 602 | * These are the total time in nanoseconds that the event |
53cfbf59 | 603 | * has been enabled (i.e. eligible to run, and the task has |
cdd6c482 | 604 | * been scheduled in, if this is a per-task event) |
53cfbf59 PM |
605 | * and running (scheduled onto the CPU), respectively. |
606 | * | |
607 | * They are computed from tstamp_enabled, tstamp_running and | |
cdd6c482 | 608 | * tstamp_stopped when the event is in INACTIVE or ACTIVE state. |
53cfbf59 PM |
609 | */ |
610 | u64 total_time_enabled; | |
611 | u64 total_time_running; | |
612 | ||
613 | /* | |
614 | * These are timestamps used for computing total_time_enabled | |
cdd6c482 | 615 | * and total_time_running when the event is in INACTIVE or |
53cfbf59 PM |
616 | * ACTIVE state, measured in nanoseconds from an arbitrary point |
617 | * in time. | |
cdd6c482 IM |
618 | * tstamp_enabled: the notional time when the event was enabled |
619 | * tstamp_running: the notional time when the event was scheduled on | |
53cfbf59 | 620 | * tstamp_stopped: in INACTIVE state, the notional time when the |
cdd6c482 | 621 | * event was scheduled off. |
53cfbf59 PM |
622 | */ |
623 | u64 tstamp_enabled; | |
624 | u64 tstamp_running; | |
625 | u64 tstamp_stopped; | |
626 | ||
eed01528 SE |
627 | /* |
628 | * timestamp shadows the actual context timing but it can | |
629 | * be safely used in NMI interrupt context. It reflects the | |
630 | * context time as it was when the event was last scheduled in. | |
631 | * | |
632 | * ctx_time already accounts for ctx->timestamp. Therefore to | |
633 | * compute ctx_time for a sample, simply add perf_clock(). | |
634 | */ | |
635 | u64 shadow_ctx_time; | |
636 | ||
24f1e32c | 637 | struct perf_event_attr attr; |
c320c7b7 | 638 | u16 header_size; |
6844c09d | 639 | u16 id_header_size; |
c320c7b7 | 640 | u16 read_size; |
cdd6c482 | 641 | struct hw_perf_event hw; |
0793a61d | 642 | |
cdd6c482 | 643 | struct perf_event_context *ctx; |
a6fa941d | 644 | atomic_long_t refcount; |
0793a61d | 645 | |
53cfbf59 PM |
646 | /* |
647 | * These accumulate total time (in nanoseconds) that children | |
cdd6c482 | 648 | * events have been enabled and running, respectively. |
53cfbf59 PM |
649 | */ |
650 | atomic64_t child_total_time_enabled; | |
651 | atomic64_t child_total_time_running; | |
652 | ||
0793a61d | 653 | /* |
d859e29f | 654 | * Protect attach/detach and child_list: |
0793a61d | 655 | */ |
fccc714b PZ |
656 | struct mutex child_mutex; |
657 | struct list_head child_list; | |
cdd6c482 | 658 | struct perf_event *parent; |
0793a61d TG |
659 | |
660 | int oncpu; | |
661 | int cpu; | |
662 | ||
082ff5a2 PZ |
663 | struct list_head owner_entry; |
664 | struct task_struct *owner; | |
665 | ||
7b732a75 PZ |
666 | /* mmap bits */ |
667 | struct mutex mmap_mutex; | |
668 | atomic_t mmap_count; | |
26cb63ad | 669 | |
76369139 | 670 | struct ring_buffer *rb; |
10c6db11 | 671 | struct list_head rb_entry; |
b69cf536 PZ |
672 | unsigned long rcu_batches; |
673 | int rcu_pending; | |
37d81828 | 674 | |
7b732a75 | 675 | /* poll related */ |
0793a61d | 676 | wait_queue_head_t waitq; |
3c446b3d | 677 | struct fasync_struct *fasync; |
79f14641 PZ |
678 | |
679 | /* delayed work for NMIs and such */ | |
680 | int pending_wakeup; | |
4c9e2542 | 681 | int pending_kill; |
79f14641 | 682 | int pending_disable; |
e360adbe | 683 | struct irq_work pending; |
592903cd | 684 | |
79f14641 PZ |
685 | atomic_t event_limit; |
686 | ||
375637bc AS |
687 | /* address range filters */ |
688 | struct perf_addr_filters_head addr_filters; | |
689 | /* vma address array for file-based filders */ | |
690 | unsigned long *addr_filters_offs; | |
691 | unsigned long addr_filters_gen; | |
692 | ||
cdd6c482 | 693 | void (*destroy)(struct perf_event *); |
592903cd | 694 | struct rcu_head rcu_head; |
709e50cf PZ |
695 | |
696 | struct pid_namespace *ns; | |
8e5799b1 | 697 | u64 id; |
6fb2915d | 698 | |
34f43927 | 699 | u64 (*clock)(void); |
b326e956 | 700 | perf_overflow_handler_t overflow_handler; |
4dc0da86 | 701 | void *overflow_handler_context; |
aa6a5f3c AS |
702 | #ifdef CONFIG_BPF_SYSCALL |
703 | perf_overflow_handler_t orig_overflow_handler; | |
704 | struct bpf_prog *prog; | |
705 | #endif | |
453f19ee | 706 | |
07b139c8 | 707 | #ifdef CONFIG_EVENT_TRACING |
2425bcb9 | 708 | struct trace_event_call *tp_event; |
6fb2915d | 709 | struct event_filter *filter; |
ced39002 JO |
710 | #ifdef CONFIG_FUNCTION_TRACER |
711 | struct ftrace_ops ftrace_ops; | |
712 | #endif | |
ee06094f | 713 | #endif |
6fb2915d | 714 | |
e5d1367f SE |
715 | #ifdef CONFIG_CGROUP_PERF |
716 | struct perf_cgroup *cgrp; /* cgroup event is attach to */ | |
717 | int cgrp_defer_enabled; | |
718 | #endif | |
719 | ||
f2fb6bef | 720 | struct list_head sb_list; |
6fb2915d | 721 | #endif /* CONFIG_PERF_EVENTS */ |
0793a61d TG |
722 | }; |
723 | ||
724 | /** | |
cdd6c482 | 725 | * struct perf_event_context - event context structure |
0793a61d | 726 | * |
cdd6c482 | 727 | * Used as a container for task events and CPU events as well: |
0793a61d | 728 | */ |
cdd6c482 | 729 | struct perf_event_context { |
108b02cf | 730 | struct pmu *pmu; |
0793a61d | 731 | /* |
cdd6c482 | 732 | * Protect the states of the events in the list, |
d859e29f | 733 | * nr_active, and the list: |
0793a61d | 734 | */ |
e625cce1 | 735 | raw_spinlock_t lock; |
d859e29f | 736 | /* |
cdd6c482 | 737 | * Protect the list of events. Locking either mutex or lock |
d859e29f PM |
738 | * is sufficient to ensure the list doesn't change; to change |
739 | * the list you need to lock both the mutex and the spinlock. | |
740 | */ | |
a308444c | 741 | struct mutex mutex; |
04289bb9 | 742 | |
2fde4f94 | 743 | struct list_head active_ctx_list; |
889ff015 FW |
744 | struct list_head pinned_groups; |
745 | struct list_head flexible_groups; | |
a308444c | 746 | struct list_head event_list; |
cdd6c482 | 747 | int nr_events; |
a308444c IM |
748 | int nr_active; |
749 | int is_active; | |
bfbd3381 | 750 | int nr_stat; |
0f5a2601 | 751 | int nr_freq; |
dddd3379 | 752 | int rotate_disable; |
a308444c IM |
753 | atomic_t refcount; |
754 | struct task_struct *task; | |
53cfbf59 PM |
755 | |
756 | /* | |
4af4998b | 757 | * Context clock, runs when context enabled. |
53cfbf59 | 758 | */ |
a308444c IM |
759 | u64 time; |
760 | u64 timestamp; | |
564c2b21 PM |
761 | |
762 | /* | |
763 | * These fields let us detect when two contexts have both | |
764 | * been cloned (inherited) from a common ancestor. | |
765 | */ | |
cdd6c482 | 766 | struct perf_event_context *parent_ctx; |
a308444c IM |
767 | u64 parent_gen; |
768 | u64 generation; | |
769 | int pin_count; | |
db4a8356 | 770 | #ifdef CONFIG_CGROUP_PERF |
d010b332 | 771 | int nr_cgroups; /* cgroup evts */ |
db4a8356 | 772 | #endif |
4af57ef2 | 773 | void *task_ctx_data; /* pmu specific data */ |
28009ce4 | 774 | struct rcu_head rcu_head; |
0793a61d TG |
775 | }; |
776 | ||
7ae07ea3 FW |
777 | /* |
778 | * Number of contexts where an event can trigger: | |
e7e7ee2e | 779 | * task, softirq, hardirq, nmi. |
7ae07ea3 FW |
780 | */ |
781 | #define PERF_NR_CONTEXTS 4 | |
782 | ||
0793a61d | 783 | /** |
cdd6c482 | 784 | * struct perf_event_cpu_context - per cpu event context structure |
0793a61d TG |
785 | */ |
786 | struct perf_cpu_context { | |
cdd6c482 IM |
787 | struct perf_event_context ctx; |
788 | struct perf_event_context *task_ctx; | |
0793a61d | 789 | int active_oncpu; |
3b6f9e5c | 790 | int exclusive; |
4cfafd30 PZ |
791 | |
792 | raw_spinlock_t hrtimer_lock; | |
9e630205 SE |
793 | struct hrtimer hrtimer; |
794 | ktime_t hrtimer_interval; | |
4cfafd30 PZ |
795 | unsigned int hrtimer_active; |
796 | ||
db4a8356 | 797 | #ifdef CONFIG_CGROUP_PERF |
e5d1367f | 798 | struct perf_cgroup *cgrp; |
058fe1c0 | 799 | struct list_head cgrp_cpuctx_entry; |
db4a8356 | 800 | #endif |
e48c1788 PZ |
801 | |
802 | struct list_head sched_cb_entry; | |
803 | int sched_cb_usage; | |
a63fbed7 TG |
804 | |
805 | int online; | |
0793a61d TG |
806 | }; |
807 | ||
5622f295 | 808 | struct perf_output_handle { |
57c0c15b | 809 | struct perf_event *event; |
76369139 | 810 | struct ring_buffer *rb; |
6d1acfd5 | 811 | unsigned long wakeup; |
5d967a8b | 812 | unsigned long size; |
f4c0b0aa | 813 | u64 aux_flags; |
fdc26706 AS |
814 | union { |
815 | void *addr; | |
816 | unsigned long head; | |
817 | }; | |
5d967a8b | 818 | int page; |
5622f295 MM |
819 | }; |
820 | ||
0515e599 AS |
821 | struct bpf_perf_event_data_kern { |
822 | struct pt_regs *regs; | |
823 | struct perf_sample_data *data; | |
824 | }; | |
825 | ||
39bed6cb MF |
826 | #ifdef CONFIG_CGROUP_PERF |
827 | ||
828 | /* | |
829 | * perf_cgroup_info keeps track of time_enabled for a cgroup. | |
830 | * This is a per-cpu dynamically allocated data structure. | |
831 | */ | |
832 | struct perf_cgroup_info { | |
833 | u64 time; | |
834 | u64 timestamp; | |
835 | }; | |
836 | ||
837 | struct perf_cgroup { | |
838 | struct cgroup_subsys_state css; | |
839 | struct perf_cgroup_info __percpu *info; | |
840 | }; | |
841 | ||
842 | /* | |
843 | * Must ensure cgroup is pinned (css_get) before calling | |
844 | * this function. In other words, we cannot call this function | |
845 | * if there is no cgroup event for the current CPU context. | |
846 | */ | |
847 | static inline struct perf_cgroup * | |
614e4c4e | 848 | perf_cgroup_from_task(struct task_struct *task, struct perf_event_context *ctx) |
39bed6cb | 849 | { |
614e4c4e SE |
850 | return container_of(task_css_check(task, perf_event_cgrp_id, |
851 | ctx ? lockdep_is_held(&ctx->lock) | |
852 | : true), | |
39bed6cb MF |
853 | struct perf_cgroup, css); |
854 | } | |
855 | #endif /* CONFIG_CGROUP_PERF */ | |
856 | ||
cdd6c482 | 857 | #ifdef CONFIG_PERF_EVENTS |
829b42dd | 858 | |
fdc26706 AS |
859 | extern void *perf_aux_output_begin(struct perf_output_handle *handle, |
860 | struct perf_event *event); | |
861 | extern void perf_aux_output_end(struct perf_output_handle *handle, | |
f4c0b0aa | 862 | unsigned long size); |
fdc26706 AS |
863 | extern int perf_aux_output_skip(struct perf_output_handle *handle, |
864 | unsigned long size); | |
865 | extern void *perf_get_aux(struct perf_output_handle *handle); | |
f4c0b0aa | 866 | extern void perf_aux_output_flag(struct perf_output_handle *handle, u64 flags); |
fdc26706 | 867 | |
03d8e80b | 868 | extern int perf_pmu_register(struct pmu *pmu, const char *name, int type); |
b0a873eb | 869 | extern void perf_pmu_unregister(struct pmu *pmu); |
621a01ea | 870 | |
3bf101ba | 871 | extern int perf_num_counters(void); |
84c79910 | 872 | extern const char *perf_pmu_name(void); |
ab0cce56 JO |
873 | extern void __perf_event_task_sched_in(struct task_struct *prev, |
874 | struct task_struct *task); | |
875 | extern void __perf_event_task_sched_out(struct task_struct *prev, | |
876 | struct task_struct *next); | |
cdd6c482 IM |
877 | extern int perf_event_init_task(struct task_struct *child); |
878 | extern void perf_event_exit_task(struct task_struct *child); | |
879 | extern void perf_event_free_task(struct task_struct *task); | |
4e231c79 | 880 | extern void perf_event_delayed_put(struct task_struct *task); |
e03e7ee3 | 881 | extern struct file *perf_event_get(unsigned int fd); |
ffe8690c | 882 | extern const struct perf_event_attr *perf_event_attrs(struct perf_event *event); |
cdd6c482 | 883 | extern void perf_event_print_debug(void); |
33696fc0 PZ |
884 | extern void perf_pmu_disable(struct pmu *pmu); |
885 | extern void perf_pmu_enable(struct pmu *pmu); | |
ba532500 YZ |
886 | extern void perf_sched_cb_dec(struct pmu *pmu); |
887 | extern void perf_sched_cb_inc(struct pmu *pmu); | |
cdd6c482 IM |
888 | extern int perf_event_task_disable(void); |
889 | extern int perf_event_task_enable(void); | |
26ca5c11 | 890 | extern int perf_event_refresh(struct perf_event *event, int refresh); |
cdd6c482 | 891 | extern void perf_event_update_userpage(struct perf_event *event); |
fb0459d7 AV |
892 | extern int perf_event_release_kernel(struct perf_event *event); |
893 | extern struct perf_event * | |
894 | perf_event_create_kernel_counter(struct perf_event_attr *attr, | |
895 | int cpu, | |
38a81da2 | 896 | struct task_struct *task, |
4dc0da86 AK |
897 | perf_overflow_handler_t callback, |
898 | void *context); | |
0cda4c02 YZ |
899 | extern void perf_pmu_migrate_context(struct pmu *pmu, |
900 | int src_cpu, int dst_cpu); | |
f91840a3 | 901 | int perf_event_read_local(struct perf_event *event, u64 *value); |
59ed446f PZ |
902 | extern u64 perf_event_read_value(struct perf_event *event, |
903 | u64 *enabled, u64 *running); | |
5c92d124 | 904 | |
d010b332 | 905 | |
df1a132b | 906 | struct perf_sample_data { |
2565711f PZ |
907 | /* |
908 | * Fields set by perf_sample_data_init(), group so as to | |
909 | * minimize the cachelines touched. | |
910 | */ | |
911 | u64 addr; | |
912 | struct perf_raw_record *raw; | |
913 | struct perf_branch_stack *br_stack; | |
914 | u64 period; | |
915 | u64 weight; | |
916 | u64 txn; | |
917 | union perf_mem_data_src data_src; | |
5622f295 | 918 | |
2565711f PZ |
919 | /* |
920 | * The other fields, optionally {set,used} by | |
921 | * perf_{prepare,output}_sample(). | |
922 | */ | |
923 | u64 type; | |
5622f295 MM |
924 | u64 ip; |
925 | struct { | |
926 | u32 pid; | |
927 | u32 tid; | |
928 | } tid_entry; | |
929 | u64 time; | |
5622f295 MM |
930 | u64 id; |
931 | u64 stream_id; | |
932 | struct { | |
933 | u32 cpu; | |
934 | u32 reserved; | |
935 | } cpu_entry; | |
5622f295 | 936 | struct perf_callchain_entry *callchain; |
88a7c26a AL |
937 | |
938 | /* | |
939 | * regs_user may point to task_pt_regs or to regs_user_copy, depending | |
940 | * on arch details. | |
941 | */ | |
60e2364e | 942 | struct perf_regs regs_user; |
88a7c26a AL |
943 | struct pt_regs regs_user_copy; |
944 | ||
60e2364e | 945 | struct perf_regs regs_intr; |
c5ebcedb | 946 | u64 stack_user_size; |
2565711f | 947 | } ____cacheline_aligned; |
df1a132b | 948 | |
770eee1f SE |
949 | /* default value for data source */ |
950 | #define PERF_MEM_NA (PERF_MEM_S(OP, NA) |\ | |
951 | PERF_MEM_S(LVL, NA) |\ | |
952 | PERF_MEM_S(SNOOP, NA) |\ | |
953 | PERF_MEM_S(LOCK, NA) |\ | |
954 | PERF_MEM_S(TLB, NA)) | |
955 | ||
fd0d000b RR |
956 | static inline void perf_sample_data_init(struct perf_sample_data *data, |
957 | u64 addr, u64 period) | |
dc1d628a | 958 | { |
fd0d000b | 959 | /* remaining struct members initialized in perf_prepare_sample() */ |
dc1d628a PZ |
960 | data->addr = addr; |
961 | data->raw = NULL; | |
bce38cd5 | 962 | data->br_stack = NULL; |
4018994f | 963 | data->period = period; |
c3feedf2 | 964 | data->weight = 0; |
770eee1f | 965 | data->data_src.val = PERF_MEM_NA; |
fdfbbd07 | 966 | data->txn = 0; |
dc1d628a PZ |
967 | } |
968 | ||
5622f295 MM |
969 | extern void perf_output_sample(struct perf_output_handle *handle, |
970 | struct perf_event_header *header, | |
971 | struct perf_sample_data *data, | |
cdd6c482 | 972 | struct perf_event *event); |
5622f295 MM |
973 | extern void perf_prepare_sample(struct perf_event_header *header, |
974 | struct perf_sample_data *data, | |
cdd6c482 | 975 | struct perf_event *event, |
5622f295 MM |
976 | struct pt_regs *regs); |
977 | ||
a8b0ca17 | 978 | extern int perf_event_overflow(struct perf_event *event, |
5622f295 MM |
979 | struct perf_sample_data *data, |
980 | struct pt_regs *regs); | |
df1a132b | 981 | |
9ecda41a WN |
982 | extern void perf_event_output_forward(struct perf_event *event, |
983 | struct perf_sample_data *data, | |
984 | struct pt_regs *regs); | |
985 | extern void perf_event_output_backward(struct perf_event *event, | |
986 | struct perf_sample_data *data, | |
987 | struct pt_regs *regs); | |
21509084 | 988 | extern void perf_event_output(struct perf_event *event, |
9ecda41a WN |
989 | struct perf_sample_data *data, |
990 | struct pt_regs *regs); | |
21509084 | 991 | |
1879445d WN |
992 | static inline bool |
993 | is_default_overflow_handler(struct perf_event *event) | |
994 | { | |
9ecda41a WN |
995 | if (likely(event->overflow_handler == perf_event_output_forward)) |
996 | return true; | |
997 | if (unlikely(event->overflow_handler == perf_event_output_backward)) | |
998 | return true; | |
999 | return false; | |
1879445d WN |
1000 | } |
1001 | ||
21509084 YZ |
1002 | extern void |
1003 | perf_event_header__init_id(struct perf_event_header *header, | |
1004 | struct perf_sample_data *data, | |
1005 | struct perf_event *event); | |
1006 | extern void | |
1007 | perf_event__output_id_sample(struct perf_event *event, | |
1008 | struct perf_output_handle *handle, | |
1009 | struct perf_sample_data *sample); | |
1010 | ||
f38b0dbb KL |
1011 | extern void |
1012 | perf_log_lost_samples(struct perf_event *event, u64 lost); | |
1013 | ||
6c7e550f FBH |
1014 | static inline bool is_sampling_event(struct perf_event *event) |
1015 | { | |
1016 | return event->attr.sample_period != 0; | |
1017 | } | |
1018 | ||
3b6f9e5c | 1019 | /* |
cdd6c482 | 1020 | * Return 1 for a software event, 0 for a hardware event |
3b6f9e5c | 1021 | */ |
cdd6c482 | 1022 | static inline int is_software_event(struct perf_event *event) |
3b6f9e5c | 1023 | { |
4ff6a8de | 1024 | return event->event_caps & PERF_EV_CAP_SOFTWARE; |
3b6f9e5c PM |
1025 | } |
1026 | ||
c5905afb | 1027 | extern struct static_key perf_swevent_enabled[PERF_COUNT_SW_MAX]; |
f29ac756 | 1028 | |
86038c5e | 1029 | extern void ___perf_sw_event(u32, u64, struct pt_regs *, u64); |
a8b0ca17 | 1030 | extern void __perf_sw_event(u32, u64, struct pt_regs *, u64); |
f29ac756 | 1031 | |
b0f82b81 | 1032 | #ifndef perf_arch_fetch_caller_regs |
e7e7ee2e | 1033 | static inline void perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip) { } |
b0f82b81 | 1034 | #endif |
5331d7b8 FW |
1035 | |
1036 | /* | |
1037 | * Take a snapshot of the regs. Skip ip and frame pointer to | |
1038 | * the nth caller. We only need a few of the regs: | |
1039 | * - ip for PERF_SAMPLE_IP | |
1040 | * - cs for user_mode() tests | |
1041 | * - bp for callchains | |
1042 | * - eflags, for future purposes, just in case | |
1043 | */ | |
b0f82b81 | 1044 | static inline void perf_fetch_caller_regs(struct pt_regs *regs) |
5331d7b8 | 1045 | { |
b0f82b81 | 1046 | perf_arch_fetch_caller_regs(regs, CALLER_ADDR0); |
5331d7b8 FW |
1047 | } |
1048 | ||
7e54a5a0 | 1049 | static __always_inline void |
a8b0ca17 | 1050 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) |
e49a5bd3 | 1051 | { |
86038c5e PZI |
1052 | if (static_key_false(&perf_swevent_enabled[event_id])) |
1053 | __perf_sw_event(event_id, nr, regs, addr); | |
1054 | } | |
1055 | ||
1056 | DECLARE_PER_CPU(struct pt_regs, __perf_regs[4]); | |
7e54a5a0 | 1057 | |
86038c5e PZI |
1058 | /* |
1059 | * 'Special' version for the scheduler, it hard assumes no recursion, | |
1060 | * which is guaranteed by us not actually scheduling inside other swevents | |
1061 | * because those disable preemption. | |
1062 | */ | |
1063 | static __always_inline void | |
1064 | perf_sw_event_sched(u32 event_id, u64 nr, u64 addr) | |
1065 | { | |
c5905afb | 1066 | if (static_key_false(&perf_swevent_enabled[event_id])) { |
86038c5e PZI |
1067 | struct pt_regs *regs = this_cpu_ptr(&__perf_regs[0]); |
1068 | ||
1069 | perf_fetch_caller_regs(regs); | |
1070 | ___perf_sw_event(event_id, nr, regs, addr); | |
e49a5bd3 FW |
1071 | } |
1072 | } | |
1073 | ||
9107c89e | 1074 | extern struct static_key_false perf_sched_events; |
ee6dcfa4 | 1075 | |
ff303e66 PZ |
1076 | static __always_inline bool |
1077 | perf_sw_migrate_enabled(void) | |
1078 | { | |
1079 | if (static_key_false(&perf_swevent_enabled[PERF_COUNT_SW_CPU_MIGRATIONS])) | |
1080 | return true; | |
1081 | return false; | |
1082 | } | |
1083 | ||
1084 | static inline void perf_event_task_migrate(struct task_struct *task) | |
1085 | { | |
1086 | if (perf_sw_migrate_enabled()) | |
1087 | task->sched_migrated = 1; | |
1088 | } | |
1089 | ||
ab0cce56 | 1090 | static inline void perf_event_task_sched_in(struct task_struct *prev, |
a8d757ef | 1091 | struct task_struct *task) |
ab0cce56 | 1092 | { |
9107c89e | 1093 | if (static_branch_unlikely(&perf_sched_events)) |
ab0cce56 | 1094 | __perf_event_task_sched_in(prev, task); |
ff303e66 PZ |
1095 | |
1096 | if (perf_sw_migrate_enabled() && task->sched_migrated) { | |
1097 | struct pt_regs *regs = this_cpu_ptr(&__perf_regs[0]); | |
1098 | ||
1099 | perf_fetch_caller_regs(regs); | |
1100 | ___perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS, 1, regs, 0); | |
1101 | task->sched_migrated = 0; | |
1102 | } | |
ab0cce56 JO |
1103 | } |
1104 | ||
1105 | static inline void perf_event_task_sched_out(struct task_struct *prev, | |
1106 | struct task_struct *next) | |
ee6dcfa4 | 1107 | { |
86038c5e | 1108 | perf_sw_event_sched(PERF_COUNT_SW_CONTEXT_SWITCHES, 1, 0); |
ee6dcfa4 | 1109 | |
9107c89e | 1110 | if (static_branch_unlikely(&perf_sched_events)) |
ab0cce56 | 1111 | __perf_event_task_sched_out(prev, next); |
ee6dcfa4 PZ |
1112 | } |
1113 | ||
eacd3ecc MF |
1114 | static inline u64 __perf_event_count(struct perf_event *event) |
1115 | { | |
1116 | return local64_read(&event->count) + atomic64_read(&event->child_count); | |
1117 | } | |
1118 | ||
3af9e859 | 1119 | extern void perf_event_mmap(struct vm_area_struct *vma); |
39447b38 | 1120 | extern struct perf_guest_info_callbacks *perf_guest_cbs; |
dcf46b94 ZY |
1121 | extern int perf_register_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); |
1122 | extern int perf_unregister_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); | |
39447b38 | 1123 | |
e041e328 | 1124 | extern void perf_event_exec(void); |
82b89778 | 1125 | extern void perf_event_comm(struct task_struct *tsk, bool exec); |
e4222673 | 1126 | extern void perf_event_namespaces(struct task_struct *tsk); |
cdd6c482 | 1127 | extern void perf_event_fork(struct task_struct *tsk); |
8d1b2d93 | 1128 | |
56962b44 FW |
1129 | /* Callchains */ |
1130 | DECLARE_PER_CPU(struct perf_callchain_entry, perf_callchain_entry); | |
1131 | ||
cfbcf468 ACM |
1132 | extern void perf_callchain_user(struct perf_callchain_entry_ctx *entry, struct pt_regs *regs); |
1133 | extern void perf_callchain_kernel(struct perf_callchain_entry_ctx *entry, struct pt_regs *regs); | |
568b329a AS |
1134 | extern struct perf_callchain_entry * |
1135 | get_perf_callchain(struct pt_regs *regs, u32 init_nr, bool kernel, bool user, | |
cfbcf468 | 1136 | u32 max_stack, bool crosstask, bool add_mark); |
97c79a38 | 1137 | extern int get_callchain_buffers(int max_stack); |
568b329a | 1138 | extern void put_callchain_buffers(void); |
394ee076 | 1139 | |
c5dfd78e | 1140 | extern int sysctl_perf_event_max_stack; |
c85b0334 | 1141 | extern int sysctl_perf_event_max_contexts_per_stack; |
c5dfd78e | 1142 | |
c85b0334 ACM |
1143 | static inline int perf_callchain_store_context(struct perf_callchain_entry_ctx *ctx, u64 ip) |
1144 | { | |
1145 | if (ctx->contexts < sysctl_perf_event_max_contexts_per_stack) { | |
1146 | struct perf_callchain_entry *entry = ctx->entry; | |
1147 | entry->ip[entry->nr++] = ip; | |
1148 | ++ctx->contexts; | |
1149 | return 0; | |
1150 | } else { | |
1151 | ctx->contexts_maxed = true; | |
1152 | return -1; /* no more room, stop walking the stack */ | |
1153 | } | |
1154 | } | |
3e4de4ec | 1155 | |
cfbcf468 | 1156 | static inline int perf_callchain_store(struct perf_callchain_entry_ctx *ctx, u64 ip) |
70791ce9 | 1157 | { |
c85b0334 | 1158 | if (ctx->nr < ctx->max_stack && !ctx->contexts_maxed) { |
3b1fff08 | 1159 | struct perf_callchain_entry *entry = ctx->entry; |
70791ce9 | 1160 | entry->ip[entry->nr++] = ip; |
3b1fff08 | 1161 | ++ctx->nr; |
568b329a AS |
1162 | return 0; |
1163 | } else { | |
1164 | return -1; /* no more room, stop walking the stack */ | |
1165 | } | |
70791ce9 | 1166 | } |
394ee076 | 1167 | |
cdd6c482 IM |
1168 | extern int sysctl_perf_event_paranoid; |
1169 | extern int sysctl_perf_event_mlock; | |
1170 | extern int sysctl_perf_event_sample_rate; | |
14c63f17 DH |
1171 | extern int sysctl_perf_cpu_time_max_percent; |
1172 | ||
1173 | extern void perf_sample_event_took(u64 sample_len_ns); | |
1ccd1549 | 1174 | |
163ec435 PZ |
1175 | extern int perf_proc_update_handler(struct ctl_table *table, int write, |
1176 | void __user *buffer, size_t *lenp, | |
1177 | loff_t *ppos); | |
14c63f17 DH |
1178 | extern int perf_cpu_time_max_percent_handler(struct ctl_table *table, int write, |
1179 | void __user *buffer, size_t *lenp, | |
1180 | loff_t *ppos); | |
1181 | ||
c5dfd78e ACM |
1182 | int perf_event_max_stack_handler(struct ctl_table *table, int write, |
1183 | void __user *buffer, size_t *lenp, loff_t *ppos); | |
163ec435 | 1184 | |
320ebf09 PZ |
1185 | static inline bool perf_paranoid_tracepoint_raw(void) |
1186 | { | |
1187 | return sysctl_perf_event_paranoid > -1; | |
1188 | } | |
1189 | ||
1190 | static inline bool perf_paranoid_cpu(void) | |
1191 | { | |
1192 | return sysctl_perf_event_paranoid > 0; | |
1193 | } | |
1194 | ||
1195 | static inline bool perf_paranoid_kernel(void) | |
1196 | { | |
1197 | return sysctl_perf_event_paranoid > 1; | |
1198 | } | |
1199 | ||
cdd6c482 | 1200 | extern void perf_event_init(void); |
1e1dcd93 | 1201 | extern void perf_tp_event(u16 event_type, u64 count, void *record, |
1c024eca | 1202 | int entry_size, struct pt_regs *regs, |
e6dab5ff AV |
1203 | struct hlist_head *head, int rctx, |
1204 | struct task_struct *task); | |
24f1e32c | 1205 | extern void perf_bp_event(struct perf_event *event, void *data); |
0d905bca | 1206 | |
9d23a90a | 1207 | #ifndef perf_misc_flags |
e7e7ee2e IM |
1208 | # define perf_misc_flags(regs) \ |
1209 | (user_mode(regs) ? PERF_RECORD_MISC_USER : PERF_RECORD_MISC_KERNEL) | |
1210 | # define perf_instruction_pointer(regs) instruction_pointer(regs) | |
9d23a90a PM |
1211 | #endif |
1212 | ||
bce38cd5 SE |
1213 | static inline bool has_branch_stack(struct perf_event *event) |
1214 | { | |
1215 | return event->attr.sample_type & PERF_SAMPLE_BRANCH_STACK; | |
a46a2300 YZ |
1216 | } |
1217 | ||
1218 | static inline bool needs_branch_stack(struct perf_event *event) | |
1219 | { | |
1220 | return event->attr.branch_sample_type != 0; | |
bce38cd5 SE |
1221 | } |
1222 | ||
45bfb2e5 PZ |
1223 | static inline bool has_aux(struct perf_event *event) |
1224 | { | |
1225 | return event->pmu->setup_aux; | |
1226 | } | |
1227 | ||
9ecda41a WN |
1228 | static inline bool is_write_backward(struct perf_event *event) |
1229 | { | |
1230 | return !!event->attr.write_backward; | |
1231 | } | |
1232 | ||
375637bc AS |
1233 | static inline bool has_addr_filter(struct perf_event *event) |
1234 | { | |
1235 | return event->pmu->nr_addr_filters; | |
1236 | } | |
1237 | ||
1238 | /* | |
1239 | * An inherited event uses parent's filters | |
1240 | */ | |
1241 | static inline struct perf_addr_filters_head * | |
1242 | perf_event_addr_filters(struct perf_event *event) | |
1243 | { | |
1244 | struct perf_addr_filters_head *ifh = &event->addr_filters; | |
1245 | ||
1246 | if (event->parent) | |
1247 | ifh = &event->parent->addr_filters; | |
1248 | ||
1249 | return ifh; | |
1250 | } | |
1251 | ||
1252 | extern void perf_event_addr_filters_sync(struct perf_event *event); | |
1253 | ||
5622f295 | 1254 | extern int perf_output_begin(struct perf_output_handle *handle, |
a7ac67ea | 1255 | struct perf_event *event, unsigned int size); |
9ecda41a WN |
1256 | extern int perf_output_begin_forward(struct perf_output_handle *handle, |
1257 | struct perf_event *event, | |
1258 | unsigned int size); | |
1259 | extern int perf_output_begin_backward(struct perf_output_handle *handle, | |
1260 | struct perf_event *event, | |
1261 | unsigned int size); | |
1262 | ||
5622f295 | 1263 | extern void perf_output_end(struct perf_output_handle *handle); |
91d7753a | 1264 | extern unsigned int perf_output_copy(struct perf_output_handle *handle, |
5622f295 | 1265 | const void *buf, unsigned int len); |
5685e0ff JO |
1266 | extern unsigned int perf_output_skip(struct perf_output_handle *handle, |
1267 | unsigned int len); | |
4ed7c92d PZ |
1268 | extern int perf_swevent_get_recursion_context(void); |
1269 | extern void perf_swevent_put_recursion_context(int rctx); | |
ab573844 | 1270 | extern u64 perf_swevent_set_period(struct perf_event *event); |
44234adc FW |
1271 | extern void perf_event_enable(struct perf_event *event); |
1272 | extern void perf_event_disable(struct perf_event *event); | |
fae3fde6 | 1273 | extern void perf_event_disable_local(struct perf_event *event); |
5aab90ce | 1274 | extern void perf_event_disable_inatomic(struct perf_event *event); |
e9d2b064 | 1275 | extern void perf_event_task_tick(void); |
475113d9 | 1276 | extern int perf_event_account_interrupt(struct perf_event *event); |
e041e328 | 1277 | #else /* !CONFIG_PERF_EVENTS: */ |
fdc26706 AS |
1278 | static inline void * |
1279 | perf_aux_output_begin(struct perf_output_handle *handle, | |
1280 | struct perf_event *event) { return NULL; } | |
1281 | static inline void | |
f4c0b0aa WD |
1282 | perf_aux_output_end(struct perf_output_handle *handle, unsigned long size) |
1283 | { } | |
fdc26706 AS |
1284 | static inline int |
1285 | perf_aux_output_skip(struct perf_output_handle *handle, | |
1286 | unsigned long size) { return -EINVAL; } | |
1287 | static inline void * | |
1288 | perf_get_aux(struct perf_output_handle *handle) { return NULL; } | |
0793a61d | 1289 | static inline void |
ff303e66 PZ |
1290 | perf_event_task_migrate(struct task_struct *task) { } |
1291 | static inline void | |
ab0cce56 JO |
1292 | perf_event_task_sched_in(struct task_struct *prev, |
1293 | struct task_struct *task) { } | |
1294 | static inline void | |
1295 | perf_event_task_sched_out(struct task_struct *prev, | |
1296 | struct task_struct *next) { } | |
cdd6c482 IM |
1297 | static inline int perf_event_init_task(struct task_struct *child) { return 0; } |
1298 | static inline void perf_event_exit_task(struct task_struct *child) { } | |
1299 | static inline void perf_event_free_task(struct task_struct *task) { } | |
4e231c79 | 1300 | static inline void perf_event_delayed_put(struct task_struct *task) { } |
e03e7ee3 | 1301 | static inline struct file *perf_event_get(unsigned int fd) { return ERR_PTR(-EINVAL); } |
ffe8690c KX |
1302 | static inline const struct perf_event_attr *perf_event_attrs(struct perf_event *event) |
1303 | { | |
1304 | return ERR_PTR(-EINVAL); | |
1305 | } | |
f91840a3 AS |
1306 | static inline int perf_event_read_local(struct perf_event *event, u64 *value) |
1307 | { | |
1308 | return -EINVAL; | |
1309 | } | |
57c0c15b | 1310 | static inline void perf_event_print_debug(void) { } |
57c0c15b IM |
1311 | static inline int perf_event_task_disable(void) { return -EINVAL; } |
1312 | static inline int perf_event_task_enable(void) { return -EINVAL; } | |
26ca5c11 AK |
1313 | static inline int perf_event_refresh(struct perf_event *event, int refresh) |
1314 | { | |
1315 | return -EINVAL; | |
1316 | } | |
15dbf27c | 1317 | |
925d519a | 1318 | static inline void |
a8b0ca17 | 1319 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) { } |
24f1e32c | 1320 | static inline void |
86038c5e PZI |
1321 | perf_sw_event_sched(u32 event_id, u64 nr, u64 addr) { } |
1322 | static inline void | |
184f412c | 1323 | perf_bp_event(struct perf_event *event, void *data) { } |
0a4a9391 | 1324 | |
39447b38 | 1325 | static inline int perf_register_guest_info_callbacks |
e7e7ee2e | 1326 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 1327 | static inline int perf_unregister_guest_info_callbacks |
e7e7ee2e | 1328 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 1329 | |
57c0c15b | 1330 | static inline void perf_event_mmap(struct vm_area_struct *vma) { } |
e041e328 | 1331 | static inline void perf_event_exec(void) { } |
82b89778 | 1332 | static inline void perf_event_comm(struct task_struct *tsk, bool exec) { } |
e4222673 | 1333 | static inline void perf_event_namespaces(struct task_struct *tsk) { } |
cdd6c482 IM |
1334 | static inline void perf_event_fork(struct task_struct *tsk) { } |
1335 | static inline void perf_event_init(void) { } | |
184f412c | 1336 | static inline int perf_swevent_get_recursion_context(void) { return -1; } |
4ed7c92d | 1337 | static inline void perf_swevent_put_recursion_context(int rctx) { } |
ab573844 | 1338 | static inline u64 perf_swevent_set_period(struct perf_event *event) { return 0; } |
44234adc FW |
1339 | static inline void perf_event_enable(struct perf_event *event) { } |
1340 | static inline void perf_event_disable(struct perf_event *event) { } | |
500ad2d8 | 1341 | static inline int __perf_event_disable(void *info) { return -1; } |
e9d2b064 | 1342 | static inline void perf_event_task_tick(void) { } |
ffe8690c | 1343 | static inline int perf_event_release_kernel(struct perf_event *event) { return 0; } |
0793a61d TG |
1344 | #endif |
1345 | ||
6c4d3bc9 DR |
1346 | #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_INTEL) |
1347 | extern void perf_restore_debug_store(void); | |
1348 | #else | |
1d9d8639 | 1349 | static inline void perf_restore_debug_store(void) { } |
0793a61d TG |
1350 | #endif |
1351 | ||
7e3f977e DB |
1352 | static __always_inline bool perf_raw_frag_last(const struct perf_raw_frag *frag) |
1353 | { | |
1354 | return frag->pad < sizeof(u64); | |
1355 | } | |
1356 | ||
e7e7ee2e | 1357 | #define perf_output_put(handle, x) perf_output_copy((handle), &(x), sizeof(x)) |
5622f295 | 1358 | |
2663960c SB |
1359 | struct perf_pmu_events_attr { |
1360 | struct device_attribute attr; | |
1361 | u64 id; | |
3a54aaa0 | 1362 | const char *event_str; |
2663960c SB |
1363 | }; |
1364 | ||
fc07e9f9 AK |
1365 | struct perf_pmu_events_ht_attr { |
1366 | struct device_attribute attr; | |
1367 | u64 id; | |
1368 | const char *event_str_ht; | |
1369 | const char *event_str_noht; | |
1370 | }; | |
1371 | ||
fd979c01 CS |
1372 | ssize_t perf_event_sysfs_show(struct device *dev, struct device_attribute *attr, |
1373 | char *page); | |
1374 | ||
2663960c SB |
1375 | #define PMU_EVENT_ATTR(_name, _var, _id, _show) \ |
1376 | static struct perf_pmu_events_attr _var = { \ | |
1377 | .attr = __ATTR(_name, 0444, _show, NULL), \ | |
1378 | .id = _id, \ | |
1379 | }; | |
1380 | ||
f0405b81 CS |
1381 | #define PMU_EVENT_ATTR_STRING(_name, _var, _str) \ |
1382 | static struct perf_pmu_events_attr _var = { \ | |
1383 | .attr = __ATTR(_name, 0444, perf_event_sysfs_show, NULL), \ | |
1384 | .id = 0, \ | |
1385 | .event_str = _str, \ | |
1386 | }; | |
1387 | ||
641cc938 JO |
1388 | #define PMU_FORMAT_ATTR(_name, _format) \ |
1389 | static ssize_t \ | |
1390 | _name##_show(struct device *dev, \ | |
1391 | struct device_attribute *attr, \ | |
1392 | char *page) \ | |
1393 | { \ | |
1394 | BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE); \ | |
1395 | return sprintf(page, _format "\n"); \ | |
1396 | } \ | |
1397 | \ | |
1398 | static struct device_attribute format_attr_##_name = __ATTR_RO(_name) | |
1399 | ||
00e16c3d TG |
1400 | /* Performance counter hotplug functions */ |
1401 | #ifdef CONFIG_PERF_EVENTS | |
1402 | int perf_event_init_cpu(unsigned int cpu); | |
1403 | int perf_event_exit_cpu(unsigned int cpu); | |
1404 | #else | |
1405 | #define perf_event_init_cpu NULL | |
1406 | #define perf_event_exit_cpu NULL | |
1407 | #endif | |
1408 | ||
cdd6c482 | 1409 | #endif /* _LINUX_PERF_EVENT_H */ |