Commit | Line | Data |
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0793a61d | 1 | /* |
57c0c15b | 2 | * Performance events: |
0793a61d | 3 | * |
a308444c | 4 | * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de> |
e7e7ee2e IM |
5 | * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar |
6 | * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra | |
0793a61d | 7 | * |
57c0c15b | 8 | * Data type definitions, declarations, prototypes. |
0793a61d | 9 | * |
a308444c | 10 | * Started by: Thomas Gleixner and Ingo Molnar |
0793a61d | 11 | * |
57c0c15b | 12 | * For licencing details see kernel-base/COPYING |
0793a61d | 13 | */ |
cdd6c482 IM |
14 | #ifndef _LINUX_PERF_EVENT_H |
15 | #define _LINUX_PERF_EVENT_H | |
0793a61d | 16 | |
f3dfd265 PM |
17 | #include <linux/types.h> |
18 | #include <linux/ioctl.h> | |
9aaa131a | 19 | #include <asm/byteorder.h> |
0793a61d TG |
20 | |
21 | /* | |
9f66a381 IM |
22 | * User-space ABI bits: |
23 | */ | |
24 | ||
25 | /* | |
0d48696f | 26 | * attr.type |
0793a61d | 27 | */ |
1c432d89 | 28 | enum perf_type_id { |
a308444c IM |
29 | PERF_TYPE_HARDWARE = 0, |
30 | PERF_TYPE_SOFTWARE = 1, | |
31 | PERF_TYPE_TRACEPOINT = 2, | |
32 | PERF_TYPE_HW_CACHE = 3, | |
33 | PERF_TYPE_RAW = 4, | |
24f1e32c | 34 | PERF_TYPE_BREAKPOINT = 5, |
b8e83514 | 35 | |
a308444c | 36 | PERF_TYPE_MAX, /* non-ABI */ |
b8e83514 | 37 | }; |
6c594c21 | 38 | |
b8e83514 | 39 | /* |
cdd6c482 IM |
40 | * Generalized performance event event_id types, used by the |
41 | * attr.event_id parameter of the sys_perf_event_open() | |
a308444c | 42 | * syscall: |
b8e83514 | 43 | */ |
1c432d89 | 44 | enum perf_hw_id { |
9f66a381 | 45 | /* |
b8e83514 | 46 | * Common hardware events, generalized by the kernel: |
9f66a381 | 47 | */ |
f4dbfa8f PZ |
48 | PERF_COUNT_HW_CPU_CYCLES = 0, |
49 | PERF_COUNT_HW_INSTRUCTIONS = 1, | |
50 | PERF_COUNT_HW_CACHE_REFERENCES = 2, | |
51 | PERF_COUNT_HW_CACHE_MISSES = 3, | |
52 | PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4, | |
53 | PERF_COUNT_HW_BRANCH_MISSES = 5, | |
54 | PERF_COUNT_HW_BUS_CYCLES = 6, | |
8f622422 IM |
55 | PERF_COUNT_HW_STALLED_CYCLES_FRONTEND = 7, |
56 | PERF_COUNT_HW_STALLED_CYCLES_BACKEND = 8, | |
c37e1749 | 57 | PERF_COUNT_HW_REF_CPU_CYCLES = 9, |
f4dbfa8f | 58 | |
a308444c | 59 | PERF_COUNT_HW_MAX, /* non-ABI */ |
b8e83514 | 60 | }; |
e077df4f | 61 | |
8326f44d | 62 | /* |
cdd6c482 | 63 | * Generalized hardware cache events: |
8326f44d | 64 | * |
89d6c0b5 | 65 | * { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x |
8326f44d IM |
66 | * { read, write, prefetch } x |
67 | * { accesses, misses } | |
68 | */ | |
1c432d89 | 69 | enum perf_hw_cache_id { |
a308444c IM |
70 | PERF_COUNT_HW_CACHE_L1D = 0, |
71 | PERF_COUNT_HW_CACHE_L1I = 1, | |
72 | PERF_COUNT_HW_CACHE_LL = 2, | |
73 | PERF_COUNT_HW_CACHE_DTLB = 3, | |
74 | PERF_COUNT_HW_CACHE_ITLB = 4, | |
75 | PERF_COUNT_HW_CACHE_BPU = 5, | |
89d6c0b5 | 76 | PERF_COUNT_HW_CACHE_NODE = 6, |
a308444c IM |
77 | |
78 | PERF_COUNT_HW_CACHE_MAX, /* non-ABI */ | |
8326f44d IM |
79 | }; |
80 | ||
1c432d89 | 81 | enum perf_hw_cache_op_id { |
a308444c IM |
82 | PERF_COUNT_HW_CACHE_OP_READ = 0, |
83 | PERF_COUNT_HW_CACHE_OP_WRITE = 1, | |
84 | PERF_COUNT_HW_CACHE_OP_PREFETCH = 2, | |
8326f44d | 85 | |
a308444c | 86 | PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */ |
8326f44d IM |
87 | }; |
88 | ||
1c432d89 PZ |
89 | enum perf_hw_cache_op_result_id { |
90 | PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0, | |
91 | PERF_COUNT_HW_CACHE_RESULT_MISS = 1, | |
8326f44d | 92 | |
a308444c | 93 | PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */ |
8326f44d IM |
94 | }; |
95 | ||
b8e83514 | 96 | /* |
cdd6c482 IM |
97 | * Special "software" events provided by the kernel, even if the hardware |
98 | * does not support performance events. These events measure various | |
b8e83514 PZ |
99 | * physical and sw events of the kernel (and allow the profiling of them as |
100 | * well): | |
101 | */ | |
1c432d89 | 102 | enum perf_sw_ids { |
a308444c IM |
103 | PERF_COUNT_SW_CPU_CLOCK = 0, |
104 | PERF_COUNT_SW_TASK_CLOCK = 1, | |
105 | PERF_COUNT_SW_PAGE_FAULTS = 2, | |
106 | PERF_COUNT_SW_CONTEXT_SWITCHES = 3, | |
107 | PERF_COUNT_SW_CPU_MIGRATIONS = 4, | |
108 | PERF_COUNT_SW_PAGE_FAULTS_MIN = 5, | |
109 | PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6, | |
f7d79860 AB |
110 | PERF_COUNT_SW_ALIGNMENT_FAULTS = 7, |
111 | PERF_COUNT_SW_EMULATION_FAULTS = 8, | |
a308444c IM |
112 | |
113 | PERF_COUNT_SW_MAX, /* non-ABI */ | |
0793a61d TG |
114 | }; |
115 | ||
8a057d84 | 116 | /* |
0d48696f | 117 | * Bits that can be set in attr.sample_type to request information |
8a057d84 PZ |
118 | * in the overflow packets. |
119 | */ | |
cdd6c482 | 120 | enum perf_event_sample_format { |
a308444c IM |
121 | PERF_SAMPLE_IP = 1U << 0, |
122 | PERF_SAMPLE_TID = 1U << 1, | |
123 | PERF_SAMPLE_TIME = 1U << 2, | |
124 | PERF_SAMPLE_ADDR = 1U << 3, | |
3dab77fb | 125 | PERF_SAMPLE_READ = 1U << 4, |
a308444c IM |
126 | PERF_SAMPLE_CALLCHAIN = 1U << 5, |
127 | PERF_SAMPLE_ID = 1U << 6, | |
128 | PERF_SAMPLE_CPU = 1U << 7, | |
129 | PERF_SAMPLE_PERIOD = 1U << 8, | |
7f453c24 | 130 | PERF_SAMPLE_STREAM_ID = 1U << 9, |
3a43ce68 | 131 | PERF_SAMPLE_RAW = 1U << 10, |
974802ea | 132 | |
f413cdb8 | 133 | PERF_SAMPLE_MAX = 1U << 11, /* non-ABI */ |
8a057d84 PZ |
134 | }; |
135 | ||
53cfbf59 | 136 | /* |
cdd6c482 | 137 | * The format of the data returned by read() on a perf event fd, |
3dab77fb PZ |
138 | * as specified by attr.read_format: |
139 | * | |
140 | * struct read_format { | |
57c0c15b | 141 | * { u64 value; |
d7ebe75b VW |
142 | * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED |
143 | * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING | |
57c0c15b IM |
144 | * { u64 id; } && PERF_FORMAT_ID |
145 | * } && !PERF_FORMAT_GROUP | |
3dab77fb | 146 | * |
57c0c15b | 147 | * { u64 nr; |
d7ebe75b VW |
148 | * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED |
149 | * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING | |
57c0c15b IM |
150 | * { u64 value; |
151 | * { u64 id; } && PERF_FORMAT_ID | |
152 | * } cntr[nr]; | |
153 | * } && PERF_FORMAT_GROUP | |
3dab77fb | 154 | * }; |
53cfbf59 | 155 | */ |
cdd6c482 | 156 | enum perf_event_read_format { |
a308444c IM |
157 | PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0, |
158 | PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1, | |
159 | PERF_FORMAT_ID = 1U << 2, | |
3dab77fb | 160 | PERF_FORMAT_GROUP = 1U << 3, |
974802ea | 161 | |
57c0c15b | 162 | PERF_FORMAT_MAX = 1U << 4, /* non-ABI */ |
53cfbf59 PM |
163 | }; |
164 | ||
974802ea PZ |
165 | #define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */ |
166 | ||
9f66a381 | 167 | /* |
cdd6c482 | 168 | * Hardware event_id to monitor via a performance monitoring event: |
9f66a381 | 169 | */ |
cdd6c482 | 170 | struct perf_event_attr { |
974802ea | 171 | |
f4a2deb4 | 172 | /* |
a21ca2ca IM |
173 | * Major type: hardware/software/tracepoint/etc. |
174 | */ | |
175 | __u32 type; | |
974802ea PZ |
176 | |
177 | /* | |
178 | * Size of the attr structure, for fwd/bwd compat. | |
179 | */ | |
180 | __u32 size; | |
a21ca2ca IM |
181 | |
182 | /* | |
183 | * Type specific configuration information. | |
f4a2deb4 PZ |
184 | */ |
185 | __u64 config; | |
9f66a381 | 186 | |
60db5e09 | 187 | union { |
b23f3325 PZ |
188 | __u64 sample_period; |
189 | __u64 sample_freq; | |
60db5e09 PZ |
190 | }; |
191 | ||
b23f3325 PZ |
192 | __u64 sample_type; |
193 | __u64 read_format; | |
9f66a381 | 194 | |
2743a5b0 | 195 | __u64 disabled : 1, /* off by default */ |
0475f9ea PM |
196 | inherit : 1, /* children inherit it */ |
197 | pinned : 1, /* must always be on PMU */ | |
198 | exclusive : 1, /* only group on PMU */ | |
199 | exclude_user : 1, /* don't count user */ | |
200 | exclude_kernel : 1, /* ditto kernel */ | |
201 | exclude_hv : 1, /* ditto hypervisor */ | |
2743a5b0 | 202 | exclude_idle : 1, /* don't count when idle */ |
0a4a9391 | 203 | mmap : 1, /* include mmap data */ |
8d1b2d93 | 204 | comm : 1, /* include comm data */ |
60db5e09 | 205 | freq : 1, /* use freq, not period */ |
bfbd3381 | 206 | inherit_stat : 1, /* per task counts */ |
57e7986e | 207 | enable_on_exec : 1, /* next exec enables */ |
9f498cc5 | 208 | task : 1, /* trace fork/exit */ |
2667de81 | 209 | watermark : 1, /* wakeup_watermark */ |
ab608344 PZ |
210 | /* |
211 | * precise_ip: | |
212 | * | |
213 | * 0 - SAMPLE_IP can have arbitrary skid | |
214 | * 1 - SAMPLE_IP must have constant skid | |
215 | * 2 - SAMPLE_IP requested to have 0 skid | |
216 | * 3 - SAMPLE_IP must have 0 skid | |
217 | * | |
218 | * See also PERF_RECORD_MISC_EXACT_IP | |
219 | */ | |
220 | precise_ip : 2, /* skid constraint */ | |
3af9e859 | 221 | mmap_data : 1, /* non-exec mmap data */ |
c980d109 | 222 | sample_id_all : 1, /* sample_type all events */ |
ab608344 | 223 | |
a240f761 JR |
224 | exclude_host : 1, /* don't count in host */ |
225 | exclude_guest : 1, /* don't count in guest */ | |
226 | ||
227 | __reserved_1 : 43; | |
2743a5b0 | 228 | |
2667de81 PZ |
229 | union { |
230 | __u32 wakeup_events; /* wakeup every n events */ | |
231 | __u32 wakeup_watermark; /* bytes before wakeup */ | |
232 | }; | |
24f1e32c | 233 | |
f13c12c6 | 234 | __u32 bp_type; |
a7e3ed1e AK |
235 | union { |
236 | __u64 bp_addr; | |
237 | __u64 config1; /* extension of config */ | |
238 | }; | |
239 | union { | |
240 | __u64 bp_len; | |
241 | __u64 config2; /* extension of config1 */ | |
242 | }; | |
eab656ae TG |
243 | }; |
244 | ||
d859e29f | 245 | /* |
cdd6c482 | 246 | * Ioctls that can be done on a perf event fd: |
d859e29f | 247 | */ |
cdd6c482 | 248 | #define PERF_EVENT_IOC_ENABLE _IO ('$', 0) |
57c0c15b IM |
249 | #define PERF_EVENT_IOC_DISABLE _IO ('$', 1) |
250 | #define PERF_EVENT_IOC_REFRESH _IO ('$', 2) | |
cdd6c482 | 251 | #define PERF_EVENT_IOC_RESET _IO ('$', 3) |
4c49b128 | 252 | #define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64) |
cdd6c482 | 253 | #define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5) |
6fb2915d | 254 | #define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *) |
cdd6c482 IM |
255 | |
256 | enum perf_event_ioc_flags { | |
3df5edad PZ |
257 | PERF_IOC_FLAG_GROUP = 1U << 0, |
258 | }; | |
d859e29f | 259 | |
37d81828 PM |
260 | /* |
261 | * Structure of the page that can be mapped via mmap | |
262 | */ | |
cdd6c482 | 263 | struct perf_event_mmap_page { |
37d81828 PM |
264 | __u32 version; /* version number of this structure */ |
265 | __u32 compat_version; /* lowest version this is compat with */ | |
38ff667b PZ |
266 | |
267 | /* | |
cdd6c482 | 268 | * Bits needed to read the hw events in user-space. |
38ff667b | 269 | * |
92f22a38 PZ |
270 | * u32 seq; |
271 | * s64 count; | |
38ff667b | 272 | * |
a2e87d06 PZ |
273 | * do { |
274 | * seq = pc->lock; | |
38ff667b | 275 | * |
a2e87d06 PZ |
276 | * barrier() |
277 | * if (pc->index) { | |
278 | * count = pmc_read(pc->index - 1); | |
279 | * count += pc->offset; | |
280 | * } else | |
281 | * goto regular_read; | |
38ff667b | 282 | * |
a2e87d06 PZ |
283 | * barrier(); |
284 | * } while (pc->lock != seq); | |
38ff667b | 285 | * |
92f22a38 PZ |
286 | * NOTE: for obvious reason this only works on self-monitoring |
287 | * processes. | |
38ff667b | 288 | */ |
37d81828 | 289 | __u32 lock; /* seqlock for synchronization */ |
cdd6c482 IM |
290 | __u32 index; /* hardware event identifier */ |
291 | __s64 offset; /* add to hardware event value */ | |
292 | __u64 time_enabled; /* time event active */ | |
293 | __u64 time_running; /* time event on cpu */ | |
7b732a75 | 294 | |
41f95331 PZ |
295 | /* |
296 | * Hole for extension of the self monitor capabilities | |
297 | */ | |
298 | ||
7f8b4e4e | 299 | __u64 __reserved[123]; /* align to 1k */ |
41f95331 | 300 | |
38ff667b PZ |
301 | /* |
302 | * Control data for the mmap() data buffer. | |
303 | * | |
43a21ea8 PZ |
304 | * User-space reading the @data_head value should issue an rmb(), on |
305 | * SMP capable platforms, after reading this value -- see | |
cdd6c482 | 306 | * perf_event_wakeup(). |
43a21ea8 PZ |
307 | * |
308 | * When the mapping is PROT_WRITE the @data_tail value should be | |
309 | * written by userspace to reflect the last read data. In this case | |
310 | * the kernel will not over-write unread data. | |
38ff667b | 311 | */ |
8e3747c1 | 312 | __u64 data_head; /* head in the data section */ |
43a21ea8 | 313 | __u64 data_tail; /* user-space written tail */ |
37d81828 PM |
314 | }; |
315 | ||
39447b38 | 316 | #define PERF_RECORD_MISC_CPUMODE_MASK (7 << 0) |
184f412c | 317 | #define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0) |
cdd6c482 IM |
318 | #define PERF_RECORD_MISC_KERNEL (1 << 0) |
319 | #define PERF_RECORD_MISC_USER (2 << 0) | |
320 | #define PERF_RECORD_MISC_HYPERVISOR (3 << 0) | |
39447b38 ZY |
321 | #define PERF_RECORD_MISC_GUEST_KERNEL (4 << 0) |
322 | #define PERF_RECORD_MISC_GUEST_USER (5 << 0) | |
6fab0192 | 323 | |
ab608344 PZ |
324 | /* |
325 | * Indicates that the content of PERF_SAMPLE_IP points to | |
326 | * the actual instruction that triggered the event. See also | |
327 | * perf_event_attr::precise_ip. | |
328 | */ | |
329 | #define PERF_RECORD_MISC_EXACT_IP (1 << 14) | |
ef21f683 PZ |
330 | /* |
331 | * Reserve the last bit to indicate some extended misc field | |
332 | */ | |
333 | #define PERF_RECORD_MISC_EXT_RESERVED (1 << 15) | |
334 | ||
5c148194 PZ |
335 | struct perf_event_header { |
336 | __u32 type; | |
6fab0192 PZ |
337 | __u16 misc; |
338 | __u16 size; | |
5c148194 PZ |
339 | }; |
340 | ||
341 | enum perf_event_type { | |
5ed00415 | 342 | |
0c593b34 | 343 | /* |
c980d109 ACM |
344 | * If perf_event_attr.sample_id_all is set then all event types will |
345 | * have the sample_type selected fields related to where/when | |
346 | * (identity) an event took place (TID, TIME, ID, CPU, STREAM_ID) | |
347 | * described in PERF_RECORD_SAMPLE below, it will be stashed just after | |
348 | * the perf_event_header and the fields already present for the existing | |
349 | * fields, i.e. at the end of the payload. That way a newer perf.data | |
350 | * file will be supported by older perf tools, with these new optional | |
351 | * fields being ignored. | |
352 | * | |
0c593b34 PZ |
353 | * The MMAP events record the PROT_EXEC mappings so that we can |
354 | * correlate userspace IPs to code. They have the following structure: | |
355 | * | |
356 | * struct { | |
0127c3ea | 357 | * struct perf_event_header header; |
0c593b34 | 358 | * |
0127c3ea IM |
359 | * u32 pid, tid; |
360 | * u64 addr; | |
361 | * u64 len; | |
362 | * u64 pgoff; | |
363 | * char filename[]; | |
0c593b34 PZ |
364 | * }; |
365 | */ | |
cdd6c482 | 366 | PERF_RECORD_MMAP = 1, |
0a4a9391 | 367 | |
43a21ea8 PZ |
368 | /* |
369 | * struct { | |
57c0c15b IM |
370 | * struct perf_event_header header; |
371 | * u64 id; | |
372 | * u64 lost; | |
43a21ea8 PZ |
373 | * }; |
374 | */ | |
cdd6c482 | 375 | PERF_RECORD_LOST = 2, |
43a21ea8 | 376 | |
8d1b2d93 PZ |
377 | /* |
378 | * struct { | |
0127c3ea | 379 | * struct perf_event_header header; |
8d1b2d93 | 380 | * |
0127c3ea IM |
381 | * u32 pid, tid; |
382 | * char comm[]; | |
8d1b2d93 PZ |
383 | * }; |
384 | */ | |
cdd6c482 | 385 | PERF_RECORD_COMM = 3, |
8d1b2d93 | 386 | |
9f498cc5 PZ |
387 | /* |
388 | * struct { | |
389 | * struct perf_event_header header; | |
390 | * u32 pid, ppid; | |
391 | * u32 tid, ptid; | |
393b2ad8 | 392 | * u64 time; |
9f498cc5 PZ |
393 | * }; |
394 | */ | |
cdd6c482 | 395 | PERF_RECORD_EXIT = 4, |
9f498cc5 | 396 | |
26b119bc PZ |
397 | /* |
398 | * struct { | |
0127c3ea IM |
399 | * struct perf_event_header header; |
400 | * u64 time; | |
689802b2 | 401 | * u64 id; |
7f453c24 | 402 | * u64 stream_id; |
a78ac325 PZ |
403 | * }; |
404 | */ | |
184f412c IM |
405 | PERF_RECORD_THROTTLE = 5, |
406 | PERF_RECORD_UNTHROTTLE = 6, | |
a78ac325 | 407 | |
60313ebe PZ |
408 | /* |
409 | * struct { | |
a21ca2ca IM |
410 | * struct perf_event_header header; |
411 | * u32 pid, ppid; | |
9f498cc5 | 412 | * u32 tid, ptid; |
a6f10a2f | 413 | * u64 time; |
60313ebe PZ |
414 | * }; |
415 | */ | |
cdd6c482 | 416 | PERF_RECORD_FORK = 7, |
60313ebe | 417 | |
38b200d6 PZ |
418 | /* |
419 | * struct { | |
184f412c IM |
420 | * struct perf_event_header header; |
421 | * u32 pid, tid; | |
3dab77fb | 422 | * |
184f412c | 423 | * struct read_format values; |
38b200d6 PZ |
424 | * }; |
425 | */ | |
cdd6c482 | 426 | PERF_RECORD_READ = 8, |
38b200d6 | 427 | |
8a057d84 | 428 | /* |
0c593b34 | 429 | * struct { |
0127c3ea | 430 | * struct perf_event_header header; |
0c593b34 | 431 | * |
43a21ea8 PZ |
432 | * { u64 ip; } && PERF_SAMPLE_IP |
433 | * { u32 pid, tid; } && PERF_SAMPLE_TID | |
434 | * { u64 time; } && PERF_SAMPLE_TIME | |
435 | * { u64 addr; } && PERF_SAMPLE_ADDR | |
e6e18ec7 | 436 | * { u64 id; } && PERF_SAMPLE_ID |
7f453c24 | 437 | * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID |
43a21ea8 | 438 | * { u32 cpu, res; } && PERF_SAMPLE_CPU |
57c0c15b | 439 | * { u64 period; } && PERF_SAMPLE_PERIOD |
0c593b34 | 440 | * |
3dab77fb | 441 | * { struct read_format values; } && PERF_SAMPLE_READ |
0c593b34 | 442 | * |
f9188e02 | 443 | * { u64 nr, |
43a21ea8 | 444 | * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN |
3dab77fb | 445 | * |
57c0c15b IM |
446 | * # |
447 | * # The RAW record below is opaque data wrt the ABI | |
448 | * # | |
449 | * # That is, the ABI doesn't make any promises wrt to | |
450 | * # the stability of its content, it may vary depending | |
451 | * # on event, hardware, kernel version and phase of | |
452 | * # the moon. | |
453 | * # | |
454 | * # In other words, PERF_SAMPLE_RAW contents are not an ABI. | |
455 | * # | |
3dab77fb | 456 | * |
a044560c PZ |
457 | * { u32 size; |
458 | * char data[size];}&& PERF_SAMPLE_RAW | |
0c593b34 | 459 | * }; |
8a057d84 | 460 | */ |
184f412c | 461 | PERF_RECORD_SAMPLE = 9, |
e6e18ec7 | 462 | |
cdd6c482 | 463 | PERF_RECORD_MAX, /* non-ABI */ |
5c148194 PZ |
464 | }; |
465 | ||
f9188e02 PZ |
466 | enum perf_callchain_context { |
467 | PERF_CONTEXT_HV = (__u64)-32, | |
468 | PERF_CONTEXT_KERNEL = (__u64)-128, | |
469 | PERF_CONTEXT_USER = (__u64)-512, | |
7522060c | 470 | |
f9188e02 PZ |
471 | PERF_CONTEXT_GUEST = (__u64)-2048, |
472 | PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176, | |
473 | PERF_CONTEXT_GUEST_USER = (__u64)-2560, | |
474 | ||
475 | PERF_CONTEXT_MAX = (__u64)-4095, | |
7522060c IM |
476 | }; |
477 | ||
e7e7ee2e IM |
478 | #define PERF_FLAG_FD_NO_GROUP (1U << 0) |
479 | #define PERF_FLAG_FD_OUTPUT (1U << 1) | |
480 | #define PERF_FLAG_PID_CGROUP (1U << 2) /* pid=cgroup id, per-cpu mode only */ | |
a4be7c27 | 481 | |
f3dfd265 | 482 | #ifdef __KERNEL__ |
9f66a381 | 483 | /* |
f3dfd265 | 484 | * Kernel-internal data types and definitions: |
9f66a381 IM |
485 | */ |
486 | ||
cdd6c482 | 487 | #ifdef CONFIG_PERF_EVENTS |
e5d1367f | 488 | # include <linux/cgroup.h> |
cdd6c482 | 489 | # include <asm/perf_event.h> |
7be79236 | 490 | # include <asm/local64.h> |
f3dfd265 PM |
491 | #endif |
492 | ||
39447b38 | 493 | struct perf_guest_info_callbacks { |
e7e7ee2e IM |
494 | int (*is_in_guest)(void); |
495 | int (*is_user_mode)(void); | |
496 | unsigned long (*get_guest_ip)(void); | |
39447b38 ZY |
497 | }; |
498 | ||
2ff6cfd7 AB |
499 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
500 | #include <asm/hw_breakpoint.h> | |
501 | #endif | |
502 | ||
f3dfd265 PM |
503 | #include <linux/list.h> |
504 | #include <linux/mutex.h> | |
505 | #include <linux/rculist.h> | |
506 | #include <linux/rcupdate.h> | |
507 | #include <linux/spinlock.h> | |
d6d020e9 | 508 | #include <linux/hrtimer.h> |
3c446b3d | 509 | #include <linux/fs.h> |
709e50cf | 510 | #include <linux/pid_namespace.h> |
906010b2 | 511 | #include <linux/workqueue.h> |
5331d7b8 | 512 | #include <linux/ftrace.h> |
85cfabbc | 513 | #include <linux/cpu.h> |
e360adbe | 514 | #include <linux/irq_work.h> |
d430d3d7 | 515 | #include <linux/jump_label.h> |
60063497 | 516 | #include <linux/atomic.h> |
fa588151 | 517 | #include <asm/local.h> |
f3dfd265 | 518 | |
f9188e02 PZ |
519 | #define PERF_MAX_STACK_DEPTH 255 |
520 | ||
521 | struct perf_callchain_entry { | |
522 | __u64 nr; | |
523 | __u64 ip[PERF_MAX_STACK_DEPTH]; | |
524 | }; | |
525 | ||
3a43ce68 FW |
526 | struct perf_raw_record { |
527 | u32 size; | |
528 | void *data; | |
f413cdb8 FW |
529 | }; |
530 | ||
caff2bef PZ |
531 | struct perf_branch_entry { |
532 | __u64 from; | |
533 | __u64 to; | |
534 | __u64 flags; | |
535 | }; | |
536 | ||
537 | struct perf_branch_stack { | |
538 | __u64 nr; | |
539 | struct perf_branch_entry entries[0]; | |
540 | }; | |
541 | ||
f3dfd265 PM |
542 | struct task_struct; |
543 | ||
efc9f05d SE |
544 | /* |
545 | * extra PMU register associated with an event | |
546 | */ | |
547 | struct hw_perf_event_extra { | |
548 | u64 config; /* register value */ | |
549 | unsigned int reg; /* register address or index */ | |
550 | int alloc; /* extra register already allocated */ | |
551 | int idx; /* index in shared_regs->regs[] */ | |
552 | }; | |
553 | ||
0793a61d | 554 | /** |
cdd6c482 | 555 | * struct hw_perf_event - performance event hardware details: |
0793a61d | 556 | */ |
cdd6c482 IM |
557 | struct hw_perf_event { |
558 | #ifdef CONFIG_PERF_EVENTS | |
d6d020e9 PZ |
559 | union { |
560 | struct { /* hardware */ | |
a308444c | 561 | u64 config; |
447a194b | 562 | u64 last_tag; |
a308444c | 563 | unsigned long config_base; |
cdd6c482 | 564 | unsigned long event_base; |
a308444c | 565 | int idx; |
447a194b | 566 | int last_cpu; |
efc9f05d | 567 | struct hw_perf_event_extra extra_reg; |
d6d020e9 | 568 | }; |
721a669b | 569 | struct { /* software */ |
a308444c | 570 | struct hrtimer hrtimer; |
d6d020e9 | 571 | }; |
24f1e32c | 572 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
45a73372 FW |
573 | struct { /* breakpoint */ |
574 | struct arch_hw_breakpoint info; | |
575 | struct list_head bp_list; | |
d580ff86 PZ |
576 | /* |
577 | * Crufty hack to avoid the chicken and egg | |
578 | * problem hw_breakpoint has with context | |
579 | * creation and event initalization. | |
580 | */ | |
581 | struct task_struct *bp_target; | |
45a73372 | 582 | }; |
24f1e32c | 583 | #endif |
d6d020e9 | 584 | }; |
a4eaf7f1 | 585 | int state; |
e7850595 | 586 | local64_t prev_count; |
b23f3325 | 587 | u64 sample_period; |
9e350de3 | 588 | u64 last_period; |
e7850595 | 589 | local64_t period_left; |
60db5e09 | 590 | u64 interrupts; |
6a24ed6c | 591 | |
abd50713 PZ |
592 | u64 freq_time_stamp; |
593 | u64 freq_count_stamp; | |
ee06094f | 594 | #endif |
0793a61d TG |
595 | }; |
596 | ||
a4eaf7f1 PZ |
597 | /* |
598 | * hw_perf_event::state flags | |
599 | */ | |
600 | #define PERF_HES_STOPPED 0x01 /* the counter is stopped */ | |
601 | #define PERF_HES_UPTODATE 0x02 /* event->count up-to-date */ | |
602 | #define PERF_HES_ARCH 0x04 | |
603 | ||
cdd6c482 | 604 | struct perf_event; |
621a01ea | 605 | |
8d2cacbb PZ |
606 | /* |
607 | * Common implementation detail of pmu::{start,commit,cancel}_txn | |
608 | */ | |
609 | #define PERF_EVENT_TXN 0x1 | |
6bde9b6c | 610 | |
621a01ea | 611 | /** |
4aeb0b42 | 612 | * struct pmu - generic performance monitoring unit |
621a01ea | 613 | */ |
4aeb0b42 | 614 | struct pmu { |
b0a873eb PZ |
615 | struct list_head entry; |
616 | ||
abe43400 | 617 | struct device *dev; |
2e80a82a PZ |
618 | char *name; |
619 | int type; | |
620 | ||
108b02cf PZ |
621 | int * __percpu pmu_disable_count; |
622 | struct perf_cpu_context * __percpu pmu_cpu_context; | |
8dc85d54 | 623 | int task_ctx_nr; |
6bde9b6c LM |
624 | |
625 | /* | |
a4eaf7f1 PZ |
626 | * Fully disable/enable this PMU, can be used to protect from the PMI |
627 | * as well as for lazy/batch writing of the MSRs. | |
6bde9b6c | 628 | */ |
ad5133b7 PZ |
629 | void (*pmu_enable) (struct pmu *pmu); /* optional */ |
630 | void (*pmu_disable) (struct pmu *pmu); /* optional */ | |
6bde9b6c | 631 | |
8d2cacbb | 632 | /* |
a4eaf7f1 | 633 | * Try and initialize the event for this PMU. |
24cd7f54 | 634 | * Should return -ENOENT when the @event doesn't match this PMU. |
8d2cacbb | 635 | */ |
b0a873eb PZ |
636 | int (*event_init) (struct perf_event *event); |
637 | ||
a4eaf7f1 PZ |
638 | #define PERF_EF_START 0x01 /* start the counter when adding */ |
639 | #define PERF_EF_RELOAD 0x02 /* reload the counter when starting */ | |
640 | #define PERF_EF_UPDATE 0x04 /* update the counter when stopping */ | |
641 | ||
8d2cacbb | 642 | /* |
a4eaf7f1 PZ |
643 | * Adds/Removes a counter to/from the PMU, can be done inside |
644 | * a transaction, see the ->*_txn() methods. | |
645 | */ | |
646 | int (*add) (struct perf_event *event, int flags); | |
647 | void (*del) (struct perf_event *event, int flags); | |
648 | ||
649 | /* | |
650 | * Starts/Stops a counter present on the PMU. The PMI handler | |
651 | * should stop the counter when perf_event_overflow() returns | |
652 | * !0. ->start() will be used to continue. | |
653 | */ | |
654 | void (*start) (struct perf_event *event, int flags); | |
655 | void (*stop) (struct perf_event *event, int flags); | |
656 | ||
657 | /* | |
658 | * Updates the counter value of the event. | |
659 | */ | |
cdd6c482 | 660 | void (*read) (struct perf_event *event); |
6bde9b6c LM |
661 | |
662 | /* | |
24cd7f54 PZ |
663 | * Group events scheduling is treated as a transaction, add |
664 | * group events as a whole and perform one schedulability test. | |
665 | * If the test fails, roll back the whole group | |
a4eaf7f1 PZ |
666 | * |
667 | * Start the transaction, after this ->add() doesn't need to | |
24cd7f54 | 668 | * do schedulability tests. |
8d2cacbb | 669 | */ |
e7e7ee2e | 670 | void (*start_txn) (struct pmu *pmu); /* optional */ |
8d2cacbb | 671 | /* |
a4eaf7f1 | 672 | * If ->start_txn() disabled the ->add() schedulability test |
8d2cacbb PZ |
673 | * then ->commit_txn() is required to perform one. On success |
674 | * the transaction is closed. On error the transaction is kept | |
675 | * open until ->cancel_txn() is called. | |
676 | */ | |
e7e7ee2e | 677 | int (*commit_txn) (struct pmu *pmu); /* optional */ |
8d2cacbb | 678 | /* |
a4eaf7f1 | 679 | * Will cancel the transaction, assumes ->del() is called |
25985edc | 680 | * for each successful ->add() during the transaction. |
8d2cacbb | 681 | */ |
e7e7ee2e | 682 | void (*cancel_txn) (struct pmu *pmu); /* optional */ |
621a01ea IM |
683 | }; |
684 | ||
6a930700 | 685 | /** |
cdd6c482 | 686 | * enum perf_event_active_state - the states of a event |
6a930700 | 687 | */ |
cdd6c482 | 688 | enum perf_event_active_state { |
57c0c15b | 689 | PERF_EVENT_STATE_ERROR = -2, |
cdd6c482 IM |
690 | PERF_EVENT_STATE_OFF = -1, |
691 | PERF_EVENT_STATE_INACTIVE = 0, | |
57c0c15b | 692 | PERF_EVENT_STATE_ACTIVE = 1, |
6a930700 IM |
693 | }; |
694 | ||
9b51f66d | 695 | struct file; |
453f19ee PZ |
696 | struct perf_sample_data; |
697 | ||
a8b0ca17 | 698 | typedef void (*perf_overflow_handler_t)(struct perf_event *, |
b326e956 FW |
699 | struct perf_sample_data *, |
700 | struct pt_regs *regs); | |
701 | ||
d6f962b5 | 702 | enum perf_group_flag { |
e7e7ee2e | 703 | PERF_GROUP_SOFTWARE = 0x1, |
d6f962b5 FW |
704 | }; |
705 | ||
e7e7ee2e IM |
706 | #define SWEVENT_HLIST_BITS 8 |
707 | #define SWEVENT_HLIST_SIZE (1 << SWEVENT_HLIST_BITS) | |
76e1d904 FW |
708 | |
709 | struct swevent_hlist { | |
e7e7ee2e IM |
710 | struct hlist_head heads[SWEVENT_HLIST_SIZE]; |
711 | struct rcu_head rcu_head; | |
76e1d904 FW |
712 | }; |
713 | ||
8a49542c PZ |
714 | #define PERF_ATTACH_CONTEXT 0x01 |
715 | #define PERF_ATTACH_GROUP 0x02 | |
d580ff86 | 716 | #define PERF_ATTACH_TASK 0x04 |
8a49542c | 717 | |
e5d1367f SE |
718 | #ifdef CONFIG_CGROUP_PERF |
719 | /* | |
720 | * perf_cgroup_info keeps track of time_enabled for a cgroup. | |
721 | * This is a per-cpu dynamically allocated data structure. | |
722 | */ | |
723 | struct perf_cgroup_info { | |
e7e7ee2e IM |
724 | u64 time; |
725 | u64 timestamp; | |
e5d1367f SE |
726 | }; |
727 | ||
728 | struct perf_cgroup { | |
e7e7ee2e IM |
729 | struct cgroup_subsys_state css; |
730 | struct perf_cgroup_info *info; /* timing info, one per cpu */ | |
e5d1367f SE |
731 | }; |
732 | #endif | |
733 | ||
76369139 FW |
734 | struct ring_buffer; |
735 | ||
0793a61d | 736 | /** |
cdd6c482 | 737 | * struct perf_event - performance event kernel representation: |
0793a61d | 738 | */ |
cdd6c482 IM |
739 | struct perf_event { |
740 | #ifdef CONFIG_PERF_EVENTS | |
65abc865 | 741 | struct list_head group_entry; |
592903cd | 742 | struct list_head event_entry; |
04289bb9 | 743 | struct list_head sibling_list; |
76e1d904 | 744 | struct hlist_node hlist_entry; |
0127c3ea | 745 | int nr_siblings; |
d6f962b5 | 746 | int group_flags; |
cdd6c482 | 747 | struct perf_event *group_leader; |
a4eaf7f1 | 748 | struct pmu *pmu; |
04289bb9 | 749 | |
cdd6c482 | 750 | enum perf_event_active_state state; |
8a49542c | 751 | unsigned int attach_state; |
e7850595 | 752 | local64_t count; |
a6e6dea6 | 753 | atomic64_t child_count; |
ee06094f | 754 | |
53cfbf59 | 755 | /* |
cdd6c482 | 756 | * These are the total time in nanoseconds that the event |
53cfbf59 | 757 | * has been enabled (i.e. eligible to run, and the task has |
cdd6c482 | 758 | * been scheduled in, if this is a per-task event) |
53cfbf59 PM |
759 | * and running (scheduled onto the CPU), respectively. |
760 | * | |
761 | * They are computed from tstamp_enabled, tstamp_running and | |
cdd6c482 | 762 | * tstamp_stopped when the event is in INACTIVE or ACTIVE state. |
53cfbf59 PM |
763 | */ |
764 | u64 total_time_enabled; | |
765 | u64 total_time_running; | |
766 | ||
767 | /* | |
768 | * These are timestamps used for computing total_time_enabled | |
cdd6c482 | 769 | * and total_time_running when the event is in INACTIVE or |
53cfbf59 PM |
770 | * ACTIVE state, measured in nanoseconds from an arbitrary point |
771 | * in time. | |
cdd6c482 IM |
772 | * tstamp_enabled: the notional time when the event was enabled |
773 | * tstamp_running: the notional time when the event was scheduled on | |
53cfbf59 | 774 | * tstamp_stopped: in INACTIVE state, the notional time when the |
cdd6c482 | 775 | * event was scheduled off. |
53cfbf59 PM |
776 | */ |
777 | u64 tstamp_enabled; | |
778 | u64 tstamp_running; | |
779 | u64 tstamp_stopped; | |
780 | ||
eed01528 SE |
781 | /* |
782 | * timestamp shadows the actual context timing but it can | |
783 | * be safely used in NMI interrupt context. It reflects the | |
784 | * context time as it was when the event was last scheduled in. | |
785 | * | |
786 | * ctx_time already accounts for ctx->timestamp. Therefore to | |
787 | * compute ctx_time for a sample, simply add perf_clock(). | |
788 | */ | |
789 | u64 shadow_ctx_time; | |
790 | ||
24f1e32c | 791 | struct perf_event_attr attr; |
c320c7b7 | 792 | u16 header_size; |
6844c09d | 793 | u16 id_header_size; |
c320c7b7 | 794 | u16 read_size; |
cdd6c482 | 795 | struct hw_perf_event hw; |
0793a61d | 796 | |
cdd6c482 | 797 | struct perf_event_context *ctx; |
9b51f66d | 798 | struct file *filp; |
0793a61d | 799 | |
53cfbf59 PM |
800 | /* |
801 | * These accumulate total time (in nanoseconds) that children | |
cdd6c482 | 802 | * events have been enabled and running, respectively. |
53cfbf59 PM |
803 | */ |
804 | atomic64_t child_total_time_enabled; | |
805 | atomic64_t child_total_time_running; | |
806 | ||
0793a61d | 807 | /* |
d859e29f | 808 | * Protect attach/detach and child_list: |
0793a61d | 809 | */ |
fccc714b PZ |
810 | struct mutex child_mutex; |
811 | struct list_head child_list; | |
cdd6c482 | 812 | struct perf_event *parent; |
0793a61d TG |
813 | |
814 | int oncpu; | |
815 | int cpu; | |
816 | ||
082ff5a2 PZ |
817 | struct list_head owner_entry; |
818 | struct task_struct *owner; | |
819 | ||
7b732a75 PZ |
820 | /* mmap bits */ |
821 | struct mutex mmap_mutex; | |
822 | atomic_t mmap_count; | |
ac9721f3 PZ |
823 | int mmap_locked; |
824 | struct user_struct *mmap_user; | |
76369139 | 825 | struct ring_buffer *rb; |
10c6db11 | 826 | struct list_head rb_entry; |
37d81828 | 827 | |
7b732a75 | 828 | /* poll related */ |
0793a61d | 829 | wait_queue_head_t waitq; |
3c446b3d | 830 | struct fasync_struct *fasync; |
79f14641 PZ |
831 | |
832 | /* delayed work for NMIs and such */ | |
833 | int pending_wakeup; | |
4c9e2542 | 834 | int pending_kill; |
79f14641 | 835 | int pending_disable; |
e360adbe | 836 | struct irq_work pending; |
592903cd | 837 | |
79f14641 PZ |
838 | atomic_t event_limit; |
839 | ||
cdd6c482 | 840 | void (*destroy)(struct perf_event *); |
592903cd | 841 | struct rcu_head rcu_head; |
709e50cf PZ |
842 | |
843 | struct pid_namespace *ns; | |
8e5799b1 | 844 | u64 id; |
6fb2915d | 845 | |
b326e956 | 846 | perf_overflow_handler_t overflow_handler; |
4dc0da86 | 847 | void *overflow_handler_context; |
453f19ee | 848 | |
07b139c8 | 849 | #ifdef CONFIG_EVENT_TRACING |
1c024eca | 850 | struct ftrace_event_call *tp_event; |
6fb2915d | 851 | struct event_filter *filter; |
ee06094f | 852 | #endif |
6fb2915d | 853 | |
e5d1367f SE |
854 | #ifdef CONFIG_CGROUP_PERF |
855 | struct perf_cgroup *cgrp; /* cgroup event is attach to */ | |
856 | int cgrp_defer_enabled; | |
857 | #endif | |
858 | ||
6fb2915d | 859 | #endif /* CONFIG_PERF_EVENTS */ |
0793a61d TG |
860 | }; |
861 | ||
b04243ef PZ |
862 | enum perf_event_context_type { |
863 | task_context, | |
864 | cpu_context, | |
865 | }; | |
866 | ||
0793a61d | 867 | /** |
cdd6c482 | 868 | * struct perf_event_context - event context structure |
0793a61d | 869 | * |
cdd6c482 | 870 | * Used as a container for task events and CPU events as well: |
0793a61d | 871 | */ |
cdd6c482 | 872 | struct perf_event_context { |
108b02cf | 873 | struct pmu *pmu; |
ee643c41 | 874 | enum perf_event_context_type type; |
0793a61d | 875 | /* |
cdd6c482 | 876 | * Protect the states of the events in the list, |
d859e29f | 877 | * nr_active, and the list: |
0793a61d | 878 | */ |
e625cce1 | 879 | raw_spinlock_t lock; |
d859e29f | 880 | /* |
cdd6c482 | 881 | * Protect the list of events. Locking either mutex or lock |
d859e29f PM |
882 | * is sufficient to ensure the list doesn't change; to change |
883 | * the list you need to lock both the mutex and the spinlock. | |
884 | */ | |
a308444c | 885 | struct mutex mutex; |
04289bb9 | 886 | |
889ff015 FW |
887 | struct list_head pinned_groups; |
888 | struct list_head flexible_groups; | |
a308444c | 889 | struct list_head event_list; |
cdd6c482 | 890 | int nr_events; |
a308444c IM |
891 | int nr_active; |
892 | int is_active; | |
bfbd3381 | 893 | int nr_stat; |
0f5a2601 | 894 | int nr_freq; |
dddd3379 | 895 | int rotate_disable; |
a308444c IM |
896 | atomic_t refcount; |
897 | struct task_struct *task; | |
53cfbf59 PM |
898 | |
899 | /* | |
4af4998b | 900 | * Context clock, runs when context enabled. |
53cfbf59 | 901 | */ |
a308444c IM |
902 | u64 time; |
903 | u64 timestamp; | |
564c2b21 PM |
904 | |
905 | /* | |
906 | * These fields let us detect when two contexts have both | |
907 | * been cloned (inherited) from a common ancestor. | |
908 | */ | |
cdd6c482 | 909 | struct perf_event_context *parent_ctx; |
a308444c IM |
910 | u64 parent_gen; |
911 | u64 generation; | |
912 | int pin_count; | |
e5d1367f | 913 | int nr_cgroups; /* cgroup events present */ |
28009ce4 | 914 | struct rcu_head rcu_head; |
0793a61d TG |
915 | }; |
916 | ||
7ae07ea3 FW |
917 | /* |
918 | * Number of contexts where an event can trigger: | |
e7e7ee2e | 919 | * task, softirq, hardirq, nmi. |
7ae07ea3 FW |
920 | */ |
921 | #define PERF_NR_CONTEXTS 4 | |
922 | ||
0793a61d | 923 | /** |
cdd6c482 | 924 | * struct perf_event_cpu_context - per cpu event context structure |
0793a61d TG |
925 | */ |
926 | struct perf_cpu_context { | |
cdd6c482 IM |
927 | struct perf_event_context ctx; |
928 | struct perf_event_context *task_ctx; | |
0793a61d | 929 | int active_oncpu; |
3b6f9e5c | 930 | int exclusive; |
e9d2b064 PZ |
931 | struct list_head rotation_list; |
932 | int jiffies_interval; | |
51676957 | 933 | struct pmu *active_pmu; |
e5d1367f | 934 | struct perf_cgroup *cgrp; |
0793a61d TG |
935 | }; |
936 | ||
5622f295 | 937 | struct perf_output_handle { |
57c0c15b | 938 | struct perf_event *event; |
76369139 | 939 | struct ring_buffer *rb; |
6d1acfd5 | 940 | unsigned long wakeup; |
5d967a8b PZ |
941 | unsigned long size; |
942 | void *addr; | |
943 | int page; | |
5622f295 MM |
944 | }; |
945 | ||
cdd6c482 | 946 | #ifdef CONFIG_PERF_EVENTS |
829b42dd | 947 | |
2e80a82a | 948 | extern int perf_pmu_register(struct pmu *pmu, char *name, int type); |
b0a873eb | 949 | extern void perf_pmu_unregister(struct pmu *pmu); |
621a01ea | 950 | |
3bf101ba | 951 | extern int perf_num_counters(void); |
84c79910 | 952 | extern const char *perf_pmu_name(void); |
a8d757ef SE |
953 | extern void __perf_event_task_sched_in(struct task_struct *prev, |
954 | struct task_struct *task); | |
955 | extern void __perf_event_task_sched_out(struct task_struct *prev, | |
956 | struct task_struct *next); | |
cdd6c482 IM |
957 | extern int perf_event_init_task(struct task_struct *child); |
958 | extern void perf_event_exit_task(struct task_struct *child); | |
959 | extern void perf_event_free_task(struct task_struct *task); | |
4e231c79 | 960 | extern void perf_event_delayed_put(struct task_struct *task); |
cdd6c482 | 961 | extern void perf_event_print_debug(void); |
33696fc0 PZ |
962 | extern void perf_pmu_disable(struct pmu *pmu); |
963 | extern void perf_pmu_enable(struct pmu *pmu); | |
cdd6c482 IM |
964 | extern int perf_event_task_disable(void); |
965 | extern int perf_event_task_enable(void); | |
26ca5c11 | 966 | extern int perf_event_refresh(struct perf_event *event, int refresh); |
cdd6c482 | 967 | extern void perf_event_update_userpage(struct perf_event *event); |
fb0459d7 AV |
968 | extern int perf_event_release_kernel(struct perf_event *event); |
969 | extern struct perf_event * | |
970 | perf_event_create_kernel_counter(struct perf_event_attr *attr, | |
971 | int cpu, | |
38a81da2 | 972 | struct task_struct *task, |
4dc0da86 AK |
973 | perf_overflow_handler_t callback, |
974 | void *context); | |
59ed446f PZ |
975 | extern u64 perf_event_read_value(struct perf_event *event, |
976 | u64 *enabled, u64 *running); | |
5c92d124 | 977 | |
df1a132b | 978 | struct perf_sample_data { |
5622f295 MM |
979 | u64 type; |
980 | ||
981 | u64 ip; | |
982 | struct { | |
983 | u32 pid; | |
984 | u32 tid; | |
985 | } tid_entry; | |
986 | u64 time; | |
a308444c | 987 | u64 addr; |
5622f295 MM |
988 | u64 id; |
989 | u64 stream_id; | |
990 | struct { | |
991 | u32 cpu; | |
992 | u32 reserved; | |
993 | } cpu_entry; | |
a308444c | 994 | u64 period; |
5622f295 | 995 | struct perf_callchain_entry *callchain; |
3a43ce68 | 996 | struct perf_raw_record *raw; |
df1a132b PZ |
997 | }; |
998 | ||
e7e7ee2e | 999 | static inline void perf_sample_data_init(struct perf_sample_data *data, u64 addr) |
dc1d628a PZ |
1000 | { |
1001 | data->addr = addr; | |
1002 | data->raw = NULL; | |
1003 | } | |
1004 | ||
5622f295 MM |
1005 | extern void perf_output_sample(struct perf_output_handle *handle, |
1006 | struct perf_event_header *header, | |
1007 | struct perf_sample_data *data, | |
cdd6c482 | 1008 | struct perf_event *event); |
5622f295 MM |
1009 | extern void perf_prepare_sample(struct perf_event_header *header, |
1010 | struct perf_sample_data *data, | |
cdd6c482 | 1011 | struct perf_event *event, |
5622f295 MM |
1012 | struct pt_regs *regs); |
1013 | ||
a8b0ca17 | 1014 | extern int perf_event_overflow(struct perf_event *event, |
5622f295 MM |
1015 | struct perf_sample_data *data, |
1016 | struct pt_regs *regs); | |
df1a132b | 1017 | |
6c7e550f FBH |
1018 | static inline bool is_sampling_event(struct perf_event *event) |
1019 | { | |
1020 | return event->attr.sample_period != 0; | |
1021 | } | |
1022 | ||
3b6f9e5c | 1023 | /* |
cdd6c482 | 1024 | * Return 1 for a software event, 0 for a hardware event |
3b6f9e5c | 1025 | */ |
cdd6c482 | 1026 | static inline int is_software_event(struct perf_event *event) |
3b6f9e5c | 1027 | { |
89a1e187 | 1028 | return event->pmu->task_ctx_nr == perf_sw_context; |
3b6f9e5c PM |
1029 | } |
1030 | ||
d430d3d7 | 1031 | extern struct jump_label_key perf_swevent_enabled[PERF_COUNT_SW_MAX]; |
f29ac756 | 1032 | |
a8b0ca17 | 1033 | extern void __perf_sw_event(u32, u64, struct pt_regs *, u64); |
f29ac756 | 1034 | |
b0f82b81 | 1035 | #ifndef perf_arch_fetch_caller_regs |
e7e7ee2e | 1036 | static inline void perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip) { } |
b0f82b81 | 1037 | #endif |
5331d7b8 FW |
1038 | |
1039 | /* | |
1040 | * Take a snapshot of the regs. Skip ip and frame pointer to | |
1041 | * the nth caller. We only need a few of the regs: | |
1042 | * - ip for PERF_SAMPLE_IP | |
1043 | * - cs for user_mode() tests | |
1044 | * - bp for callchains | |
1045 | * - eflags, for future purposes, just in case | |
1046 | */ | |
b0f82b81 | 1047 | static inline void perf_fetch_caller_regs(struct pt_regs *regs) |
5331d7b8 | 1048 | { |
5331d7b8 FW |
1049 | memset(regs, 0, sizeof(*regs)); |
1050 | ||
b0f82b81 | 1051 | perf_arch_fetch_caller_regs(regs, CALLER_ADDR0); |
5331d7b8 FW |
1052 | } |
1053 | ||
7e54a5a0 | 1054 | static __always_inline void |
a8b0ca17 | 1055 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) |
e49a5bd3 | 1056 | { |
7e54a5a0 PZ |
1057 | struct pt_regs hot_regs; |
1058 | ||
d430d3d7 JB |
1059 | if (static_branch(&perf_swevent_enabled[event_id])) { |
1060 | if (!regs) { | |
1061 | perf_fetch_caller_regs(&hot_regs); | |
1062 | regs = &hot_regs; | |
1063 | } | |
a8b0ca17 | 1064 | __perf_sw_event(event_id, nr, regs, addr); |
e49a5bd3 FW |
1065 | } |
1066 | } | |
1067 | ||
b2029520 | 1068 | extern struct jump_label_key_deferred perf_sched_events; |
ee6dcfa4 | 1069 | |
a8d757ef SE |
1070 | static inline void perf_event_task_sched_in(struct task_struct *prev, |
1071 | struct task_struct *task) | |
ee6dcfa4 | 1072 | { |
b2029520 | 1073 | if (static_branch(&perf_sched_events.key)) |
a8d757ef | 1074 | __perf_event_task_sched_in(prev, task); |
ee6dcfa4 PZ |
1075 | } |
1076 | ||
a8d757ef SE |
1077 | static inline void perf_event_task_sched_out(struct task_struct *prev, |
1078 | struct task_struct *next) | |
ee6dcfa4 | 1079 | { |
a8b0ca17 | 1080 | perf_sw_event(PERF_COUNT_SW_CONTEXT_SWITCHES, 1, NULL, 0); |
ee6dcfa4 | 1081 | |
b2029520 | 1082 | if (static_branch(&perf_sched_events.key)) |
a8d757ef | 1083 | __perf_event_task_sched_out(prev, next); |
ee6dcfa4 PZ |
1084 | } |
1085 | ||
3af9e859 | 1086 | extern void perf_event_mmap(struct vm_area_struct *vma); |
39447b38 | 1087 | extern struct perf_guest_info_callbacks *perf_guest_cbs; |
dcf46b94 ZY |
1088 | extern int perf_register_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); |
1089 | extern int perf_unregister_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); | |
39447b38 | 1090 | |
cdd6c482 IM |
1091 | extern void perf_event_comm(struct task_struct *tsk); |
1092 | extern void perf_event_fork(struct task_struct *tsk); | |
8d1b2d93 | 1093 | |
56962b44 FW |
1094 | /* Callchains */ |
1095 | DECLARE_PER_CPU(struct perf_callchain_entry, perf_callchain_entry); | |
1096 | ||
e7e7ee2e IM |
1097 | extern void perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs); |
1098 | extern void perf_callchain_kernel(struct perf_callchain_entry *entry, struct pt_regs *regs); | |
394ee076 | 1099 | |
e7e7ee2e | 1100 | static inline void perf_callchain_store(struct perf_callchain_entry *entry, u64 ip) |
70791ce9 FW |
1101 | { |
1102 | if (entry->nr < PERF_MAX_STACK_DEPTH) | |
1103 | entry->ip[entry->nr++] = ip; | |
1104 | } | |
394ee076 | 1105 | |
cdd6c482 IM |
1106 | extern int sysctl_perf_event_paranoid; |
1107 | extern int sysctl_perf_event_mlock; | |
1108 | extern int sysctl_perf_event_sample_rate; | |
1ccd1549 | 1109 | |
163ec435 PZ |
1110 | extern int perf_proc_update_handler(struct ctl_table *table, int write, |
1111 | void __user *buffer, size_t *lenp, | |
1112 | loff_t *ppos); | |
1113 | ||
320ebf09 PZ |
1114 | static inline bool perf_paranoid_tracepoint_raw(void) |
1115 | { | |
1116 | return sysctl_perf_event_paranoid > -1; | |
1117 | } | |
1118 | ||
1119 | static inline bool perf_paranoid_cpu(void) | |
1120 | { | |
1121 | return sysctl_perf_event_paranoid > 0; | |
1122 | } | |
1123 | ||
1124 | static inline bool perf_paranoid_kernel(void) | |
1125 | { | |
1126 | return sysctl_perf_event_paranoid > 1; | |
1127 | } | |
1128 | ||
cdd6c482 | 1129 | extern void perf_event_init(void); |
1c024eca PZ |
1130 | extern void perf_tp_event(u64 addr, u64 count, void *record, |
1131 | int entry_size, struct pt_regs *regs, | |
ecc55f84 | 1132 | struct hlist_head *head, int rctx); |
24f1e32c | 1133 | extern void perf_bp_event(struct perf_event *event, void *data); |
0d905bca | 1134 | |
9d23a90a | 1135 | #ifndef perf_misc_flags |
e7e7ee2e IM |
1136 | # define perf_misc_flags(regs) \ |
1137 | (user_mode(regs) ? PERF_RECORD_MISC_USER : PERF_RECORD_MISC_KERNEL) | |
1138 | # define perf_instruction_pointer(regs) instruction_pointer(regs) | |
9d23a90a PM |
1139 | #endif |
1140 | ||
5622f295 | 1141 | extern int perf_output_begin(struct perf_output_handle *handle, |
a7ac67ea | 1142 | struct perf_event *event, unsigned int size); |
5622f295 MM |
1143 | extern void perf_output_end(struct perf_output_handle *handle); |
1144 | extern void perf_output_copy(struct perf_output_handle *handle, | |
1145 | const void *buf, unsigned int len); | |
4ed7c92d PZ |
1146 | extern int perf_swevent_get_recursion_context(void); |
1147 | extern void perf_swevent_put_recursion_context(int rctx); | |
44234adc FW |
1148 | extern void perf_event_enable(struct perf_event *event); |
1149 | extern void perf_event_disable(struct perf_event *event); | |
e9d2b064 | 1150 | extern void perf_event_task_tick(void); |
0793a61d TG |
1151 | #else |
1152 | static inline void | |
a8d757ef SE |
1153 | perf_event_task_sched_in(struct task_struct *prev, |
1154 | struct task_struct *task) { } | |
0793a61d | 1155 | static inline void |
a8d757ef SE |
1156 | perf_event_task_sched_out(struct task_struct *prev, |
1157 | struct task_struct *next) { } | |
cdd6c482 IM |
1158 | static inline int perf_event_init_task(struct task_struct *child) { return 0; } |
1159 | static inline void perf_event_exit_task(struct task_struct *child) { } | |
1160 | static inline void perf_event_free_task(struct task_struct *task) { } | |
4e231c79 | 1161 | static inline void perf_event_delayed_put(struct task_struct *task) { } |
57c0c15b | 1162 | static inline void perf_event_print_debug(void) { } |
57c0c15b IM |
1163 | static inline int perf_event_task_disable(void) { return -EINVAL; } |
1164 | static inline int perf_event_task_enable(void) { return -EINVAL; } | |
26ca5c11 AK |
1165 | static inline int perf_event_refresh(struct perf_event *event, int refresh) |
1166 | { | |
1167 | return -EINVAL; | |
1168 | } | |
15dbf27c | 1169 | |
925d519a | 1170 | static inline void |
a8b0ca17 | 1171 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) { } |
24f1e32c | 1172 | static inline void |
184f412c | 1173 | perf_bp_event(struct perf_event *event, void *data) { } |
0a4a9391 | 1174 | |
39447b38 | 1175 | static inline int perf_register_guest_info_callbacks |
e7e7ee2e | 1176 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 1177 | static inline int perf_unregister_guest_info_callbacks |
e7e7ee2e | 1178 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 1179 | |
57c0c15b | 1180 | static inline void perf_event_mmap(struct vm_area_struct *vma) { } |
cdd6c482 IM |
1181 | static inline void perf_event_comm(struct task_struct *tsk) { } |
1182 | static inline void perf_event_fork(struct task_struct *tsk) { } | |
1183 | static inline void perf_event_init(void) { } | |
184f412c | 1184 | static inline int perf_swevent_get_recursion_context(void) { return -1; } |
4ed7c92d | 1185 | static inline void perf_swevent_put_recursion_context(int rctx) { } |
44234adc FW |
1186 | static inline void perf_event_enable(struct perf_event *event) { } |
1187 | static inline void perf_event_disable(struct perf_event *event) { } | |
e9d2b064 | 1188 | static inline void perf_event_task_tick(void) { } |
0793a61d TG |
1189 | #endif |
1190 | ||
e7e7ee2e | 1191 | #define perf_output_put(handle, x) perf_output_copy((handle), &(x), sizeof(x)) |
5622f295 | 1192 | |
3f6da390 PZ |
1193 | /* |
1194 | * This has to have a higher priority than migration_notifier in sched.c. | |
1195 | */ | |
e7e7ee2e IM |
1196 | #define perf_cpu_notifier(fn) \ |
1197 | do { \ | |
1198 | static struct notifier_block fn##_nb __cpuinitdata = \ | |
1199 | { .notifier_call = fn, .priority = CPU_PRI_PERF }; \ | |
1200 | fn(&fn##_nb, (unsigned long)CPU_UP_PREPARE, \ | |
1201 | (void *)(unsigned long)smp_processor_id()); \ | |
1202 | fn(&fn##_nb, (unsigned long)CPU_STARTING, \ | |
1203 | (void *)(unsigned long)smp_processor_id()); \ | |
1204 | fn(&fn##_nb, (unsigned long)CPU_ONLINE, \ | |
1205 | (void *)(unsigned long)smp_processor_id()); \ | |
1206 | register_cpu_notifier(&fn##_nb); \ | |
3f6da390 PZ |
1207 | } while (0) |
1208 | ||
f3dfd265 | 1209 | #endif /* __KERNEL__ */ |
cdd6c482 | 1210 | #endif /* _LINUX_PERF_EVENT_H */ |