perf_counter: powerpc: use u64 for event codes internally
[linux-block.git] / include / linux / perf_counter.h
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1/*
2 * Performance counters:
3 *
4 * Copyright(C) 2008, Thomas Gleixner <tglx@linutronix.de>
5 * Copyright(C) 2008, Red Hat, Inc., Ingo Molnar
6 *
7 * Data type definitions, declarations, prototypes.
8 *
9 * Started by: Thomas Gleixner and Ingo Molnar
10 *
11 * For licencing details see kernel-base/COPYING
12 */
13#ifndef _LINUX_PERF_COUNTER_H
14#define _LINUX_PERF_COUNTER_H
15
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16#include <linux/types.h>
17#include <linux/ioctl.h>
9aaa131a 18#include <asm/byteorder.h>
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19
20/*
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21 * User-space ABI bits:
22 */
23
24/*
b8e83514 25 * hw_event.type
0793a61d 26 */
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27enum perf_event_types {
28 PERF_TYPE_HARDWARE = 0,
29 PERF_TYPE_SOFTWARE = 1,
30 PERF_TYPE_TRACEPOINT = 2,
31
0793a61d 32 /*
b8e83514 33 * available TYPE space, raw is the max value.
0793a61d 34 */
9f66a381 35
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36 PERF_TYPE_RAW = 128,
37};
6c594c21 38
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39/*
40 * Generalized performance counter event types, used by the hw_event.event_id
41 * parameter of the sys_perf_counter_open() syscall:
42 */
43enum hw_event_ids {
9f66a381 44 /*
b8e83514 45 * Common hardware events, generalized by the kernel:
9f66a381 46 */
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47 PERF_COUNT_CPU_CYCLES = 0,
48 PERF_COUNT_INSTRUCTIONS = 1,
49 PERF_COUNT_CACHE_REFERENCES = 2,
50 PERF_COUNT_CACHE_MISSES = 3,
51 PERF_COUNT_BRANCH_INSTRUCTIONS = 4,
52 PERF_COUNT_BRANCH_MISSES = 5,
53 PERF_COUNT_BUS_CYCLES = 6,
54
55 PERF_HW_EVENTS_MAX = 7,
56};
e077df4f 57
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58/*
59 * Special "software" counters provided by the kernel, even if the hardware
60 * does not support performance counters. These counters measure various
61 * physical and sw events of the kernel (and allow the profiling of them as
62 * well):
63 */
64enum sw_event_ids {
65 PERF_COUNT_CPU_CLOCK = 0,
66 PERF_COUNT_TASK_CLOCK = 1,
67 PERF_COUNT_PAGE_FAULTS = 2,
68 PERF_COUNT_CONTEXT_SWITCHES = 3,
69 PERF_COUNT_CPU_MIGRATIONS = 4,
70 PERF_COUNT_PAGE_FAULTS_MIN = 5,
71 PERF_COUNT_PAGE_FAULTS_MAJ = 6,
72
73 PERF_SW_EVENTS_MAX = 7,
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74};
75
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76#define __PERF_COUNTER_MASK(name) \
77 (((1ULL << PERF_COUNTER_##name##_BITS) - 1) << \
78 PERF_COUNTER_##name##_SHIFT)
79
80#define PERF_COUNTER_RAW_BITS 1
81#define PERF_COUNTER_RAW_SHIFT 63
82#define PERF_COUNTER_RAW_MASK __PERF_COUNTER_MASK(RAW)
83
84#define PERF_COUNTER_CONFIG_BITS 63
85#define PERF_COUNTER_CONFIG_SHIFT 0
86#define PERF_COUNTER_CONFIG_MASK __PERF_COUNTER_MASK(CONFIG)
87
88#define PERF_COUNTER_TYPE_BITS 7
89#define PERF_COUNTER_TYPE_SHIFT 56
90#define PERF_COUNTER_TYPE_MASK __PERF_COUNTER_MASK(TYPE)
91
92#define PERF_COUNTER_EVENT_BITS 56
93#define PERF_COUNTER_EVENT_SHIFT 0
94#define PERF_COUNTER_EVENT_MASK __PERF_COUNTER_MASK(EVENT)
95
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96/*
97 * Bits that can be set in hw_event.record_type to request information
98 * in the overflow packets.
99 */
100enum perf_counter_record_format {
101 PERF_RECORD_IP = 1U << 0,
102 PERF_RECORD_TID = 1U << 1,
4d855457 103 PERF_RECORD_TIME = 1U << 2,
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104 PERF_RECORD_ADDR = 1U << 3,
105 PERF_RECORD_GROUP = 1U << 4,
106 PERF_RECORD_CALLCHAIN = 1U << 5,
a85f61ab 107 PERF_RECORD_CONFIG = 1U << 6,
f370e1e2 108 PERF_RECORD_CPU = 1U << 7,
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109};
110
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111/*
112 * Bits that can be set in hw_event.read_format to request that
113 * reads on the counter should return the indicated quantities,
114 * in increasing order of bit value, after the counter value.
115 */
116enum perf_counter_read_format {
117 PERF_FORMAT_TOTAL_TIME_ENABLED = 1,
118 PERF_FORMAT_TOTAL_TIME_RUNNING = 2,
119};
120
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121/*
122 * Hardware event to monitor via a performance monitoring counter:
123 */
124struct perf_counter_hw_event {
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125 /*
126 * The MSB of the config word signifies if the rest contains cpu
127 * specific (raw) counter configuration data, if unset, the next
128 * 7 bits are an event type and the rest of the bits are the event
129 * identifier.
130 */
131 __u64 config;
9f66a381 132
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133 union {
134 __u64 irq_period;
135 __u64 irq_freq;
136 };
137
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138 __u32 record_type;
139 __u32 read_format;
9f66a381 140
2743a5b0 141 __u64 disabled : 1, /* off by default */
0475f9ea 142 nmi : 1, /* NMI sampling */
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143 inherit : 1, /* children inherit it */
144 pinned : 1, /* must always be on PMU */
145 exclusive : 1, /* only group on PMU */
146 exclude_user : 1, /* don't count user */
147 exclude_kernel : 1, /* ditto kernel */
148 exclude_hv : 1, /* ditto hypervisor */
2743a5b0 149 exclude_idle : 1, /* don't count when idle */
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150 mmap : 1, /* include mmap data */
151 munmap : 1, /* include munmap data */
8d1b2d93 152 comm : 1, /* include comm data */
60db5e09 153 freq : 1, /* use freq, not period */
0475f9ea 154
60db5e09 155 __reserved_1 : 51;
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156
157 __u32 extra_config_len;
c457810a 158 __u32 wakeup_events; /* wakeup every n events */
9f66a381 159
f3dfd265 160 __u64 __reserved_2;
2743a5b0 161 __u64 __reserved_3;
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162};
163
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164/*
165 * Ioctls that can be done on a perf counter fd:
166 */
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167#define PERF_COUNTER_IOC_ENABLE _IOW('$', 0, u32)
168#define PERF_COUNTER_IOC_DISABLE _IOW('$', 1, u32)
79f14641 169#define PERF_COUNTER_IOC_REFRESH _IOW('$', 2, u32)
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170#define PERF_COUNTER_IOC_RESET _IOW('$', 3, u32)
171
172enum perf_counter_ioc_flags {
173 PERF_IOC_FLAG_GROUP = 1U << 0,
174};
d859e29f 175
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176/*
177 * Structure of the page that can be mapped via mmap
178 */
179struct perf_counter_mmap_page {
180 __u32 version; /* version number of this structure */
181 __u32 compat_version; /* lowest version this is compat with */
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182
183 /*
184 * Bits needed to read the hw counters in user-space.
185 *
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186 * u32 seq;
187 * s64 count;
38ff667b 188 *
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189 * do {
190 * seq = pc->lock;
38ff667b 191 *
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192 * barrier()
193 * if (pc->index) {
194 * count = pmc_read(pc->index - 1);
195 * count += pc->offset;
196 * } else
197 * goto regular_read;
38ff667b 198 *
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199 * barrier();
200 * } while (pc->lock != seq);
38ff667b 201 *
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202 * NOTE: for obvious reason this only works on self-monitoring
203 * processes.
38ff667b 204 */
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205 __u32 lock; /* seqlock for synchronization */
206 __u32 index; /* hardware counter identifier */
207 __s64 offset; /* add to hardware counter value */
7b732a75 208
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209 /*
210 * Control data for the mmap() data buffer.
211 *
212 * User-space reading this value should issue an rmb(), on SMP capable
213 * platforms, after reading this value -- see perf_counter_wakeup().
214 */
7b732a75 215 __u32 data_head; /* head in the data section */
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216};
217
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218#define PERF_EVENT_MISC_KERNEL (1 << 0)
219#define PERF_EVENT_MISC_USER (1 << 1)
220#define PERF_EVENT_MISC_OVERFLOW (1 << 2)
6fab0192 221
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222struct perf_event_header {
223 __u32 type;
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224 __u16 misc;
225 __u16 size;
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226};
227
228enum perf_event_type {
5ed00415 229
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230 /*
231 * The MMAP events record the PROT_EXEC mappings so that we can
232 * correlate userspace IPs to code. They have the following structure:
233 *
234 * struct {
235 * struct perf_event_header header;
236 *
237 * u32 pid, tid;
238 * u64 addr;
239 * u64 len;
240 * u64 pgoff;
241 * char filename[];
242 * };
243 */
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244 PERF_EVENT_MMAP = 1,
245 PERF_EVENT_MUNMAP = 2,
0a4a9391 246
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247 /*
248 * struct {
249 * struct perf_event_header header;
250 *
251 * u32 pid, tid;
252 * char comm[];
253 * };
254 */
255 PERF_EVENT_COMM = 3,
256
8a057d84 257 /*
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258 * When header.misc & PERF_EVENT_MISC_OVERFLOW the event_type field
259 * will be PERF_RECORD_*
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260 *
261 * struct {
262 * struct perf_event_header header;
263 *
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264 * { u64 ip; } && PERF_RECORD_IP
265 * { u32 pid, tid; } && PERF_RECORD_TID
4d855457 266 * { u64 time; } && PERF_RECORD_TIME
78f13e95 267 * { u64 addr; } && PERF_RECORD_ADDR
a85f61ab 268 * { u64 config; } && PERF_RECORD_CONFIG
f370e1e2 269 * { u32 cpu, res; } && PERF_RECORD_CPU
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270 *
271 * { u64 nr;
6b6e5486 272 * { u64 event, val; } cnt[nr]; } && PERF_RECORD_GROUP
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273 *
274 * { u16 nr,
275 * hv,
276 * kernel,
277 * user;
6b6e5486 278 * u64 ips[nr]; } && PERF_RECORD_CALLCHAIN
0c593b34 279 * };
8a057d84 280 */
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281};
282
f3dfd265 283#ifdef __KERNEL__
9f66a381 284/*
f3dfd265 285 * Kernel-internal data types and definitions:
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286 */
287
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288#ifdef CONFIG_PERF_COUNTERS
289# include <asm/perf_counter.h>
290#endif
291
292#include <linux/list.h>
293#include <linux/mutex.h>
294#include <linux/rculist.h>
295#include <linux/rcupdate.h>
296#include <linux/spinlock.h>
d6d020e9 297#include <linux/hrtimer.h>
3c446b3d 298#include <linux/fs.h>
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299#include <asm/atomic.h>
300
301struct task_struct;
302
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303static inline u64 perf_event_raw(struct perf_counter_hw_event *hw_event)
304{
305 return hw_event->config & PERF_COUNTER_RAW_MASK;
306}
307
308static inline u64 perf_event_config(struct perf_counter_hw_event *hw_event)
309{
310 return hw_event->config & PERF_COUNTER_CONFIG_MASK;
311}
312
313static inline u64 perf_event_type(struct perf_counter_hw_event *hw_event)
314{
315 return (hw_event->config & PERF_COUNTER_TYPE_MASK) >>
316 PERF_COUNTER_TYPE_SHIFT;
317}
318
319static inline u64 perf_event_id(struct perf_counter_hw_event *hw_event)
320{
321 return hw_event->config & PERF_COUNTER_EVENT_MASK;
322}
323
0793a61d 324/**
9f66a381 325 * struct hw_perf_counter - performance counter hardware details:
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326 */
327struct hw_perf_counter {
ee06094f 328#ifdef CONFIG_PERF_COUNTERS
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329 union {
330 struct { /* hardware */
331 u64 config;
332 unsigned long config_base;
333 unsigned long counter_base;
334 int nmi;
6f00cada 335 int idx;
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336 };
337 union { /* software */
338 atomic64_t count;
339 struct hrtimer hrtimer;
340 };
341 };
ee06094f 342 atomic64_t prev_count;
9f66a381 343 u64 irq_period;
ee06094f 344 atomic64_t period_left;
60db5e09 345 u64 interrupts;
ee06094f 346#endif
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347};
348
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349struct perf_counter;
350
351/**
4aeb0b42 352 * struct pmu - generic performance monitoring unit
621a01ea 353 */
4aeb0b42 354struct pmu {
95cdd2e7 355 int (*enable) (struct perf_counter *counter);
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356 void (*disable) (struct perf_counter *counter);
357 void (*read) (struct perf_counter *counter);
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358};
359
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360/**
361 * enum perf_counter_active_state - the states of a counter
362 */
363enum perf_counter_active_state {
3b6f9e5c 364 PERF_COUNTER_STATE_ERROR = -2,
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365 PERF_COUNTER_STATE_OFF = -1,
366 PERF_COUNTER_STATE_INACTIVE = 0,
367 PERF_COUNTER_STATE_ACTIVE = 1,
368};
369
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370struct file;
371
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372struct perf_mmap_data {
373 struct rcu_head rcu_head;
8740f941 374 int nr_pages; /* nr of data pages */
c5078f78 375 int nr_locked; /* nr pages mlocked */
8740f941 376
c33a0bc4 377 atomic_t poll; /* POLL_ for wakeups */
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378 atomic_t head; /* write position */
379 atomic_t events; /* event limit */
380
c66de4a5 381 atomic_t done_head; /* completed head */
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382 atomic_t lock; /* concurrent writes */
383
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384 atomic_t wakeup; /* needs a wakeup */
385
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386 struct perf_counter_mmap_page *user_page;
387 void *data_pages[0];
388};
389
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390struct perf_pending_entry {
391 struct perf_pending_entry *next;
392 void (*func)(struct perf_pending_entry *);
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393};
394
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395/**
396 * struct perf_counter - performance counter kernel representation:
397 */
398struct perf_counter {
ee06094f 399#ifdef CONFIG_PERF_COUNTERS
04289bb9 400 struct list_head list_entry;
592903cd 401 struct list_head event_entry;
04289bb9 402 struct list_head sibling_list;
5c148194 403 int nr_siblings;
04289bb9 404 struct perf_counter *group_leader;
4aeb0b42 405 const struct pmu *pmu;
04289bb9 406
6a930700 407 enum perf_counter_active_state state;
c07c99b6 408 enum perf_counter_active_state prev_state;
0793a61d 409 atomic64_t count;
ee06094f 410
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411 /*
412 * These are the total time in nanoseconds that the counter
413 * has been enabled (i.e. eligible to run, and the task has
414 * been scheduled in, if this is a per-task counter)
415 * and running (scheduled onto the CPU), respectively.
416 *
417 * They are computed from tstamp_enabled, tstamp_running and
418 * tstamp_stopped when the counter is in INACTIVE or ACTIVE state.
419 */
420 u64 total_time_enabled;
421 u64 total_time_running;
422
423 /*
424 * These are timestamps used for computing total_time_enabled
425 * and total_time_running when the counter is in INACTIVE or
426 * ACTIVE state, measured in nanoseconds from an arbitrary point
427 * in time.
428 * tstamp_enabled: the notional time when the counter was enabled
429 * tstamp_running: the notional time when the counter was scheduled on
430 * tstamp_stopped: in INACTIVE state, the notional time when the
431 * counter was scheduled off.
432 */
433 u64 tstamp_enabled;
434 u64 tstamp_running;
435 u64 tstamp_stopped;
436
9f66a381 437 struct perf_counter_hw_event hw_event;
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438 struct hw_perf_counter hw;
439
440 struct perf_counter_context *ctx;
441 struct task_struct *task;
9b51f66d 442 struct file *filp;
0793a61d 443
9b51f66d 444 struct perf_counter *parent;
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445 struct list_head child_list;
446
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447 /*
448 * These accumulate total time (in nanoseconds) that children
449 * counters have been enabled and running, respectively.
450 */
451 atomic64_t child_total_time_enabled;
452 atomic64_t child_total_time_running;
453
0793a61d 454 /*
d859e29f 455 * Protect attach/detach and child_list:
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456 */
457 struct mutex mutex;
458
459 int oncpu;
460 int cpu;
461
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462 /* mmap bits */
463 struct mutex mmap_mutex;
464 atomic_t mmap_count;
465 struct perf_mmap_data *data;
37d81828 466
7b732a75 467 /* poll related */
0793a61d 468 wait_queue_head_t waitq;
3c446b3d 469 struct fasync_struct *fasync;
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470
471 /* delayed work for NMIs and such */
472 int pending_wakeup;
4c9e2542 473 int pending_kill;
79f14641 474 int pending_disable;
671dec5d 475 struct perf_pending_entry pending;
592903cd 476
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477 atomic_t event_limit;
478
e077df4f 479 void (*destroy)(struct perf_counter *);
592903cd 480 struct rcu_head rcu_head;
ee06094f 481#endif
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482};
483
484/**
485 * struct perf_counter_context - counter context structure
486 *
487 * Used as a container for task counters and CPU counters as well:
488 */
489struct perf_counter_context {
490#ifdef CONFIG_PERF_COUNTERS
491 /*
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492 * Protect the states of the counters in the list,
493 * nr_active, and the list:
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494 */
495 spinlock_t lock;
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496 /*
497 * Protect the list of counters. Locking either mutex or lock
498 * is sufficient to ensure the list doesn't change; to change
499 * the list you need to lock both the mutex and the spinlock.
500 */
501 struct mutex mutex;
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502
503 struct list_head counter_list;
592903cd 504 struct list_head event_list;
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505 int nr_counters;
506 int nr_active;
d859e29f 507 int is_active;
0793a61d 508 struct task_struct *task;
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509
510 /*
4af4998b 511 * Context clock, runs when context enabled.
53cfbf59 512 */
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513 u64 time;
514 u64 timestamp;
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515#endif
516};
517
518/**
519 * struct perf_counter_cpu_context - per cpu counter context structure
520 */
521struct perf_cpu_context {
522 struct perf_counter_context ctx;
523 struct perf_counter_context *task_ctx;
524 int active_oncpu;
525 int max_pertask;
3b6f9e5c 526 int exclusive;
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527
528 /*
529 * Recursion avoidance:
530 *
531 * task, softirq, irq, nmi context
532 */
533 int recursion[4];
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534};
535
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536#ifdef CONFIG_PERF_COUNTERS
537
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538/*
539 * Set by architecture code:
540 */
541extern int perf_max_counters;
542
4aeb0b42 543extern const struct pmu *hw_perf_counter_init(struct perf_counter *counter);
621a01ea 544
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545extern void perf_counter_task_sched_in(struct task_struct *task, int cpu);
546extern void perf_counter_task_sched_out(struct task_struct *task, int cpu);
547extern void perf_counter_task_tick(struct task_struct *task, int cpu);
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548extern void perf_counter_init_task(struct task_struct *child);
549extern void perf_counter_exit_task(struct task_struct *child);
925d519a 550extern void perf_counter_do_pending(void);
0793a61d 551extern void perf_counter_print_debug(void);
1b023a96 552extern void perf_counter_unthrottle(void);
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553extern void __perf_disable(void);
554extern bool __perf_enable(void);
555extern void perf_disable(void);
556extern void perf_enable(void);
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557extern int perf_counter_task_disable(void);
558extern int perf_counter_task_enable(void);
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559extern int hw_perf_group_sched_in(struct perf_counter *group_leader,
560 struct perf_cpu_context *cpuctx,
561 struct perf_counter_context *ctx, int cpu);
37d81828 562extern void perf_counter_update_userpage(struct perf_counter *counter);
5c92d124 563
f6c7d5fe 564extern int perf_counter_overflow(struct perf_counter *counter,
78f13e95 565 int nmi, struct pt_regs *regs, u64 addr);
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566/*
567 * Return 1 for a software counter, 0 for a hardware counter
568 */
569static inline int is_software_counter(struct perf_counter *counter)
570{
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571 return !perf_event_raw(&counter->hw_event) &&
572 perf_event_type(&counter->hw_event) != PERF_TYPE_HARDWARE;
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573}
574
78f13e95 575extern void perf_swcounter_event(u32, u64, int, struct pt_regs *, u64);
15dbf27c 576
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577extern void perf_counter_mmap(unsigned long addr, unsigned long len,
578 unsigned long pgoff, struct file *file);
579
580extern void perf_counter_munmap(unsigned long addr, unsigned long len,
581 unsigned long pgoff, struct file *file);
582
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583extern void perf_counter_comm(struct task_struct *tsk);
584
9c03d88e 585#define MAX_STACK_DEPTH 255
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586
587struct perf_callchain_entry {
9c03d88e 588 u16 nr, hv, kernel, user;
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589 u64 ip[MAX_STACK_DEPTH];
590};
591
592extern struct perf_callchain_entry *perf_callchain(struct pt_regs *regs);
593
1ccd1549 594extern int sysctl_perf_counter_priv;
c5078f78 595extern int sysctl_perf_counter_mlock;
1ccd1549 596
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597extern void perf_counter_init(void);
598
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599#else
600static inline void
601perf_counter_task_sched_in(struct task_struct *task, int cpu) { }
602static inline void
603perf_counter_task_sched_out(struct task_struct *task, int cpu) { }
604static inline void
605perf_counter_task_tick(struct task_struct *task, int cpu) { }
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606static inline void perf_counter_init_task(struct task_struct *child) { }
607static inline void perf_counter_exit_task(struct task_struct *child) { }
925d519a 608static inline void perf_counter_do_pending(void) { }
0793a61d 609static inline void perf_counter_print_debug(void) { }
1b023a96 610static inline void perf_counter_unthrottle(void) { }
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611static inline void perf_disable(void) { }
612static inline void perf_enable(void) { }
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613static inline int perf_counter_task_disable(void) { return -EINVAL; }
614static inline int perf_counter_task_enable(void) { return -EINVAL; }
15dbf27c 615
925d519a 616static inline void
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617perf_swcounter_event(u32 event, u64 nr, int nmi,
618 struct pt_regs *regs, u64 addr) { }
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PZ
619
620static inline void
621perf_counter_mmap(unsigned long addr, unsigned long len,
622 unsigned long pgoff, struct file *file) { }
623
624static inline void
625perf_counter_munmap(unsigned long addr, unsigned long len,
0d905bca 626 unsigned long pgoff, struct file *file) { }
0a4a9391 627
8d1b2d93 628static inline void perf_counter_comm(struct task_struct *tsk) { }
0d905bca 629static inline void perf_counter_init(void) { }
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630#endif
631
f3dfd265 632#endif /* __KERNEL__ */
0793a61d 633#endif /* _LINUX_PERF_COUNTER_H */