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Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6
[linux-2.6-block.git] / include / linux / pci.h
CommitLineData
1da177e4
LT		 1/*
2 * pci.h
3 *
4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
7 *
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
10 *
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
15 */
16
17#ifndef LINUX_PCI_H
18#define LINUX_PCI_H
19
4352dfd5
GKH		 20/* Include the pci register defines */
21#include <linux/pci_regs.h>
1da177e4 22
1da177e4
LT		 23/*
24 * The PCI interface treats multi-function devices as independent
25 * devices. The slot/function address of each device is encoded
26 * in a single byte as follows:
27 *
28 * 7:3 = slot
29 * 2:0 = function
30 */
31#define PCI_DEVFN(slot,func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
32#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
33#define PCI_FUNC(devfn) ((devfn) & 0x07)
34
35/* Ioctls for /proc/bus/pci/X/Y nodes. */
36#define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
37#define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
38#define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
39#define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
40#define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
41
42#ifdef __KERNEL__
43
778382e0
DW		 44#include <linux/mod_devicetable.h>
45
1da177e4 46#include <linux/types.h>
1da177e4
LT		 47#include <linux/ioport.h>
48#include <linux/list.h>
4a7fb636 49#include <linux/compiler.h>
1da177e4 50#include <linux/errno.h>
bae94d02 51#include <asm/atomic.h>
1da177e4
LT		 52#include <linux/device.h>
53
7e7a43c3
AB		 54/* Include the ID list */
55#include <linux/pci_ids.h>
56
1da177e4
LT		 57/* File state for mmap()s on /proc/bus/pci/X/Y */
58enum pci_mmap_state {
59 pci_mmap_io,
60 pci_mmap_mem
61};
62
63/* This defines the direction arg to the DMA mapping routines. */
64#define PCI_DMA_BIDIRECTIONAL 0
65#define PCI_DMA_TODEVICE 1
66#define PCI_DMA_FROMDEVICE 2
67#define PCI_DMA_NONE 3
68
69#define DEVICE_COUNT_COMPATIBLE 4
70#define DEVICE_COUNT_RESOURCE 12
71
72typedef int __bitwise pci_power_t;
73
4352dfd5
GKH		 74#define PCI_D0 ((pci_power_t __force) 0)
75#define PCI_D1 ((pci_power_t __force) 1)
76#define PCI_D2 ((pci_power_t __force) 2)
1da177e4
LT		 77#define PCI_D3hot ((pci_power_t __force) 3)
78#define PCI_D3cold ((pci_power_t __force) 4)
3fe9d19f 79#define PCI_UNKNOWN ((pci_power_t __force) 5)
438510f6 80#define PCI_POWER_ERROR ((pci_power_t __force) -1)
1da177e4 81
392a1ce7 82/** The pci_channel state describes connectivity between the CPU and
83 * the pci device. If some PCI bus between here and the pci device
84 * has crashed or locked up, this info is reflected here.
85 */
86typedef unsigned int __bitwise pci_channel_state_t;
87
88enum pci_channel_state {
89 /* I/O channel is in normal state */
90 pci_channel_io_normal = (__force pci_channel_state_t) 1,
91
92 /* I/O to channel is blocked */
93 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
94
95 /* PCI card is dead */
96 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
97};
98
f7bdd12d
BK		 99typedef unsigned int __bitwise pcie_reset_state_t;
100
101enum pcie_reset_state {
102 /* Reset is NOT asserted (Use to deassert reset) */
103 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
104
105 /* Use #PERST to reset PCI-E device */
106 pcie_warm_reset = (__force pcie_reset_state_t) 2,
107
108 /* Use PCI-E Hot Reset to reset device */
109 pcie_hot_reset = (__force pcie_reset_state_t) 3
110};
111
6e325a62
MT		 112typedef unsigned short __bitwise pci_bus_flags_t;
113enum pci_bus_flags {
d556ad4b
PO		 114 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
115 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
6e325a62
MT		 116};
117
41017f0c
SL		 118struct pci_cap_saved_state {
119 struct hlist_node next;
120 char cap_nr;
121 u32 data[0];
122};
123
1da177e4
LT		 124/*
125 * The pci_dev structure is used to describe PCI devices.
126 */
127struct pci_dev {
128 struct list_head global_list; /* node in list of all PCI devices */
129 struct list_head bus_list; /* node in per-bus list */
130 struct pci_bus *bus; /* bus this device is on */
131 struct pci_bus *subordinate; /* bus this device bridges to */
132
133 void *sysdata; /* hook for sys-specific extension */
134 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
135
136 unsigned int devfn; /* encoded device & function index */
137 unsigned short vendor;
138 unsigned short device;
139 unsigned short subsystem_vendor;
140 unsigned short subsystem_device;
141 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
b8a3a521 142 u8 revision; /* PCI revision, low byte of class word */
1da177e4 143 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
994a65e2 144 u8 pcie_type; /* PCI-E device/port type */
1da177e4 145 u8 rom_base_reg; /* which config register controls the ROM */
ffeff788 146 u8 pin; /* which interrupt pin this device uses */
1da177e4
LT		 147
148 struct pci_driver *driver; /* which driver has allocated this device */
149 u64 dma_mask; /* Mask of the bits of bus address this
150 device implements. Normally this is
151 0xffffffff. You only need to change
152 this if your device has broken DMA
153 or supports 64-bit transfers. */
154
155 pci_power_t current_state; /* Current operating state. In ACPI-speak,
156 this is D0-D3, D0 being fully functional,
157 and D3 being off. */
158
392a1ce7 159 pci_channel_state_t error_state; /* current connectivity state */
1da177e4
LT		 160 struct device dev; /* Generic device interface */
161
162 /* device is compatible with these IDs */
163 unsigned short vendor_compatible[DEVICE_COUNT_COMPATIBLE];
164 unsigned short device_compatible[DEVICE_COUNT_COMPATIBLE];
165
166 int cfg_size; /* Size of configuration space */
167
168 /*
169 * Instead of touching interrupt line and base address registers
170 * directly, use the values stored here. They might be different!
171 */
172 unsigned int irq;
173 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
174
175 /* These fields are used by common fixups */
176 unsigned int transparent:1; /* Transparent PCI bridge */
177 unsigned int multifunction:1;/* Part of multi-function device */
178 /* keep track of device state */
1da177e4 179 unsigned int is_busmaster:1; /* device is busmaster */
4602b88d 180 unsigned int no_msi:1; /* device may not use msi */
ffadcc2f 181 unsigned int no_d1d2:1; /* only allow d0 or d3 */
e04b0ea2 182 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
bd8481e1 183 unsigned int broken_parity_status:1; /* Device generates false positive parity */
99dc804d
SL		 184 unsigned int msi_enabled:1;
185 unsigned int msix_enabled:1;
9ac7849e 186 unsigned int is_managed:1;
994a65e2 187 unsigned int is_pcie:1;
bae94d02 188 atomic_t enable_cnt; /* pci_enable_device has been called */
4602b88d 189
1da177e4 190 u32 saved_config_space[16]; /* config space saved at suspend time */
41017f0c 191 struct hlist_head saved_cap_space;
1da177e4
LT		 192 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
193 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
194 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
ded86d8d 195#ifdef CONFIG_PCI_MSI
4aa9bc95 196 struct list_head msi_list;
ded86d8d 197#endif
1da177e4
LT		 198};
199
65891215
ME		 200extern struct pci_dev *alloc_pci_dev(void);
201
1da177e4
LT		 202#define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)
203#define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
204#define to_pci_dev(n) container_of(n, struct pci_dev, dev)
205#define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
206
a7369f1f
LV		 207static inline int pci_channel_offline(struct pci_dev *pdev)
208{
209 return (pdev->error_state != pci_channel_io_normal);
210}
211
41017f0c
SL		 212static inline struct pci_cap_saved_state *pci_find_saved_cap(
213 struct pci_dev *pci_dev,char cap)
214{
215 struct pci_cap_saved_state *tmp;
216 struct hlist_node *pos;
217
218 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
219 if (tmp->cap_nr == cap)
220 return tmp;
221 }
222 return NULL;
223}
224
225static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
226 struct pci_cap_saved_state *new_cap)
227{
228 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
229}
230
1da177e4
LT		 231/*
232 * For PCI devices, the region numbers are assigned this way:
233 *
234 * 0-5 standard PCI regions
235 * 6 expansion ROM
236 * 7-10 bridges: address space assigned to buses behind the bridge
237 */
238
4352dfd5
GKH		 239#define PCI_ROM_RESOURCE 6
240#define PCI_BRIDGE_RESOURCES 7
241#define PCI_NUM_RESOURCES 11
1da177e4
LT		 242
243#ifndef PCI_BUS_NUM_RESOURCES
4352dfd5 244#define PCI_BUS_NUM_RESOURCES 8
1da177e4 245#endif
4352dfd5
GKH		 246
247#define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
1da177e4
LT		 248
249struct pci_bus {
250 struct list_head node; /* node in list of buses */
251 struct pci_bus *parent; /* parent bus this bridge is on */
252 struct list_head children; /* list of child buses */
253 struct list_head devices; /* list of devices on this bus */
254 struct pci_dev *self; /* bridge device as seen by parent */
255 struct resource *resource[PCI_BUS_NUM_RESOURCES];
256 /* address space routed to this bus */
257
258 struct pci_ops *ops; /* configuration access functions */
259 void *sysdata; /* hook for sys-specific extension */
260 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
261
262 unsigned char number; /* bus number */
263 unsigned char primary; /* number of primary bridge */
264 unsigned char secondary; /* number of secondary bridge */
265 unsigned char subordinate; /* max number of subordinate buses */
266
267 char name[48];
268
269 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
6e325a62 270 pci_bus_flags_t bus_flags; /* Inherited by child busses */
1da177e4
LT		 271 struct device *bridge;
272 struct class_device class_dev;
273 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
274 struct bin_attribute *legacy_mem; /* legacy mem */
275};
276
277#define pci_bus_b(n) list_entry(n, struct pci_bus, node)
278#define to_pci_bus(n) container_of(n, struct pci_bus, class_dev)
279
280/*
281 * Error values that may be returned by PCI functions.
282 */
283#define PCIBIOS_SUCCESSFUL 0x00
284#define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
285#define PCIBIOS_BAD_VENDOR_ID 0x83
286#define PCIBIOS_DEVICE_NOT_FOUND 0x86
287#define PCIBIOS_BAD_REGISTER_NUMBER 0x87
288#define PCIBIOS_SET_FAILED 0x88
289#define PCIBIOS_BUFFER_TOO_SMALL 0x89
290
291/* Low-level architecture-dependent routines */
292
293struct pci_ops {
294 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
295 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
296};
297
298struct pci_raw_ops {
299 int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn,
300 int reg, int len, u32 *val);
301 int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn,
302 int reg, int len, u32 val);
303};
304
305extern struct pci_raw_ops *raw_pci_ops;
306
307struct pci_bus_region {
308 unsigned long start;
309 unsigned long end;
310};
311
312struct pci_dynids {
313 spinlock_t lock; /* protects list, index */
314 struct list_head list; /* for IDs added at runtime */
315 unsigned int use_driver_data:1; /* pci_driver->driver_data is used */
316};
317
392a1ce7 318/* ---------------------------------------------------------------- */
319/** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
579082df 320 * a set of callbacks in struct pci_error_handlers, then that device driver
392a1ce7 321 * will be notified of PCI bus errors, and will be driven to recovery
322 * when an error occurs.
323 */
324
325typedef unsigned int __bitwise pci_ers_result_t;
326
327enum pci_ers_result {
328 /* no result/none/not supported in device driver */
329 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
330
331 /* Device driver can recover without slot reset */
332 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
333
334 /* Device driver wants slot to be reset. */
335 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
336
337 /* Device has completely failed, is unrecoverable */
338 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
339
340 /* Device driver is fully recovered and operational */
341 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
342};
343
344/* PCI bus error event callbacks */
345struct pci_error_handlers
346{
347 /* PCI bus error detected on this device */
348 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
349 enum pci_channel_state error);
350
351 /* MMIO has been re-enabled, but not DMA */
352 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
353
354 /* PCI Express link has been reset */
355 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
356
357 /* PCI slot has been reset */
358 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
359
360 /* Device driver may resume normal operations */
361 void (*resume)(struct pci_dev *dev);
362};
363
364/* ---------------------------------------------------------------- */
365
1da177e4
LT		 366struct module;
367struct pci_driver {
368 struct list_head node;
369 char *name;
1da177e4
LT		 370 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
371 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
372 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
373 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
cbd69dbb
LT		 374 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
375 int (*resume_early) (struct pci_dev *dev);
1da177e4 376 int (*resume) (struct pci_dev *dev); /* Device woken up */
c8958177 377 void (*shutdown) (struct pci_dev *dev);
1da177e4 378
392a1ce7 379 struct pci_error_handlers *err_handler;
1da177e4
LT		 380 struct device_driver driver;
381 struct pci_dynids dynids;
382};
383
384#define to_pci_driver(drv) container_of(drv,struct pci_driver, driver)
385
386/**
387 * PCI_DEVICE - macro used to describe a specific pci device
388 * @vend: the 16 bit PCI Vendor ID
389 * @dev: the 16 bit PCI Device ID
390 *
391 * This macro is used to create a struct pci_device_id that matches a
392 * specific device. The subvendor and subdevice fields will be set to
393 * PCI_ANY_ID.
394 */
395#define PCI_DEVICE(vend,dev) \
396 .vendor = (vend), .device = (dev), \
397 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
398
399/**
400 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
401 * @dev_class: the class, subclass, prog-if triple for this device
402 * @dev_class_mask: the class mask for this device
403 *
404 * This macro is used to create a struct pci_device_id that matches a
4352dfd5 405 * specific PCI class. The vendor, device, subvendor, and subdevice
1da177e4
LT		 406 * fields will be set to PCI_ANY_ID.
407 */
408#define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
409 .class = (dev_class), .class_mask = (dev_class_mask), \
410 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
411 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
412
1597cacb
AC		 413/**
414 * PCI_VDEVICE - macro used to describe a specific pci device in short form
415 * @vend: the vendor name
416 * @dev: the 16 bit PCI Device ID
417 *
418 * This macro is used to create a struct pci_device_id that matches a
419 * specific PCI device. The subvendor, and subdevice fields will be set
420 * to PCI_ANY_ID. The macro allows the next field to follow as the device
421 * private data.
422 */
423
424#define PCI_VDEVICE(vendor, device) \
425 PCI_VENDOR_ID_##vendor, (device), \
426 PCI_ANY_ID, PCI_ANY_ID, 0, 0
427
1da177e4
LT		 428/* these external functions are only available when PCI support is enabled */
429#ifdef CONFIG_PCI
430
431extern struct bus_type pci_bus_type;
432
433/* Do NOT directly access these two variables, unless you are arch specific pci
434 * code, or pci core code. */
435extern struct list_head pci_root_buses; /* list of all known PCI buses */
436extern struct list_head pci_devices; /* list of all devices */
ed4aaadb
ZY		 437/* Some device drivers need know if pci is initiated */
438extern int no_pci_devices(void);
1da177e4
LT		 439
440void pcibios_fixup_bus(struct pci_bus *);
4a7fb636 441int __must_check pcibios_enable_device(struct pci_dev *, int mask);
1da177e4
LT		 442char *pcibios_setup (char *str);
443
444/* Used only when drivers/pci/setup.c is used */
e31dd6e4
GKH		 445void pcibios_align_resource(void *, struct resource *, resource_size_t,
446 resource_size_t);
1da177e4
LT		 447void pcibios_update_irq(struct pci_dev *, int irq);
448
449/* Generic PCI functions used internally */
450
451extern struct pci_bus *pci_find_bus(int domain, int busnr);
c431ada4 452void pci_bus_add_devices(struct pci_bus *bus);
1da177e4
LT		 453struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
454static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata)
455{
c431ada4
RS		 456 struct pci_bus *root_bus;
457 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
458 if (root_bus)
459 pci_bus_add_devices(root_bus);
460 return root_bus;
1da177e4 461}
cdb9b9f7
PM		 462struct pci_bus *pci_create_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
463struct pci_bus * pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr);
1da177e4
LT		 464int pci_scan_slot(struct pci_bus *bus, int devfn);
465struct pci_dev * pci_scan_single_device(struct pci_bus *bus, int devfn);
cdb9b9f7 466void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
1da177e4 467unsigned int pci_scan_child_bus(struct pci_bus *bus);
b19441af 468int __must_check pci_bus_add_device(struct pci_dev *dev);
1da177e4
LT		 469void pci_read_bridge_bases(struct pci_bus *child);
470struct resource *pci_find_parent_resource(const struct pci_dev *dev, struct resource *res);
471int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
472extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
473extern void pci_dev_put(struct pci_dev *dev);
474extern void pci_remove_bus(struct pci_bus *b);
475extern void pci_remove_bus_device(struct pci_dev *dev);
24f8aa9b 476extern void pci_stop_bus_device(struct pci_dev *dev);
b3743fa4 477void pci_setup_cardbus(struct pci_bus *bus);
6b4b78fe 478extern void pci_sort_breadthfirst(void);
1da177e4
LT		 479
480/* Generic PCI functions exported to card drivers */
481
429538ad 482struct pci_dev __deprecated *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *from);
adf809d0 483struct pci_dev __deprecated *pci_find_slot (unsigned int bus, unsigned int devfn);
1da177e4 484int pci_find_capability (struct pci_dev *dev, int cap);
24a4e377 485int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap);
3a720d72 486int pci_find_ext_capability (struct pci_dev *dev, int cap);
687d5fe3
ME		 487int pci_find_ht_capability (struct pci_dev *dev, int ht_cap);
488int pci_find_next_ht_capability (struct pci_dev *dev, int pos, int ht_cap);
29f3eb64 489struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
1da177e4 490
d42552c3
AM		 491struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
492 struct pci_dev *from);
493struct pci_dev *pci_get_device_reverse(unsigned int vendor, unsigned int device,
494 struct pci_dev *from);
495
1da177e4
LT		 496struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
497 unsigned int ss_vendor, unsigned int ss_device,
498 struct pci_dev *from);
499struct pci_dev *pci_get_slot (struct pci_bus *bus, unsigned int devfn);
29f3eb64 500struct pci_dev *pci_get_bus_and_slot (unsigned int bus, unsigned int devfn);
1da177e4
LT		 501struct pci_dev *pci_get_class (unsigned int class, struct pci_dev *from);
502int pci_dev_present(const struct pci_device_id *ids);
d86f90f9 503const struct pci_device_id *pci_find_present(const struct pci_device_id *ids);
1da177e4
LT		 504
505int pci_bus_read_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 *val);
506int pci_bus_read_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 *val);
507int pci_bus_read_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 *val);
508int pci_bus_write_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 val);
509int pci_bus_write_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 val);
510int pci_bus_write_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 val);
511
512static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
513{
514 return pci_bus_read_config_byte (dev->bus, dev->devfn, where, val);
515}
516static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
517{
518 return pci_bus_read_config_word (dev->bus, dev->devfn, where, val);
519}
520static inline int pci_read_config_dword(struct pci_dev *dev, int where, u32 *val)
521{
522 return pci_bus_read_config_dword (dev->bus, dev->devfn, where, val);
523}
524static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
525{
526 return pci_bus_write_config_byte (dev->bus, dev->devfn, where, val);
527}
528static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
529{
530 return pci_bus_write_config_word (dev->bus, dev->devfn, where, val);
531}
532static inline int pci_write_config_dword(struct pci_dev *dev, int where, u32 val)
533{
534 return pci_bus_write_config_dword (dev->bus, dev->devfn, where, val);
535}
536
4a7fb636
AM		 537int __must_check pci_enable_device(struct pci_dev *dev);
538int __must_check pci_enable_device_bars(struct pci_dev *dev, int mask);
0b62e13b 539int __must_check pci_reenable_device(struct pci_dev *);
9ac7849e
TH		 540int __must_check pcim_enable_device(struct pci_dev *pdev);
541void pcim_pin_device(struct pci_dev *pdev);
542
543static inline int pci_is_managed(struct pci_dev *pdev)
544{
545 return pdev->is_managed;
546}
547
1da177e4
LT		 548void pci_disable_device(struct pci_dev *dev);
549void pci_set_master(struct pci_dev *dev);
f7bdd12d 550int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
1da177e4 551#define HAVE_PCI_SET_MWI
4a7fb636 552int __must_check pci_set_mwi(struct pci_dev *dev);
694625c0 553int pci_try_set_mwi(struct pci_dev *dev);
1da177e4 554void pci_clear_mwi(struct pci_dev *dev);
a04ce0ff 555void pci_intx(struct pci_dev *dev, int enable);
f5f2b131 556void pci_msi_off(struct pci_dev *dev);
9c8550ee
LT		 557int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
558int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
d556ad4b
PO		 559int pcix_get_max_mmrbc(struct pci_dev *dev);
560int pcix_get_mmrbc(struct pci_dev *dev);
561int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
2637e5b5 562int pcie_get_readrq(struct pci_dev *dev);
d556ad4b 563int pcie_set_readrq(struct pci_dev *dev, int rq);
064b53db 564void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
4a7fb636
AM		 565int __must_check pci_assign_resource(struct pci_dev *dev, int i);
566int __must_check pci_assign_resource_fixed(struct pci_dev *dev, int i);
064b53db 567void pci_restore_bars(struct pci_dev *dev);
c87deff7 568int pci_select_bars(struct pci_dev *dev, unsigned long flags);
1da177e4
LT		 569
570/* ROM control related routines */
144a50ea
DJ		 571void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
572void __iomem __must_check *pci_map_rom_copy(struct pci_dev *pdev, size_t *size);
1da177e4
LT		 573void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
574void pci_remove_rom(struct pci_dev *pdev);
d7ad2254 575size_t pci_get_rom_size(void __iomem *rom, size_t size);
1da177e4
LT		 576
577/* Power management related routines */
578int pci_save_state(struct pci_dev *dev);
579int pci_restore_state(struct pci_dev *dev);
9c8550ee
LT		 580int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
581pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
582int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
1da177e4 583
ce5ccdef
KG		 584/* Functions for PCI Hotplug drivers to use */
585int pci_bus_find_capability (struct pci_bus *bus, unsigned int devfn, int cap);
586
1da177e4
LT		 587/* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
588void pci_bus_assign_resources(struct pci_bus *bus);
589void pci_bus_size_bridges(struct pci_bus *bus);
590int pci_claim_resource(struct pci_dev *, int);
591void pci_assign_unassigned_resources(void);
592void pdev_enable_device(struct pci_dev *);
593void pdev_sort_resources(struct pci_dev *, struct resource_list *);
594void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
595 int (*)(struct pci_dev *, u8, u8));
596#define HAVE_PCI_REQ_REGIONS 2
4a7fb636 597int __must_check pci_request_regions(struct pci_dev *, const char *);
1da177e4 598void pci_release_regions(struct pci_dev *);
4a7fb636 599int __must_check pci_request_region(struct pci_dev *, int, const char *);
1da177e4 600void pci_release_region(struct pci_dev *, int);
c87deff7
HS		 601int pci_request_selected_regions(struct pci_dev *, int, const char *);
602void pci_release_selected_regions(struct pci_dev *, int);
1da177e4
LT		 603
604/* drivers/pci/bus.c */
4a7fb636
AM		 605int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
606 struct resource *res, resource_size_t size,
607 resource_size_t align, resource_size_t min,
608 unsigned int type_mask,
609 void (*alignf)(void *, struct resource *,
610 resource_size_t, resource_size_t),
611 void *alignf_data);
1da177e4
LT		 612void pci_enable_bridges(struct pci_bus *bus);
613
863b18f4 614/* Proper probing supporting hot-pluggable devices */
725522b5
GKH		 615int __must_check __pci_register_driver(struct pci_driver *, struct module *,
616 const char *mod_name);
4a7fb636 617static inline int __must_check pci_register_driver(struct pci_driver *driver)
863b18f4 618{
725522b5 619 return __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME);
863b18f4
L		 620}
621
1da177e4
LT		 622void pci_unregister_driver(struct pci_driver *);
623void pci_remove_behind_bridge(struct pci_dev *);
624struct pci_driver *pci_dev_driver(const struct pci_dev *);
75865858
GKH		 625const struct pci_device_id *pci_match_device(struct pci_driver *drv, struct pci_dev *dev);
626const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev);
1da177e4
LT		 627int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass);
628
cecf4864
PM		 629void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
630 void *userdata);
ac7dc65a 631int pci_cfg_space_size(struct pci_dev *dev);
b82db5ce 632unsigned char pci_bus_max_busnr(struct pci_bus* bus);
cecf4864 633
1da177e4
LT		 634/* kmem_cache style wrapper around pci_alloc_consistent() */
635
636#include <linux/dmapool.h>
637
638#define pci_pool dma_pool
639#define pci_pool_create(name, pdev, size, align, allocation) \
640 dma_pool_create(name, &pdev->dev, size, align, allocation)
641#define pci_pool_destroy(pool) dma_pool_destroy(pool)
642#define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
643#define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
644
e24c2d96
DM		 645enum pci_dma_burst_strategy {
646 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
647 strategy_parameter is N/A */
648 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
649 byte boundaries */
650 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
651 strategy_parameter byte boundaries */
652};
653
1da177e4
LT		 654struct msix_entry {
655 u16 vector; /* kernel uses to write allocated vector */
656 u16 entry; /* driver uses to specify entry, OS writes */
657};
658
0366f8f7 659
1da177e4 660#ifndef CONFIG_PCI_MSI
1da177e4
LT		 661static inline int pci_enable_msi(struct pci_dev *dev) {return -1;}
662static inline void pci_disable_msi(struct pci_dev *dev) {}
663static inline int pci_enable_msix(struct pci_dev* dev,
664 struct msix_entry *entries, int nvec) {return -1;}
665static inline void pci_disable_msix(struct pci_dev *dev) {}
666static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
667#else
1da177e4
LT		 668extern int pci_enable_msi(struct pci_dev *dev);
669extern void pci_disable_msi(struct pci_dev *dev);
670extern int pci_enable_msix(struct pci_dev* dev,
671 struct msix_entry *entries, int nvec);
672extern void pci_disable_msix(struct pci_dev *dev);
673extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
674#endif
675
8b955b0d 676#ifdef CONFIG_HT_IRQ
8b955b0d
EB		 677/* The functions a driver should call */
678int ht_create_irq(struct pci_dev *dev, int idx);
679void ht_destroy_irq(unsigned int irq);
8b955b0d
EB		 680#endif /* CONFIG_HT_IRQ */
681
e04b0ea2
BK		 682extern void pci_block_user_cfg_access(struct pci_dev *dev);
683extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
684
4352dfd5
GKH		 685/*
686 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
687 * a PCI domain is defined to be a set of PCI busses which share
688 * configuration space.
689 */
32a2eea7
JG		 690#ifdef CONFIG_PCI_DOMAINS
691extern int pci_domains_supported;
692#else
693enum { pci_domains_supported = 0 };
4352dfd5
GKH		 694static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
695static inline int pci_proc_domain(struct pci_bus *bus)
696{
697 return 0;
698}
32a2eea7 699#endif /* CONFIG_PCI_DOMAINS */
1da177e4 700
4352dfd5 701#else /* CONFIG_PCI is not enabled */
1da177e4
LT		 702
703/*
704 * If the system does not have PCI, clearly these return errors. Define
705 * these as simple inline functions to avoid hair in drivers.
706 */
707
1da177e4
LT		 708#define _PCI_NOP(o,s,t) \
709 static inline int pci_##o##_config_##s (struct pci_dev *dev, int where, t val) \
710 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
711#define _PCI_NOP_ALL(o,x) _PCI_NOP(o,byte,u8 x) \
712 _PCI_NOP(o,word,u16 x) \
713 _PCI_NOP(o,dword,u32 x)
714_PCI_NOP_ALL(read, *)
715_PCI_NOP_ALL(write,)
716
717static inline struct pci_dev *pci_find_device(unsigned int vendor, unsigned int device, const struct pci_dev *from)
718{ return NULL; }
719
720static inline struct pci_dev *pci_find_slot(unsigned int bus, unsigned int devfn)
721{ return NULL; }
722
d42552c3
AM		 723static inline struct pci_dev *pci_get_device(unsigned int vendor,
724 unsigned int device, struct pci_dev *from)
725{ return NULL; }
726
727static inline struct pci_dev *pci_get_device_reverse(unsigned int vendor,
728 unsigned int device, struct pci_dev *from)
1da177e4
LT		 729{ return NULL; }
730
731static inline struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
732unsigned int ss_vendor, unsigned int ss_device, struct pci_dev *from)
733{ return NULL; }
734
735static inline struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from)
736{ return NULL; }
737
738#define pci_dev_present(ids) (0)
ed4aaadb 739#define no_pci_devices() (1)
d86f90f9 740#define pci_find_present(ids) (NULL)
1da177e4
LT		 741#define pci_dev_put(dev) do { } while (0)
742
743static inline void pci_set_master(struct pci_dev *dev) { }
744static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
745static inline void pci_disable_device(struct pci_dev *dev) { }
746static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; }
1da177e4 747static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;}
863b18f4 748static inline int __pci_register_driver(struct pci_driver *drv, struct module *owner) { return 0;}
1da177e4
LT		 749static inline int pci_register_driver(struct pci_driver *drv) { return 0;}
750static inline void pci_unregister_driver(struct pci_driver *drv) { }
751static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; }
24a4e377 752static inline int pci_find_next_capability (struct pci_dev *dev, u8 post, int cap) { return 0; }
3a720d72 753static inline int pci_find_ext_capability (struct pci_dev *dev, int cap) {return 0; }
1da177e4
LT		 754static inline const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev) { return NULL; }
755
756/* Power management related routines */
757static inline int pci_save_state(struct pci_dev *dev) { return 0; }
758static inline int pci_restore_state(struct pci_dev *dev) { return 0; }
759static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) { return 0; }
438510f6 760static inline pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) { return PCI_D0; }
1da177e4
LT		 761static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) { return 0; }
762
0da0ead9
SS		 763static inline int pci_request_regions(struct pci_dev *dev, const char *res_name) { return -EIO; }
764static inline void pci_release_regions(struct pci_dev *dev) { }
765
a46e8126
KG		 766#define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
767
e04b0ea2
BK		 768static inline void pci_block_user_cfg_access(struct pci_dev *dev) { }
769static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) { }
770
d80d0217
RD		 771static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
772{ return NULL; }
773
774static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
775 unsigned int devfn)
776{ return NULL; }
777
778static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
779 unsigned int devfn)
780{ return NULL; }
781
4352dfd5 782#endif /* CONFIG_PCI */
1da177e4 783
4352dfd5
GKH		 784/* Include architecture-dependent settings and functions */
785
786#include <asm/pci.h>
1da177e4
LT		 787
788/* these helpers provide future and backwards compatibility
789 * for accessing popular PCI BAR info */
790#define pci_resource_start(dev,bar) ((dev)->resource[(bar)].start)
791#define pci_resource_end(dev,bar) ((dev)->resource[(bar)].end)
792#define pci_resource_flags(dev,bar) ((dev)->resource[(bar)].flags)
793#define pci_resource_len(dev,bar) \
794 ((pci_resource_start((dev),(bar)) == 0 && \
795 pci_resource_end((dev),(bar)) == \
796 pci_resource_start((dev),(bar))) ? 0 : \
797 \
798 (pci_resource_end((dev),(bar)) - \
799 pci_resource_start((dev),(bar)) + 1))
800
801/* Similar to the helpers above, these manipulate per-pci_dev
802 * driver-specific data. They are really just a wrapper around
803 * the generic device structure functions of these calls.
804 */
805static inline void *pci_get_drvdata (struct pci_dev *pdev)
806{
807 return dev_get_drvdata(&pdev->dev);
808}
809
810static inline void pci_set_drvdata (struct pci_dev *pdev, void *data)
811{
812 dev_set_drvdata(&pdev->dev, data);
813}
814
815/* If you want to know what to call your pci_dev, ask this function.
816 * Again, it's a wrapper around the generic device.
817 */
818static inline char *pci_name(struct pci_dev *pdev)
819{
820 return pdev->dev.bus_id;
821}
822
2311b1f2
ME		 823
824/* Some archs don't want to expose struct resource to userland as-is
825 * in sysfs and /proc
826 */
827#ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
828static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
e31dd6e4
GKH		 829 const struct resource *rsrc, resource_size_t *start,
830 resource_size_t *end)
2311b1f2
ME		 831{
832 *start = rsrc->start;
833 *end = rsrc->end;
834}
835#endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
836
837
1da177e4
LT		 838/*
839 * The world is not perfect and supplies us with broken PCI devices.
840 * For at least a part of these bugs we need a work-around, so both
841 * generic (drivers/pci/quirks.c) and per-architecture code can define
842 * fixup hooks to be called for particular buggy devices.
843 */
844
845struct pci_fixup {
846 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
847 void (*hook)(struct pci_dev *dev);
848};
849
850enum pci_fixup_pass {
851 pci_fixup_early, /* Before probing BARs */
852 pci_fixup_header, /* After reading configuration header */
853 pci_fixup_final, /* Final phase of device fixups */
854 pci_fixup_enable, /* pci_enable_device() time */
1597cacb 855 pci_fixup_resume, /* pci_enable_device() time */
1da177e4
LT		 856};
857
858/* Anonymous variables would be nice... */
859#define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
74d863ee 860 static const struct pci_fixup __pci_fixup_##name __attribute_used__ \
1da177e4
LT		 861 __attribute__((__section__(#section))) = { vendor, device, hook };
862#define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
863 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
864 vendor##device##hook, vendor, device, hook)
865#define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
866 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
867 vendor##device##hook, vendor, device, hook)
868#define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
869 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
870 vendor##device##hook, vendor, device, hook)
871#define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
872 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
873 vendor##device##hook, vendor, device, hook)
1597cacb
AC		 874#define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
875 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
876 resume##vendor##device##hook, vendor, device, hook)
1da177e4
LT		 877
878
879void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
880
5ea81769
AV		 881void __iomem * pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
882void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
883void __iomem * const * pcim_iomap_table(struct pci_dev *pdev);
884int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name);
ec04b075 885void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask);
5ea81769 886
1da177e4 887extern int pci_pci_problems;
236561e5 888#define PCIPCI_FAIL 1 /* No PCI PCI DMA */
1da177e4
LT		 889#define PCIPCI_TRITON 2
890#define PCIPCI_NATOMA 4
891#define PCIPCI_VIAETBF 8
892#define PCIPCI_VSFX 16
236561e5
AC		 893#define PCIPCI_ALIMAGIK 32 /* Need low latency setting */
894#define PCIAGP_FAIL 64 /* No PCI to AGP DMA */
1da177e4 895
4516a618
AN		 896extern unsigned long pci_cardbus_io_size;
897extern unsigned long pci_cardbus_mem_size;
898
a2cd52ca 899extern int pcibios_add_platform_entries(struct pci_dev *dev);
575e3348 900
1da177e4
LT		 901#endif /* __KERNEL__ */
902#endif /* LINUX_PCI_H */
Linux 6.x block layer and io_uring tree(s)