Commit | Line | Data |
---|---|---|
c4a6a2ab LB |
1 | /* |
2 | * MV-643XX ethernet platform device data definition file. | |
3 | */ | |
fa3959f4 | 4 | |
c4a6a2ab LB |
5 | #ifndef __LINUX_MV643XX_ETH_H |
6 | #define __LINUX_MV643XX_ETH_H | |
7 | ||
f2ce825d LB |
8 | #include <linux/mbus.h> |
9 | ||
240e4419 LB |
10 | #define MV643XX_ETH_SHARED_NAME "mv643xx_eth" |
11 | #define MV643XX_ETH_NAME "mv643xx_eth_port" | |
c4a6a2ab LB |
12 | #define MV643XX_ETH_SHARED_REGS 0x2000 |
13 | #define MV643XX_ETH_SHARED_REGS_SIZE 0x2000 | |
3077d78a DF |
14 | #define MV643XX_ETH_BAR_4 0x2220 |
15 | #define MV643XX_ETH_SIZE_REG_4 0x2224 | |
16 | #define MV643XX_ETH_BASE_ADDR_ENABLE_REG 0x2290 | |
c4a6a2ab | 17 | |
58569aee APR |
18 | #define MV643XX_TX_CSUM_DEFAULT_LIMIT 0 |
19 | ||
f2ce825d LB |
20 | struct mv643xx_eth_shared_platform_data { |
21 | struct mbus_dram_target_info *dram; | |
fc0eb9f2 | 22 | struct platform_device *shared_smi; |
9b2c2ff7 SB |
23 | /* |
24 | * Max packet size for Tx IP/Layer 4 checksum, when set to 0, default | |
25 | * limit of 9KiB will be used. | |
26 | */ | |
27 | int tx_csum_limit; | |
f2ce825d LB |
28 | }; |
29 | ||
ac840605 LB |
30 | #define MV643XX_ETH_PHY_ADDR_DEFAULT 0 |
31 | #define MV643XX_ETH_PHY_ADDR(x) (0x80 | (x)) | |
32 | #define MV643XX_ETH_PHY_NONE 0xff | |
33 | ||
c4a6a2ab | 34 | struct mv643xx_eth_platform_data { |
fc32b0e2 LB |
35 | /* |
36 | * Pointer back to our parent instance, and our port number. | |
37 | */ | |
fa3959f4 | 38 | struct platform_device *shared; |
fc32b0e2 | 39 | int port_number; |
fa3959f4 | 40 | |
fc32b0e2 LB |
41 | /* |
42 | * Whether a PHY is present, and if yes, at which address. | |
43 | */ | |
fc32b0e2 | 44 | int phy_addr; |
ce4e2e45 | 45 | |
fc32b0e2 LB |
46 | /* |
47 | * Use this MAC address if it is valid, overriding the | |
48 | * address that is already in the hardware. | |
49 | */ | |
50 | u8 mac_addr[6]; | |
51 | ||
52 | /* | |
53 | * If speed is 0, autonegotiation is enabled. | |
54 | * Valid values for speed: 0, SPEED_10, SPEED_100, SPEED_1000. | |
55 | * Valid values for duplex: DUPLEX_HALF, DUPLEX_FULL. | |
56 | */ | |
57 | int speed; | |
58 | int duplex; | |
59 | ||
64da80a2 | 60 | /* |
f7981c1c | 61 | * How many RX/TX queues to use. |
64da80a2 | 62 | */ |
f7981c1c LB |
63 | int rx_queue_count; |
64 | int tx_queue_count; | |
64da80a2 | 65 | |
fc32b0e2 LB |
66 | /* |
67 | * Override default RX/TX queue sizes if nonzero. | |
68 | */ | |
69 | int rx_queue_size; | |
70 | int tx_queue_size; | |
71 | ||
72 | /* | |
73 | * Use on-chip SRAM for RX/TX descriptors if size is nonzero | |
74 | * and sufficient to contain all descriptors for the requested | |
75 | * ring sizes. | |
76 | */ | |
77 | unsigned long rx_sram_addr; | |
78 | int rx_sram_size; | |
79 | unsigned long tx_sram_addr; | |
80 | int tx_sram_size; | |
c4a6a2ab LB |
81 | }; |
82 | ||
fc32b0e2 LB |
83 | |
84 | #endif |