Commit | Line | Data |
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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
c4a6a2ab LB |
2 | /* |
3 | * MV-643XX ethernet platform device data definition file. | |
4 | */ | |
fa3959f4 | 5 | |
c4a6a2ab LB |
6 | #ifndef __LINUX_MV643XX_ETH_H |
7 | #define __LINUX_MV643XX_ETH_H | |
8 | ||
f2ce825d | 9 | #include <linux/mbus.h> |
574e2af7 | 10 | #include <linux/if_ether.h> |
d08cb255 | 11 | #include <linux/phy.h> |
f2ce825d | 12 | |
240e4419 LB |
13 | #define MV643XX_ETH_SHARED_NAME "mv643xx_eth" |
14 | #define MV643XX_ETH_NAME "mv643xx_eth_port" | |
c4a6a2ab LB |
15 | #define MV643XX_ETH_SHARED_REGS 0x2000 |
16 | #define MV643XX_ETH_SHARED_REGS_SIZE 0x2000 | |
3077d78a DF |
17 | #define MV643XX_ETH_BAR_4 0x2220 |
18 | #define MV643XX_ETH_SIZE_REG_4 0x2224 | |
19 | #define MV643XX_ETH_BASE_ADDR_ENABLE_REG 0x2290 | |
c4a6a2ab | 20 | |
58569aee APR |
21 | #define MV643XX_TX_CSUM_DEFAULT_LIMIT 0 |
22 | ||
f2ce825d LB |
23 | struct mv643xx_eth_shared_platform_data { |
24 | struct mbus_dram_target_info *dram; | |
9b2c2ff7 SB |
25 | /* |
26 | * Max packet size for Tx IP/Layer 4 checksum, when set to 0, default | |
27 | * limit of 9KiB will be used. | |
28 | */ | |
29 | int tx_csum_limit; | |
f2ce825d LB |
30 | }; |
31 | ||
ac840605 LB |
32 | #define MV643XX_ETH_PHY_ADDR_DEFAULT 0 |
33 | #define MV643XX_ETH_PHY_ADDR(x) (0x80 | (x)) | |
34 | #define MV643XX_ETH_PHY_NONE 0xff | |
35 | ||
5f292354 | 36 | struct device_node; |
c4a6a2ab | 37 | struct mv643xx_eth_platform_data { |
fc32b0e2 LB |
38 | /* |
39 | * Pointer back to our parent instance, and our port number. | |
40 | */ | |
fa3959f4 | 41 | struct platform_device *shared; |
fc32b0e2 | 42 | int port_number; |
fa3959f4 | 43 | |
fc32b0e2 LB |
44 | /* |
45 | * Whether a PHY is present, and if yes, at which address. | |
46 | */ | |
fc32b0e2 | 47 | int phy_addr; |
5f292354 | 48 | struct device_node *phy_node; |
ce4e2e45 | 49 | |
fc32b0e2 LB |
50 | /* |
51 | * Use this MAC address if it is valid, overriding the | |
52 | * address that is already in the hardware. | |
53 | */ | |
574e2af7 | 54 | u8 mac_addr[ETH_ALEN]; |
fc32b0e2 LB |
55 | |
56 | /* | |
57 | * If speed is 0, autonegotiation is enabled. | |
58 | * Valid values for speed: 0, SPEED_10, SPEED_100, SPEED_1000. | |
59 | * Valid values for duplex: DUPLEX_HALF, DUPLEX_FULL. | |
60 | */ | |
61 | int speed; | |
62 | int duplex; | |
d08cb255 | 63 | phy_interface_t interface; |
fc32b0e2 | 64 | |
64da80a2 | 65 | /* |
f7981c1c | 66 | * How many RX/TX queues to use. |
64da80a2 | 67 | */ |
f7981c1c LB |
68 | int rx_queue_count; |
69 | int tx_queue_count; | |
64da80a2 | 70 | |
fc32b0e2 LB |
71 | /* |
72 | * Override default RX/TX queue sizes if nonzero. | |
73 | */ | |
74 | int rx_queue_size; | |
75 | int tx_queue_size; | |
76 | ||
77 | /* | |
78 | * Use on-chip SRAM for RX/TX descriptors if size is nonzero | |
79 | * and sufficient to contain all descriptors for the requested | |
80 | * ring sizes. | |
81 | */ | |
82 | unsigned long rx_sram_addr; | |
83 | int rx_sram_size; | |
84 | unsigned long tx_sram_addr; | |
85 | int tx_sram_size; | |
c4a6a2ab LB |
86 | }; |
87 | ||
fc32b0e2 LB |
88 | |
89 | #endif |