Commit | Line | Data |
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3b7d1921 EB |
1 | #ifndef LINUX_MSI_H |
2 | #define LINUX_MSI_H | |
3 | ||
b50cac55 | 4 | #include <linux/kobject.h> |
4aa9bc95 ME |
5 | #include <linux/list.h> |
6 | ||
3b7d1921 EB |
7 | struct msi_msg { |
8 | u32 address_lo; /* low 32 bits of msi message address */ | |
9 | u32 address_hi; /* high 32 bits of msi message address */ | |
10 | u32 data; /* 16 bits of msi message data */ | |
11 | }; | |
12 | ||
38737d82 | 13 | extern int pci_msi_ignore_mask; |
c54c1879 | 14 | /* Helper functions */ |
1c9db525 | 15 | struct irq_data; |
39431acb | 16 | struct msi_desc; |
2366d06e | 17 | void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg); |
2366d06e | 18 | void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg); |
891d4a48 | 19 | |
3b7d1921 EB |
20 | struct msi_desc { |
21 | struct { | |
24d27553 | 22 | __u8 is_msix : 1; |
31ea5d4d YW |
23 | __u8 multiple: 3; /* log2 num of messages allocated */ |
24 | __u8 multi_cap : 3; /* log2 num of messages supported */ | |
f7625980 BH |
25 | __u8 maskbit : 1; /* mask-pending bit supported ? */ |
26 | __u8 is_64 : 1; /* Address size: 0=32bit 1=64bit */ | |
f7625980 BH |
27 | __u16 entry_nr; /* specific enabled entry */ |
28 | unsigned default_irq; /* default pre-assigned irq */ | |
f2440d9a | 29 | } msi_attrib; |
3b7d1921 | 30 | |
f2440d9a | 31 | u32 masked; /* mask bits */ |
4aa9bc95 | 32 | unsigned int irq; |
65f6ae66 | 33 | unsigned int nvec_used; /* number of messages */ |
4aa9bc95 | 34 | struct list_head list; |
3b7d1921 | 35 | |
264d9caa MW |
36 | union { |
37 | void __iomem *mask_base; | |
38 | u8 mask_pos; | |
39 | }; | |
3b7d1921 EB |
40 | struct pci_dev *dev; |
41 | ||
392ee1e6 EB |
42 | /* Last set MSI message */ |
43 | struct msi_msg msg; | |
3b7d1921 EB |
44 | }; |
45 | ||
d31eb342 JL |
46 | /* Helpers to hide struct msi_desc implementation details */ |
47 | #define msi_desc_to_dev(desc) (&(desc)->dev.dev) | |
48 | #define dev_to_msi_list(dev) (&to_pci_dev((dev))->msi_list) | |
49 | #define first_msi_entry(dev) \ | |
50 | list_first_entry(dev_to_msi_list((dev)), struct msi_desc, list) | |
51 | #define for_each_msi_entry(desc, dev) \ | |
52 | list_for_each_entry((desc), dev_to_msi_list((dev)), list) | |
53 | ||
54 | #ifdef CONFIG_PCI_MSI | |
55 | #define first_pci_msi_entry(pdev) first_msi_entry(&(pdev)->dev) | |
56 | #define for_each_pci_msi_entry(desc, pdev) \ | |
57 | for_each_msi_entry((desc), &(pdev)->dev) | |
58 | ||
59 | static inline struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc) | |
60 | { | |
61 | return desc->dev; | |
62 | } | |
c179c9b9 JL |
63 | |
64 | void *msi_desc_to_pci_sysdata(struct msi_desc *desc); | |
65 | #else /* CONFIG_PCI_MSI */ | |
66 | static inline void *msi_desc_to_pci_sysdata(struct msi_desc *desc) | |
67 | { | |
68 | return NULL; | |
69 | } | |
d31eb342 JL |
70 | #endif /* CONFIG_PCI_MSI */ |
71 | ||
891d4a48 | 72 | void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg); |
83a18912 JL |
73 | void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg); |
74 | void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg); | |
75 | ||
23ed8d57 TG |
76 | u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag); |
77 | u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag); | |
78 | void pci_msi_mask_irq(struct irq_data *data); | |
79 | void pci_msi_unmask_irq(struct irq_data *data); | |
80 | ||
83a18912 JL |
81 | /* Conversion helpers. Should be removed after merging */ |
82 | static inline void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg) | |
83 | { | |
84 | __pci_write_msi_msg(entry, msg); | |
85 | } | |
86 | static inline void write_msi_msg(int irq, struct msi_msg *msg) | |
87 | { | |
88 | pci_write_msi_msg(irq, msg); | |
89 | } | |
23ed8d57 TG |
90 | static inline void mask_msi_irq(struct irq_data *data) |
91 | { | |
92 | pci_msi_mask_irq(data); | |
93 | } | |
94 | static inline void unmask_msi_irq(struct irq_data *data) | |
95 | { | |
96 | pci_msi_unmask_irq(data); | |
97 | } | |
891d4a48 | 98 | |
3b7d1921 | 99 | /* |
4287d824 TP |
100 | * The arch hooks to setup up msi irqs. Those functions are |
101 | * implemented as weak symbols so that they /can/ be overriden by | |
102 | * architecture specific code if needed. | |
3b7d1921 | 103 | */ |
f7feaca7 | 104 | int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc); |
3b7d1921 | 105 | void arch_teardown_msi_irq(unsigned int irq); |
2366d06e BH |
106 | int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type); |
107 | void arch_teardown_msi_irqs(struct pci_dev *dev); | |
ac8344c4 | 108 | void arch_restore_msi_irqs(struct pci_dev *dev); |
4287d824 TP |
109 | |
110 | void default_teardown_msi_irqs(struct pci_dev *dev); | |
ac8344c4 | 111 | void default_restore_msi_irqs(struct pci_dev *dev); |
3b7d1921 | 112 | |
c2791b80 | 113 | struct msi_controller { |
0cbdcfcf TR |
114 | struct module *owner; |
115 | struct device *dev; | |
0d5a6db3 TP |
116 | struct device_node *of_node; |
117 | struct list_head list; | |
020c3126 MZ |
118 | #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN |
119 | struct irq_domain *domain; | |
120 | #endif | |
0cbdcfcf | 121 | |
c2791b80 | 122 | int (*setup_irq)(struct msi_controller *chip, struct pci_dev *dev, |
0cbdcfcf | 123 | struct msi_desc *desc); |
c2791b80 | 124 | void (*teardown_irq)(struct msi_controller *chip, unsigned int irq); |
0cbdcfcf TR |
125 | }; |
126 | ||
f3cf8bb0 | 127 | #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN |
d9109698 | 128 | |
aeeb5965 | 129 | #include <linux/irqhandler.h> |
d9109698 JL |
130 | #include <asm/msi.h> |
131 | ||
f3cf8bb0 JL |
132 | struct irq_domain; |
133 | struct irq_chip; | |
134 | struct device_node; | |
135 | struct msi_domain_info; | |
136 | ||
137 | /** | |
138 | * struct msi_domain_ops - MSI interrupt domain callbacks | |
139 | * @get_hwirq: Retrieve the resulting hw irq number | |
140 | * @msi_init: Domain specific init function for MSI interrupts | |
141 | * @msi_free: Domain specific function to free a MSI interrupts | |
d9109698 JL |
142 | * @msi_check: Callback for verification of the domain/info/dev data |
143 | * @msi_prepare: Prepare the allocation of the interrupts in the domain | |
144 | * @msi_finish: Optional callbacl to finalize the allocation | |
145 | * @set_desc: Set the msi descriptor for an interrupt | |
146 | * @handle_error: Optional error handler if the allocation fails | |
147 | * | |
148 | * @get_hwirq, @msi_init and @msi_free are callbacks used by | |
149 | * msi_create_irq_domain() and related interfaces | |
150 | * | |
151 | * @msi_check, @msi_prepare, @msi_finish, @set_desc and @handle_error | |
152 | * are callbacks used by msi_irq_domain_alloc_irqs() and related | |
153 | * interfaces which are based on msi_desc. | |
f3cf8bb0 JL |
154 | */ |
155 | struct msi_domain_ops { | |
aeeb5965 JL |
156 | irq_hw_number_t (*get_hwirq)(struct msi_domain_info *info, |
157 | msi_alloc_info_t *arg); | |
f3cf8bb0 JL |
158 | int (*msi_init)(struct irq_domain *domain, |
159 | struct msi_domain_info *info, | |
160 | unsigned int virq, irq_hw_number_t hwirq, | |
aeeb5965 | 161 | msi_alloc_info_t *arg); |
f3cf8bb0 JL |
162 | void (*msi_free)(struct irq_domain *domain, |
163 | struct msi_domain_info *info, | |
164 | unsigned int virq); | |
d9109698 JL |
165 | int (*msi_check)(struct irq_domain *domain, |
166 | struct msi_domain_info *info, | |
167 | struct device *dev); | |
168 | int (*msi_prepare)(struct irq_domain *domain, | |
169 | struct device *dev, int nvec, | |
170 | msi_alloc_info_t *arg); | |
171 | void (*msi_finish)(msi_alloc_info_t *arg, int retval); | |
172 | void (*set_desc)(msi_alloc_info_t *arg, | |
173 | struct msi_desc *desc); | |
174 | int (*handle_error)(struct irq_domain *domain, | |
175 | struct msi_desc *desc, int error); | |
f3cf8bb0 JL |
176 | }; |
177 | ||
178 | /** | |
179 | * struct msi_domain_info - MSI interrupt domain data | |
aeeb5965 JL |
180 | * @flags: Flags to decribe features and capabilities |
181 | * @ops: The callback data structure | |
182 | * @chip: Optional: associated interrupt chip | |
183 | * @chip_data: Optional: associated interrupt chip data | |
184 | * @handler: Optional: associated interrupt flow handler | |
185 | * @handler_data: Optional: associated interrupt flow handler data | |
186 | * @handler_name: Optional: associated interrupt flow handler name | |
187 | * @data: Optional: domain specific data | |
f3cf8bb0 JL |
188 | */ |
189 | struct msi_domain_info { | |
aeeb5965 | 190 | u32 flags; |
f3cf8bb0 JL |
191 | struct msi_domain_ops *ops; |
192 | struct irq_chip *chip; | |
aeeb5965 JL |
193 | void *chip_data; |
194 | irq_flow_handler_t handler; | |
195 | void *handler_data; | |
196 | const char *handler_name; | |
f3cf8bb0 JL |
197 | void *data; |
198 | }; | |
199 | ||
aeeb5965 JL |
200 | /* Flags for msi_domain_info */ |
201 | enum { | |
202 | /* | |
203 | * Init non implemented ops callbacks with default MSI domain | |
204 | * callbacks. | |
205 | */ | |
206 | MSI_FLAG_USE_DEF_DOM_OPS = (1 << 0), | |
207 | /* | |
208 | * Init non implemented chip callbacks with default MSI chip | |
209 | * callbacks. | |
210 | */ | |
211 | MSI_FLAG_USE_DEF_CHIP_OPS = (1 << 1), | |
212 | /* Build identity map between hwirq and irq */ | |
213 | MSI_FLAG_IDENTITY_MAP = (1 << 2), | |
214 | /* Support multiple PCI MSI interrupts */ | |
215 | MSI_FLAG_MULTI_PCI_MSI = (1 << 3), | |
216 | /* Support PCI MSIX interrupts */ | |
217 | MSI_FLAG_PCI_MSIX = (1 << 4), | |
218 | }; | |
219 | ||
f3cf8bb0 JL |
220 | int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask, |
221 | bool force); | |
222 | ||
223 | struct irq_domain *msi_create_irq_domain(struct device_node *of_node, | |
224 | struct msi_domain_info *info, | |
225 | struct irq_domain *parent); | |
d9109698 JL |
226 | int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, |
227 | int nvec); | |
228 | void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev); | |
f3cf8bb0 JL |
229 | struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain); |
230 | ||
231 | #endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */ | |
232 | ||
3878eaef JL |
233 | #ifdef CONFIG_PCI_MSI_IRQ_DOMAIN |
234 | void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg); | |
235 | struct irq_domain *pci_msi_create_irq_domain(struct device_node *node, | |
236 | struct msi_domain_info *info, | |
237 | struct irq_domain *parent); | |
238 | int pci_msi_domain_alloc_irqs(struct irq_domain *domain, struct pci_dev *dev, | |
239 | int nvec, int type); | |
240 | void pci_msi_domain_free_irqs(struct irq_domain *domain, struct pci_dev *dev); | |
8e047ada JL |
241 | struct irq_domain *pci_msi_create_default_irq_domain(struct device_node *node, |
242 | struct msi_domain_info *info, struct irq_domain *parent); | |
243 | ||
3878eaef JL |
244 | irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev, |
245 | struct msi_desc *desc); | |
246 | int pci_msi_domain_check_cap(struct irq_domain *domain, | |
247 | struct msi_domain_info *info, struct device *dev); | |
248 | #endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */ | |
249 | ||
3b7d1921 | 250 | #endif /* LINUX_MSI_H */ |