[linux-block.git] / include / linux / msi.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef LINUX_MSI_H
#define LINUX_MSI_H

/*
 * This header file contains MSI data structures and functions which are
 * only relevant for:
 *	- Interrupt core code
 *	- PCI/MSI core code
 *	- MSI interrupt domain implementations
 *	- IOMMU, low level VFIO, NTB and other justified exceptions
 *	  dealing with low level MSI details.
 *
 * Regular device drivers have no business with any of these functions and
 * especially storing MSI descriptor pointers in random code is considered
 * abuse. The only function which is relevant for drivers is msi_get_virq().
 */

#include <linux/cpumask.h>
#include <linux/xarray.h>
#include <linux/mutex.h>
#include <linux/list.h>
#include <asm/msi.h>

/* Dummy shadow structures if an architecture does not define them */
#ifndef arch_msi_msg_addr_lo
typedef struct arch_msi_msg_addr_lo {
	u32	address_lo;
} __attribute__ ((packed)) arch_msi_msg_addr_lo_t;
#endif

#ifndef arch_msi_msg_addr_hi
typedef struct arch_msi_msg_addr_hi {
	u32	address_hi;
} __attribute__ ((packed)) arch_msi_msg_addr_hi_t;
#endif

#ifndef arch_msi_msg_data
typedef struct arch_msi_msg_data {
	u32	data;
} __attribute__ ((packed)) arch_msi_msg_data_t;
#endif

/**
 * msi_msg - Representation of a MSI message
 * @address_lo:		Low 32 bits of msi message address
 * @arch_addrlo:	Architecture specific shadow of @address_lo
 * @address_hi:		High 32 bits of msi message address
 *			(only used when device supports it)
 * @arch_addrhi:	Architecture specific shadow of @address_hi
 * @data:		MSI message data (usually 16 bits)
 * @arch_data:		Architecture specific shadow of @data
 */
struct msi_msg {
	union {
		u32			address_lo;
		arch_msi_msg_addr_lo_t	arch_addr_lo;
	};
	union {
		u32			address_hi;
		arch_msi_msg_addr_hi_t	arch_addr_hi;
	};
	union {
		u32			data;
		arch_msi_msg_data_t	arch_data;
	};
};

extern int pci_msi_ignore_mask;
/* Helper functions */
struct irq_data;
struct msi_desc;
struct pci_dev;
struct platform_msi_priv_data;
struct device_attribute;

void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
#ifdef CONFIG_GENERIC_MSI_IRQ
void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
#else
static inline void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
{
}
#endif

typedef void (*irq_write_msi_msg_t)(struct msi_desc *desc,
				    struct msi_msg *msg);

/**
 * pci_msi_desc - PCI/MSI specific MSI descriptor data
 *
 * @msi_mask:	[PCI MSI]   MSI cached mask bits
 * @msix_ctrl:	[PCI MSI-X] MSI-X cached per vector control bits
 * @is_msix:	[PCI MSI/X] True if MSI-X
 * @multiple:	[PCI MSI/X] log2 num of messages allocated
 * @multi_cap:	[PCI MSI/X] log2 num of messages supported
 * @can_mask:	[PCI MSI/X] Masking supported?
 * @is_64:	[PCI MSI/X] Address size: 0=32bit 1=64bit
 * @default_irq:[PCI MSI/X] The default pre-assigned non-MSI irq
 * @mask_pos:	[PCI MSI]   Mask register position
 * @mask_base:	[PCI MSI-X] Mask register base address
 */
struct pci_msi_desc {
	union {
		u32 msi_mask;
		u32 msix_ctrl;
	};
	struct {
		u8	is_msix		: 1;
		u8	multiple	: 3;
		u8	multi_cap	: 3;
		u8	can_mask	: 1;
		u8	is_64		: 1;
		u8	is_virtual	: 1;
		unsigned default_irq;
	} msi_attrib;
	union {
		u8	mask_pos;
		void __iomem *mask_base;
	};
};

#define MSI_MAX_INDEX		((unsigned int)USHRT_MAX)

/**
 * struct msi_desc - Descriptor structure for MSI based interrupts
 * @irq:	The base interrupt number
 * @nvec_used:	The number of vectors used
 * @dev:	Pointer to the device which uses this descriptor
 * @msg:	The last set MSI message cached for reuse
 * @affinity:	Optional pointer to a cpu affinity mask for this descriptor
 * @sysfs_attr:	Pointer to sysfs device attribute
 *
 * @write_msi_msg:	Callback that may be called when the MSI message
 *			address or data changes
 * @write_msi_msg_data:	Data parameter for the callback.
 *
 * @msi_index:	Index of the msi descriptor
 * @pci:	PCI specific msi descriptor data
 */
struct msi_desc {
	/* Shared device/bus type independent data */
	unsigned int			irq;
	unsigned int			nvec_used;
	struct device			*dev;
	struct msi_msg			msg;
	struct irq_affinity_desc	*affinity;
#ifdef CONFIG_IRQ_MSI_IOMMU
	const void			*iommu_cookie;
#endif
#ifdef CONFIG_SYSFS
	struct device_attribute		*sysfs_attrs;
#endif

	void (*write_msi_msg)(struct msi_desc *entry, void *data);
	void *write_msi_msg_data;

	u16				msi_index;
	struct pci_msi_desc		pci;
};

/*
 * Filter values for the MSI descriptor iterators and accessor functions.
 */
enum msi_desc_filter {
	/* All descriptors */
	MSI_DESC_ALL,
	/* Descriptors which have no interrupt associated */
	MSI_DESC_NOTASSOCIATED,
	/* Descriptors which have an interrupt associated */
	MSI_DESC_ASSOCIATED,
};

/**
 * msi_device_data - MSI per device data
 * @properties:		MSI properties which are interesting to drivers
 * @platform_data:	Platform-MSI specific data
 * @mutex:		Mutex protecting the MSI descriptor store
 * @__store:		Xarray for storing MSI descriptor pointers
 * @__iter_idx:		Index to search the next entry for iterators
 */
struct msi_device_data {
	unsigned long			properties;
	struct platform_msi_priv_data	*platform_data;
	struct mutex			mutex;
	struct xarray			__store;
	unsigned long			__iter_idx;
};

int msi_setup_device_data(struct device *dev);

unsigned int msi_get_virq(struct device *dev, unsigned int index);
void msi_lock_descs(struct device *dev);
void msi_unlock_descs(struct device *dev);

struct msi_desc *msi_first_desc(struct device *dev, enum msi_desc_filter filter);
struct msi_desc *msi_next_desc(struct device *dev, enum msi_desc_filter filter);

/**
 * msi_for_each_desc - Iterate the MSI descriptors
 *
 * @desc:	struct msi_desc pointer used as iterator
 * @dev:	struct device pointer - device to iterate
 * @filter:	Filter for descriptor selection
 *
 * Notes:
 *  - The loop must be protected with a msi_lock_descs()/msi_unlock_descs()
 *    pair.
 *  - It is safe to remove a retrieved MSI descriptor in the loop.
 */
#define msi_for_each_desc(desc, dev, filter)			\
	for ((desc) = msi_first_desc((dev), (filter)); (desc);	\
	     (desc) = msi_next_desc((dev), (filter)))

#define msi_desc_to_dev(desc)		((desc)->dev)

#ifdef CONFIG_IRQ_MSI_IOMMU
static inline const void *msi_desc_get_iommu_cookie(struct msi_desc *desc)
{
	return desc->iommu_cookie;
}

static inline void msi_desc_set_iommu_cookie(struct msi_desc *desc,
					     const void *iommu_cookie)
{
	desc->iommu_cookie = iommu_cookie;
}
#else
static inline const void *msi_desc_get_iommu_cookie(struct msi_desc *desc)
{
	return NULL;
}

static inline void msi_desc_set_iommu_cookie(struct msi_desc *desc,
					     const void *iommu_cookie)
{
}
#endif

#ifdef CONFIG_PCI_MSI
struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc);
void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg);
#else /* CONFIG_PCI_MSI */
static inline void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg)
{
}
#endif /* CONFIG_PCI_MSI */

int msi_add_msi_desc(struct device *dev, struct msi_desc *init_desc);
void msi_free_msi_descs_range(struct device *dev, unsigned int first_index, unsigned int last_index);

/**
 * msi_free_msi_descs - Free MSI descriptors of a device
 * @dev:	Device to free the descriptors
 */
static inline void msi_free_msi_descs(struct device *dev)
{
	msi_free_msi_descs_range(dev, 0, MSI_MAX_INDEX);
}

void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);

void pci_msi_mask_irq(struct irq_data *data);
void pci_msi_unmask_irq(struct irq_data *data);

/*
 * The arch hooks to setup up msi irqs. Default functions are implemented
 * as weak symbols so that they /can/ be overriden by architecture specific
 * code if needed. These hooks can only be enabled by the architecture.
 *
 * If CONFIG_PCI_MSI_ARCH_FALLBACKS is not selected they are replaced by
 * stubs with warnings.
 */
#ifdef CONFIG_PCI_MSI_ARCH_FALLBACKS
int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
void arch_teardown_msi_irq(unsigned int irq);
int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
void arch_teardown_msi_irqs(struct pci_dev *dev);
#ifdef CONFIG_SYSFS
int msi_device_populate_sysfs(struct device *dev);
void msi_device_destroy_sysfs(struct device *dev);
#else /* CONFIG_SYSFS */
static inline int msi_device_populate_sysfs(struct device *dev) { return 0; }
static inline void msi_device_destroy_sysfs(struct device *dev) { }
#endif /* !CONFIG_SYSFS */
#endif /* CONFIG_PCI_MSI_ARCH_FALLBACKS */

/*
 * The restore hook is still available even for fully irq domain based
 * setups. Courtesy to XEN/X86.
 */
bool arch_restore_msi_irqs(struct pci_dev *dev);

#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN

#include <linux/irqhandler.h>

struct irq_domain;
struct irq_domain_ops;
struct irq_chip;
struct device_node;
struct fwnode_handle;
struct msi_domain_info;

/**
 * struct msi_domain_ops - MSI interrupt domain callbacks
 * @get_hwirq:		Retrieve the resulting hw irq number
 * @msi_init:		Domain specific init function for MSI interrupts
 * @msi_free:		Domain specific function to free a MSI interrupts
 * @msi_check:		Callback for verification of the domain/info/dev data
 * @msi_prepare:	Prepare the allocation of the interrupts in the domain
 * @set_desc:		Set the msi descriptor for an interrupt
 * @domain_alloc_irqs:	Optional function to override the default allocation
 *			function.
 * @domain_free_irqs:	Optional function to override the default free
 *			function.
 * @msi_post_free:	Optional function which is invoked after freeing
 *			all interrupts.
 *
 * @get_hwirq, @msi_init and @msi_free are callbacks used by the underlying
 * irqdomain.
 *
 * @msi_check, @msi_prepare and @set_desc are callbacks used by
 * msi_domain_alloc/free_irqs().
 *
 * @domain_alloc_irqs, @domain_free_irqs can be used to override the
 * default allocation/free functions (__msi_domain_alloc/free_irqs). This
 * is initially for a wrapper around XENs seperate MSI universe which can't
 * be wrapped into the regular irq domains concepts by mere mortals.  This
 * allows to universally use msi_domain_alloc/free_irqs without having to
 * special case XEN all over the place.
 *
 * Contrary to other operations @domain_alloc_irqs and @domain_free_irqs
 * are set to the default implementation if NULL and even when
 * MSI_FLAG_USE_DEF_DOM_OPS is not set to avoid breaking existing users and
 * because these callbacks are obviously mandatory.
 */
struct msi_domain_ops {
	irq_hw_number_t	(*get_hwirq)(struct msi_domain_info *info,
				     msi_alloc_info_t *arg);
	int		(*msi_init)(struct irq_domain *domain,
				    struct msi_domain_info *info,
				    unsigned int virq, irq_hw_number_t hwirq,
				    msi_alloc_info_t *arg);
	void		(*msi_free)(struct irq_domain *domain,
				    struct msi_domain_info *info,
				    unsigned int virq);
	int		(*msi_check)(struct irq_domain *domain,
				     struct msi_domain_info *info,
				     struct device *dev);
	int		(*msi_prepare)(struct irq_domain *domain,
				       struct device *dev, int nvec,
				       msi_alloc_info_t *arg);
	void		(*set_desc)(msi_alloc_info_t *arg,
				    struct msi_desc *desc);
	int		(*domain_alloc_irqs)(struct irq_domain *domain,
					     struct device *dev, int nvec);
	void		(*domain_free_irqs)(struct irq_domain *domain,
					    struct device *dev);
	void		(*msi_post_free)(struct irq_domain *domain,
					 struct device *dev);
};

/**
 * struct msi_domain_info - MSI interrupt domain data
 * @flags:		Flags to decribe features and capabilities
 * @ops:		The callback data structure
 * @chip:		Optional: associated interrupt chip
 * @chip_data:		Optional: associated interrupt chip data
 * @handler:		Optional: associated interrupt flow handler
 * @handler_data:	Optional: associated interrupt flow handler data
 * @handler_name:	Optional: associated interrupt flow handler name
 * @data:		Optional: domain specific data
 */
struct msi_domain_info {
	u32			flags;
	struct msi_domain_ops	*ops;
	struct irq_chip		*chip;
	void			*chip_data;
	irq_flow_handler_t	handler;
	void			*handler_data;
	const char		*handler_name;
	void			*data;
};

/* Flags for msi_domain_info */
enum {
	/*
	 * Init non implemented ops callbacks with default MSI domain
	 * callbacks.
	 */
	MSI_FLAG_USE_DEF_DOM_OPS	= (1 << 0),
	/*
	 * Init non implemented chip callbacks with default MSI chip
	 * callbacks.
	 */
	MSI_FLAG_USE_DEF_CHIP_OPS	= (1 << 1),
	/* Support multiple PCI MSI interrupts */
	MSI_FLAG_MULTI_PCI_MSI		= (1 << 2),
	/* Support PCI MSIX interrupts */
	MSI_FLAG_PCI_MSIX		= (1 << 3),
	/* Needs early activate, required for PCI */
	MSI_FLAG_ACTIVATE_EARLY		= (1 << 4),
	/*
	 * Must reactivate when irq is started even when
	 * MSI_FLAG_ACTIVATE_EARLY has been set.
	 */
	MSI_FLAG_MUST_REACTIVATE	= (1 << 5),
	/* Is level-triggered capable, using two messages */
	MSI_FLAG_LEVEL_CAPABLE		= (1 << 6),
	/* Populate sysfs on alloc() and destroy it on free() */
	MSI_FLAG_DEV_SYSFS		= (1 << 7),
	/* MSI-X entries must be contiguous */
	MSI_FLAG_MSIX_CONTIGUOUS	= (1 << 8),
	/* Allocate simple MSI descriptors */
	MSI_FLAG_ALLOC_SIMPLE_MSI_DESCS	= (1 << 9),
	/* Free MSI descriptors */
	MSI_FLAG_FREE_MSI_DESCS		= (1 << 10),
};

int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask,
			    bool force);

struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode,
					 struct msi_domain_info *info,
					 struct irq_domain *parent);
int msi_domain_alloc_irqs_descs_locked(struct irq_domain *domain, struct device *dev,
				       int nvec);
int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
			  int nvec);
void msi_domain_free_irqs_descs_locked(struct irq_domain *domain, struct device *dev);
void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev);
struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain);

struct irq_domain *platform_msi_create_irq_domain(struct fwnode_handle *fwnode,
						  struct msi_domain_info *info,
						  struct irq_domain *parent);
int platform_msi_domain_alloc_irqs(struct device *dev, unsigned int nvec,
				   irq_write_msi_msg_t write_msi_msg);
void platform_msi_domain_free_irqs(struct device *dev);

/* When an MSI domain is used as an intermediate domain */
int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev,
			    int nvec, msi_alloc_info_t *args);
int msi_domain_populate_irqs(struct irq_domain *domain, struct device *dev,
			     int virq, int nvec, msi_alloc_info_t *args);
struct irq_domain *
__platform_msi_create_device_domain(struct device *dev,
				    unsigned int nvec,
				    bool is_tree,
				    irq_write_msi_msg_t write_msi_msg,
				    const struct irq_domain_ops *ops,
				    void *host_data);

#define platform_msi_create_device_domain(dev, nvec, write, ops, data)	\
	__platform_msi_create_device_domain(dev, nvec, false, write, ops, data)
#define platform_msi_create_device_tree_domain(dev, nvec, write, ops, data) \
	__platform_msi_create_device_domain(dev, nvec, true, write, ops, data)

int platform_msi_device_domain_alloc(struct irq_domain *domain, unsigned int virq,
				     unsigned int nr_irqs);
void platform_msi_device_domain_free(struct irq_domain *domain, unsigned int virq,
				     unsigned int nvec);
void *platform_msi_get_host_data(struct irq_domain *domain);
#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */

#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
					     struct msi_domain_info *info,
					     struct irq_domain *parent);
u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev);
struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev);
bool pci_dev_has_special_msi_domain(struct pci_dev *pdev);
#else
static inline struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev)
{
	return NULL;
}
#endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */

#endif /* LINUX_MSI_H */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
3b7d1921 EB	2	#ifndef LINUX_MSI_H
	3	#define LINUX_MSI_H
	4
ef3350c5 TG	5	/*
	6	* This header file contains MSI data structures and functions which are
	7	* only relevant for:
	8	* - Interrupt core code
	9	* - PCI/MSI core code
	10	* - MSI interrupt domain implementations
	11	* - IOMMU, low level VFIO, NTB and other justified exceptions
	12	* dealing with low level MSI details.
	13	*
	14	* Regular device drivers have no business with any of these functions and
	15	* especially storing MSI descriptor pointers in random code is considered
	16	* abuse. The only function which is relevant for drivers is msi_get_virq().
	17	*/
	18
3ba1f050	19	#include <linux/cpumask.h>
cd6cf065	20	#include <linux/xarray.h>
b5f687f9	21	#include <linux/mutex.h>
4aa9bc95	22	#include <linux/list.h>
8073c1ac TG	23	#include <asm/msi.h>
	24
	25	/* Dummy shadow structures if an architecture does not define them */
	26	#ifndef arch_msi_msg_addr_lo
	27	typedef struct arch_msi_msg_addr_lo {
	28	u32 address_lo;
	29	} __attribute__ ((packed)) arch_msi_msg_addr_lo_t;
	30	#endif
	31
	32	#ifndef arch_msi_msg_addr_hi
	33	typedef struct arch_msi_msg_addr_hi {
	34	u32 address_hi;
	35	} __attribute__ ((packed)) arch_msi_msg_addr_hi_t;
	36	#endif
	37
	38	#ifndef arch_msi_msg_data
	39	typedef struct arch_msi_msg_data {
	40	u32 data;
	41	} __attribute__ ((packed)) arch_msi_msg_data_t;
	42	#endif
4aa9bc95	43
8073c1ac TG	44	/**
	45	* msi_msg - Representation of a MSI message
	46	* @address_lo: Low 32 bits of msi message address
	47	* @arch_addrlo: Architecture specific shadow of @address_lo
	48	* @address_hi: High 32 bits of msi message address
	49	* (only used when device supports it)
	50	* @arch_addrhi: Architecture specific shadow of @address_hi
	51	* @data: MSI message data (usually 16 bits)
	52	* @arch_data: Architecture specific shadow of @data
	53	*/
3b7d1921	54	struct msi_msg {
8073c1ac TG	55	union {
	56	u32 address_lo;
	57	arch_msi_msg_addr_lo_t arch_addr_lo;
	58	};
	59	union {
	60	u32 address_hi;
	61	arch_msi_msg_addr_hi_t arch_addr_hi;
	62	};
	63	union {
	64	u32 data;
	65	arch_msi_msg_data_t arch_data;
	66	};
3b7d1921 EB	67	};
3b7d1921 EB	68
38737d82	69	extern int pci_msi_ignore_mask;
c54c1879	70	/* Helper functions */
1c9db525	71	struct irq_data;
39431acb	72	struct msi_desc;
25a98bd4	73	struct pci_dev;
c09fcc4b	74	struct platform_msi_priv_data;
bf5e758f	75	struct device_attribute;
bf6e054e	76
2366d06e	77	void __get_cached_msi_msg(struct msi_desc entry, struct msi_msg msg);
2f44e29c	78	#ifdef CONFIG_GENERIC_MSI_IRQ
2366d06e	79	void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
2f44e29c AB	80	#else
	81	static inline void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
	82	{
	83	}
	84	#endif
891d4a48	85
c09fcc4b MZ	86	typedef void (irq_write_msi_msg_t)(struct msi_desc desc,
	87	struct msi_msg *msg);
	88
e58f2259 TG	89	/**
	90	* pci_msi_desc - PCI/MSI specific MSI descriptor data
	91	*
	92	* @msi_mask: [PCI MSI] MSI cached mask bits
	93	* @msix_ctrl: [PCI MSI-X] MSI-X cached per vector control bits
	94	* @is_msix: [PCI MSI/X] True if MSI-X
	95	* @multiple: [PCI MSI/X] log2 num of messages allocated
	96	* @multi_cap: [PCI MSI/X] log2 num of messages supported
	97	* @can_mask: [PCI MSI/X] Masking supported?
	98	* @is_64: [PCI MSI/X] Address size: 0=32bit 1=64bit
e58f2259 TG	99	* @default_irq:[PCI MSI/X] The default pre-assigned non-MSI irq
	100	* @mask_pos: [PCI MSI] Mask register position
	101	* @mask_base: [PCI MSI-X] Mask register base address
	102	*/
	103	struct pci_msi_desc {
	104	union {
	105	u32 msi_mask;
	106	u32 msix_ctrl;
	107	};
	108	struct {
	109	u8 is_msix : 1;
	110	u8 multiple : 3;
	111	u8 multi_cap : 3;
	112	u8 can_mask : 1;
	113	u8 is_64 : 1;
	114	u8 is_virtual : 1;
e58f2259 TG	115	unsigned default_irq;
	116	} msi_attrib;
	117	union {
	118	u8 mask_pos;
	119	void __iomem *mask_base;
	120	};
	121	};
	122
645474e2 TG	123	#define MSI_MAX_INDEX ((unsigned int)USHRT_MAX)
645474e2 TG	124
fc88419c JL	125	/**
fc88419c JL	126	* struct msi_desc - Descriptor structure for MSI based interrupts
fc88419c JL	127	* @irq: The base interrupt number
	128	* @nvec_used: The number of vectors used
	129	* @dev: Pointer to the device which uses this descriptor
	130	* @msg: The last set MSI message cached for reuse
0972fa57	131	* @affinity: Optional pointer to a cpu affinity mask for this descriptor
bf5e758f	132	* @sysfs_attr: Pointer to sysfs device attribute
fc88419c	133	*
d7cc609f LG	134	* @write_msi_msg: Callback that may be called when the MSI message
	135	* address or data changes
	136	* @write_msi_msg_data: Data parameter for the callback.
	137	*
20c6d424	138	* @msi_index: Index of the msi descriptor
0f180958	139	* @pci: PCI specific msi descriptor data
fc88419c	140	*/
3b7d1921	141	struct msi_desc {
fc88419c	142	/* Shared device/bus type independent data */
fc88419c JL	143	unsigned int irq;
	144	unsigned int nvec_used;
	145	struct device *dev;
	146	struct msi_msg msg;
bec04037	147	struct irq_affinity_desc *affinity;
aaebdf8d JG	148	#ifdef CONFIG_IRQ_MSI_IOMMU
	149	const void *iommu_cookie;
	150	#endif
bf5e758f TG	151	#ifdef CONFIG_SYSFS
	152	struct device_attribute *sysfs_attrs;
	153	#endif
3b7d1921	154
d7cc609f LG	155	void (write_msi_msg)(struct msi_desc entry, void *data);
	156	void *write_msi_msg_data;
	157
20c6d424	158	u16 msi_index;
0f180958	159	struct pci_msi_desc pci;
3b7d1921 EB	160	};
3b7d1921 EB	161
1046f71d TG	162	/*
	163	* Filter values for the MSI descriptor iterators and accessor functions.
	164	*/
	165	enum msi_desc_filter {
	166	/* All descriptors */
	167	MSI_DESC_ALL,
	168	/* Descriptors which have no interrupt associated */
	169	MSI_DESC_NOTASSOCIATED,
	170	/* Descriptors which have an interrupt associated */
	171	MSI_DESC_ASSOCIATED,
	172	};
	173
013bd8e5 TG	174	/**
	175	* msi_device_data - MSI per device data
	176	* @properties: MSI properties which are interesting to drivers
fc22e7db	177	* @platform_data: Platform-MSI specific data
cd6cf065 TG	178	* @mutex: Mutex protecting the MSI descriptor store
	179	* @__store: Xarray for storing MSI descriptor pointers
	180	* @__iter_idx: Index to search the next entry for iterators
013bd8e5 TG	181	*/
	182	struct msi_device_data {
	183	unsigned long properties;
fc22e7db	184	struct platform_msi_priv_data *platform_data;
b5f687f9	185	struct mutex mutex;
cd6cf065 TG	186	struct xarray __store;
cd6cf065 TG	187	unsigned long __iter_idx;
013bd8e5 TG	188	};
	189
	190	int msi_setup_device_data(struct device *dev);
	191
cf15f43a	192	unsigned int msi_get_virq(struct device *dev, unsigned int index);
b5f687f9 TG	193	void msi_lock_descs(struct device *dev);
b5f687f9 TG	194	void msi_unlock_descs(struct device *dev);
cf15f43a	195
1046f71d TG	196	struct msi_desc msi_first_desc(struct device dev, enum msi_desc_filter filter);
	197	struct msi_desc msi_next_desc(struct device dev, enum msi_desc_filter filter);
	198
	199	/**
	200	* msi_for_each_desc - Iterate the MSI descriptors
	201	*
	202	* @desc: struct msi_desc pointer used as iterator
	203	* @dev: struct device pointer - device to iterate
	204	* @filter: Filter for descriptor selection
	205	*
	206	* Notes:
	207	* - The loop must be protected with a msi_lock_descs()/msi_unlock_descs()
	208	* pair.
	209	* - It is safe to remove a retrieved MSI descriptor in the loop.
	210	*/
	211	#define msi_for_each_desc(desc, dev, filter) \
	212	for ((desc) = msi_first_desc((dev), (filter)); (desc); \
	213	(desc) = msi_next_desc((dev), (filter)))
	214
25a98bd4	215	#define msi_desc_to_dev(desc) ((desc)->dev)
d31eb342	216
aaebdf8d JG	217	#ifdef CONFIG_IRQ_MSI_IOMMU
	218	static inline const void msi_desc_get_iommu_cookie(struct msi_desc desc)
	219	{
	220	return desc->iommu_cookie;
	221	}
	222
	223	static inline void msi_desc_set_iommu_cookie(struct msi_desc *desc,
	224	const void *iommu_cookie)
	225	{
	226	desc->iommu_cookie = iommu_cookie;
	227	}
	228	#else
	229	static inline const void msi_desc_get_iommu_cookie(struct msi_desc desc)
	230	{
	231	return NULL;
	232	}
	233
	234	static inline void msi_desc_set_iommu_cookie(struct msi_desc *desc,
	235	const void *iommu_cookie)
	236	{
	237	}
	238	#endif
	239
d31eb342	240	#ifdef CONFIG_PCI_MSI
25a98bd4	241	struct pci_dev msi_desc_to_pci_dev(struct msi_desc desc);
2f44e29c	242	void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg);
c179c9b9	243	#else /* CONFIG_PCI_MSI */
2f44e29c AB	244	static inline void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg)
	245	{
	246	}
d31eb342 JL	247	#endif /* CONFIG_PCI_MSI */
d31eb342 JL	248
60290525	249	int msi_add_msi_desc(struct device dev, struct msi_desc init_desc);
2f2940d1	250	void msi_free_msi_descs_range(struct device *dev, unsigned int first_index, unsigned int last_index);
645474e2 TG	251
	252	/**
	253	* msi_free_msi_descs - Free MSI descriptors of a device
	254	* @dev: Device to free the descriptors
	255	*/
	256	static inline void msi_free_msi_descs(struct device *dev)
	257	{
2f2940d1	258	msi_free_msi_descs_range(dev, 0, MSI_MAX_INDEX);
645474e2	259	}
60290525	260
891d4a48	261	void __pci_read_msi_msg(struct msi_desc entry, struct msi_msg msg);
83a18912	262	void __pci_write_msi_msg(struct msi_desc entry, struct msi_msg msg);
83a18912	263
23ed8d57 TG	264	void pci_msi_mask_irq(struct irq_data *data);
	265	void pci_msi_unmask_irq(struct irq_data *data);
	266
3b7d1921	267	/*
077ee78e TG	268	* The arch hooks to setup up msi irqs. Default functions are implemented
077ee78e TG	269	* as weak symbols so that they /can/ be overriden by architecture specific
b227be0d	270	* code if needed. These hooks can only be enabled by the architecture.
077ee78e TG	271	*
	272	* If CONFIG_PCI_MSI_ARCH_FALLBACKS is not selected they are replaced by
	273	* stubs with warnings.
3b7d1921	274	*/
077ee78e	275	#ifdef CONFIG_PCI_MSI_ARCH_FALLBACKS
f7feaca7	276	int arch_setup_msi_irq(struct pci_dev dev, struct msi_desc desc);
3b7d1921	277	void arch_teardown_msi_irq(unsigned int irq);
2366d06e BH	278	int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
2366d06e BH	279	void arch_teardown_msi_irqs(struct pci_dev *dev);
bf5e758f TG	280	#ifdef CONFIG_SYSFS
	281	int msi_device_populate_sysfs(struct device *dev);
	282	void msi_device_destroy_sysfs(struct device *dev);
	283	#else /* CONFIG_SYSFS */
	284	static inline int msi_device_populate_sysfs(struct device *dev) { return 0; }
	285	static inline void msi_device_destroy_sysfs(struct device *dev) { }
	286	#endif /* !CONFIG_SYSFS */
24cff375	287	#endif /* CONFIG_PCI_MSI_ARCH_FALLBACKS */
077ee78e TG	288
077ee78e TG	289	/*
ae72f315 TG	290	* The restore hook is still available even for fully irq domain based
ae72f315 TG	291	* setups. Courtesy to XEN/X86.
077ee78e	292	*/
ae72f315	293	bool arch_restore_msi_irqs(struct pci_dev *dev);
3b7d1921	294
f3cf8bb0	295	#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
d9109698	296
aeeb5965	297	#include <linux/irqhandler.h>
d9109698	298
f3cf8bb0	299	struct irq_domain;
552c494a	300	struct irq_domain_ops;
f3cf8bb0 JL	301	struct irq_chip;
f3cf8bb0 JL	302	struct device_node;
be5436c8	303	struct fwnode_handle;
f3cf8bb0 JL	304	struct msi_domain_info;
	305
	306	/**
	307	* struct msi_domain_ops - MSI interrupt domain callbacks
	308	* @get_hwirq: Retrieve the resulting hw irq number
	309	* @msi_init: Domain specific init function for MSI interrupts
	310	* @msi_free: Domain specific function to free a MSI interrupts
d9109698 JL	311	* @msi_check: Callback for verification of the domain/info/dev data
d9109698 JL	312	* @msi_prepare: Prepare the allocation of the interrupts in the domain
d9109698	313	* @set_desc: Set the msi descriptor for an interrupt
43e9e705 TG	314	* @domain_alloc_irqs: Optional function to override the default allocation
	315	* function.
	316	* @domain_free_irqs: Optional function to override the default free
	317	* function.
f6d3486a TG	318	* @msi_post_free: Optional function which is invoked after freeing
f6d3486a TG	319	* all interrupts.
d9109698	320	*
1dd2c6a0 TG	321	* @get_hwirq, @msi_init and @msi_free are callbacks used by the underlying
1dd2c6a0 TG	322	* irqdomain.
d9109698	323	*
89033762	324	* @msi_check, @msi_prepare and @set_desc are callbacks used by
1dd2c6a0	325	* msi_domain_alloc/free_irqs().
43e9e705 TG	326	*
	327	* @domain_alloc_irqs, @domain_free_irqs can be used to override the
	328	* default allocation/free functions (__msi_domain_alloc/free_irqs). This
	329	* is initially for a wrapper around XENs seperate MSI universe which can't
	330	* be wrapped into the regular irq domains concepts by mere mortals. This
	331	* allows to universally use msi_domain_alloc/free_irqs without having to
	332	* special case XEN all over the place.
	333	*
	334	* Contrary to other operations @domain_alloc_irqs and @domain_free_irqs
	335	* are set to the default implementation if NULL and even when
	336	* MSI_FLAG_USE_DEF_DOM_OPS is not set to avoid breaking existing users and
	337	* because these callbacks are obviously mandatory.
f3cf8bb0 JL	338	*/
f3cf8bb0 JL	339	struct msi_domain_ops {
aeeb5965 JL	340	irq_hw_number_t (get_hwirq)(struct msi_domain_info info,
aeeb5965 JL	341	msi_alloc_info_t *arg);
f3cf8bb0 JL	342	int (msi_init)(struct irq_domain domain,
	343	struct msi_domain_info *info,
	344	unsigned int virq, irq_hw_number_t hwirq,
aeeb5965	345	msi_alloc_info_t *arg);
f3cf8bb0 JL	346	void (msi_free)(struct irq_domain domain,
	347	struct msi_domain_info *info,
	348	unsigned int virq);
d9109698 JL	349	int (msi_check)(struct irq_domain domain,
	350	struct msi_domain_info *info,
	351	struct device *dev);
	352	int (msi_prepare)(struct irq_domain domain,
	353	struct device *dev, int nvec,
	354	msi_alloc_info_t *arg);
d9109698 JL	355	void (set_desc)(msi_alloc_info_t arg,
d9109698 JL	356	struct msi_desc *desc);
43e9e705 TG	357	int (domain_alloc_irqs)(struct irq_domain domain,
	358	struct device *dev, int nvec);
	359	void (domain_free_irqs)(struct irq_domain domain,
	360	struct device *dev);
f6d3486a TG	361	void (msi_post_free)(struct irq_domain domain,
f6d3486a TG	362	struct device *dev);
f3cf8bb0 JL	363	};
	364
	365	/**
	366	* struct msi_domain_info - MSI interrupt domain data
aeeb5965 JL	367	* @flags: Flags to decribe features and capabilities
	368	* @ops: The callback data structure
	369	* @chip: Optional: associated interrupt chip
	370	* @chip_data: Optional: associated interrupt chip data
	371	* @handler: Optional: associated interrupt flow handler
	372	* @handler_data: Optional: associated interrupt flow handler data
	373	* @handler_name: Optional: associated interrupt flow handler name
	374	* @data: Optional: domain specific data
f3cf8bb0 JL	375	*/
f3cf8bb0 JL	376	struct msi_domain_info {
aeeb5965	377	u32 flags;
f3cf8bb0 JL	378	struct msi_domain_ops *ops;
f3cf8bb0 JL	379	struct irq_chip *chip;
aeeb5965 JL	380	void *chip_data;
	381	irq_flow_handler_t handler;
	382	void *handler_data;
	383	const char *handler_name;
f3cf8bb0 JL	384	void *data;
	385	};
	386
aeeb5965 JL	387	/* Flags for msi_domain_info */
	388	enum {
	389	/*
	390	* Init non implemented ops callbacks with default MSI domain
	391	* callbacks.
	392	*/
	393	MSI_FLAG_USE_DEF_DOM_OPS = (1 << 0),
	394	/*
	395	* Init non implemented chip callbacks with default MSI chip
	396	* callbacks.
	397	*/
	398	MSI_FLAG_USE_DEF_CHIP_OPS = (1 << 1),
aeeb5965	399	/* Support multiple PCI MSI interrupts */
b6140914	400	MSI_FLAG_MULTI_PCI_MSI = (1 << 2),
aeeb5965	401	/* Support PCI MSIX interrupts */
b6140914	402	MSI_FLAG_PCI_MSIX = (1 << 3),
f3b0946d MZ	403	/* Needs early activate, required for PCI */
f3b0946d MZ	404	MSI_FLAG_ACTIVATE_EARLY = (1 << 4),
22d0b12f TG	405	/*
	406	* Must reactivate when irq is started even when
	407	* MSI_FLAG_ACTIVATE_EARLY has been set.
	408	*/
	409	MSI_FLAG_MUST_REACTIVATE = (1 << 5),
0be8153c MZ	410	/* Is level-triggered capable, using two messages */
0be8153c MZ	411	MSI_FLAG_LEVEL_CAPABLE = (1 << 6),
013bd8e5 TG	412	/* Populate sysfs on alloc() and destroy it on free() */
013bd8e5 TG	413	MSI_FLAG_DEV_SYSFS = (1 << 7),
7a823443 TG	414	/* MSI-X entries must be contiguous */
7a823443 TG	415	MSI_FLAG_MSIX_CONTIGUOUS = (1 << 8),
645474e2 TG	416	/* Allocate simple MSI descriptors */
	417	MSI_FLAG_ALLOC_SIMPLE_MSI_DESCS = (1 << 9),
	418	/* Free MSI descriptors */
	419	MSI_FLAG_FREE_MSI_DESCS = (1 << 10),
aeeb5965 JL	420	};
aeeb5965 JL	421
f3cf8bb0 JL	422	int msi_domain_set_affinity(struct irq_data data, const struct cpumask mask,
	423	bool force);
	424
be5436c8	425	struct irq_domain msi_create_irq_domain(struct fwnode_handle fwnode,
f3cf8bb0 JL	426	struct msi_domain_info *info,
f3cf8bb0 JL	427	struct irq_domain *parent);
0f62d941 TG	428	int msi_domain_alloc_irqs_descs_locked(struct irq_domain domain, struct device dev,
0f62d941 TG	429	int nvec);
d9109698 JL	430	int msi_domain_alloc_irqs(struct irq_domain domain, struct device dev,
d9109698 JL	431	int nvec);
0f62d941	432	void msi_domain_free_irqs_descs_locked(struct irq_domain domain, struct device dev);
d9109698	433	void msi_domain_free_irqs(struct irq_domain domain, struct device dev);
f3cf8bb0 JL	434	struct msi_domain_info msi_get_domain_info(struct irq_domain domain);
f3cf8bb0 JL	435
be5436c8	436	struct irq_domain platform_msi_create_irq_domain(struct fwnode_handle fwnode,
c09fcc4b MZ	437	struct msi_domain_info *info,
	438	struct irq_domain *parent);
	439	int platform_msi_domain_alloc_irqs(struct device *dev, unsigned int nvec,
	440	irq_write_msi_msg_t write_msi_msg);
	441	void platform_msi_domain_free_irqs(struct device *dev);
b2eba39b MZ	442
	443	/* When an MSI domain is used as an intermediate domain */
	444	int msi_domain_prepare_irqs(struct irq_domain domain, struct device dev,
	445	int nvec, msi_alloc_info_t *args);
2145ac93 MZ	446	int msi_domain_populate_irqs(struct irq_domain domain, struct device dev,
2145ac93 MZ	447	int virq, int nvec, msi_alloc_info_t *args);
552c494a	448	struct irq_domain *
1f83515b MZ	449	__platform_msi_create_device_domain(struct device *dev,
	450	unsigned int nvec,
	451	bool is_tree,
	452	irq_write_msi_msg_t write_msi_msg,
	453	const struct irq_domain_ops *ops,
	454	void *host_data);
	455
	456	#define platform_msi_create_device_domain(dev, nvec, write, ops, data) \
	457	__platform_msi_create_device_domain(dev, nvec, false, write, ops, data)
	458	#define platform_msi_create_device_tree_domain(dev, nvec, write, ops, data) \
	459	__platform_msi_create_device_domain(dev, nvec, true, write, ops, data)
	460
9835cec6 TG	461	int platform_msi_device_domain_alloc(struct irq_domain *domain, unsigned int virq,
	462	unsigned int nr_irqs);
	463	void platform_msi_device_domain_free(struct irq_domain *domain, unsigned int virq,
	464	unsigned int nvec);
552c494a	465	void platform_msi_get_host_data(struct irq_domain domain);
f3cf8bb0 JL	466	#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */
f3cf8bb0 JL	467
3878eaef	468	#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
be5436c8	469	struct irq_domain pci_msi_create_irq_domain(struct fwnode_handle fwnode,
3878eaef JL	470	struct msi_domain_info *info,
3878eaef JL	471	struct irq_domain *parent);
b6eec9b7	472	u32 pci_msi_domain_get_msi_rid(struct irq_domain domain, struct pci_dev pdev);
54fa97ee	473	struct irq_domain pci_msi_get_device_domain(struct pci_dev pdev);
2fd60266	474	bool pci_dev_has_special_msi_domain(struct pci_dev *pdev);
54fa97ee MZ	475	#else
	476	static inline struct irq_domain pci_msi_get_device_domain(struct pci_dev pdev)
	477	{
	478	return NULL;
	479	}
3878eaef JL	480	#endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */
3878eaef JL	481
3b7d1921	482	#endif /* LINUX_MSI_H */