bus: mhi: ep: Add support for powering up the MHI endpoint stack
[linux-block.git] / include / linux / mhi_ep.h
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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (c) 2022, Linaro Ltd.
4 *
5 */
6#ifndef _MHI_EP_H_
7#define _MHI_EP_H_
8
9#include <linux/dma-direction.h>
10#include <linux/mhi.h>
11
12#define MHI_EP_DEFAULT_MTU 0x8000
13
14/**
15 * struct mhi_ep_channel_config - Channel configuration structure for controller
16 * @name: The name of this channel
17 * @num: The number assigned to this channel
18 * @num_elements: The number of elements that can be queued to this channel
19 * @dir: Direction that data may flow on this channel
20 */
21struct mhi_ep_channel_config {
22 char *name;
23 u32 num;
24 u32 num_elements;
25 enum dma_data_direction dir;
26};
27
28/**
29 * struct mhi_ep_cntrl_config - MHI Endpoint controller configuration
30 * @mhi_version: MHI spec version supported by the controller
31 * @max_channels: Maximum number of channels supported
32 * @num_channels: Number of channels defined in @ch_cfg
33 * @ch_cfg: Array of defined channels
34 */
35struct mhi_ep_cntrl_config {
36 u32 mhi_version;
37 u32 max_channels;
38 u32 num_channels;
39 const struct mhi_ep_channel_config *ch_cfg;
40};
41
42/**
43 * struct mhi_ep_db_info - MHI Endpoint doorbell info
44 * @mask: Mask of the doorbell interrupt
45 * @status: Status of the doorbell interrupt
46 */
47struct mhi_ep_db_info {
48 u32 mask;
49 u32 status;
50};
51
52/**
53 * struct mhi_ep_cntrl - MHI Endpoint controller structure
54 * @cntrl_dev: Pointer to the struct device of physical bus acting as the MHI
55 * Endpoint controller
56 * @mhi_dev: MHI Endpoint device instance for the controller
57 * @mmio: MMIO region containing the MHI registers
58 * @mhi_chan: Points to the channel configuration table
59 * @mhi_event: Points to the event ring configurations table
60 * @mhi_cmd: Points to the command ring configurations table
61 * @sm: MHI Endpoint state machine
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62 * @ch_ctx_cache: Cache of host channel context data structure
63 * @ev_ctx_cache: Cache of host event context data structure
64 * @cmd_ctx_cache: Cache of host command context data structure
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65 * @ch_ctx_host_pa: Physical address of host channel context data structure
66 * @ev_ctx_host_pa: Physical address of host event context data structure
67 * @cmd_ctx_host_pa: Physical address of host command context data structure
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68 * @ch_ctx_cache_phys: Physical address of the host channel context cache
69 * @ev_ctx_cache_phys: Physical address of the host event context cache
70 * @cmd_ctx_cache_phys: Physical address of the host command context cache
e9e4da23 71 * @chdb: Array of channel doorbell interrupt info
961aeb68 72 * @event_lock: Lock for protecting event rings
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73 * @list_lock: Lock for protecting state transition and channel doorbell lists
74 * @state_lock: Lock for protecting state transitions
75 * @st_transition_list: List of state transitions
4799e71b 76 * @ch_db_list: List of queued channel doorbells
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77 * @wq: Dedicated workqueue for handling rings and state changes
78 * @state_work: State transition worker
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79 * @raise_irq: CB function for raising IRQ to the host
80 * @alloc_map: CB function for allocating memory in endpoint for storing host context and mapping it
81 * @unmap_free: CB function to unmap and free the allocated memory in endpoint for storing host context
82 * @read_from_host: CB function for reading from host memory from endpoint
83 * @write_to_host: CB function for writing to host memory from endpoint
84 * @mhi_state: MHI Endpoint state
85 * @max_chan: Maximum channels supported by the endpoint controller
86 * @mru: MRU (Maximum Receive Unit) value of the endpoint controller
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87 * @event_rings: Number of event rings supported by the endpoint controller
88 * @hw_event_rings: Number of hardware event rings supported by the endpoint controller
89 * @chdb_offset: Channel doorbell offset set by the host
90 * @erdb_offset: Event ring doorbell offset set by the host
d434743e 91 * @index: MHI Endpoint controller index
4799e71b 92 * @irq: IRQ used by the endpoint controller
fb3a26b7 93 * @enabled: Check if the endpoint controller is enabled or not
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94 */
95struct mhi_ep_cntrl {
96 struct device *cntrl_dev;
97 struct mhi_ep_device *mhi_dev;
98 void __iomem *mmio;
99
100 struct mhi_ep_chan *mhi_chan;
101 struct mhi_ep_event *mhi_event;
102 struct mhi_ep_cmd *mhi_cmd;
103 struct mhi_ep_sm *sm;
104
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105 struct mhi_chan_ctxt *ch_ctx_cache;
106 struct mhi_event_ctxt *ev_ctx_cache;
107 struct mhi_cmd_ctxt *cmd_ctx_cache;
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108 u64 ch_ctx_host_pa;
109 u64 ev_ctx_host_pa;
110 u64 cmd_ctx_host_pa;
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111 phys_addr_t ch_ctx_cache_phys;
112 phys_addr_t ev_ctx_cache_phys;
113 phys_addr_t cmd_ctx_cache_phys;
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114
115 struct mhi_ep_db_info chdb[4];
961aeb68 116 struct mutex event_lock;
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117 spinlock_t list_lock;
118 spinlock_t state_lock;
119
120 struct list_head st_transition_list;
4799e71b 121 struct list_head ch_db_list;
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122
123 struct workqueue_struct *wq;
124 struct work_struct state_work;
e9e4da23 125
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126 void (*raise_irq)(struct mhi_ep_cntrl *mhi_cntrl, u32 vector);
127 int (*alloc_map)(struct mhi_ep_cntrl *mhi_cntrl, u64 pci_addr, phys_addr_t *phys_ptr,
128 void __iomem **virt, size_t size);
129 void (*unmap_free)(struct mhi_ep_cntrl *mhi_cntrl, u64 pci_addr, phys_addr_t phys,
130 void __iomem *virt, size_t size);
131 int (*read_from_host)(struct mhi_ep_cntrl *mhi_cntrl, u64 from, void *to, size_t size);
132 int (*write_to_host)(struct mhi_ep_cntrl *mhi_cntrl, void *from, u64 to, size_t size);
133
134 enum mhi_state mhi_state;
135
136 u32 max_chan;
137 u32 mru;
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138 u32 event_rings;
139 u32 hw_event_rings;
140 u32 chdb_offset;
141 u32 erdb_offset;
d434743e 142 u32 index;
4799e71b 143 int irq;
fb3a26b7 144 bool enabled;
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145};
146
147/**
148 * struct mhi_ep_device - Structure representing an MHI Endpoint device that binds
149 * to channels or is associated with controllers
150 * @dev: Driver model device node for the MHI Endpoint device
151 * @mhi_cntrl: Controller the device belongs to
152 * @id: Pointer to MHI Endpoint device ID struct
153 * @name: Name of the associated MHI Endpoint device
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154 * @ul_chan: UL (from host to endpoint) channel for the device
155 * @dl_chan: DL (from endpoint to host) channel for the device
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156 * @dev_type: MHI device type
157 */
158struct mhi_ep_device {
159 struct device dev;
160 struct mhi_ep_cntrl *mhi_cntrl;
161 const struct mhi_device_id *id;
162 const char *name;
163 struct mhi_ep_chan *ul_chan;
164 struct mhi_ep_chan *dl_chan;
165 enum mhi_device_type dev_type;
166};
167
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168/**
169 * struct mhi_ep_driver - Structure representing a MHI Endpoint client driver
170 * @id_table: Pointer to MHI Endpoint device ID table
171 * @driver: Device driver model driver
172 * @probe: CB function for client driver probe function
173 * @remove: CB function for client driver remove function
174 * @ul_xfer_cb: CB function for UL (from host to endpoint) data transfer
175 * @dl_xfer_cb: CB function for DL (from endpoint to host) data transfer
176 */
177struct mhi_ep_driver {
178 const struct mhi_device_id *id_table;
179 struct device_driver driver;
180 int (*probe)(struct mhi_ep_device *mhi_ep,
181 const struct mhi_device_id *id);
182 void (*remove)(struct mhi_ep_device *mhi_ep);
183 void (*ul_xfer_cb)(struct mhi_ep_device *mhi_dev,
184 struct mhi_result *result);
185 void (*dl_xfer_cb)(struct mhi_ep_device *mhi_dev,
186 struct mhi_result *result);
187};
188
d434743e 189#define to_mhi_ep_device(dev) container_of(dev, struct mhi_ep_device, dev)
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190#define to_mhi_ep_driver(drv) container_of(drv, struct mhi_ep_driver, driver)
191
192/*
193 * module_mhi_ep_driver() - Helper macro for drivers that don't do
194 * anything special other than using default mhi_ep_driver_register() and
195 * mhi_ep_driver_unregister(). This eliminates a lot of boilerplate.
196 * Each module may only use this macro once.
197 */
198#define module_mhi_ep_driver(mhi_drv) \
199 module_driver(mhi_drv, mhi_ep_driver_register, \
200 mhi_ep_driver_unregister)
201
202/*
203 * Macro to avoid include chaining to get THIS_MODULE
204 */
205#define mhi_ep_driver_register(mhi_drv) \
206 __mhi_ep_driver_register(mhi_drv, THIS_MODULE)
207
208/**
209 * __mhi_ep_driver_register - Register a driver with MHI Endpoint bus
210 * @mhi_drv: Driver to be associated with the device
211 * @owner: The module owner
212 *
213 * Return: 0 if driver registrations succeeds, a negative error code otherwise.
214 */
215int __mhi_ep_driver_register(struct mhi_ep_driver *mhi_drv, struct module *owner);
216
217/**
218 * mhi_ep_driver_unregister - Unregister a driver from MHI Endpoint bus
219 * @mhi_drv: Driver associated with the device
220 */
221void mhi_ep_driver_unregister(struct mhi_ep_driver *mhi_drv);
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222
223/**
224 * mhi_ep_register_controller - Register MHI Endpoint controller
225 * @mhi_cntrl: MHI Endpoint controller to register
226 * @config: Configuration to use for the controller
227 *
228 * Return: 0 if controller registrations succeeds, a negative error code otherwise.
229 */
230int mhi_ep_register_controller(struct mhi_ep_cntrl *mhi_cntrl,
231 const struct mhi_ep_cntrl_config *config);
232
233/**
234 * mhi_ep_unregister_controller - Unregister MHI Endpoint controller
235 * @mhi_cntrl: MHI Endpoint controller to unregister
236 */
237void mhi_ep_unregister_controller(struct mhi_ep_cntrl *mhi_cntrl);
238
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239/**
240 * mhi_ep_power_up - Power up the MHI endpoint stack
241 * @mhi_cntrl: MHI Endpoint controller
242 *
243 * Return: 0 if power up succeeds, a negative error code otherwise.
244 */
245int mhi_ep_power_up(struct mhi_ep_cntrl *mhi_cntrl);
246
d434743e 247#endif