bus: mhi: ep: Add support for interrupt moderation timer
[linux-block.git] / include / linux / mhi_ep.h
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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (c) 2022, Linaro Ltd.
4 *
5 */
6#ifndef _MHI_EP_H_
7#define _MHI_EP_H_
8
9#include <linux/dma-direction.h>
10#include <linux/mhi.h>
11
12#define MHI_EP_DEFAULT_MTU 0x8000
13
14/**
15 * struct mhi_ep_channel_config - Channel configuration structure for controller
16 * @name: The name of this channel
17 * @num: The number assigned to this channel
18 * @num_elements: The number of elements that can be queued to this channel
19 * @dir: Direction that data may flow on this channel
20 */
21struct mhi_ep_channel_config {
22 char *name;
23 u32 num;
24 u32 num_elements;
25 enum dma_data_direction dir;
26};
27
28/**
29 * struct mhi_ep_cntrl_config - MHI Endpoint controller configuration
30 * @mhi_version: MHI spec version supported by the controller
31 * @max_channels: Maximum number of channels supported
32 * @num_channels: Number of channels defined in @ch_cfg
33 * @ch_cfg: Array of defined channels
34 */
35struct mhi_ep_cntrl_config {
36 u32 mhi_version;
37 u32 max_channels;
38 u32 num_channels;
39 const struct mhi_ep_channel_config *ch_cfg;
40};
41
42/**
43 * struct mhi_ep_db_info - MHI Endpoint doorbell info
44 * @mask: Mask of the doorbell interrupt
45 * @status: Status of the doorbell interrupt
46 */
47struct mhi_ep_db_info {
48 u32 mask;
49 u32 status;
50};
51
52/**
53 * struct mhi_ep_cntrl - MHI Endpoint controller structure
54 * @cntrl_dev: Pointer to the struct device of physical bus acting as the MHI
55 * Endpoint controller
56 * @mhi_dev: MHI Endpoint device instance for the controller
57 * @mmio: MMIO region containing the MHI registers
58 * @mhi_chan: Points to the channel configuration table
59 * @mhi_event: Points to the event ring configurations table
60 * @mhi_cmd: Points to the command ring configurations table
61 * @sm: MHI Endpoint state machine
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62 * @ch_ctx_cache: Cache of host channel context data structure
63 * @ev_ctx_cache: Cache of host event context data structure
64 * @cmd_ctx_cache: Cache of host command context data structure
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65 * @ch_ctx_host_pa: Physical address of host channel context data structure
66 * @ev_ctx_host_pa: Physical address of host event context data structure
67 * @cmd_ctx_host_pa: Physical address of host command context data structure
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68 * @ch_ctx_cache_phys: Physical address of the host channel context cache
69 * @ev_ctx_cache_phys: Physical address of the host event context cache
70 * @cmd_ctx_cache_phys: Physical address of the host command context cache
e9e4da23 71 * @chdb: Array of channel doorbell interrupt info
961aeb68 72 * @event_lock: Lock for protecting event rings
f9baa4f7 73 * @state_lock: Lock for protecting state transitions
1ddc7618 74 * @list_lock: Lock for protecting state transition and channel doorbell lists
f9baa4f7 75 * @st_transition_list: List of state transitions
4799e71b 76 * @ch_db_list: List of queued channel doorbells
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77 * @wq: Dedicated workqueue for handling rings and state changes
78 * @state_work: State transition worker
7a97b6b4 79 * @reset_work: Worker for MHI Endpoint reset
e8275690 80 * @cmd_ring_work: Worker for processing command rings
03c0bb8e 81 * @ch_ring_work: Worker for processing channel rings
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82 * @raise_irq: CB function for raising IRQ to the host
83 * @alloc_map: CB function for allocating memory in endpoint for storing host context and mapping it
84 * @unmap_free: CB function to unmap and free the allocated memory in endpoint for storing host context
85 * @read_from_host: CB function for reading from host memory from endpoint
86 * @write_to_host: CB function for writing to host memory from endpoint
87 * @mhi_state: MHI Endpoint state
88 * @max_chan: Maximum channels supported by the endpoint controller
89 * @mru: MRU (Maximum Receive Unit) value of the endpoint controller
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90 * @event_rings: Number of event rings supported by the endpoint controller
91 * @hw_event_rings: Number of hardware event rings supported by the endpoint controller
92 * @chdb_offset: Channel doorbell offset set by the host
93 * @erdb_offset: Event ring doorbell offset set by the host
d434743e 94 * @index: MHI Endpoint controller index
4799e71b 95 * @irq: IRQ used by the endpoint controller
fb3a26b7 96 * @enabled: Check if the endpoint controller is enabled or not
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97 */
98struct mhi_ep_cntrl {
99 struct device *cntrl_dev;
100 struct mhi_ep_device *mhi_dev;
101 void __iomem *mmio;
102
103 struct mhi_ep_chan *mhi_chan;
104 struct mhi_ep_event *mhi_event;
105 struct mhi_ep_cmd *mhi_cmd;
106 struct mhi_ep_sm *sm;
107
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108 struct mhi_chan_ctxt *ch_ctx_cache;
109 struct mhi_event_ctxt *ev_ctx_cache;
110 struct mhi_cmd_ctxt *cmd_ctx_cache;
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111 u64 ch_ctx_host_pa;
112 u64 ev_ctx_host_pa;
113 u64 cmd_ctx_host_pa;
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114 phys_addr_t ch_ctx_cache_phys;
115 phys_addr_t ev_ctx_cache_phys;
116 phys_addr_t cmd_ctx_cache_phys;
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117
118 struct mhi_ep_db_info chdb[4];
961aeb68 119 struct mutex event_lock;
1ddc7618 120 struct mutex state_lock;
f9baa4f7 121 spinlock_t list_lock;
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122
123 struct list_head st_transition_list;
4799e71b 124 struct list_head ch_db_list;
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125
126 struct workqueue_struct *wq;
127 struct work_struct state_work;
7a97b6b4 128 struct work_struct reset_work;
e8275690 129 struct work_struct cmd_ring_work;
03c0bb8e 130 struct work_struct ch_ring_work;
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131 struct kmem_cache *ring_item_cache;
132 struct kmem_cache *ev_ring_el_cache;
133 struct kmem_cache *tre_buf_cache;
e9e4da23 134
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135 void (*raise_irq)(struct mhi_ep_cntrl *mhi_cntrl, u32 vector);
136 int (*alloc_map)(struct mhi_ep_cntrl *mhi_cntrl, u64 pci_addr, phys_addr_t *phys_ptr,
137 void __iomem **virt, size_t size);
138 void (*unmap_free)(struct mhi_ep_cntrl *mhi_cntrl, u64 pci_addr, phys_addr_t phys,
139 void __iomem *virt, size_t size);
140 int (*read_from_host)(struct mhi_ep_cntrl *mhi_cntrl, u64 from, void *to, size_t size);
141 int (*write_to_host)(struct mhi_ep_cntrl *mhi_cntrl, void *from, u64 to, size_t size);
142
143 enum mhi_state mhi_state;
144
145 u32 max_chan;
146 u32 mru;
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147 u32 event_rings;
148 u32 hw_event_rings;
149 u32 chdb_offset;
150 u32 erdb_offset;
d434743e 151 u32 index;
4799e71b 152 int irq;
fb3a26b7 153 bool enabled;
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154};
155
156/**
157 * struct mhi_ep_device - Structure representing an MHI Endpoint device that binds
158 * to channels or is associated with controllers
159 * @dev: Driver model device node for the MHI Endpoint device
160 * @mhi_cntrl: Controller the device belongs to
161 * @id: Pointer to MHI Endpoint device ID struct
162 * @name: Name of the associated MHI Endpoint device
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163 * @ul_chan: UL (from host to endpoint) channel for the device
164 * @dl_chan: DL (from endpoint to host) channel for the device
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165 * @dev_type: MHI device type
166 */
167struct mhi_ep_device {
168 struct device dev;
169 struct mhi_ep_cntrl *mhi_cntrl;
170 const struct mhi_device_id *id;
171 const char *name;
172 struct mhi_ep_chan *ul_chan;
173 struct mhi_ep_chan *dl_chan;
174 enum mhi_device_type dev_type;
175};
176
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177/**
178 * struct mhi_ep_driver - Structure representing a MHI Endpoint client driver
179 * @id_table: Pointer to MHI Endpoint device ID table
180 * @driver: Device driver model driver
181 * @probe: CB function for client driver probe function
182 * @remove: CB function for client driver remove function
183 * @ul_xfer_cb: CB function for UL (from host to endpoint) data transfer
184 * @dl_xfer_cb: CB function for DL (from endpoint to host) data transfer
185 */
186struct mhi_ep_driver {
187 const struct mhi_device_id *id_table;
188 struct device_driver driver;
189 int (*probe)(struct mhi_ep_device *mhi_ep,
190 const struct mhi_device_id *id);
191 void (*remove)(struct mhi_ep_device *mhi_ep);
192 void (*ul_xfer_cb)(struct mhi_ep_device *mhi_dev,
193 struct mhi_result *result);
194 void (*dl_xfer_cb)(struct mhi_ep_device *mhi_dev,
195 struct mhi_result *result);
196};
197
d434743e 198#define to_mhi_ep_device(dev) container_of(dev, struct mhi_ep_device, dev)
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199#define to_mhi_ep_driver(drv) container_of(drv, struct mhi_ep_driver, driver)
200
201/*
202 * module_mhi_ep_driver() - Helper macro for drivers that don't do
203 * anything special other than using default mhi_ep_driver_register() and
204 * mhi_ep_driver_unregister(). This eliminates a lot of boilerplate.
205 * Each module may only use this macro once.
206 */
207#define module_mhi_ep_driver(mhi_drv) \
208 module_driver(mhi_drv, mhi_ep_driver_register, \
209 mhi_ep_driver_unregister)
210
211/*
212 * Macro to avoid include chaining to get THIS_MODULE
213 */
214#define mhi_ep_driver_register(mhi_drv) \
215 __mhi_ep_driver_register(mhi_drv, THIS_MODULE)
216
217/**
218 * __mhi_ep_driver_register - Register a driver with MHI Endpoint bus
219 * @mhi_drv: Driver to be associated with the device
220 * @owner: The module owner
221 *
222 * Return: 0 if driver registrations succeeds, a negative error code otherwise.
223 */
224int __mhi_ep_driver_register(struct mhi_ep_driver *mhi_drv, struct module *owner);
225
226/**
227 * mhi_ep_driver_unregister - Unregister a driver from MHI Endpoint bus
228 * @mhi_drv: Driver associated with the device
229 */
230void mhi_ep_driver_unregister(struct mhi_ep_driver *mhi_drv);
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231
232/**
233 * mhi_ep_register_controller - Register MHI Endpoint controller
234 * @mhi_cntrl: MHI Endpoint controller to register
235 * @config: Configuration to use for the controller
236 *
237 * Return: 0 if controller registrations succeeds, a negative error code otherwise.
238 */
239int mhi_ep_register_controller(struct mhi_ep_cntrl *mhi_cntrl,
240 const struct mhi_ep_cntrl_config *config);
241
242/**
243 * mhi_ep_unregister_controller - Unregister MHI Endpoint controller
244 * @mhi_cntrl: MHI Endpoint controller to unregister
245 */
246void mhi_ep_unregister_controller(struct mhi_ep_cntrl *mhi_cntrl);
247
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248/**
249 * mhi_ep_power_up - Power up the MHI endpoint stack
250 * @mhi_cntrl: MHI Endpoint controller
251 *
252 * Return: 0 if power up succeeds, a negative error code otherwise.
253 */
254int mhi_ep_power_up(struct mhi_ep_cntrl *mhi_cntrl);
255
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256/**
257 * mhi_ep_power_down - Power down the MHI endpoint stack
258 * @mhi_cntrl: MHI controller
259 */
260void mhi_ep_power_down(struct mhi_ep_cntrl *mhi_cntrl);
261
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262/**
263 * mhi_ep_queue_is_empty - Determine whether the transfer queue is empty
264 * @mhi_dev: Device associated with the channels
265 * @dir: DMA direction for the channel
266 *
267 * Return: true if the queue is empty, false otherwise.
268 */
269bool mhi_ep_queue_is_empty(struct mhi_ep_device *mhi_dev, enum dma_data_direction dir);
270
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271/**
272 * mhi_ep_queue_skb - Send SKBs to host over MHI Endpoint
273 * @mhi_dev: Device associated with the DL channel
274 * @skb: SKBs to be queued
275 *
276 * Return: 0 if the SKBs has been sent successfully, a negative error code otherwise.
277 */
278int mhi_ep_queue_skb(struct mhi_ep_device *mhi_dev, struct sk_buff *skb);
279
d434743e 280#endif