bus: mhi: Ensure correct ring update ordering with memory barrier
[linux-2.6-block.git] / include / linux / mhi.h
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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
4 *
5 */
6#ifndef _MHI_H_
7#define _MHI_H_
8
9#include <linux/device.h>
10#include <linux/dma-direction.h>
11#include <linux/mutex.h>
189ff97c 12#include <linux/skbuff.h>
0cbf2608 13#include <linux/slab.h>
e1427f32 14#include <linux/spinlock.h>
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15#include <linux/wait.h>
16#include <linux/workqueue.h>
17
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18#define MHI_MAX_OEM_PK_HASH_SEGMENTS 16
19
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20struct mhi_chan;
21struct mhi_event;
22struct mhi_ctxt;
23struct mhi_cmd;
24struct mhi_buf_info;
25
26/**
27 * enum mhi_callback - MHI callback
28 * @MHI_CB_IDLE: MHI entered idle state
29 * @MHI_CB_PENDING_DATA: New data available for client to process
30 * @MHI_CB_LPM_ENTER: MHI host entered low power mode
31 * @MHI_CB_LPM_EXIT: MHI host about to exit low power mode
32 * @MHI_CB_EE_RDDM: MHI device entered RDDM exec env
33 * @MHI_CB_EE_MISSION_MODE: MHI device entered Mission Mode exec env
34 * @MHI_CB_SYS_ERROR: MHI device entered error state (may recover)
35 * @MHI_CB_FATAL_ERROR: MHI device entered fatal error state
1d3173a3 36 * @MHI_CB_BW_REQ: Received a bandwidth switch request from device
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37 */
38enum mhi_callback {
39 MHI_CB_IDLE,
40 MHI_CB_PENDING_DATA,
41 MHI_CB_LPM_ENTER,
42 MHI_CB_LPM_EXIT,
43 MHI_CB_EE_RDDM,
44 MHI_CB_EE_MISSION_MODE,
45 MHI_CB_SYS_ERROR,
46 MHI_CB_FATAL_ERROR,
1d3173a3 47 MHI_CB_BW_REQ,
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48};
49
50/**
51 * enum mhi_flags - Transfer flags
52 * @MHI_EOB: End of buffer for bulk transfer
53 * @MHI_EOT: End of transfer
54 * @MHI_CHAIN: Linked transfer
55 */
56enum mhi_flags {
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57 MHI_EOB = BIT(0),
58 MHI_EOT = BIT(1),
59 MHI_CHAIN = BIT(2),
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60};
61
62/**
63 * enum mhi_device_type - Device types
64 * @MHI_DEVICE_XFER: Handles data transfer
65 * @MHI_DEVICE_CONTROLLER: Control device
66 */
67enum mhi_device_type {
68 MHI_DEVICE_XFER,
69 MHI_DEVICE_CONTROLLER,
70};
71
72/**
73 * enum mhi_ch_type - Channel types
74 * @MHI_CH_TYPE_INVALID: Invalid channel type
75 * @MHI_CH_TYPE_OUTBOUND: Outbound channel to the device
76 * @MHI_CH_TYPE_INBOUND: Inbound channel from the device
77 * @MHI_CH_TYPE_INBOUND_COALESCED: Coalesced channel for the device to combine
78 * multiple packets and send them as a single
79 * large packet to reduce CPU consumption
80 */
81enum mhi_ch_type {
82 MHI_CH_TYPE_INVALID = 0,
83 MHI_CH_TYPE_OUTBOUND = DMA_TO_DEVICE,
84 MHI_CH_TYPE_INBOUND = DMA_FROM_DEVICE,
85 MHI_CH_TYPE_INBOUND_COALESCED = 3,
86};
87
3000f85b 88/**
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89 * struct image_info - Firmware and RDDM table
90 * @mhi_buf: Buffer for firmware and RDDM table
91 * @entries: # of entries in table
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92 */
93struct image_info {
94 struct mhi_buf *mhi_buf;
4d12a897 95 /* private: from internal.h */
3000f85b 96 struct bhi_vec_entry *bhi_vec;
4d12a897 97 /* public: */
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98 u32 entries;
99};
100
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101/**
102 * struct mhi_link_info - BW requirement
103 * target_link_speed - Link speed as defined by TLS bits in LinkControl reg
104 * target_link_width - Link width as defined by NLW bits in LinkStatus reg
105 */
106struct mhi_link_info {
107 unsigned int target_link_speed;
108 unsigned int target_link_width;
109};
110
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111/**
112 * enum mhi_ee_type - Execution environment types
113 * @MHI_EE_PBL: Primary Bootloader
114 * @MHI_EE_SBL: Secondary Bootloader
115 * @MHI_EE_AMSS: Modem, aka the primary runtime EE
116 * @MHI_EE_RDDM: Ram dump download mode
117 * @MHI_EE_WFW: WLAN firmware mode
118 * @MHI_EE_PTHRU: Passthrough
119 * @MHI_EE_EDL: Embedded downloader
120 */
121enum mhi_ee_type {
122 MHI_EE_PBL,
123 MHI_EE_SBL,
124 MHI_EE_AMSS,
125 MHI_EE_RDDM,
126 MHI_EE_WFW,
127 MHI_EE_PTHRU,
128 MHI_EE_EDL,
129 MHI_EE_MAX_SUPPORTED = MHI_EE_EDL,
130 MHI_EE_DISABLE_TRANSITION, /* local EE, not related to mhi spec */
131 MHI_EE_NOT_SUPPORTED,
132 MHI_EE_MAX,
133};
134
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135/**
136 * enum mhi_state - MHI states
137 * @MHI_STATE_RESET: Reset state
138 * @MHI_STATE_READY: Ready state
139 * @MHI_STATE_M0: M0 state
140 * @MHI_STATE_M1: M1 state
141 * @MHI_STATE_M2: M2 state
142 * @MHI_STATE_M3: M3 state
143 * @MHI_STATE_M3_FAST: M3 Fast state
144 * @MHI_STATE_BHI: BHI state
145 * @MHI_STATE_SYS_ERR: System Error state
146 */
147enum mhi_state {
148 MHI_STATE_RESET = 0x0,
149 MHI_STATE_READY = 0x1,
150 MHI_STATE_M0 = 0x2,
151 MHI_STATE_M1 = 0x3,
152 MHI_STATE_M2 = 0x4,
153 MHI_STATE_M3 = 0x5,
154 MHI_STATE_M3_FAST = 0x6,
155 MHI_STATE_BHI = 0x7,
156 MHI_STATE_SYS_ERR = 0xFF,
157 MHI_STATE_MAX,
158};
159
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160/**
161 * enum mhi_ch_ee_mask - Execution environment mask for channel
162 * @MHI_CH_EE_PBL: Allow channel to be used in PBL EE
163 * @MHI_CH_EE_SBL: Allow channel to be used in SBL EE
164 * @MHI_CH_EE_AMSS: Allow channel to be used in AMSS EE
165 * @MHI_CH_EE_RDDM: Allow channel to be used in RDDM EE
166 * @MHI_CH_EE_PTHRU: Allow channel to be used in PTHRU EE
167 * @MHI_CH_EE_WFW: Allow channel to be used in WFW EE
168 * @MHI_CH_EE_EDL: Allow channel to be used in EDL EE
169 */
170enum mhi_ch_ee_mask {
171 MHI_CH_EE_PBL = BIT(MHI_EE_PBL),
172 MHI_CH_EE_SBL = BIT(MHI_EE_SBL),
173 MHI_CH_EE_AMSS = BIT(MHI_EE_AMSS),
174 MHI_CH_EE_RDDM = BIT(MHI_EE_RDDM),
175 MHI_CH_EE_PTHRU = BIT(MHI_EE_PTHRU),
176 MHI_CH_EE_WFW = BIT(MHI_EE_WFW),
177 MHI_CH_EE_EDL = BIT(MHI_EE_EDL),
178};
179
180/**
181 * enum mhi_er_data_type - Event ring data types
182 * @MHI_ER_DATA: Only client data over this ring
183 * @MHI_ER_CTRL: MHI control data and client data
184 */
185enum mhi_er_data_type {
186 MHI_ER_DATA,
187 MHI_ER_CTRL,
188};
189
190/**
191 * enum mhi_db_brst_mode - Doorbell mode
192 * @MHI_DB_BRST_DISABLE: Burst mode disable
193 * @MHI_DB_BRST_ENABLE: Burst mode enable
194 */
195enum mhi_db_brst_mode {
196 MHI_DB_BRST_DISABLE = 0x2,
197 MHI_DB_BRST_ENABLE = 0x3,
198};
199
200/**
201 * struct mhi_channel_config - Channel configuration structure for controller
202 * @name: The name of this channel
203 * @num: The number assigned to this channel
204 * @num_elements: The number of elements that can be queued to this channel
205 * @local_elements: The local ring length of the channel
206 * @event_ring: The event rung index that services this channel
207 * @dir: Direction that data may flow on this channel
208 * @type: Channel type
209 * @ee_mask: Execution Environment mask for this channel
210 * @pollcfg: Polling configuration for burst mode. 0 is default. milliseconds
211 for UL channels, multiple of 8 ring elements for DL channels
212 * @doorbell: Doorbell mode
213 * @lpm_notify: The channel master requires low power mode notifications
214 * @offload_channel: The client manages the channel completely
215 * @doorbell_mode_switch: Channel switches to doorbell mode on M0 transition
216 * @auto_queue: Framework will automatically queue buffers for DL traffic
da1c4f85 217 * @wake-capable: Channel capable of waking up the system
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218 */
219struct mhi_channel_config {
220 char *name;
221 u32 num;
222 u32 num_elements;
223 u32 local_elements;
224 u32 event_ring;
225 enum dma_data_direction dir;
226 enum mhi_ch_type type;
227 u32 ee_mask;
228 u32 pollcfg;
229 enum mhi_db_brst_mode doorbell;
230 bool lpm_notify;
231 bool offload_channel;
232 bool doorbell_mode_switch;
233 bool auto_queue;
da1c4f85 234 bool wake_capable;
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235};
236
237/**
238 * struct mhi_event_config - Event ring configuration structure for controller
239 * @num_elements: The number of elements that can be queued to this ring
240 * @irq_moderation_ms: Delay irq for additional events to be aggregated
241 * @irq: IRQ associated with this ring
242 * @channel: Dedicated channel number. U32_MAX indicates a non-dedicated ring
243 * @priority: Priority of this ring. Use 1 for now
244 * @mode: Doorbell mode
245 * @data_type: Type of data this ring will process
246 * @hardware_event: This ring is associated with hardware channels
247 * @client_managed: This ring is client managed
248 * @offload_channel: This ring is associated with an offloaded channel
249 */
250struct mhi_event_config {
251 u32 num_elements;
252 u32 irq_moderation_ms;
253 u32 irq;
254 u32 channel;
255 u32 priority;
256 enum mhi_db_brst_mode mode;
257 enum mhi_er_data_type data_type;
258 bool hardware_event;
259 bool client_managed;
260 bool offload_channel;
261};
262
263/**
264 * struct mhi_controller_config - Root MHI controller configuration
265 * @max_channels: Maximum number of channels supported
266 * @timeout_ms: Timeout value for operations. 0 means use default
267 * @buf_len: Size of automatically allocated buffers. 0 means use default
268 * @num_channels: Number of channels defined in @ch_cfg
269 * @ch_cfg: Array of defined channels
270 * @num_events: Number of event rings defined in @event_cfg
271 * @event_cfg: Array of defined event rings
272 * @use_bounce_buf: Use a bounce buffer pool due to limited DDR access
273 * @m2_no_db: Host is not allowed to ring DB in M2 state
274 */
275struct mhi_controller_config {
276 u32 max_channels;
277 u32 timeout_ms;
278 u32 buf_len;
279 u32 num_channels;
f38173a7 280 const struct mhi_channel_config *ch_cfg;
0cbf2608 281 u32 num_events;
f38173a7 282 const struct mhi_event_config *event_cfg;
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283 bool use_bounce_buf;
284 bool m2_no_db;
285};
286
287/**
288 * struct mhi_controller - Master MHI controller structure
289 * @cntrl_dev: Pointer to the struct device of physical bus acting as the MHI
290 * controller (required)
291 * @mhi_dev: MHI device instance for the controller
c7bd825e 292 * @debugfs_dentry: MHI controller debugfs directory
0cbf2608 293 * @regs: Base address of MHI MMIO register space (required)
6cd330ae 294 * @bhi: Points to base of MHI BHI register space
3000f85b 295 * @bhie: Points to base of MHI BHIe register space
6cd330ae 296 * @wake_db: MHI WAKE doorbell register address
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297 * @iova_start: IOMMU starting address for data (required)
298 * @iova_stop: IOMMU stop address for data (required)
299 * @fw_image: Firmware image name for normal booting (required)
300 * @edl_image: Firmware image name for emergency download mode (optional)
6fdfdd27 301 * @rddm_size: RAM dump size that host should allocate for debugging purpose
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302 * @sbl_size: SBL image size downloaded through BHIe (optional)
303 * @seg_len: BHIe vector size (optional)
3000f85b 304 * @fbc_image: Points to firmware image buffer
6fdfdd27 305 * @rddm_image: Points to RAM dump buffer
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306 * @mhi_chan: Points to the channel configuration table
307 * @lpm_chans: List of channels that require LPM notifications
308 * @irq: base irq # to request (required)
309 * @max_chan: Maximum number of channels the controller supports
310 * @total_ev_rings: Total # of event rings allocated
311 * @hw_ev_rings: Number of hardware event rings
312 * @sw_ev_rings: Number of software event rings
0cbf2608 313 * @nr_irqs: Number of IRQ allocated by bus master (required)
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314 * @family_number: MHI controller family number
315 * @device_number: MHI controller device number
316 * @major_version: MHI controller major revision number
317 * @minor_version: MHI controller minor revision number
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318 * @serial_number: MHI controller serial number obtained from BHI
319 * @oem_pk_hash: MHI controller OEM PK Hash obtained from BHI
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320 * @mhi_event: MHI event ring configurations table
321 * @mhi_cmd: MHI command ring configurations table
322 * @mhi_ctxt: MHI device context, shared memory between host and device
323 * @pm_mutex: Mutex for suspend/resume operation
324 * @pm_lock: Lock for protecting MHI power management state
325 * @timeout_ms: Timeout in ms for state transitions
326 * @pm_state: MHI power management state
327 * @db_access: DB access states
328 * @ee: MHI device execution environment
a6e2e352 329 * @dev_state: MHI device state
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330 * @dev_wake: Device wakeup count
331 * @pending_pkts: Pending packets for the controller
601455da 332 * @M0, M2, M3: Counters to track number of device MHI state changes
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333 * @transition_list: List of MHI state transitions
334 * @transition_lock: Lock for protecting MHI state transition list
335 * @wlock: Lock for protecting device wakeup
1d3173a3 336 * @mhi_link_info: Device bandwidth info
0cbf2608 337 * @st_worker: State transition worker
8f703978 338 * @hiprio_wq: High priority workqueue for MHI work such as state transitions
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339 * @state_event: State change event
340 * @status_cb: CB function to notify power states of the device (required)
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341 * @wake_get: CB function to assert device wake (optional)
342 * @wake_put: CB function to de-assert device wake (optional)
343 * @wake_toggle: CB function to assert and de-assert device wake (optional)
344 * @runtime_get: CB function to controller runtime resume (required)
af2e5881 345 * @runtime_put: CB function to decrement pm usage (required)
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346 * @map_single: CB function to create TRE buffer
347 * @unmap_single: CB function to destroy TRE buffer
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348 * @read_reg: Read a MHI register via the physical link (required)
349 * @write_reg: Write a MHI register via the physical link (required)
b5a8d233 350 * @reset: Controller specific reset function (optional)
0cbf2608 351 * @buffer_len: Bounce buffer length
206e7383 352 * @index: Index of the MHI controller instance
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353 * @bounce_buf: Use of bounce buffer
354 * @fbc_download: MHI host needs to do complete image transfer (optional)
355 * @pre_init: MHI host needs to do pre-initialization before power up
356 * @wake_set: Device wakeup set flag
357 *
358 * Fields marked as (required) need to be populated by the controller driver
359 * before calling mhi_register_controller(). For the fields marked as (optional)
360 * they can be populated depending on the usecase.
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361 *
362 * The following fields are present for the purpose of implementing any device
363 * specific quirks or customizations for specific MHI revisions used in device
364 * by the controller drivers. The MHI stack will just populate these fields
365 * during mhi_register_controller():
366 * family_number
367 * device_number
368 * major_version
369 * minor_version
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370 */
371struct mhi_controller {
372 struct device *cntrl_dev;
373 struct mhi_device *mhi_dev;
c7bd825e 374 struct dentry *debugfs_dentry;
0cbf2608 375 void __iomem *regs;
6cd330ae 376 void __iomem *bhi;
3000f85b 377 void __iomem *bhie;
6cd330ae 378 void __iomem *wake_db;
a6e2e352 379
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380 dma_addr_t iova_start;
381 dma_addr_t iova_stop;
382 const char *fw_image;
383 const char *edl_image;
6fdfdd27 384 size_t rddm_size;
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385 size_t sbl_size;
386 size_t seg_len;
3000f85b 387 struct image_info *fbc_image;
6fdfdd27 388 struct image_info *rddm_image;
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389 struct mhi_chan *mhi_chan;
390 struct list_head lpm_chans;
391 int *irq;
392 u32 max_chan;
393 u32 total_ev_rings;
394 u32 hw_ev_rings;
395 u32 sw_ev_rings;
0cbf2608 396 u32 nr_irqs;
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397 u32 family_number;
398 u32 device_number;
399 u32 major_version;
400 u32 minor_version;
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401 u32 serial_number;
402 u32 oem_pk_hash[MHI_MAX_OEM_PK_HASH_SEGMENTS];
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403
404 struct mhi_event *mhi_event;
405 struct mhi_cmd *mhi_cmd;
406 struct mhi_ctxt *mhi_ctxt;
407
408 struct mutex pm_mutex;
409 rwlock_t pm_lock;
410 u32 timeout_ms;
411 u32 pm_state;
412 u32 db_access;
413 enum mhi_ee_type ee;
a6e2e352 414 enum mhi_state dev_state;
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415 atomic_t dev_wake;
416 atomic_t pending_pkts;
601455da 417 u32 M0, M2, M3;
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418 struct list_head transition_list;
419 spinlock_t transition_lock;
420 spinlock_t wlock;
1d3173a3 421 struct mhi_link_info mhi_link_info;
0cbf2608 422 struct work_struct st_worker;
8f703978 423 struct workqueue_struct *hiprio_wq;
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424 wait_queue_head_t state_event;
425
426 void (*status_cb)(struct mhi_controller *mhi_cntrl,
427 enum mhi_callback cb);
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428 void (*wake_get)(struct mhi_controller *mhi_cntrl, bool override);
429 void (*wake_put)(struct mhi_controller *mhi_cntrl, bool override);
430 void (*wake_toggle)(struct mhi_controller *mhi_cntrl);
431 int (*runtime_get)(struct mhi_controller *mhi_cntrl);
432 void (*runtime_put)(struct mhi_controller *mhi_cntrl);
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433 int (*map_single)(struct mhi_controller *mhi_cntrl,
434 struct mhi_buf_info *buf);
435 void (*unmap_single)(struct mhi_controller *mhi_cntrl,
436 struct mhi_buf_info *buf);
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437 int (*read_reg)(struct mhi_controller *mhi_cntrl, void __iomem *addr,
438 u32 *out);
439 void (*write_reg)(struct mhi_controller *mhi_cntrl, void __iomem *addr,
440 u32 val);
b5a8d233 441 void (*reset)(struct mhi_controller *mhi_cntrl);
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442
443 size_t buffer_len;
206e7383 444 int index;
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445 bool bounce_buf;
446 bool fbc_download;
447 bool pre_init;
448 bool wake_set;
449};
450
451/**
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452 * struct mhi_device - Structure representing an MHI device which binds
453 * to channels or is associated with controllers
0cbf2608 454 * @id: Pointer to MHI device ID struct
5aa93f05 455 * @name: Name of the associated MHI device
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456 * @mhi_cntrl: Controller the device belongs to
457 * @ul_chan: UL channel for the device
458 * @dl_chan: DL channel for the device
459 * @dev: Driver model device node for the MHI device
460 * @dev_type: MHI device type
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461 * @ul_chan_id: MHI channel id for UL transfer
462 * @dl_chan_id: MHI channel id for DL transfer
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463 * @dev_wake: Device wakeup counter
464 */
465struct mhi_device {
466 const struct mhi_device_id *id;
5aa93f05 467 const char *name;
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468 struct mhi_controller *mhi_cntrl;
469 struct mhi_chan *ul_chan;
470 struct mhi_chan *dl_chan;
471 struct device dev;
472 enum mhi_device_type dev_type;
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473 int ul_chan_id;
474 int dl_chan_id;
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475 u32 dev_wake;
476};
477
478/**
479 * struct mhi_result - Completed buffer information
480 * @buf_addr: Address of data buffer
481 * @bytes_xferd: # of bytes transferred
482 * @dir: Channel direction
483 * @transaction_status: Status of last transaction
484 */
485struct mhi_result {
486 void *buf_addr;
487 size_t bytes_xferd;
488 enum dma_data_direction dir;
489 int transaction_status;
490};
491
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492/**
493 * struct mhi_buf - MHI Buffer description
494 * @buf: Virtual address of the buffer
495 * @name: Buffer label. For offload channel, configurations name must be:
496 * ECA - Event context array data
497 * CCA - Channel context array data
498 * @dma_addr: IOMMU address of the buffer
499 * @len: # of bytes
500 */
501struct mhi_buf {
502 void *buf;
503 const char *name;
504 dma_addr_t dma_addr;
505 size_t len;
506};
507
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508/**
509 * struct mhi_driver - Structure representing a MHI client driver
510 * @probe: CB function for client driver probe function
511 * @remove: CB function for client driver remove function
512 * @ul_xfer_cb: CB function for UL data transfer
513 * @dl_xfer_cb: CB function for DL data transfer
514 * @status_cb: CB functions for asynchronous status
515 * @driver: Device driver model driver
516 */
517struct mhi_driver {
518 const struct mhi_device_id *id_table;
519 int (*probe)(struct mhi_device *mhi_dev,
520 const struct mhi_device_id *id);
521 void (*remove)(struct mhi_device *mhi_dev);
522 void (*ul_xfer_cb)(struct mhi_device *mhi_dev,
523 struct mhi_result *result);
524 void (*dl_xfer_cb)(struct mhi_device *mhi_dev,
525 struct mhi_result *result);
526 void (*status_cb)(struct mhi_device *mhi_dev, enum mhi_callback mhi_cb);
527 struct device_driver driver;
528};
529
530#define to_mhi_driver(drv) container_of(drv, struct mhi_driver, driver)
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531#define to_mhi_device(dev) container_of(dev, struct mhi_device, dev)
532
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533/**
534 * mhi_alloc_controller - Allocate the MHI Controller structure
535 * Allocate the mhi_controller structure using zero initialized memory
536 */
537struct mhi_controller *mhi_alloc_controller(void);
538
539/**
540 * mhi_free_controller - Free the MHI Controller structure
541 * Free the mhi_controller structure which was previously allocated
542 */
543void mhi_free_controller(struct mhi_controller *mhi_cntrl);
544
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545/**
546 * mhi_register_controller - Register MHI controller
547 * @mhi_cntrl: MHI controller to register
548 * @config: Configuration to use for the controller
549 */
550int mhi_register_controller(struct mhi_controller *mhi_cntrl,
f38173a7 551 const struct mhi_controller_config *config);
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552
553/**
554 * mhi_unregister_controller - Unregister MHI controller
555 * @mhi_cntrl: MHI controller to unregister
556 */
557void mhi_unregister_controller(struct mhi_controller *mhi_cntrl);
558
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559/*
560 * module_mhi_driver() - Helper macro for drivers that don't do
561 * anything special other than using default mhi_driver_register() and
562 * mhi_driver_unregister(). This eliminates a lot of boilerplate.
563 * Each module may only use this macro once.
564 */
565#define module_mhi_driver(mhi_drv) \
566 module_driver(mhi_drv, mhi_driver_register, \
567 mhi_driver_unregister)
568
569/*
570 * Macro to avoid include chaining to get THIS_MODULE
571 */
572#define mhi_driver_register(mhi_drv) \
573 __mhi_driver_register(mhi_drv, THIS_MODULE)
574
e755cadb 575/**
82174738 576 * __mhi_driver_register - Register driver with MHI framework
e755cadb 577 * @mhi_drv: Driver associated with the device
82174738 578 * @owner: The module owner
e755cadb 579 */
82174738 580int __mhi_driver_register(struct mhi_driver *mhi_drv, struct module *owner);
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581
582/**
583 * mhi_driver_unregister - Unregister a driver for mhi_devices
584 * @mhi_drv: Driver associated with the device
585 */
586void mhi_driver_unregister(struct mhi_driver *mhi_drv);
587
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588/**
589 * mhi_set_mhi_state - Set MHI device state
590 * @mhi_cntrl: MHI controller
591 * @state: State to set
592 */
593void mhi_set_mhi_state(struct mhi_controller *mhi_cntrl,
594 enum mhi_state state);
595
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596/**
597 * mhi_notify - Notify the MHI client driver about client device status
598 * @mhi_dev: MHI device instance
599 * @cb_reason: MHI callback reason
600 */
601void mhi_notify(struct mhi_device *mhi_dev, enum mhi_callback cb_reason);
602
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603/**
604 * mhi_prepare_for_power_up - Do pre-initialization before power up.
605 * This is optional, call this before power up if
606 * the controller does not want bus framework to
607 * automatically free any allocated memory during
608 * shutdown process.
609 * @mhi_cntrl: MHI controller
610 */
611int mhi_prepare_for_power_up(struct mhi_controller *mhi_cntrl);
612
613/**
614 * mhi_async_power_up - Start MHI power up sequence
615 * @mhi_cntrl: MHI controller
616 */
617int mhi_async_power_up(struct mhi_controller *mhi_cntrl);
618
619/**
620 * mhi_sync_power_up - Start MHI power up sequence and wait till the device
4d12a897 621 * enters valid EE state
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622 * @mhi_cntrl: MHI controller
623 */
624int mhi_sync_power_up(struct mhi_controller *mhi_cntrl);
625
626/**
627 * mhi_power_down - Start MHI power down sequence
628 * @mhi_cntrl: MHI controller
629 * @graceful: Link is still accessible, so do a graceful shutdown process
630 */
631void mhi_power_down(struct mhi_controller *mhi_cntrl, bool graceful);
632
633/**
634 * mhi_unprepare_after_power_down - Free any allocated memory after power down
635 * @mhi_cntrl: MHI controller
636 */
637void mhi_unprepare_after_power_down(struct mhi_controller *mhi_cntrl);
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638
639/**
640 * mhi_pm_suspend - Move MHI into a suspended state
641 * @mhi_cntrl: MHI controller
642 */
643int mhi_pm_suspend(struct mhi_controller *mhi_cntrl);
644
645/**
646 * mhi_pm_resume - Resume MHI from suspended state
647 * @mhi_cntrl: MHI controller
648 */
649int mhi_pm_resume(struct mhi_controller *mhi_cntrl);
3000f85b 650
6fdfdd27 651/**
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652 * mhi_download_rddm_image - Download ramdump image from device for
653 * debugging purpose.
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654 * @mhi_cntrl: MHI controller
655 * @in_panic: Download rddm image during kernel panic
656 */
9e1660e5 657int mhi_download_rddm_image(struct mhi_controller *mhi_cntrl, bool in_panic);
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658
659/**
660 * mhi_force_rddm_mode - Force device into rddm mode
661 * @mhi_cntrl: MHI controller
662 */
663int mhi_force_rddm_mode(struct mhi_controller *mhi_cntrl);
664
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665/**
666 * mhi_get_exec_env - Get BHI execution environment of the device
667 * @mhi_cntrl: MHI controller
668 */
669enum mhi_ee_type mhi_get_exec_env(struct mhi_controller *mhi_cntrl);
670
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671/**
672 * mhi_get_mhi_state - Get MHI state of the device
673 * @mhi_cntrl: MHI controller
674 */
675enum mhi_state mhi_get_mhi_state(struct mhi_controller *mhi_cntrl);
676
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677/**
678 * mhi_soc_reset - Trigger a device reset. This can be used as a last resort
679 * to reset and recover a device.
680 * @mhi_cntrl: MHI controller
681 */
682void mhi_soc_reset(struct mhi_controller *mhi_cntrl);
683
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684/**
685 * mhi_device_get - Disable device low power mode
686 * @mhi_dev: Device associated with the channel
687 */
688void mhi_device_get(struct mhi_device *mhi_dev);
689
690/**
691 * mhi_device_get_sync - Disable device low power mode. Synchronously
692 * take the controller out of suspended state
693 * @mhi_dev: Device associated with the channel
694 */
695int mhi_device_get_sync(struct mhi_device *mhi_dev);
696
697/**
698 * mhi_device_put - Re-enable device low power mode
699 * @mhi_dev: Device associated with the channel
700 */
701void mhi_device_put(struct mhi_device *mhi_dev);
702
703/**
704 * mhi_prepare_for_transfer - Setup channel for data transfer
705 * @mhi_dev: Device associated with the channels
706 */
707int mhi_prepare_for_transfer(struct mhi_device *mhi_dev);
708
709/**
710 * mhi_unprepare_from_transfer - Unprepare the channels
711 * @mhi_dev: Device associated with the channels
712 */
713void mhi_unprepare_from_transfer(struct mhi_device *mhi_dev);
714
715/**
716 * mhi_poll - Poll for any available data in DL direction
717 * @mhi_dev: Device associated with the channels
718 * @budget: # of events to process
719 */
720int mhi_poll(struct mhi_device *mhi_dev, u32 budget);
721
722/**
723 * mhi_queue_dma - Send or receive DMA mapped buffers from client device
724 * over MHI channel
725 * @mhi_dev: Device associated with the channels
726 * @dir: DMA direction for the channel
727 * @mhi_buf: Buffer for holding the DMA mapped data
728 * @len: Buffer length
729 * @mflags: MHI transfer flags used for the transfer
730 */
731int mhi_queue_dma(struct mhi_device *mhi_dev, enum dma_data_direction dir,
732 struct mhi_buf *mhi_buf, size_t len, enum mhi_flags mflags);
733
734/**
735 * mhi_queue_buf - Send or receive raw buffers from client device over MHI
736 * channel
737 * @mhi_dev: Device associated with the channels
738 * @dir: DMA direction for the channel
739 * @buf: Buffer for holding the data
740 * @len: Buffer length
741 * @mflags: MHI transfer flags used for the transfer
742 */
743int mhi_queue_buf(struct mhi_device *mhi_dev, enum dma_data_direction dir,
744 void *buf, size_t len, enum mhi_flags mflags);
745
746/**
747 * mhi_queue_skb - Send or receive SKBs from client device over MHI channel
748 * @mhi_dev: Device associated with the channels
749 * @dir: DMA direction for the channel
750 * @skb: Buffer for holding SKBs
751 * @len: Buffer length
752 * @mflags: MHI transfer flags used for the transfer
753 */
754int mhi_queue_skb(struct mhi_device *mhi_dev, enum dma_data_direction dir,
755 struct sk_buff *skb, size_t len, enum mhi_flags mflags);
756
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757/**
758 * mhi_queue_is_full - Determine whether queueing new elements is possible
759 * @mhi_dev: Device associated with the channels
760 * @dir: DMA direction for the channel
761 */
762bool mhi_queue_is_full(struct mhi_device *mhi_dev, enum dma_data_direction dir);
763
0cbf2608 764#endif /* _MHI_H_ */