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0cbf2608 MS |
1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* | |
3 | * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. | |
4 | * | |
5 | */ | |
6 | #ifndef _MHI_H_ | |
7 | #define _MHI_H_ | |
8 | ||
9 | #include <linux/device.h> | |
10 | #include <linux/dma-direction.h> | |
11 | #include <linux/mutex.h> | |
12 | #include <linux/rwlock_types.h> | |
13 | #include <linux/slab.h> | |
14 | #include <linux/spinlock_types.h> | |
15 | #include <linux/wait.h> | |
16 | #include <linux/workqueue.h> | |
17 | ||
18 | struct mhi_chan; | |
19 | struct mhi_event; | |
20 | struct mhi_ctxt; | |
21 | struct mhi_cmd; | |
22 | struct mhi_buf_info; | |
23 | ||
24 | /** | |
25 | * enum mhi_callback - MHI callback | |
26 | * @MHI_CB_IDLE: MHI entered idle state | |
27 | * @MHI_CB_PENDING_DATA: New data available for client to process | |
28 | * @MHI_CB_LPM_ENTER: MHI host entered low power mode | |
29 | * @MHI_CB_LPM_EXIT: MHI host about to exit low power mode | |
30 | * @MHI_CB_EE_RDDM: MHI device entered RDDM exec env | |
31 | * @MHI_CB_EE_MISSION_MODE: MHI device entered Mission Mode exec env | |
32 | * @MHI_CB_SYS_ERROR: MHI device entered error state (may recover) | |
33 | * @MHI_CB_FATAL_ERROR: MHI device entered fatal error state | |
34 | */ | |
35 | enum mhi_callback { | |
36 | MHI_CB_IDLE, | |
37 | MHI_CB_PENDING_DATA, | |
38 | MHI_CB_LPM_ENTER, | |
39 | MHI_CB_LPM_EXIT, | |
40 | MHI_CB_EE_RDDM, | |
41 | MHI_CB_EE_MISSION_MODE, | |
42 | MHI_CB_SYS_ERROR, | |
43 | MHI_CB_FATAL_ERROR, | |
44 | }; | |
45 | ||
46 | /** | |
47 | * enum mhi_flags - Transfer flags | |
48 | * @MHI_EOB: End of buffer for bulk transfer | |
49 | * @MHI_EOT: End of transfer | |
50 | * @MHI_CHAIN: Linked transfer | |
51 | */ | |
52 | enum mhi_flags { | |
53 | MHI_EOB, | |
54 | MHI_EOT, | |
55 | MHI_CHAIN, | |
56 | }; | |
57 | ||
58 | /** | |
59 | * enum mhi_device_type - Device types | |
60 | * @MHI_DEVICE_XFER: Handles data transfer | |
61 | * @MHI_DEVICE_CONTROLLER: Control device | |
62 | */ | |
63 | enum mhi_device_type { | |
64 | MHI_DEVICE_XFER, | |
65 | MHI_DEVICE_CONTROLLER, | |
66 | }; | |
67 | ||
68 | /** | |
69 | * enum mhi_ch_type - Channel types | |
70 | * @MHI_CH_TYPE_INVALID: Invalid channel type | |
71 | * @MHI_CH_TYPE_OUTBOUND: Outbound channel to the device | |
72 | * @MHI_CH_TYPE_INBOUND: Inbound channel from the device | |
73 | * @MHI_CH_TYPE_INBOUND_COALESCED: Coalesced channel for the device to combine | |
74 | * multiple packets and send them as a single | |
75 | * large packet to reduce CPU consumption | |
76 | */ | |
77 | enum mhi_ch_type { | |
78 | MHI_CH_TYPE_INVALID = 0, | |
79 | MHI_CH_TYPE_OUTBOUND = DMA_TO_DEVICE, | |
80 | MHI_CH_TYPE_INBOUND = DMA_FROM_DEVICE, | |
81 | MHI_CH_TYPE_INBOUND_COALESCED = 3, | |
82 | }; | |
83 | ||
3000f85b MS |
84 | /** |
85 | * struct image_info - Firmware and RDDM table table | |
86 | * @mhi_buf - Buffer for firmware and RDDM table | |
87 | * @entries - # of entries in table | |
88 | */ | |
89 | struct image_info { | |
90 | struct mhi_buf *mhi_buf; | |
91 | struct bhi_vec_entry *bhi_vec; | |
92 | u32 entries; | |
93 | }; | |
94 | ||
0cbf2608 MS |
95 | /** |
96 | * enum mhi_ee_type - Execution environment types | |
97 | * @MHI_EE_PBL: Primary Bootloader | |
98 | * @MHI_EE_SBL: Secondary Bootloader | |
99 | * @MHI_EE_AMSS: Modem, aka the primary runtime EE | |
100 | * @MHI_EE_RDDM: Ram dump download mode | |
101 | * @MHI_EE_WFW: WLAN firmware mode | |
102 | * @MHI_EE_PTHRU: Passthrough | |
103 | * @MHI_EE_EDL: Embedded downloader | |
104 | */ | |
105 | enum mhi_ee_type { | |
106 | MHI_EE_PBL, | |
107 | MHI_EE_SBL, | |
108 | MHI_EE_AMSS, | |
109 | MHI_EE_RDDM, | |
110 | MHI_EE_WFW, | |
111 | MHI_EE_PTHRU, | |
112 | MHI_EE_EDL, | |
113 | MHI_EE_MAX_SUPPORTED = MHI_EE_EDL, | |
114 | MHI_EE_DISABLE_TRANSITION, /* local EE, not related to mhi spec */ | |
115 | MHI_EE_NOT_SUPPORTED, | |
116 | MHI_EE_MAX, | |
117 | }; | |
118 | ||
a6e2e352 MS |
119 | /** |
120 | * enum mhi_state - MHI states | |
121 | * @MHI_STATE_RESET: Reset state | |
122 | * @MHI_STATE_READY: Ready state | |
123 | * @MHI_STATE_M0: M0 state | |
124 | * @MHI_STATE_M1: M1 state | |
125 | * @MHI_STATE_M2: M2 state | |
126 | * @MHI_STATE_M3: M3 state | |
127 | * @MHI_STATE_M3_FAST: M3 Fast state | |
128 | * @MHI_STATE_BHI: BHI state | |
129 | * @MHI_STATE_SYS_ERR: System Error state | |
130 | */ | |
131 | enum mhi_state { | |
132 | MHI_STATE_RESET = 0x0, | |
133 | MHI_STATE_READY = 0x1, | |
134 | MHI_STATE_M0 = 0x2, | |
135 | MHI_STATE_M1 = 0x3, | |
136 | MHI_STATE_M2 = 0x4, | |
137 | MHI_STATE_M3 = 0x5, | |
138 | MHI_STATE_M3_FAST = 0x6, | |
139 | MHI_STATE_BHI = 0x7, | |
140 | MHI_STATE_SYS_ERR = 0xFF, | |
141 | MHI_STATE_MAX, | |
142 | }; | |
143 | ||
0cbf2608 MS |
144 | /** |
145 | * enum mhi_ch_ee_mask - Execution environment mask for channel | |
146 | * @MHI_CH_EE_PBL: Allow channel to be used in PBL EE | |
147 | * @MHI_CH_EE_SBL: Allow channel to be used in SBL EE | |
148 | * @MHI_CH_EE_AMSS: Allow channel to be used in AMSS EE | |
149 | * @MHI_CH_EE_RDDM: Allow channel to be used in RDDM EE | |
150 | * @MHI_CH_EE_PTHRU: Allow channel to be used in PTHRU EE | |
151 | * @MHI_CH_EE_WFW: Allow channel to be used in WFW EE | |
152 | * @MHI_CH_EE_EDL: Allow channel to be used in EDL EE | |
153 | */ | |
154 | enum mhi_ch_ee_mask { | |
155 | MHI_CH_EE_PBL = BIT(MHI_EE_PBL), | |
156 | MHI_CH_EE_SBL = BIT(MHI_EE_SBL), | |
157 | MHI_CH_EE_AMSS = BIT(MHI_EE_AMSS), | |
158 | MHI_CH_EE_RDDM = BIT(MHI_EE_RDDM), | |
159 | MHI_CH_EE_PTHRU = BIT(MHI_EE_PTHRU), | |
160 | MHI_CH_EE_WFW = BIT(MHI_EE_WFW), | |
161 | MHI_CH_EE_EDL = BIT(MHI_EE_EDL), | |
162 | }; | |
163 | ||
164 | /** | |
165 | * enum mhi_er_data_type - Event ring data types | |
166 | * @MHI_ER_DATA: Only client data over this ring | |
167 | * @MHI_ER_CTRL: MHI control data and client data | |
168 | */ | |
169 | enum mhi_er_data_type { | |
170 | MHI_ER_DATA, | |
171 | MHI_ER_CTRL, | |
172 | }; | |
173 | ||
174 | /** | |
175 | * enum mhi_db_brst_mode - Doorbell mode | |
176 | * @MHI_DB_BRST_DISABLE: Burst mode disable | |
177 | * @MHI_DB_BRST_ENABLE: Burst mode enable | |
178 | */ | |
179 | enum mhi_db_brst_mode { | |
180 | MHI_DB_BRST_DISABLE = 0x2, | |
181 | MHI_DB_BRST_ENABLE = 0x3, | |
182 | }; | |
183 | ||
184 | /** | |
185 | * struct mhi_channel_config - Channel configuration structure for controller | |
186 | * @name: The name of this channel | |
187 | * @num: The number assigned to this channel | |
188 | * @num_elements: The number of elements that can be queued to this channel | |
189 | * @local_elements: The local ring length of the channel | |
190 | * @event_ring: The event rung index that services this channel | |
191 | * @dir: Direction that data may flow on this channel | |
192 | * @type: Channel type | |
193 | * @ee_mask: Execution Environment mask for this channel | |
194 | * @pollcfg: Polling configuration for burst mode. 0 is default. milliseconds | |
195 | for UL channels, multiple of 8 ring elements for DL channels | |
196 | * @doorbell: Doorbell mode | |
197 | * @lpm_notify: The channel master requires low power mode notifications | |
198 | * @offload_channel: The client manages the channel completely | |
199 | * @doorbell_mode_switch: Channel switches to doorbell mode on M0 transition | |
200 | * @auto_queue: Framework will automatically queue buffers for DL traffic | |
201 | * @auto_start: Automatically start (open) this channel | |
da1c4f85 | 202 | * @wake-capable: Channel capable of waking up the system |
0cbf2608 MS |
203 | */ |
204 | struct mhi_channel_config { | |
205 | char *name; | |
206 | u32 num; | |
207 | u32 num_elements; | |
208 | u32 local_elements; | |
209 | u32 event_ring; | |
210 | enum dma_data_direction dir; | |
211 | enum mhi_ch_type type; | |
212 | u32 ee_mask; | |
213 | u32 pollcfg; | |
214 | enum mhi_db_brst_mode doorbell; | |
215 | bool lpm_notify; | |
216 | bool offload_channel; | |
217 | bool doorbell_mode_switch; | |
218 | bool auto_queue; | |
219 | bool auto_start; | |
da1c4f85 | 220 | bool wake_capable; |
0cbf2608 MS |
221 | }; |
222 | ||
223 | /** | |
224 | * struct mhi_event_config - Event ring configuration structure for controller | |
225 | * @num_elements: The number of elements that can be queued to this ring | |
226 | * @irq_moderation_ms: Delay irq for additional events to be aggregated | |
227 | * @irq: IRQ associated with this ring | |
228 | * @channel: Dedicated channel number. U32_MAX indicates a non-dedicated ring | |
229 | * @priority: Priority of this ring. Use 1 for now | |
230 | * @mode: Doorbell mode | |
231 | * @data_type: Type of data this ring will process | |
232 | * @hardware_event: This ring is associated with hardware channels | |
233 | * @client_managed: This ring is client managed | |
234 | * @offload_channel: This ring is associated with an offloaded channel | |
235 | */ | |
236 | struct mhi_event_config { | |
237 | u32 num_elements; | |
238 | u32 irq_moderation_ms; | |
239 | u32 irq; | |
240 | u32 channel; | |
241 | u32 priority; | |
242 | enum mhi_db_brst_mode mode; | |
243 | enum mhi_er_data_type data_type; | |
244 | bool hardware_event; | |
245 | bool client_managed; | |
246 | bool offload_channel; | |
247 | }; | |
248 | ||
249 | /** | |
250 | * struct mhi_controller_config - Root MHI controller configuration | |
251 | * @max_channels: Maximum number of channels supported | |
252 | * @timeout_ms: Timeout value for operations. 0 means use default | |
253 | * @buf_len: Size of automatically allocated buffers. 0 means use default | |
254 | * @num_channels: Number of channels defined in @ch_cfg | |
255 | * @ch_cfg: Array of defined channels | |
256 | * @num_events: Number of event rings defined in @event_cfg | |
257 | * @event_cfg: Array of defined event rings | |
258 | * @use_bounce_buf: Use a bounce buffer pool due to limited DDR access | |
259 | * @m2_no_db: Host is not allowed to ring DB in M2 state | |
260 | */ | |
261 | struct mhi_controller_config { | |
262 | u32 max_channels; | |
263 | u32 timeout_ms; | |
264 | u32 buf_len; | |
265 | u32 num_channels; | |
266 | struct mhi_channel_config *ch_cfg; | |
267 | u32 num_events; | |
268 | struct mhi_event_config *event_cfg; | |
269 | bool use_bounce_buf; | |
270 | bool m2_no_db; | |
271 | }; | |
272 | ||
273 | /** | |
274 | * struct mhi_controller - Master MHI controller structure | |
275 | * @cntrl_dev: Pointer to the struct device of physical bus acting as the MHI | |
276 | * controller (required) | |
277 | * @mhi_dev: MHI device instance for the controller | |
278 | * @regs: Base address of MHI MMIO register space (required) | |
6cd330ae | 279 | * @bhi: Points to base of MHI BHI register space |
3000f85b | 280 | * @bhie: Points to base of MHI BHIe register space |
6cd330ae | 281 | * @wake_db: MHI WAKE doorbell register address |
0cbf2608 MS |
282 | * @iova_start: IOMMU starting address for data (required) |
283 | * @iova_stop: IOMMU stop address for data (required) | |
284 | * @fw_image: Firmware image name for normal booting (required) | |
285 | * @edl_image: Firmware image name for emergency download mode (optional) | |
286 | * @sbl_size: SBL image size downloaded through BHIe (optional) | |
287 | * @seg_len: BHIe vector size (optional) | |
3000f85b | 288 | * @fbc_image: Points to firmware image buffer |
0cbf2608 MS |
289 | * @mhi_chan: Points to the channel configuration table |
290 | * @lpm_chans: List of channels that require LPM notifications | |
291 | * @irq: base irq # to request (required) | |
292 | * @max_chan: Maximum number of channels the controller supports | |
293 | * @total_ev_rings: Total # of event rings allocated | |
294 | * @hw_ev_rings: Number of hardware event rings | |
295 | * @sw_ev_rings: Number of software event rings | |
296 | * @nr_irqs_req: Number of IRQs required to operate (optional) | |
297 | * @nr_irqs: Number of IRQ allocated by bus master (required) | |
298 | * @mhi_event: MHI event ring configurations table | |
299 | * @mhi_cmd: MHI command ring configurations table | |
300 | * @mhi_ctxt: MHI device context, shared memory between host and device | |
301 | * @pm_mutex: Mutex for suspend/resume operation | |
302 | * @pm_lock: Lock for protecting MHI power management state | |
303 | * @timeout_ms: Timeout in ms for state transitions | |
304 | * @pm_state: MHI power management state | |
305 | * @db_access: DB access states | |
306 | * @ee: MHI device execution environment | |
a6e2e352 | 307 | * @dev_state: MHI device state |
0cbf2608 MS |
308 | * @dev_wake: Device wakeup count |
309 | * @pending_pkts: Pending packets for the controller | |
310 | * @transition_list: List of MHI state transitions | |
311 | * @transition_lock: Lock for protecting MHI state transition list | |
312 | * @wlock: Lock for protecting device wakeup | |
313 | * @st_worker: State transition worker | |
314 | * @fw_worker: Firmware download worker | |
315 | * @syserr_worker: System error worker | |
316 | * @state_event: State change event | |
317 | * @status_cb: CB function to notify power states of the device (required) | |
318 | * @link_status: CB function to query link status of the device (required) | |
319 | * @wake_get: CB function to assert device wake (optional) | |
320 | * @wake_put: CB function to de-assert device wake (optional) | |
321 | * @wake_toggle: CB function to assert and de-assert device wake (optional) | |
322 | * @runtime_get: CB function to controller runtime resume (required) | |
323 | * @runtimet_put: CB function to decrement pm usage (required) | |
324 | * @buffer_len: Bounce buffer length | |
325 | * @bounce_buf: Use of bounce buffer | |
326 | * @fbc_download: MHI host needs to do complete image transfer (optional) | |
327 | * @pre_init: MHI host needs to do pre-initialization before power up | |
328 | * @wake_set: Device wakeup set flag | |
329 | * | |
330 | * Fields marked as (required) need to be populated by the controller driver | |
331 | * before calling mhi_register_controller(). For the fields marked as (optional) | |
332 | * they can be populated depending on the usecase. | |
333 | */ | |
334 | struct mhi_controller { | |
335 | struct device *cntrl_dev; | |
336 | struct mhi_device *mhi_dev; | |
337 | void __iomem *regs; | |
6cd330ae | 338 | void __iomem *bhi; |
3000f85b | 339 | void __iomem *bhie; |
6cd330ae | 340 | void __iomem *wake_db; |
a6e2e352 | 341 | |
0cbf2608 MS |
342 | dma_addr_t iova_start; |
343 | dma_addr_t iova_stop; | |
344 | const char *fw_image; | |
345 | const char *edl_image; | |
346 | size_t sbl_size; | |
347 | size_t seg_len; | |
3000f85b | 348 | struct image_info *fbc_image; |
0cbf2608 MS |
349 | struct mhi_chan *mhi_chan; |
350 | struct list_head lpm_chans; | |
351 | int *irq; | |
352 | u32 max_chan; | |
353 | u32 total_ev_rings; | |
354 | u32 hw_ev_rings; | |
355 | u32 sw_ev_rings; | |
356 | u32 nr_irqs_req; | |
357 | u32 nr_irqs; | |
358 | ||
359 | struct mhi_event *mhi_event; | |
360 | struct mhi_cmd *mhi_cmd; | |
361 | struct mhi_ctxt *mhi_ctxt; | |
362 | ||
363 | struct mutex pm_mutex; | |
364 | rwlock_t pm_lock; | |
365 | u32 timeout_ms; | |
366 | u32 pm_state; | |
367 | u32 db_access; | |
368 | enum mhi_ee_type ee; | |
a6e2e352 | 369 | enum mhi_state dev_state; |
0cbf2608 MS |
370 | atomic_t dev_wake; |
371 | atomic_t pending_pkts; | |
372 | struct list_head transition_list; | |
373 | spinlock_t transition_lock; | |
374 | spinlock_t wlock; | |
375 | struct work_struct st_worker; | |
376 | struct work_struct fw_worker; | |
377 | struct work_struct syserr_worker; | |
378 | wait_queue_head_t state_event; | |
379 | ||
380 | void (*status_cb)(struct mhi_controller *mhi_cntrl, | |
381 | enum mhi_callback cb); | |
382 | int (*link_status)(struct mhi_controller *mhi_cntrl); | |
383 | void (*wake_get)(struct mhi_controller *mhi_cntrl, bool override); | |
384 | void (*wake_put)(struct mhi_controller *mhi_cntrl, bool override); | |
385 | void (*wake_toggle)(struct mhi_controller *mhi_cntrl); | |
386 | int (*runtime_get)(struct mhi_controller *mhi_cntrl); | |
387 | void (*runtime_put)(struct mhi_controller *mhi_cntrl); | |
388 | ||
389 | size_t buffer_len; | |
390 | bool bounce_buf; | |
391 | bool fbc_download; | |
392 | bool pre_init; | |
393 | bool wake_set; | |
394 | }; | |
395 | ||
396 | /** | |
397 | * struct mhi_device - Structure representing a MHI device which binds | |
398 | * to channels | |
399 | * @id: Pointer to MHI device ID struct | |
400 | * @chan_name: Name of the channel to which the device binds | |
401 | * @mhi_cntrl: Controller the device belongs to | |
402 | * @ul_chan: UL channel for the device | |
403 | * @dl_chan: DL channel for the device | |
404 | * @dev: Driver model device node for the MHI device | |
405 | * @dev_type: MHI device type | |
e755cadb MS |
406 | * @ul_chan_id: MHI channel id for UL transfer |
407 | * @dl_chan_id: MHI channel id for DL transfer | |
0cbf2608 MS |
408 | * @dev_wake: Device wakeup counter |
409 | */ | |
410 | struct mhi_device { | |
411 | const struct mhi_device_id *id; | |
412 | const char *chan_name; | |
413 | struct mhi_controller *mhi_cntrl; | |
414 | struct mhi_chan *ul_chan; | |
415 | struct mhi_chan *dl_chan; | |
416 | struct device dev; | |
417 | enum mhi_device_type dev_type; | |
e755cadb MS |
418 | int ul_chan_id; |
419 | int dl_chan_id; | |
0cbf2608 MS |
420 | u32 dev_wake; |
421 | }; | |
422 | ||
423 | /** | |
424 | * struct mhi_result - Completed buffer information | |
425 | * @buf_addr: Address of data buffer | |
426 | * @bytes_xferd: # of bytes transferred | |
427 | * @dir: Channel direction | |
428 | * @transaction_status: Status of last transaction | |
429 | */ | |
430 | struct mhi_result { | |
431 | void *buf_addr; | |
432 | size_t bytes_xferd; | |
433 | enum dma_data_direction dir; | |
434 | int transaction_status; | |
435 | }; | |
436 | ||
a6e2e352 MS |
437 | /** |
438 | * struct mhi_buf - MHI Buffer description | |
439 | * @buf: Virtual address of the buffer | |
440 | * @name: Buffer label. For offload channel, configurations name must be: | |
441 | * ECA - Event context array data | |
442 | * CCA - Channel context array data | |
443 | * @dma_addr: IOMMU address of the buffer | |
444 | * @len: # of bytes | |
445 | */ | |
446 | struct mhi_buf { | |
447 | void *buf; | |
448 | const char *name; | |
449 | dma_addr_t dma_addr; | |
450 | size_t len; | |
451 | }; | |
452 | ||
e755cadb MS |
453 | /** |
454 | * struct mhi_driver - Structure representing a MHI client driver | |
455 | * @probe: CB function for client driver probe function | |
456 | * @remove: CB function for client driver remove function | |
457 | * @ul_xfer_cb: CB function for UL data transfer | |
458 | * @dl_xfer_cb: CB function for DL data transfer | |
459 | * @status_cb: CB functions for asynchronous status | |
460 | * @driver: Device driver model driver | |
461 | */ | |
462 | struct mhi_driver { | |
463 | const struct mhi_device_id *id_table; | |
464 | int (*probe)(struct mhi_device *mhi_dev, | |
465 | const struct mhi_device_id *id); | |
466 | void (*remove)(struct mhi_device *mhi_dev); | |
467 | void (*ul_xfer_cb)(struct mhi_device *mhi_dev, | |
468 | struct mhi_result *result); | |
469 | void (*dl_xfer_cb)(struct mhi_device *mhi_dev, | |
470 | struct mhi_result *result); | |
471 | void (*status_cb)(struct mhi_device *mhi_dev, enum mhi_callback mhi_cb); | |
472 | struct device_driver driver; | |
473 | }; | |
474 | ||
475 | #define to_mhi_driver(drv) container_of(drv, struct mhi_driver, driver) | |
0cbf2608 MS |
476 | #define to_mhi_device(dev) container_of(dev, struct mhi_device, dev) |
477 | ||
478 | /** | |
479 | * mhi_register_controller - Register MHI controller | |
480 | * @mhi_cntrl: MHI controller to register | |
481 | * @config: Configuration to use for the controller | |
482 | */ | |
483 | int mhi_register_controller(struct mhi_controller *mhi_cntrl, | |
484 | struct mhi_controller_config *config); | |
485 | ||
486 | /** | |
487 | * mhi_unregister_controller - Unregister MHI controller | |
488 | * @mhi_cntrl: MHI controller to unregister | |
489 | */ | |
490 | void mhi_unregister_controller(struct mhi_controller *mhi_cntrl); | |
491 | ||
e755cadb MS |
492 | /** |
493 | * mhi_driver_register - Register driver with MHI framework | |
494 | * @mhi_drv: Driver associated with the device | |
495 | */ | |
496 | int mhi_driver_register(struct mhi_driver *mhi_drv); | |
497 | ||
498 | /** | |
499 | * mhi_driver_unregister - Unregister a driver for mhi_devices | |
500 | * @mhi_drv: Driver associated with the device | |
501 | */ | |
502 | void mhi_driver_unregister(struct mhi_driver *mhi_drv); | |
503 | ||
a6e2e352 MS |
504 | /** |
505 | * mhi_set_mhi_state - Set MHI device state | |
506 | * @mhi_cntrl: MHI controller | |
507 | * @state: State to set | |
508 | */ | |
509 | void mhi_set_mhi_state(struct mhi_controller *mhi_cntrl, | |
510 | enum mhi_state state); | |
511 | ||
3000f85b MS |
512 | /** |
513 | * mhi_prepare_for_power_up - Do pre-initialization before power up. | |
514 | * This is optional, call this before power up if | |
515 | * the controller does not want bus framework to | |
516 | * automatically free any allocated memory during | |
517 | * shutdown process. | |
518 | * @mhi_cntrl: MHI controller | |
519 | */ | |
520 | int mhi_prepare_for_power_up(struct mhi_controller *mhi_cntrl); | |
521 | ||
522 | /** | |
523 | * mhi_async_power_up - Start MHI power up sequence | |
524 | * @mhi_cntrl: MHI controller | |
525 | */ | |
526 | int mhi_async_power_up(struct mhi_controller *mhi_cntrl); | |
527 | ||
528 | /** | |
529 | * mhi_sync_power_up - Start MHI power up sequence and wait till the device | |
530 | * device enters valid EE state | |
531 | * @mhi_cntrl: MHI controller | |
532 | */ | |
533 | int mhi_sync_power_up(struct mhi_controller *mhi_cntrl); | |
534 | ||
535 | /** | |
536 | * mhi_power_down - Start MHI power down sequence | |
537 | * @mhi_cntrl: MHI controller | |
538 | * @graceful: Link is still accessible, so do a graceful shutdown process | |
539 | */ | |
540 | void mhi_power_down(struct mhi_controller *mhi_cntrl, bool graceful); | |
541 | ||
542 | /** | |
543 | * mhi_unprepare_after_power_down - Free any allocated memory after power down | |
544 | * @mhi_cntrl: MHI controller | |
545 | */ | |
546 | void mhi_unprepare_after_power_down(struct mhi_controller *mhi_cntrl); | |
547 | ||
0cbf2608 | 548 | #endif /* _MHI_H_ */ |