Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64...
[linux-2.6-block.git] / include / linux / mfd / stmpe.h
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1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License, version 2
5 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
6 */
7
8#ifndef __LINUX_MFD_STMPE_H
9#define __LINUX_MFD_STMPE_H
10
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11#include <linux/mutex.h>
12
13struct device;
9c9e3214 14struct regulator;
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15
16enum stmpe_block {
17 STMPE_BLOCK_GPIO = 1 << 0,
18 STMPE_BLOCK_KEYPAD = 1 << 1,
19 STMPE_BLOCK_TOUCHSCREEN = 1 << 2,
20 STMPE_BLOCK_ADC = 1 << 3,
21 STMPE_BLOCK_PWM = 1 << 4,
22 STMPE_BLOCK_ROTATOR = 1 << 5,
23};
24
25enum stmpe_partnum {
1cda2394 26 STMPE610,
7f7f4ea1 27 STMPE801,
27e34995 28 STMPE811,
6bb9f0d9 29 STMPE1600,
27e34995 30 STMPE1601,
230f13a5 31 STMPE1801,
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32 STMPE2401,
33 STMPE2403,
e31f9b82 34 STMPE_NBR_PARTS
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35};
36
37/*
38 * For registers whose locations differ on variants, the correct address is
39 * obtained by indexing stmpe->regs with one of the following.
40 */
41enum {
42 STMPE_IDX_CHIP_ID,
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43 STMPE_IDX_SYS_CTRL,
44 STMPE_IDX_SYS_CTRL2,
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45 STMPE_IDX_ICR_LSB,
46 STMPE_IDX_IER_LSB,
897ac667 47 STMPE_IDX_IER_MSB,
230f13a5 48 STMPE_IDX_ISR_LSB,
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49 STMPE_IDX_ISR_MSB,
50 STMPE_IDX_GPMR_LSB,
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51 STMPE_IDX_GPMR_CSB,
52 STMPE_IDX_GPMR_MSB,
27e34995 53 STMPE_IDX_GPSR_LSB,
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54 STMPE_IDX_GPSR_CSB,
55 STMPE_IDX_GPSR_MSB,
27e34995 56 STMPE_IDX_GPCR_LSB,
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57 STMPE_IDX_GPCR_CSB,
58 STMPE_IDX_GPCR_MSB,
27e34995 59 STMPE_IDX_GPDR_LSB,
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60 STMPE_IDX_GPDR_CSB,
61 STMPE_IDX_GPDR_MSB,
62 STMPE_IDX_GPEDR_LSB,
63 STMPE_IDX_GPEDR_CSB,
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64 STMPE_IDX_GPEDR_MSB,
65 STMPE_IDX_GPRER_LSB,
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66 STMPE_IDX_GPRER_CSB,
67 STMPE_IDX_GPRER_MSB,
27e34995 68 STMPE_IDX_GPFER_LSB,
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69 STMPE_IDX_GPFER_CSB,
70 STMPE_IDX_GPFER_MSB,
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71 STMPE_IDX_GPPUR_LSB,
72 STMPE_IDX_GPPDR_LSB,
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73 STMPE_IDX_GPAFR_U_MSB,
74 STMPE_IDX_IEGPIOR_LSB,
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75 STMPE_IDX_IEGPIOR_CSB,
76 STMPE_IDX_IEGPIOR_MSB,
230f13a5 77 STMPE_IDX_ISGPIOR_LSB,
897ac667 78 STMPE_IDX_ISGPIOR_CSB,
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79 STMPE_IDX_ISGPIOR_MSB,
80 STMPE_IDX_MAX,
81};
82
83
84struct stmpe_variant_info;
1a6e4b74 85struct stmpe_client_info;
fc1882dc 86struct stmpe_platform_data;
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87
88/**
89 * struct stmpe - STMPE MFD structure
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90 * @vcc: optional VCC regulator
91 * @vio: optional VIO regulator
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92 * @lock: lock protecting I/O operations
93 * @irq_lock: IRQ bus lock
94 * @dev: device, mostly for dev_dbg()
76f93992 95 * @irq_domain: IRQ domain
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96 * @client: client - i2c or spi
97 * @ci: client specific information
4dcaa6b6 98 * @partnum: part number
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99 * @variant: the detected STMPE model number
100 * @regs: list of addresses of registers which are at different addresses on
101 * different variants. Indexed by one of STMPE_IDX_*.
73de16db 102 * @irq: irq number for stmpe
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103 * @num_gpios: number of gpios, differs for variants
104 * @ier: cache of IER registers for bus_lock
105 * @oldier: cache of IER registers for bus_lock
106 * @pdata: platform data
107 */
108struct stmpe {
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109 struct regulator *vcc;
110 struct regulator *vio;
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111 struct mutex lock;
112 struct mutex irq_lock;
113 struct device *dev;
76f93992 114 struct irq_domain *domain;
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115 void *client;
116 struct stmpe_client_info *ci;
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117 enum stmpe_partnum partnum;
118 struct stmpe_variant_info *variant;
119 const u8 *regs;
120
73de16db 121 int irq;
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122 int num_gpios;
123 u8 ier[2];
124 u8 oldier[2];
125 struct stmpe_platform_data *pdata;
126};
127
128extern int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 data);
129extern int stmpe_reg_read(struct stmpe *stmpe, u8 reg);
130extern int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length,
131 u8 *values);
132extern int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
133 const u8 *values);
134extern int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val);
135extern int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins,
136 enum stmpe_block block);
137extern int stmpe_enable(struct stmpe *stmpe, unsigned int blocks);
138extern int stmpe_disable(struct stmpe *stmpe, unsigned int blocks);
139
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140#define STMPE_GPIO_NOREQ_811_TOUCH (0xf0)
141
27e34995 142#endif