[linux-2.6-block.git] / include / linux / mfd / samsung / s2mps11.h

/*
 * s2mps11.h
 *
 * Copyright (c) 2012 Samsung Electronics Co., Ltd
 *              http://www.samsung.com
 *
 *  This program is free software; you can redistribute  it and/or modify it
 *  under  the terms of  the GNU General  Public License as published by the
 *  Free Software Foundation;  either version 2 of the  License, or (at your
 *  option) any later version.
 *
 */

#ifndef __LINUX_MFD_S2MPS11_H
#define __LINUX_MFD_S2MPS11_H

/* S2MPS11 registers */
enum s2mps11_reg {
	S2MPS11_REG_ID,
	S2MPS11_REG_INT1,
	S2MPS11_REG_INT2,
	S2MPS11_REG_INT3,
	S2MPS11_REG_INT1M,
	S2MPS11_REG_INT2M,
	S2MPS11_REG_INT3M,
	S2MPS11_REG_ST1,
	S2MPS11_REG_ST2,
	S2MPS11_REG_OFFSRC,
	S2MPS11_REG_PWRONSRC,
	S2MPS11_REG_RTC_CTRL,
	S2MPS11_REG_CTRL1,
	S2MPS11_REG_ETC_TEST,
	S2MPS11_REG_RSVD3,
	S2MPS11_REG_BU_CHG,
	S2MPS11_REG_RAMP,
	S2MPS11_REG_RAMP_BUCK,
	S2MPS11_REG_LDO1_8,
	S2MPS11_REG_LDO9_16,
	S2MPS11_REG_LDO17_24,
	S2MPS11_REG_LDO25_32,
	S2MPS11_REG_LDO33_38,
	S2MPS11_REG_LDO1_8_1,
	S2MPS11_REG_LDO9_16_1,
	S2MPS11_REG_LDO17_24_1,
	S2MPS11_REG_LDO25_32_1,
	S2MPS11_REG_LDO33_38_1,
	S2MPS11_REG_OTP_ADRL,
	S2MPS11_REG_OTP_ADRH,
	S2MPS11_REG_OTP_DATA,
	S2MPS11_REG_MON1SEL,
	S2MPS11_REG_MON2SEL,
	S2MPS11_REG_LEE,
	S2MPS11_REG_RSVD_NO,
	S2MPS11_REG_UVLO,
	S2MPS11_REG_LEE_NO,
	S2MPS11_REG_B1CTRL1,
	S2MPS11_REG_B1CTRL2,
	S2MPS11_REG_B2CTRL1,
	S2MPS11_REG_B2CTRL2,
	S2MPS11_REG_B3CTRL1,
	S2MPS11_REG_B3CTRL2,
	S2MPS11_REG_B4CTRL1,
	S2MPS11_REG_B4CTRL2,
	S2MPS11_REG_B5CTRL1,
	S2MPS11_REG_BUCK5_SW,
	S2MPS11_REG_B5CTRL2,
	S2MPS11_REG_B5CTRL3,
	S2MPS11_REG_B5CTRL4,
	S2MPS11_REG_B5CTRL5,
	S2MPS11_REG_B6CTRL1,
	S2MPS11_REG_B6CTRL2,
	S2MPS11_REG_B7CTRL1,
	S2MPS11_REG_B7CTRL2,
	S2MPS11_REG_B8CTRL1,
	S2MPS11_REG_B8CTRL2,
	S2MPS11_REG_B9CTRL1,
	S2MPS11_REG_B9CTRL2,
	S2MPS11_REG_B10CTRL1,
	S2MPS11_REG_B10CTRL2,
	S2MPS11_REG_L1CTRL,
	S2MPS11_REG_L2CTRL,
	S2MPS11_REG_L3CTRL,
	S2MPS11_REG_L4CTRL,
	S2MPS11_REG_L5CTRL,
	S2MPS11_REG_L6CTRL,
	S2MPS11_REG_L7CTRL,
	S2MPS11_REG_L8CTRL,
	S2MPS11_REG_L9CTRL,
	S2MPS11_REG_L10CTRL,
	S2MPS11_REG_L11CTRL,
	S2MPS11_REG_L12CTRL,
	S2MPS11_REG_L13CTRL,
	S2MPS11_REG_L14CTRL,
	S2MPS11_REG_L15CTRL,
	S2MPS11_REG_L16CTRL,
	S2MPS11_REG_L17CTRL,
	S2MPS11_REG_L18CTRL,
	S2MPS11_REG_L19CTRL,
	S2MPS11_REG_L20CTRL,
	S2MPS11_REG_L21CTRL,
	S2MPS11_REG_L22CTRL,
	S2MPS11_REG_L23CTRL,
	S2MPS11_REG_L24CTRL,
	S2MPS11_REG_L25CTRL,
	S2MPS11_REG_L26CTRL,
	S2MPS11_REG_L27CTRL,
	S2MPS11_REG_L28CTRL,
	S2MPS11_REG_L29CTRL,
	S2MPS11_REG_L30CTRL,
	S2MPS11_REG_L31CTRL,
	S2MPS11_REG_L32CTRL,
	S2MPS11_REG_L33CTRL,
	S2MPS11_REG_L34CTRL,
	S2MPS11_REG_L35CTRL,
	S2MPS11_REG_L36CTRL,
	S2MPS11_REG_L37CTRL,
	S2MPS11_REG_L38CTRL,
};

/* S2MPS11 regulator ids */
enum s2mps11_regulators {
	S2MPS11_LDO1,
	S2MPS11_LDO2,
	S2MPS11_LDO3,
	S2MPS11_LDO4,
	S2MPS11_LDO5,
	S2MPS11_LDO6,
	S2MPS11_LDO7,
	S2MPS11_LDO8,
	S2MPS11_LDO9,
	S2MPS11_LDO10,
	S2MPS11_LDO11,
	S2MPS11_LDO12,
	S2MPS11_LDO13,
	S2MPS11_LDO14,
	S2MPS11_LDO15,
	S2MPS11_LDO16,
	S2MPS11_LDO17,
	S2MPS11_LDO18,
	S2MPS11_LDO19,
	S2MPS11_LDO20,
	S2MPS11_LDO21,
	S2MPS11_LDO22,
	S2MPS11_LDO23,
	S2MPS11_LDO24,
	S2MPS11_LDO25,
	S2MPS11_LDO26,
	S2MPS11_LDO27,
	S2MPS11_LDO28,
	S2MPS11_LDO29,
	S2MPS11_LDO30,
	S2MPS11_LDO31,
	S2MPS11_LDO32,
	S2MPS11_LDO33,
	S2MPS11_LDO34,
	S2MPS11_LDO35,
	S2MPS11_LDO36,
	S2MPS11_LDO37,
	S2MPS11_LDO38,
	S2MPS11_BUCK1,
	S2MPS11_BUCK2,
	S2MPS11_BUCK3,
	S2MPS11_BUCK4,
	S2MPS11_BUCK5,
	S2MPS11_BUCK6,
	S2MPS11_BUCK7,
	S2MPS11_BUCK8,
	S2MPS11_BUCK9,
	S2MPS11_BUCK10,

	S2MPS11_REGULATOR_MAX,
};

#define S2MPS11_LDO_VSEL_MASK	0x3F
#define S2MPS11_BUCK_VSEL_MASK	0xFF
#define S2MPS11_BUCK9_VSEL_MASK	0x1F
#define S2MPS11_ENABLE_MASK	(0x03 << S2MPS11_ENABLE_SHIFT)
#define S2MPS11_ENABLE_SHIFT	0x06
#define S2MPS11_LDO_N_VOLTAGES	(S2MPS11_LDO_VSEL_MASK + 1)
#define S2MPS11_BUCK_N_VOLTAGES (S2MPS11_BUCK_VSEL_MASK + 1)
#define S2MPS11_BUCK9_N_VOLTAGES (S2MPS11_BUCK9_VSEL_MASK + 1)
#define S2MPS11_RAMP_DELAY	25000		/* uV/us */

#define S2MPS11_CTRL1_PWRHOLD_MASK	BIT(4)

#define S2MPS11_BUCK2_RAMP_SHIFT	6
#define S2MPS11_BUCK34_RAMP_SHIFT	4
#define S2MPS11_BUCK5_RAMP_SHIFT	6
#define S2MPS11_BUCK16_RAMP_SHIFT	4
#define S2MPS11_BUCK7810_RAMP_SHIFT	2
#define S2MPS11_BUCK9_RAMP_SHIFT	0
#define S2MPS11_BUCK2_RAMP_EN_SHIFT	3
#define S2MPS11_BUCK3_RAMP_EN_SHIFT	2
#define S2MPS11_BUCK4_RAMP_EN_SHIFT	1
#define S2MPS11_BUCK6_RAMP_EN_SHIFT	0
#define S2MPS11_PMIC_EN_SHIFT	6

#endif /*  __LINUX_MFD_S2MPS11_H */
Commit	Line	Data
9b6d1343 SK	1	/*
	2	* s2mps11.h
	3	*
	4	* Copyright (c) 2012 Samsung Electronics Co., Ltd
	5	* http://www.samsung.com
	6	*
	7	* This program is free software; you can redistribute it and/or modify it
	8	* under the terms of the GNU General Public License as published by the
	9	* Free Software Foundation; either version 2 of the License, or (at your
	10	* option) any later version.
	11	*
	12	*/
	13
	14	#ifndef __LINUX_MFD_S2MPS11_H
	15	#define __LINUX_MFD_S2MPS11_H
	16
	17	/* S2MPS11 registers */
	18	enum s2mps11_reg {
	19	S2MPS11_REG_ID,
	20	S2MPS11_REG_INT1,
	21	S2MPS11_REG_INT2,
	22	S2MPS11_REG_INT3,
	23	S2MPS11_REG_INT1M,
	24	S2MPS11_REG_INT2M,
	25	S2MPS11_REG_INT3M,
	26	S2MPS11_REG_ST1,
	27	S2MPS11_REG_ST2,
	28	S2MPS11_REG_OFFSRC,
	29	S2MPS11_REG_PWRONSRC,
	30	S2MPS11_REG_RTC_CTRL,
	31	S2MPS11_REG_CTRL1,
	32	S2MPS11_REG_ETC_TEST,
	33	S2MPS11_REG_RSVD3,
	34	S2MPS11_REG_BU_CHG,
	35	S2MPS11_REG_RAMP,
	36	S2MPS11_REG_RAMP_BUCK,
	37	S2MPS11_REG_LDO1_8,
	38	S2MPS11_REG_LDO9_16,
	39	S2MPS11_REG_LDO17_24,
	40	S2MPS11_REG_LDO25_32,
	41	S2MPS11_REG_LDO33_38,
	42	S2MPS11_REG_LDO1_8_1,
	43	S2MPS11_REG_LDO9_16_1,
	44	S2MPS11_REG_LDO17_24_1,
	45	S2MPS11_REG_LDO25_32_1,
	46	S2MPS11_REG_LDO33_38_1,
	47	S2MPS11_REG_OTP_ADRL,
	48	S2MPS11_REG_OTP_ADRH,
	49	S2MPS11_REG_OTP_DATA,
	50	S2MPS11_REG_MON1SEL,
	51	S2MPS11_REG_MON2SEL,
	52	S2MPS11_REG_LEE,
	53	S2MPS11_REG_RSVD_NO,
	54	S2MPS11_REG_UVLO,
	55	S2MPS11_REG_LEE_NO,
	56	S2MPS11_REG_B1CTRL1,
	57	S2MPS11_REG_B1CTRL2,
	58	S2MPS11_REG_B2CTRL1,
	59	S2MPS11_REG_B2CTRL2,
	60	S2MPS11_REG_B3CTRL1,
	61	S2MPS11_REG_B3CTRL2,
	62	S2MPS11_REG_B4CTRL1,
	63	S2MPS11_REG_B4CTRL2,
	64	S2MPS11_REG_B5CTRL1,
65	S2MPS11_REG_BUCK5_SW,
66	S2MPS11_REG_B5CTRL2,
67	S2MPS11_REG_B5CTRL3,
68	S2MPS11_REG_B5CTRL4,
69	S2MPS11_REG_B5CTRL5,
70	S2MPS11_REG_B6CTRL1,
71	S2MPS11_REG_B6CTRL2,
72	S2MPS11_REG_B7CTRL1,
73	S2MPS11_REG_B7CTRL2,
74	S2MPS11_REG_B8CTRL1,
75	S2MPS11_REG_B8CTRL2,
76	S2MPS11_REG_B9CTRL1,
77	S2MPS11_REG_B9CTRL2,
78	S2MPS11_REG_B10CTRL1,
79	S2MPS11_REG_B10CTRL2,
80	S2MPS11_REG_L1CTRL,
81	S2MPS11_REG_L2CTRL,
82	S2MPS11_REG_L3CTRL,
83	S2MPS11_REG_L4CTRL,
84	S2MPS11_REG_L5CTRL,
85	S2MPS11_REG_L6CTRL,
86	S2MPS11_REG_L7CTRL,
87	S2MPS11_REG_L8CTRL,
88	S2MPS11_REG_L9CTRL,
89	S2MPS11_REG_L10CTRL,
90	S2MPS11_REG_L11CTRL,
91	S2MPS11_REG_L12CTRL,
92	S2MPS11_REG_L13CTRL,
93	S2MPS11_REG_L14CTRL,
94	S2MPS11_REG_L15CTRL,
95	S2MPS11_REG_L16CTRL,
96	S2MPS11_REG_L17CTRL,
97	S2MPS11_REG_L18CTRL,
98	S2MPS11_REG_L19CTRL,
99	S2MPS11_REG_L20CTRL,
100	S2MPS11_REG_L21CTRL,
101	S2MPS11_REG_L22CTRL,
102	S2MPS11_REG_L23CTRL,
103	S2MPS11_REG_L24CTRL,
104	S2MPS11_REG_L25CTRL,
105	S2MPS11_REG_L26CTRL,
106	S2MPS11_REG_L27CTRL,
107	S2MPS11_REG_L28CTRL,
108	S2MPS11_REG_L29CTRL,
109	S2MPS11_REG_L30CTRL,
110	S2MPS11_REG_L31CTRL,
111	S2MPS11_REG_L32CTRL,
112	S2MPS11_REG_L33CTRL,
113	S2MPS11_REG_L34CTRL,
114	S2MPS11_REG_L35CTRL,
115	S2MPS11_REG_L36CTRL,
116	S2MPS11_REG_L37CTRL,
117	S2MPS11_REG_L38CTRL,
118	};
119
120	/* S2MPS11 regulator ids */
121	enum s2mps11_regulators {
122	S2MPS11_LDO1,
123	S2MPS11_LDO2,
124	S2MPS11_LDO3,
125	S2MPS11_LDO4,
126	S2MPS11_LDO5,
127	S2MPS11_LDO6,
128	S2MPS11_LDO7,
129	S2MPS11_LDO8,
130	S2MPS11_LDO9,
131	S2MPS11_LDO10,
132	S2MPS11_LDO11,
133	S2MPS11_LDO12,
134	S2MPS11_LDO13,
135	S2MPS11_LDO14,
136	S2MPS11_LDO15,
137	S2MPS11_LDO16,
138	S2MPS11_LDO17,
139	S2MPS11_LDO18,
140	S2MPS11_LDO19,
141	S2MPS11_LDO20,
142	S2MPS11_LDO21,
143	S2MPS11_LDO22,
144	S2MPS11_LDO23,
145	S2MPS11_LDO24,
146	S2MPS11_LDO25,
147	S2MPS11_LDO26,
148	S2MPS11_LDO27,
149	S2MPS11_LDO28,
150	S2MPS11_LDO29,
151	S2MPS11_LDO30,
152	S2MPS11_LDO31,
153	S2MPS11_LDO32,
154	S2MPS11_LDO33,
155	S2MPS11_LDO34,
156	S2MPS11_LDO35,
157	S2MPS11_LDO36,
158	S2MPS11_LDO37,
159	S2MPS11_LDO38,
160	S2MPS11_BUCK1,
161	S2MPS11_BUCK2,
162	S2MPS11_BUCK3,
163	S2MPS11_BUCK4,
164	S2MPS11_BUCK5,
165	S2MPS11_BUCK6,
166	S2MPS11_BUCK7,
167	S2MPS11_BUCK8,
168	S2MPS11_BUCK9,
169	S2MPS11_BUCK10,
9b6d1343	170
08ad7b7f	171	S2MPS11_REGULATOR_MAX,
9b6d1343 SK	172	};
9b6d1343 SK	173
9b6d1343 SK	174	#define S2MPS11_LDO_VSEL_MASK 0x3F
9b6d1343 SK	175	#define S2MPS11_BUCK_VSEL_MASK 0xFF
3b672623	176	#define S2MPS11_BUCK9_VSEL_MASK 0x1F
9b6d1343 SK	177	#define S2MPS11_ENABLE_MASK (0x03 << S2MPS11_ENABLE_SHIFT)
	178	#define S2MPS11_ENABLE_SHIFT 0x06
	179	#define S2MPS11_LDO_N_VOLTAGES (S2MPS11_LDO_VSEL_MASK + 1)
	180	#define S2MPS11_BUCK_N_VOLTAGES (S2MPS11_BUCK_VSEL_MASK + 1)
3b672623	181	#define S2MPS11_BUCK9_N_VOLTAGES (S2MPS11_BUCK9_VSEL_MASK + 1)
90068348	182	#define S2MPS11_RAMP_DELAY 25000 /* uV/us */
9b6d1343	183
d785334a	184	#define S2MPS11_CTRL1_PWRHOLD_MASK BIT(4)
939c0277 YSB	185
	186	#define S2MPS11_BUCK2_RAMP_SHIFT 6
	187	#define S2MPS11_BUCK34_RAMP_SHIFT 4
	188	#define S2MPS11_BUCK5_RAMP_SHIFT 6
	189	#define S2MPS11_BUCK16_RAMP_SHIFT 4
	190	#define S2MPS11_BUCK7810_RAMP_SHIFT 2
	191	#define S2MPS11_BUCK9_RAMP_SHIFT 0
	192	#define S2MPS11_BUCK2_RAMP_EN_SHIFT 3
	193	#define S2MPS11_BUCK3_RAMP_EN_SHIFT 2
	194	#define S2MPS11_BUCK4_RAMP_EN_SHIFT 1
	195	#define S2MPS11_BUCK6_RAMP_EN_SHIFT 0
9b6d1343	196	#define S2MPS11_PMIC_EN_SHIFT 6
9b6d1343 SK	197
9b6d1343 SK	198	#endif /* __LINUX_MFD_S2MPS11_H */