Commit | Line | Data |
---|---|---|
8e005935 UKK |
1 | /* |
2 | * Copyright 2009-2010 Pengutronix | |
3 | * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it under | |
6 | * the terms of the GNU General Public License version 2 as published by the | |
7 | * Free Software Foundation. | |
8 | */ | |
9 | #ifndef __LINUX_MFD_MC13XXX_H | |
10 | #define __LINUX_MFD_MC13XXX_H | |
11 | ||
12 | #include <linux/interrupt.h> | |
13 | ||
14 | struct mc13xxx; | |
15 | ||
16 | void mc13xxx_lock(struct mc13xxx *mc13xxx); | |
17 | void mc13xxx_unlock(struct mc13xxx *mc13xxx); | |
18 | ||
19 | int mc13xxx_reg_read(struct mc13xxx *mc13xxx, unsigned int offset, u32 *val); | |
20 | int mc13xxx_reg_write(struct mc13xxx *mc13xxx, unsigned int offset, u32 val); | |
21 | int mc13xxx_reg_rmw(struct mc13xxx *mc13xxx, unsigned int offset, | |
22 | u32 mask, u32 val); | |
23 | ||
24 | int mc13xxx_get_flags(struct mc13xxx *mc13xxx); | |
25 | ||
26 | int mc13xxx_irq_request(struct mc13xxx *mc13xxx, int irq, | |
27 | irq_handler_t handler, const char *name, void *dev); | |
28 | int mc13xxx_irq_request_nounmask(struct mc13xxx *mc13xxx, int irq, | |
29 | irq_handler_t handler, const char *name, void *dev); | |
30 | int mc13xxx_irq_free(struct mc13xxx *mc13xxx, int irq, void *dev); | |
31 | ||
32 | int mc13xxx_irq_mask(struct mc13xxx *mc13xxx, int irq); | |
33 | int mc13xxx_irq_unmask(struct mc13xxx *mc13xxx, int irq); | |
34 | int mc13xxx_irq_status(struct mc13xxx *mc13xxx, int irq, | |
35 | int *enabled, int *pending); | |
36 | int mc13xxx_irq_ack(struct mc13xxx *mc13xxx, int irq); | |
37 | ||
38 | int mc13xxx_get_flags(struct mc13xxx *mc13xxx); | |
39 | ||
fec316d6 | 40 | int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx, |
1039d762 MT |
41 | unsigned int mode, unsigned int channel, |
42 | u8 ato, bool atox, unsigned int *sample); | |
fec316d6 | 43 | |
fd792f8f MB |
44 | #define MC13783_AUDIO_RX0 36 |
45 | #define MC13783_AUDIO_RX1 37 | |
46 | #define MC13783_AUDIO_TX 38 | |
47 | #define MC13783_SSI_NETWORK 39 | |
48 | #define MC13783_AUDIO_CODEC 40 | |
49 | #define MC13783_AUDIO_DAC 41 | |
50 | ||
8e005935 UKK |
51 | #define MC13XXX_IRQ_ADCDONE 0 |
52 | #define MC13XXX_IRQ_ADCBISDONE 1 | |
53 | #define MC13XXX_IRQ_TS 2 | |
54 | #define MC13XXX_IRQ_CHGDET 6 | |
55 | #define MC13XXX_IRQ_CHGREV 8 | |
56 | #define MC13XXX_IRQ_CHGSHORT 9 | |
57 | #define MC13XXX_IRQ_CCCV 10 | |
58 | #define MC13XXX_IRQ_CHGCURR 11 | |
59 | #define MC13XXX_IRQ_BPON 12 | |
60 | #define MC13XXX_IRQ_LOBATL 13 | |
61 | #define MC13XXX_IRQ_LOBATH 14 | |
62 | #define MC13XXX_IRQ_1HZ 24 | |
63 | #define MC13XXX_IRQ_TODA 25 | |
64 | #define MC13XXX_IRQ_SYSRST 30 | |
65 | #define MC13XXX_IRQ_RTCRST 31 | |
66 | #define MC13XXX_IRQ_PC 32 | |
67 | #define MC13XXX_IRQ_WARM 33 | |
68 | #define MC13XXX_IRQ_MEMHLD 34 | |
69 | #define MC13XXX_IRQ_THWARNL 36 | |
70 | #define MC13XXX_IRQ_THWARNH 37 | |
71 | #define MC13XXX_IRQ_CLK 38 | |
72 | ||
73 | #define MC13XXX_NUM_IRQ 46 | |
74 | ||
75 | struct regulator_init_data; | |
76 | ||
77 | struct mc13xxx_regulator_init_data { | |
78 | int id; | |
79 | struct regulator_init_data *init_data; | |
93bcb23b | 80 | struct device_node *node; |
8e005935 UKK |
81 | }; |
82 | ||
83 | struct mc13xxx_regulator_platform_data { | |
84 | int num_regulators; | |
85 | struct mc13xxx_regulator_init_data *regulators; | |
86 | }; | |
87 | ||
9d263813 AS |
88 | enum { |
89 | /* MC13783 LED IDs */ | |
90 | MC13783_LED_MD, | |
91 | MC13783_LED_AD, | |
92 | MC13783_LED_KP, | |
93 | MC13783_LED_R1, | |
94 | MC13783_LED_G1, | |
95 | MC13783_LED_B1, | |
96 | MC13783_LED_R2, | |
97 | MC13783_LED_G2, | |
98 | MC13783_LED_B2, | |
99 | MC13783_LED_R3, | |
100 | MC13783_LED_G3, | |
101 | MC13783_LED_B3, | |
ae6cdb03 AS |
102 | /* MC13892 LED IDs */ |
103 | MC13892_LED_MD, | |
104 | MC13892_LED_AD, | |
105 | MC13892_LED_KP, | |
106 | MC13892_LED_R, | |
107 | MC13892_LED_G, | |
108 | MC13892_LED_B, | |
9d263813 AS |
109 | }; |
110 | ||
8e005935 | 111 | struct mc13xxx_led_platform_data { |
8e005935 UKK |
112 | int id; |
113 | const char *name; | |
114 | const char *default_trigger; | |
115 | ||
116 | /* Three or two bits current selection depending on the led */ | |
117 | char max_current; | |
118 | }; | |
119 | ||
9d263813 AS |
120 | #define MAX_LED_CONTROL_REGS 6 |
121 | ||
8e005935 | 122 | struct mc13xxx_leds_platform_data { |
8e005935 | 123 | struct mc13xxx_led_platform_data *led; |
9d263813 | 124 | int num_leds; |
8e005935 | 125 | |
9d263813 AS |
126 | /* LED Control 0 */ |
127 | #define MC13783_LED_C0_ENABLE (1 << 0) | |
128 | #define MC13783_LED_C0_TRIODE_MD (1 << 7) | |
129 | #define MC13783_LED_C0_TRIODE_AD (1 << 8) | |
130 | #define MC13783_LED_C0_TRIODE_KP (1 << 9) | |
131 | #define MC13783_LED_C0_BOOST (1 << 10) | |
132 | #define MC13783_LED_C0_ABMODE(x) (((x) & 0x7) << 11) | |
133 | #define MC13783_LED_C0_ABREF(x) (((x) & 0x3) << 14) | |
134 | /* LED Control 1 */ | |
135 | #define MC13783_LED_C1_TC1HALF (1 << 18) | |
136 | #define MC13783_LED_C1_SLEWLIM (1 << 23) | |
137 | /* LED Control 2 */ | |
138 | #define MC13783_LED_C2_PERIOD(x) (((x) & 0x3) << 21) | |
139 | #define MC13783_LED_C2_SLEWLIM (1 << 23) | |
140 | /* LED Control 3 */ | |
141 | #define MC13783_LED_C3_PERIOD(x) (((x) & 0x3) << 21) | |
142 | #define MC13783_LED_C3_TRIODE_TC1 (1 << 23) | |
143 | /* LED Control 4 */ | |
144 | #define MC13783_LED_C4_PERIOD(x) (((x) & 0x3) << 21) | |
145 | #define MC13783_LED_C4_TRIODE_TC2 (1 << 23) | |
146 | /* LED Control 5 */ | |
147 | #define MC13783_LED_C5_PERIOD(x) (((x) & 0x3) << 21) | |
148 | #define MC13783_LED_C5_TRIODE_TC3 (1 << 23) | |
149 | u32 led_control[MAX_LED_CONTROL_REGS]; | |
8e005935 UKK |
150 | }; |
151 | ||
30fc7ac3 PR |
152 | struct mc13xxx_buttons_platform_data { |
153 | #define MC13783_BUTTON_DBNC_0MS 0 | |
154 | #define MC13783_BUTTON_DBNC_30MS 1 | |
155 | #define MC13783_BUTTON_DBNC_150MS 2 | |
156 | #define MC13783_BUTTON_DBNC_750MS 3 | |
157 | #define MC13783_BUTTON_ENABLE (1 << 2) | |
158 | #define MC13783_BUTTON_POL_INVERT (1 << 3) | |
159 | #define MC13783_BUTTON_RESET_EN (1 << 4) | |
160 | int b1on_flags; | |
161 | unsigned short b1on_key; | |
162 | int b2on_flags; | |
163 | unsigned short b2on_key; | |
164 | int b3on_flags; | |
165 | unsigned short b3on_key; | |
166 | }; | |
167 | ||
1039d762 MT |
168 | struct mc13xxx_ts_platform_data { |
169 | /* Delay between Touchscreen polarization and ADC Conversion. | |
170 | * Given in clock ticks of a 32 kHz clock which gives a granularity of | |
171 | * about 30.5ms */ | |
172 | u8 ato; | |
173 | ||
174 | #define MC13783_TS_ATO_FIRST false | |
175 | #define MC13783_TS_ATO_EACH true | |
176 | /* Use the ATO delay only for the first conversion or for each one */ | |
177 | bool atox; | |
178 | }; | |
179 | ||
e3a0871c PR |
180 | enum mc13783_ssi_port { |
181 | MC13783_SSI1_PORT, | |
182 | MC13783_SSI2_PORT, | |
183 | }; | |
184 | ||
185 | struct mc13xxx_codec_platform_data { | |
186 | enum mc13783_ssi_port adc_ssi_port; | |
187 | enum mc13783_ssi_port dac_ssi_port; | |
188 | }; | |
189 | ||
8e005935 UKK |
190 | struct mc13xxx_platform_data { |
191 | #define MC13XXX_USE_TOUCHSCREEN (1 << 0) | |
192 | #define MC13XXX_USE_CODEC (1 << 1) | |
193 | #define MC13XXX_USE_ADC (1 << 2) | |
194 | #define MC13XXX_USE_RTC (1 << 3) | |
8e005935 UKK |
195 | unsigned int flags; |
196 | ||
4ec1b54c | 197 | struct mc13xxx_regulator_platform_data regulators; |
8e005935 | 198 | struct mc13xxx_leds_platform_data *leds; |
30fc7ac3 | 199 | struct mc13xxx_buttons_platform_data *buttons; |
1039d762 | 200 | struct mc13xxx_ts_platform_data touch; |
e3a0871c | 201 | struct mc13xxx_codec_platform_data *codec; |
8e005935 UKK |
202 | }; |
203 | ||
fec316d6 UKK |
204 | #define MC13XXX_ADC_MODE_TS 1 |
205 | #define MC13XXX_ADC_MODE_SINGLE_CHAN 2 | |
206 | #define MC13XXX_ADC_MODE_MULT_CHAN 3 | |
207 | ||
208 | #define MC13XXX_ADC0 43 | |
2161891a RG |
209 | #define MC13XXX_ADC0_LICELLCON (1 << 0) |
210 | #define MC13XXX_ADC0_CHRGICON (1 << 1) | |
211 | #define MC13XXX_ADC0_BATICON (1 << 2) | |
fec316d6 UKK |
212 | #define MC13XXX_ADC0_ADREFEN (1 << 10) |
213 | #define MC13XXX_ADC0_TSMOD0 (1 << 12) | |
214 | #define MC13XXX_ADC0_TSMOD1 (1 << 13) | |
215 | #define MC13XXX_ADC0_TSMOD2 (1 << 14) | |
216 | #define MC13XXX_ADC0_ADINC1 (1 << 16) | |
217 | #define MC13XXX_ADC0_ADINC2 (1 << 17) | |
218 | ||
219 | #define MC13XXX_ADC0_TSMOD_MASK (MC13XXX_ADC0_TSMOD0 | \ | |
220 | MC13XXX_ADC0_TSMOD1 | \ | |
221 | MC13XXX_ADC0_TSMOD2) | |
222 | ||
2161891a RG |
223 | #define MC13XXX_ADC0_CONFIG_MASK (MC13XXX_ADC0_TSMOD_MASK | \ |
224 | MC13XXX_ADC0_LICELLCON | \ | |
225 | MC13XXX_ADC0_CHRGICON | \ | |
226 | MC13XXX_ADC0_BATICON) | |
227 | ||
8e005935 | 228 | #endif /* ifndef __LINUX_MFD_MC13XXX_H */ |