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26c7e05a | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
51652384 | 2 | /* |
26c7e05a | 3 | * Intel SoC PMIC Driver |
51652384 ZL |
4 | * |
5 | * Copyright (C) 2012-2014 Intel Corporation. All rights reserved. | |
6 | * | |
51652384 ZL |
7 | * Author: Yang, Bin <bin.yang@intel.com> |
8 | * Author: Zhu, Lejun <lejun.zhu@linux.intel.com> | |
9 | */ | |
10 | ||
11 | #ifndef __INTEL_SOC_PMIC_H__ | |
12 | #define __INTEL_SOC_PMIC_H__ | |
13 | ||
14 | #include <linux/regmap.h> | |
15 | ||
3afcbe09 HG |
16 | enum intel_cht_wc_models { |
17 | INTEL_CHT_WC_UNKNOWN, | |
18 | INTEL_CHT_WC_GPD_WIN_POCKET, | |
19 | INTEL_CHT_WC_XIAOMI_MIPAD2, | |
20 | INTEL_CHT_WC_LENOVO_YOGABOOK1, | |
8d9ef694 | 21 | INTEL_CHT_WC_LENOVO_YT3_X90, |
3afcbe09 HG |
22 | }; |
23 | ||
e7d3c33c MW |
24 | /** |
25 | * struct intel_soc_pmic - Intel SoC PMIC data | |
26 | * @irq: Master interrupt number of the parent PMIC device | |
27 | * @regmap: Pointer to the parent PMIC device regmap structure | |
28 | * @irq_chip_data: IRQ chip data for the PMIC itself | |
29 | * @irq_chip_data_pwrbtn: Chained IRQ chip data for the Power Button | |
30 | * @irq_chip_data_tmu: Chained IRQ chip data for the Time Management Unit | |
31 | * @irq_chip_data_bcu: Chained IRQ chip data for the Burst Control Unit | |
32 | * @irq_chip_data_adc: Chained IRQ chip data for the General Purpose ADC | |
33 | * @irq_chip_data_chgr: Chained IRQ chip data for the External Charger | |
34 | * @irq_chip_data_crit: Chained IRQ chip data for the Critical Event Handler | |
35 | * @dev: Pointer to the parent PMIC device | |
36 | * @scu: Pointer to the SCU IPC device data structure | |
37 | */ | |
51652384 ZL |
38 | struct intel_soc_pmic { |
39 | int irq; | |
40 | struct regmap *regmap; | |
41 | struct regmap_irq_chip_data *irq_chip_data; | |
9f8ddee1 | 42 | struct regmap_irq_chip_data *irq_chip_data_pwrbtn; |
957ae509 | 43 | struct regmap_irq_chip_data *irq_chip_data_tmu; |
57129044 KS |
44 | struct regmap_irq_chip_data *irq_chip_data_bcu; |
45 | struct regmap_irq_chip_data *irq_chip_data_adc; | |
46 | struct regmap_irq_chip_data *irq_chip_data_chgr; | |
47 | struct regmap_irq_chip_data *irq_chip_data_crit; | |
6bb3b3ac | 48 | struct device *dev; |
e7d3c33c | 49 | struct intel_scu_ipc_dev *scu; |
3afcbe09 | 50 | enum intel_cht_wc_models cht_wc_model; |
51652384 ZL |
51 | }; |
52 | ||
7b5618f4 HG |
53 | int intel_soc_pmic_exec_mipi_pmic_seq_element(u16 i2c_address, u32 reg_address, |
54 | u32 value, u32 mask); | |
55 | ||
51652384 | 56 | #endif /* __INTEL_SOC_PMIC_H__ */ |