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2769bd79 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
deaf39ef SG |
2 | /* |
3 | * Host communication command constants for ChromeOS EC | |
4 | * | |
5 | * Copyright (C) 2012 Google, Inc | |
6 | * | |
2769bd79 GG |
7 | * NOTE: This file is auto-generated from ChromeOS EC Open Source code from |
8 | * https://chromium.googlesource.com/chromiumos/platform/ec/+/master/include/ec_commands.h | |
deaf39ef SG |
9 | */ |
10 | ||
2769bd79 GG |
11 | /* Host communication command constants for Chrome EC */ |
12 | ||
deaf39ef SG |
13 | #ifndef __CROS_EC_COMMANDS_H |
14 | #define __CROS_EC_COMMANDS_H | |
15 | ||
c9f69d8b GG |
16 | |
17 | ||
18 | ||
19 | #define BUILD_ASSERT(_cond) | |
20 | ||
deaf39ef | 21 | /* |
5271db29 | 22 | * Current version of this protocol |
deaf39ef | 23 | * |
5271db29 BR |
24 | * TODO(crosbug.com/p/11223): This is effectively useless; protocol is |
25 | * determined in other ways. Remove this once the kernel code no longer | |
26 | * depends on it. | |
deaf39ef | 27 | */ |
deaf39ef SG |
28 | #define EC_PROTO_VERSION 0x00000002 |
29 | ||
30 | /* Command version mask */ | |
9e816560 | 31 | #define EC_VER_MASK(version) BIT(version) |
deaf39ef SG |
32 | |
33 | /* I/O addresses for ACPI commands */ | |
34 | #define EC_LPC_ADDR_ACPI_DATA 0x62 | |
35 | #define EC_LPC_ADDR_ACPI_CMD 0x66 | |
36 | ||
37 | /* I/O addresses for host command */ | |
38 | #define EC_LPC_ADDR_HOST_DATA 0x200 | |
39 | #define EC_LPC_ADDR_HOST_CMD 0x204 | |
40 | ||
41 | /* I/O addresses for host command args and params */ | |
5271db29 BR |
42 | /* Protocol version 2 */ |
43 | #define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */ | |
44 | #define EC_LPC_ADDR_HOST_PARAM 0x804 /* For version 2 params; size is | |
df95a3bd GG |
45 | * EC_PROTO2_MAX_PARAM_SIZE |
46 | */ | |
5271db29 BR |
47 | /* Protocol version 3 */ |
48 | #define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */ | |
49 | #define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */ | |
50 | ||
df95a3bd GG |
51 | /* |
52 | * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff | |
53 | * and they tell the kernel that so we have to think of it as two parts. | |
54 | */ | |
5271db29 BR |
55 | #define EC_HOST_CMD_REGION0 0x800 |
56 | #define EC_HOST_CMD_REGION1 0x880 | |
57 | #define EC_HOST_CMD_REGION_SIZE 0x80 | |
deaf39ef SG |
58 | |
59 | /* EC command register bit functions */ | |
9e816560 GG |
60 | #define EC_LPC_CMDR_DATA BIT(0) /* Data ready for host to read */ |
61 | #define EC_LPC_CMDR_PENDING BIT(1) /* Write pending to EC */ | |
62 | #define EC_LPC_CMDR_BUSY BIT(2) /* EC is busy processing a command */ | |
63 | #define EC_LPC_CMDR_CMD BIT(3) /* Last host write was a command */ | |
64 | #define EC_LPC_CMDR_ACPI_BRST BIT(4) /* Burst mode (not used) */ | |
65 | #define EC_LPC_CMDR_SCI BIT(5) /* SCI event is pending */ | |
66 | #define EC_LPC_CMDR_SMI BIT(6) /* SMI event is pending */ | |
deaf39ef SG |
67 | |
68 | #define EC_LPC_ADDR_MEMMAP 0x900 | |
69 | #define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */ | |
70 | #define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */ | |
71 | ||
72 | /* The offset address of each type of data in mapped memory. */ | |
5271db29 BR |
73 | #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */ |
74 | #define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */ | |
75 | #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */ | |
76 | #define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */ | |
deaf39ef SG |
77 | #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */ |
78 | #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */ | |
79 | #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */ | |
80 | #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */ | |
81 | #define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */ | |
5271db29 BR |
82 | #define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */ |
83 | /* Unused 0x28 - 0x2f */ | |
84 | #define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */ | |
85 | /* Unused 0x31 - 0x33 */ | |
ce86c87d GG |
86 | #define EC_MEMMAP_HOST_EVENTS 0x34 /* 64 bits */ |
87 | /* Battery values are all 32 bits, unless otherwise noted. */ | |
deaf39ef SG |
88 | #define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */ |
89 | #define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */ | |
90 | #define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */ | |
ce86c87d GG |
91 | #define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, see below (8-bit) */ |
92 | #define EC_MEMMAP_BATT_COUNT 0x4d /* Battery Count (8-bit) */ | |
93 | #define EC_MEMMAP_BATT_INDEX 0x4e /* Current Battery Data Index (8-bit) */ | |
94 | /* Unused 0x4f */ | |
deaf39ef SG |
95 | #define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */ |
96 | #define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */ | |
97 | #define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */ | |
98 | #define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */ | |
5271db29 | 99 | /* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */ |
deaf39ef SG |
100 | #define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */ |
101 | #define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */ | |
102 | #define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */ | |
103 | #define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */ | |
5271db29 BR |
104 | #define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */ |
105 | /* Unused 0x84 - 0x8f */ | |
106 | #define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/ | |
107 | /* Unused 0x91 */ | |
ce86c87d GG |
108 | #define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */ |
109 | /* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */ | |
110 | /* 0x94 - 0x99: 1st Accelerometer */ | |
111 | /* 0x9a - 0x9f: 2nd Accelerometer */ | |
5271db29 | 112 | #define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */ |
ce86c87d | 113 | /* Unused 0xa6 - 0xdf */ |
5271db29 | 114 | |
ce86c87d GG |
115 | /* |
116 | * ACPI is unable to access memory mapped data at or above this offset due to | |
117 | * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe | |
118 | * which might be needed by ACPI. | |
119 | */ | |
120 | #define EC_MEMMAP_NO_ACPI 0xe0 | |
5271db29 BR |
121 | |
122 | /* Define the format of the accelerometer mapped memory status byte. */ | |
123 | #define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f | |
9e816560 GG |
124 | #define EC_MEMMAP_ACC_STATUS_BUSY_BIT BIT(4) |
125 | #define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT BIT(7) | |
deaf39ef SG |
126 | |
127 | /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */ | |
128 | #define EC_TEMP_SENSOR_ENTRIES 16 | |
129 | /* | |
130 | * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B. | |
131 | * | |
132 | * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2. | |
133 | */ | |
134 | #define EC_TEMP_SENSOR_B_ENTRIES 8 | |
5271db29 BR |
135 | |
136 | /* Special values for mapped temperature sensors */ | |
deaf39ef SG |
137 | #define EC_TEMP_SENSOR_NOT_PRESENT 0xff |
138 | #define EC_TEMP_SENSOR_ERROR 0xfe | |
139 | #define EC_TEMP_SENSOR_NOT_POWERED 0xfd | |
140 | #define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc | |
141 | /* | |
142 | * The offset of temperature value stored in mapped memory. This allows | |
143 | * reporting a temperature range of 200K to 454K = -73C to 181C. | |
144 | */ | |
145 | #define EC_TEMP_SENSOR_OFFSET 200 | |
146 | ||
5271db29 BR |
147 | /* |
148 | * Number of ALS readings at EC_MEMMAP_ALS | |
149 | */ | |
150 | #define EC_ALS_ENTRIES 2 | |
151 | ||
152 | /* | |
153 | * The default value a temperature sensor will return when it is present but | |
154 | * has not been read this boot. This is a reasonable number to avoid | |
155 | * triggering alarms on the host. | |
156 | */ | |
157 | #define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET) | |
158 | ||
deaf39ef SG |
159 | #define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */ |
160 | #define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */ | |
161 | #define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */ | |
162 | ||
163 | /* Battery bit flags at EC_MEMMAP_BATT_FLAG. */ | |
164 | #define EC_BATT_FLAG_AC_PRESENT 0x01 | |
165 | #define EC_BATT_FLAG_BATT_PRESENT 0x02 | |
166 | #define EC_BATT_FLAG_DISCHARGING 0x04 | |
167 | #define EC_BATT_FLAG_CHARGING 0x08 | |
168 | #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10 | |
ce86c87d GG |
169 | /* Set if some of the static/dynamic data is invalid (or outdated). */ |
170 | #define EC_BATT_FLAG_INVALID_DATA 0x20 | |
deaf39ef SG |
171 | |
172 | /* Switch flags at EC_MEMMAP_SWITCHES */ | |
173 | #define EC_SWITCH_LID_OPEN 0x01 | |
174 | #define EC_SWITCH_POWER_BUTTON_PRESSED 0x02 | |
175 | #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04 | |
5271db29 BR |
176 | /* Was recovery requested via keyboard; now unused. */ |
177 | #define EC_SWITCH_IGNORE1 0x08 | |
deaf39ef SG |
178 | /* Recovery requested via dedicated signal (from servo board) */ |
179 | #define EC_SWITCH_DEDICATED_RECOVERY 0x10 | |
180 | /* Was fake developer mode switch; now unused. Remove in next refactor. */ | |
181 | #define EC_SWITCH_IGNORE0 0x20 | |
182 | ||
183 | /* Host command interface flags */ | |
184 | /* Host command interface supports LPC args (LPC interface only) */ | |
185 | #define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01 | |
5271db29 BR |
186 | /* Host command interface supports version 3 protocol */ |
187 | #define EC_HOST_CMD_FLAG_VERSION_3 0x02 | |
deaf39ef SG |
188 | |
189 | /* Wireless switch flags */ | |
5271db29 BR |
190 | #define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */ |
191 | #define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */ | |
192 | #define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */ | |
193 | #define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */ | |
194 | #define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */ | |
deaf39ef | 195 | |
ce86c87d GG |
196 | /*****************************************************************************/ |
197 | /* | |
198 | * ACPI commands | |
199 | * | |
200 | * These are valid ONLY on the ACPI command/data port. | |
201 | */ | |
202 | ||
203 | /* | |
204 | * ACPI Read Embedded Controller | |
205 | * | |
206 | * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). | |
207 | * | |
208 | * Use the following sequence: | |
209 | * | |
210 | * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD | |
211 | * - Wait for EC_LPC_CMDR_PENDING bit to clear | |
212 | * - Write address to EC_LPC_ADDR_ACPI_DATA | |
213 | * - Wait for EC_LPC_CMDR_DATA bit to set | |
214 | * - Read value from EC_LPC_ADDR_ACPI_DATA | |
215 | */ | |
216 | #define EC_CMD_ACPI_READ 0x0080 | |
217 | ||
218 | /* | |
219 | * ACPI Write Embedded Controller | |
220 | * | |
221 | * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). | |
222 | * | |
223 | * Use the following sequence: | |
224 | * | |
225 | * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD | |
226 | * - Wait for EC_LPC_CMDR_PENDING bit to clear | |
227 | * - Write address to EC_LPC_ADDR_ACPI_DATA | |
228 | * - Wait for EC_LPC_CMDR_PENDING bit to clear | |
229 | * - Write value to EC_LPC_ADDR_ACPI_DATA | |
230 | */ | |
231 | #define EC_CMD_ACPI_WRITE 0x0081 | |
232 | ||
233 | /* | |
234 | * ACPI Burst Enable Embedded Controller | |
235 | * | |
236 | * This enables burst mode on the EC to allow the host to issue several | |
237 | * commands back-to-back. While in this mode, writes to mapped multi-byte | |
238 | * data are locked out to ensure data consistency. | |
239 | */ | |
240 | #define EC_CMD_ACPI_BURST_ENABLE 0x0082 | |
241 | ||
242 | /* | |
243 | * ACPI Burst Disable Embedded Controller | |
244 | * | |
245 | * This disables burst mode on the EC and stops preventing EC writes to mapped | |
246 | * multi-byte data. | |
247 | */ | |
248 | #define EC_CMD_ACPI_BURST_DISABLE 0x0083 | |
249 | ||
250 | /* | |
251 | * ACPI Query Embedded Controller | |
252 | * | |
253 | * This clears the lowest-order bit in the currently pending host events, and | |
254 | * sets the result code to the 1-based index of the bit (event 0x00000001 = 1, | |
255 | * event 0x80000000 = 32), or 0 if no event was pending. | |
256 | */ | |
257 | #define EC_CMD_ACPI_QUERY_EVENT 0x0084 | |
258 | ||
259 | /* Valid addresses in ACPI memory space, for read/write commands */ | |
260 | ||
261 | /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */ | |
262 | #define EC_ACPI_MEM_VERSION 0x00 | |
263 | /* | |
264 | * Test location; writing value here updates test compliment byte to (0xff - | |
265 | * value). | |
266 | */ | |
267 | #define EC_ACPI_MEM_TEST 0x01 | |
268 | /* Test compliment; writes here are ignored. */ | |
269 | #define EC_ACPI_MEM_TEST_COMPLIMENT 0x02 | |
270 | ||
271 | /* Keyboard backlight brightness percent (0 - 100) */ | |
272 | #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03 | |
273 | /* DPTF Target Fan Duty (0-100, 0xff for auto/none) */ | |
274 | #define EC_ACPI_MEM_FAN_DUTY 0x04 | |
275 | ||
276 | /* | |
277 | * DPTF temp thresholds. Any of the EC's temp sensors can have up to two | |
278 | * independent thresholds attached to them. The current value of the ID | |
279 | * register determines which sensor is affected by the THRESHOLD and COMMIT | |
280 | * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme | |
281 | * as the memory-mapped sensors. The COMMIT register applies those settings. | |
282 | * | |
283 | * The spec does not mandate any way to read back the threshold settings | |
284 | * themselves, but when a threshold is crossed the AP needs a way to determine | |
285 | * which sensor(s) are responsible. Each reading of the ID register clears and | |
286 | * returns one sensor ID that has crossed one of its threshold (in either | |
287 | * direction) since the last read. A value of 0xFF means "no new thresholds | |
288 | * have tripped". Setting or enabling the thresholds for a sensor will clear | |
289 | * the unread event count for that sensor. | |
290 | */ | |
291 | #define EC_ACPI_MEM_TEMP_ID 0x05 | |
292 | #define EC_ACPI_MEM_TEMP_THRESHOLD 0x06 | |
293 | #define EC_ACPI_MEM_TEMP_COMMIT 0x07 | |
294 | /* | |
295 | * Here are the bits for the COMMIT register: | |
296 | * bit 0 selects the threshold index for the chosen sensor (0/1) | |
297 | * bit 1 enables/disables the selected threshold (0 = off, 1 = on) | |
298 | * Each write to the commit register affects one threshold. | |
299 | */ | |
300 | #define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK BIT(0) | |
301 | #define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK BIT(1) | |
302 | /* | |
303 | * Example: | |
304 | * | |
305 | * Set the thresholds for sensor 2 to 50 C and 60 C: | |
306 | * write 2 to [0x05] -- select temp sensor 2 | |
307 | * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET | |
308 | * write 0x2 to [0x07] -- enable threshold 0 with this value | |
309 | * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET | |
310 | * write 0x3 to [0x07] -- enable threshold 1 with this value | |
311 | * | |
312 | * Disable the 60 C threshold, leaving the 50 C threshold unchanged: | |
313 | * write 2 to [0x05] -- select temp sensor 2 | |
314 | * write 0x1 to [0x07] -- disable threshold 1 | |
315 | */ | |
316 | ||
317 | /* DPTF battery charging current limit */ | |
318 | #define EC_ACPI_MEM_CHARGING_LIMIT 0x08 | |
319 | ||
320 | /* Charging limit is specified in 64 mA steps */ | |
321 | #define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64 | |
322 | /* Value to disable DPTF battery charging limit */ | |
323 | #define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff | |
324 | ||
325 | /* | |
326 | * Report device orientation | |
327 | * Bits Definition | |
328 | * 3:1 Device DPTF Profile Number (DDPN) | |
329 | * 0 = Reserved for backward compatibility (indicates no valid | |
330 | * profile number. Host should fall back to using TBMD). | |
331 | * 1..7 = DPTF Profile number to indicate to host which table needs | |
332 | * to be loaded. | |
333 | * 0 Tablet Mode Device Indicator (TBMD) | |
334 | */ | |
335 | #define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09 | |
336 | #define EC_ACPI_MEM_TBMD_SHIFT 0 | |
337 | #define EC_ACPI_MEM_TBMD_MASK 0x1 | |
338 | #define EC_ACPI_MEM_DDPN_SHIFT 1 | |
339 | #define EC_ACPI_MEM_DDPN_MASK 0x7 | |
340 | ||
341 | /* | |
342 | * Report device features. Uses the same format as the host command, except: | |
343 | * | |
344 | * bit 0 (EC_FEATURE_LIMITED) changes meaning from "EC code has a limited set | |
345 | * of features", which is of limited interest when the system is already | |
346 | * interpreting ACPI bytecode, to "EC_FEATURES[0-7] is not supported". Since | |
347 | * these are supported, it defaults to 0. | |
348 | * This allows detecting the presence of this field since older versions of | |
349 | * the EC codebase would simply return 0xff to that unknown address. Check | |
350 | * FEATURES0 != 0xff (or FEATURES0[0] == 0) to make sure that the other bits | |
351 | * are valid. | |
352 | */ | |
353 | #define EC_ACPI_MEM_DEVICE_FEATURES0 0x0a | |
354 | #define EC_ACPI_MEM_DEVICE_FEATURES1 0x0b | |
355 | #define EC_ACPI_MEM_DEVICE_FEATURES2 0x0c | |
356 | #define EC_ACPI_MEM_DEVICE_FEATURES3 0x0d | |
357 | #define EC_ACPI_MEM_DEVICE_FEATURES4 0x0e | |
358 | #define EC_ACPI_MEM_DEVICE_FEATURES5 0x0f | |
359 | #define EC_ACPI_MEM_DEVICE_FEATURES6 0x10 | |
360 | #define EC_ACPI_MEM_DEVICE_FEATURES7 0x11 | |
361 | ||
362 | #define EC_ACPI_MEM_BATTERY_INDEX 0x12 | |
363 | ||
364 | /* | |
365 | * USB Port Power. Each bit indicates whether the corresponding USB ports' power | |
366 | * is enabled (1) or disabled (0). | |
367 | * bit 0 USB port ID 0 | |
368 | * ... | |
369 | * bit 7 USB port ID 7 | |
370 | */ | |
371 | #define EC_ACPI_MEM_USB_PORT_POWER 0x13 | |
372 | ||
373 | /* | |
374 | * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data | |
375 | * is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2. | |
376 | */ | |
377 | #define EC_ACPI_MEM_MAPPED_BEGIN 0x20 | |
378 | #define EC_ACPI_MEM_MAPPED_SIZE 0xe0 | |
379 | ||
380 | /* Current version of ACPI memory address space */ | |
381 | #define EC_ACPI_MEM_VERSION_CURRENT 2 | |
382 | ||
383 | ||
deaf39ef SG |
384 | /* |
385 | * This header file is used in coreboot both in C and ACPI code. The ACPI code | |
386 | * is pre-processed to handle constants but the ASL compiler is unable to | |
387 | * handle actual C code so keep it separate. | |
388 | */ | |
ce86c87d | 389 | |
deaf39ef | 390 | |
5271db29 | 391 | /* |
6f72c3f9 GG |
392 | * Attributes for EC request and response packets. Just defining __packed |
393 | * results in inefficient assembly code on ARM, if the structure is actually | |
394 | * 32-bit aligned, as it should be for all buffers. | |
395 | * | |
396 | * Be very careful when adding these to existing structures. They will round | |
397 | * up the structure size to the specified boundary. | |
398 | * | |
399 | * Also be very careful to make that if a structure is included in some other | |
400 | * parent structure that the alignment will still be true given the packing of | |
401 | * the parent structure. This is particularly important if the sub-structure | |
402 | * will be passed as a pointer to another function, since that function will | |
403 | * not know about the misaligment caused by the parent structure's packing. | |
404 | * | |
405 | * Also be very careful using __packed - particularly when nesting non-packed | |
406 | * structures inside packed ones. In fact, DO NOT use __packed directly; | |
407 | * always use one of these attributes. | |
408 | * | |
409 | * Once everything is annotated properly, the following search strings should | |
410 | * not return ANY matches in this file other than right here: | |
411 | * | |
412 | * "__packed" - generates inefficient code; all sub-structs must also be packed | |
413 | * | |
414 | * "struct [^_]" - all structs should be annotated, except for structs that are | |
415 | * members of other structs/unions (and their original declarations should be | |
416 | * annotated). | |
5271db29 | 417 | */ |
6f72c3f9 GG |
418 | |
419 | /* | |
420 | * Packed structures make no assumption about alignment, so they do inefficient | |
421 | * byte-wise reads. | |
422 | */ | |
423 | #define __ec_align1 __packed | |
424 | #define __ec_align2 __packed | |
425 | #define __ec_align4 __packed | |
426 | #define __ec_align_size1 __packed | |
427 | #define __ec_align_offset1 __packed | |
428 | #define __ec_align_offset2 __packed | |
429 | #define __ec_todo_packed __packed | |
430 | #define __ec_todo_unpacked | |
431 | ||
5271db29 | 432 | |
deaf39ef SG |
433 | /* LPC command status byte masks */ |
434 | /* EC has written a byte in the data register and host hasn't read it yet */ | |
435 | #define EC_LPC_STATUS_TO_HOST 0x01 | |
436 | /* Host has written a command/data byte and the EC hasn't read it yet */ | |
437 | #define EC_LPC_STATUS_FROM_HOST 0x02 | |
438 | /* EC is processing a command */ | |
439 | #define EC_LPC_STATUS_PROCESSING 0x04 | |
440 | /* Last write to EC was a command, not data */ | |
441 | #define EC_LPC_STATUS_LAST_CMD 0x08 | |
ce86c87d | 442 | /* EC is in burst mode */ |
deaf39ef SG |
443 | #define EC_LPC_STATUS_BURST_MODE 0x10 |
444 | /* SCI event is pending (requesting SCI query) */ | |
445 | #define EC_LPC_STATUS_SCI_PENDING 0x20 | |
446 | /* SMI event is pending (requesting SMI query) */ | |
447 | #define EC_LPC_STATUS_SMI_PENDING 0x40 | |
448 | /* (reserved) */ | |
449 | #define EC_LPC_STATUS_RESERVED 0x80 | |
450 | ||
451 | /* | |
452 | * EC is busy. This covers both the EC processing a command, and the host has | |
453 | * written a new command but the EC hasn't picked it up yet. | |
454 | */ | |
455 | #define EC_LPC_STATUS_BUSY_MASK \ | |
456 | (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING) | |
457 | ||
2908c4ed GG |
458 | /* |
459 | * Host command response codes (16-bit). Note that response codes should be | |
460 | * stored in a uint16_t rather than directly in a value of this type. | |
461 | */ | |
deaf39ef SG |
462 | enum ec_status { |
463 | EC_RES_SUCCESS = 0, | |
464 | EC_RES_INVALID_COMMAND = 1, | |
465 | EC_RES_ERROR = 2, | |
466 | EC_RES_INVALID_PARAM = 3, | |
467 | EC_RES_ACCESS_DENIED = 4, | |
468 | EC_RES_INVALID_RESPONSE = 5, | |
469 | EC_RES_INVALID_VERSION = 6, | |
470 | EC_RES_INVALID_CHECKSUM = 7, | |
471 | EC_RES_IN_PROGRESS = 8, /* Accepted, command in progress */ | |
472 | EC_RES_UNAVAILABLE = 9, /* No response available */ | |
473 | EC_RES_TIMEOUT = 10, /* We got a timeout */ | |
474 | EC_RES_OVERFLOW = 11, /* Table / data overflow */ | |
5271db29 BR |
475 | EC_RES_INVALID_HEADER = 12, /* Header contains invalid data */ |
476 | EC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */ | |
2908c4ed GG |
477 | EC_RES_RESPONSE_TOO_BIG = 14, /* Response was too big to handle */ |
478 | EC_RES_BUS_ERROR = 15, /* Communications bus error */ | |
479 | EC_RES_BUSY = 16, /* Up but too busy. Should retry */ | |
480 | EC_RES_INVALID_HEADER_VERSION = 17, /* Header version invalid */ | |
481 | EC_RES_INVALID_HEADER_CRC = 18, /* Header CRC invalid */ | |
482 | EC_RES_INVALID_DATA_CRC = 19, /* Data CRC invalid */ | |
483 | EC_RES_DUP_UNAVAILABLE = 20, /* Can't resend response */ | |
deaf39ef SG |
484 | }; |
485 | ||
486 | /* | |
487 | * Host event codes. Note these are 1-based, not 0-based, because ACPI query | |
488 | * EC command uses code 0 to mean "no event pending". We explicitly specify | |
489 | * each value in the enum listing so they won't change if we delete/insert an | |
490 | * item or rearrange the list (it needs to be stable across platforms, not | |
491 | * just within a single compiled instance). | |
492 | */ | |
493 | enum host_event_code { | |
494 | EC_HOST_EVENT_LID_CLOSED = 1, | |
495 | EC_HOST_EVENT_LID_OPEN = 2, | |
496 | EC_HOST_EVENT_POWER_BUTTON = 3, | |
497 | EC_HOST_EVENT_AC_CONNECTED = 4, | |
498 | EC_HOST_EVENT_AC_DISCONNECTED = 5, | |
499 | EC_HOST_EVENT_BATTERY_LOW = 6, | |
500 | EC_HOST_EVENT_BATTERY_CRITICAL = 7, | |
501 | EC_HOST_EVENT_BATTERY = 8, | |
502 | EC_HOST_EVENT_THERMAL_THRESHOLD = 9, | |
784dd15c GG |
503 | /* Event generated by a device attached to the EC */ |
504 | EC_HOST_EVENT_DEVICE = 10, | |
deaf39ef SG |
505 | EC_HOST_EVENT_THERMAL = 11, |
506 | EC_HOST_EVENT_USB_CHARGER = 12, | |
507 | EC_HOST_EVENT_KEY_PRESSED = 13, | |
508 | /* | |
509 | * EC has finished initializing the host interface. The host can check | |
510 | * for this event following sending a EC_CMD_REBOOT_EC command to | |
511 | * determine when the EC is ready to accept subsequent commands. | |
512 | */ | |
513 | EC_HOST_EVENT_INTERFACE_READY = 14, | |
514 | /* Keyboard recovery combo has been pressed */ | |
515 | EC_HOST_EVENT_KEYBOARD_RECOVERY = 15, | |
516 | ||
517 | /* Shutdown due to thermal overload */ | |
518 | EC_HOST_EVENT_THERMAL_SHUTDOWN = 16, | |
519 | /* Shutdown due to battery level too low */ | |
520 | EC_HOST_EVENT_BATTERY_SHUTDOWN = 17, | |
521 | ||
5271db29 BR |
522 | /* Suggest that the AP throttle itself */ |
523 | EC_HOST_EVENT_THROTTLE_START = 18, | |
524 | /* Suggest that the AP resume normal speed */ | |
525 | EC_HOST_EVENT_THROTTLE_STOP = 19, | |
526 | ||
527 | /* Hang detect logic detected a hang and host event timeout expired */ | |
528 | EC_HOST_EVENT_HANG_DETECT = 20, | |
529 | /* Hang detect logic detected a hang and warm rebooted the AP */ | |
530 | EC_HOST_EVENT_HANG_REBOOT = 21, | |
784dd15c | 531 | |
c6983166 BL |
532 | /* PD MCU triggering host event */ |
533 | EC_HOST_EVENT_PD_MCU = 22, | |
534 | ||
784dd15c GG |
535 | /* Battery Status flags have changed */ |
536 | EC_HOST_EVENT_BATTERY_STATUS = 23, | |
537 | ||
538 | /* EC encountered a panic, triggering a reset */ | |
539 | EC_HOST_EVENT_PANIC = 24, | |
540 | ||
541 | /* Keyboard fastboot combo has been pressed */ | |
542 | EC_HOST_EVENT_KEYBOARD_FASTBOOT = 25, | |
5271db29 | 543 | |
3eff6d2c SB |
544 | /* EC RTC event occurred */ |
545 | EC_HOST_EVENT_RTC = 26, | |
546 | ||
784dd15c GG |
547 | /* Emulate MKBP event */ |
548 | EC_HOST_EVENT_MKBP = 27, | |
549 | ||
550 | /* EC desires to change state of host-controlled USB mux */ | |
551 | EC_HOST_EVENT_USB_MUX = 28, | |
552 | ||
553 | /* TABLET/LAPTOP mode or detachable base attach/detach event */ | |
554 | EC_HOST_EVENT_MODE_CHANGE = 29, | |
555 | ||
556 | /* Keyboard recovery combo with hardware reinitialization */ | |
557 | EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30, | |
558 | ||
deaf39ef SG |
559 | /* |
560 | * The high bit of the event mask is not used as a host event code. If | |
561 | * it reads back as set, then the entire event mask should be | |
562 | * considered invalid by the host. This can happen when reading the | |
563 | * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is | |
564 | * not initialized on the EC, or improperly configured on the host. | |
565 | */ | |
566 | EC_HOST_EVENT_INVALID = 32 | |
567 | }; | |
568 | /* Host event mask */ | |
9e816560 | 569 | #define EC_HOST_EVENT_MASK(event_code) BIT_ULL((event_code) - 1) |
deaf39ef | 570 | |
e2bbf91c EBS |
571 | /** |
572 | * struct ec_lpc_host_args - Arguments at EC_LPC_ADDR_HOST_ARGS | |
573 | * @flags: The host argument flags. | |
574 | * @command_version: Command version. | |
575 | * @data_size: The length of data. | |
576 | * @checksum: Checksum; sum of command + flags + command_version + data_size + | |
577 | * all params/response data bytes. | |
578 | */ | |
deaf39ef SG |
579 | struct ec_lpc_host_args { |
580 | uint8_t flags; | |
581 | uint8_t command_version; | |
582 | uint8_t data_size; | |
deaf39ef | 583 | uint8_t checksum; |
6f72c3f9 | 584 | } __ec_align4; |
deaf39ef SG |
585 | |
586 | /* Flags for ec_lpc_host_args.flags */ | |
587 | /* | |
588 | * Args are from host. Data area at EC_LPC_ADDR_HOST_PARAM contains command | |
589 | * params. | |
590 | * | |
591 | * If EC gets a command and this flag is not set, this is an old-style command. | |
592 | * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with | |
593 | * unknown length. EC must respond with an old-style response (that is, | |
df95a3bd | 594 | * without setting EC_HOST_ARGS_FLAG_TO_HOST). |
deaf39ef SG |
595 | */ |
596 | #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01 | |
597 | /* | |
598 | * Args are from EC. Data area at EC_LPC_ADDR_HOST_PARAM contains response. | |
599 | * | |
600 | * If EC responds to a command and this flag is not set, this is an old-style | |
601 | * response. Command version is 0 and response data from EC is at | |
602 | * EC_LPC_ADDR_OLD_PARAM with unknown length. | |
603 | */ | |
604 | #define EC_HOST_ARGS_FLAG_TO_HOST 0x02 | |
605 | ||
5271db29 BR |
606 | /*****************************************************************************/ |
607 | /* | |
608 | * Byte codes returned by EC over SPI interface. | |
609 | * | |
610 | * These can be used by the AP to debug the EC interface, and to determine | |
611 | * when the EC is not in a state where it will ever get around to responding | |
612 | * to the AP. | |
613 | * | |
614 | * Example of sequence of bytes read from EC for a current good transfer: | |
615 | * 1. - - AP asserts chip select (CS#) | |
616 | * 2. EC_SPI_OLD_READY - AP sends first byte(s) of request | |
617 | * 3. - - EC starts handling CS# interrupt | |
618 | * 4. EC_SPI_RECEIVING - AP sends remaining byte(s) of request | |
619 | * 5. EC_SPI_PROCESSING - EC starts processing request; AP is clocking in | |
620 | * bytes looking for EC_SPI_FRAME_START | |
621 | * 6. - - EC finishes processing and sets up response | |
622 | * 7. EC_SPI_FRAME_START - AP reads frame byte | |
623 | * 8. (response packet) - AP reads response packet | |
624 | * 9. EC_SPI_PAST_END - Any additional bytes read by AP | |
625 | * 10 - - AP deasserts chip select | |
626 | * 11 - - EC processes CS# interrupt and sets up DMA for | |
627 | * next request | |
628 | * | |
629 | * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than | |
630 | * the following byte values: | |
631 | * EC_SPI_OLD_READY | |
632 | * EC_SPI_RX_READY | |
633 | * EC_SPI_RECEIVING | |
634 | * EC_SPI_PROCESSING | |
635 | * | |
636 | * Then the EC found an error in the request, or was not ready for the request | |
637 | * and lost data. The AP should give up waiting for EC_SPI_FRAME_START, | |
638 | * because the EC is unable to tell when the AP is done sending its request. | |
639 | */ | |
640 | ||
641 | /* | |
642 | * Framing byte which precedes a response packet from the EC. After sending a | |
643 | * request, the AP will clock in bytes until it sees the framing byte, then | |
644 | * clock in the response packet. | |
645 | */ | |
646 | #define EC_SPI_FRAME_START 0xec | |
647 | ||
648 | /* | |
649 | * Padding bytes which are clocked out after the end of a response packet. | |
650 | */ | |
651 | #define EC_SPI_PAST_END 0xed | |
652 | ||
653 | /* | |
654 | * EC is ready to receive, and has ignored the byte sent by the AP. EC expects | |
655 | * that the AP will send a valid packet header (starting with | |
656 | * EC_COMMAND_PROTOCOL_3) in the next 32 bytes. | |
657 | */ | |
658 | #define EC_SPI_RX_READY 0xf8 | |
659 | ||
660 | /* | |
661 | * EC has started receiving the request from the AP, but hasn't started | |
662 | * processing it yet. | |
663 | */ | |
664 | #define EC_SPI_RECEIVING 0xf9 | |
665 | ||
666 | /* EC has received the entire request from the AP and is processing it. */ | |
667 | #define EC_SPI_PROCESSING 0xfa | |
668 | ||
669 | /* | |
670 | * EC received bad data from the AP, such as a packet header with an invalid | |
671 | * length. EC will ignore all data until chip select deasserts. | |
672 | */ | |
673 | #define EC_SPI_RX_BAD_DATA 0xfb | |
674 | ||
675 | /* | |
676 | * EC received data from the AP before it was ready. That is, the AP asserted | |
677 | * chip select and started clocking data before the EC was ready to receive it. | |
678 | * EC will ignore all data until chip select deasserts. | |
679 | */ | |
680 | #define EC_SPI_NOT_READY 0xfc | |
681 | ||
682 | /* | |
683 | * EC was ready to receive a request from the AP. EC has treated the byte sent | |
684 | * by the AP as part of a request packet, or (for old-style ECs) is processing | |
685 | * a fully received packet but is not ready to respond yet. | |
686 | */ | |
687 | #define EC_SPI_OLD_READY 0xfd | |
688 | ||
689 | /*****************************************************************************/ | |
690 | ||
691 | /* | |
692 | * Protocol version 2 for I2C and SPI send a request this way: | |
693 | * | |
694 | * 0 EC_CMD_VERSION0 + (command version) | |
695 | * 1 Command number | |
696 | * 2 Length of params = N | |
697 | * 3..N+2 Params, if any | |
698 | * N+3 8-bit checksum of bytes 0..N+2 | |
699 | * | |
700 | * The corresponding response is: | |
701 | * | |
702 | * 0 Result code (EC_RES_*) | |
703 | * 1 Length of params = M | |
704 | * 2..M+1 Params, if any | |
705 | * M+2 8-bit checksum of bytes 0..M+1 | |
706 | */ | |
707 | #define EC_PROTO2_REQUEST_HEADER_BYTES 3 | |
708 | #define EC_PROTO2_REQUEST_TRAILER_BYTES 1 | |
709 | #define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES + \ | |
710 | EC_PROTO2_REQUEST_TRAILER_BYTES) | |
711 | ||
712 | #define EC_PROTO2_RESPONSE_HEADER_BYTES 2 | |
713 | #define EC_PROTO2_RESPONSE_TRAILER_BYTES 1 | |
714 | #define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES + \ | |
715 | EC_PROTO2_RESPONSE_TRAILER_BYTES) | |
716 | ||
717 | /* Parameter length was limited by the LPC interface */ | |
718 | #define EC_PROTO2_MAX_PARAM_SIZE 0xfc | |
719 | ||
720 | /* Maximum request and response packet sizes for protocol version 2 */ | |
721 | #define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD + \ | |
722 | EC_PROTO2_MAX_PARAM_SIZE) | |
723 | #define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD + \ | |
724 | EC_PROTO2_MAX_PARAM_SIZE) | |
725 | ||
726 | /*****************************************************************************/ | |
727 | ||
728 | /* | |
729 | * Value written to legacy command port / prefix byte to indicate protocol | |
730 | * 3+ structs are being used. Usage is bus-dependent. | |
731 | */ | |
732 | #define EC_COMMAND_PROTOCOL_3 0xda | |
733 | ||
734 | #define EC_HOST_REQUEST_VERSION 3 | |
735 | ||
e2bbf91c EBS |
736 | /** |
737 | * struct ec_host_request - Version 3 request from host. | |
738 | * @struct_version: Should be 3. The EC will return EC_RES_INVALID_HEADER if it | |
739 | * receives a header with a version it doesn't know how to | |
740 | * parse. | |
741 | * @checksum: Checksum of request and data; sum of all bytes including checksum | |
742 | * should total to 0. | |
743 | * @command: Command to send (EC_CMD_...) | |
744 | * @command_version: Command version. | |
745 | * @reserved: Unused byte in current protocol version; set to 0. | |
746 | * @data_len: Length of data which follows this header. | |
747 | */ | |
5271db29 | 748 | struct ec_host_request { |
5271db29 | 749 | uint8_t struct_version; |
5271db29 | 750 | uint8_t checksum; |
5271db29 | 751 | uint16_t command; |
5271db29 | 752 | uint8_t command_version; |
5271db29 | 753 | uint8_t reserved; |
5271db29 | 754 | uint16_t data_len; |
6f72c3f9 | 755 | } __ec_align4; |
5271db29 BR |
756 | |
757 | #define EC_HOST_RESPONSE_VERSION 3 | |
758 | ||
e2bbf91c EBS |
759 | /** |
760 | * struct ec_host_response - Version 3 response from EC. | |
761 | * @struct_version: Struct version (=3). | |
762 | * @checksum: Checksum of response and data; sum of all bytes including | |
763 | * checksum should total to 0. | |
764 | * @result: EC's response to the command (separate from communication failure) | |
765 | * @data_len: Length of data which follows this header. | |
766 | * @reserved: Unused bytes in current protocol version; set to 0. | |
767 | */ | |
5271db29 | 768 | struct ec_host_response { |
5271db29 | 769 | uint8_t struct_version; |
5271db29 | 770 | uint8_t checksum; |
5271db29 | 771 | uint16_t result; |
5271db29 | 772 | uint16_t data_len; |
5271db29 | 773 | uint16_t reserved; |
6f72c3f9 | 774 | } __ec_align4; |
5271db29 | 775 | |
2908c4ed GG |
776 | /*****************************************************************************/ |
777 | ||
778 | /* | |
779 | * Host command protocol V4. | |
780 | * | |
781 | * Packets always start with a request or response header. They are followed | |
782 | * by data_len bytes of data. If the data_crc_present flag is set, the data | |
783 | * bytes are followed by a CRC-8 of that data, using using x^8 + x^2 + x + 1 | |
784 | * polynomial. | |
785 | * | |
786 | * Host algorithm when sending a request q: | |
787 | * | |
788 | * 101) tries_left=(some value, e.g. 3); | |
789 | * 102) q.seq_num++ | |
790 | * 103) q.seq_dup=0 | |
791 | * 104) Calculate q.header_crc. | |
792 | * 105) Send request q to EC. | |
793 | * 106) Wait for response r. Go to 201 if received or 301 if timeout. | |
794 | * | |
795 | * 201) If r.struct_version != 4, go to 301. | |
796 | * 202) If r.header_crc mismatches calculated CRC for r header, go to 301. | |
797 | * 203) If r.data_crc_present and r.data_crc mismatches, go to 301. | |
798 | * 204) If r.seq_num != q.seq_num, go to 301. | |
799 | * 205) If r.seq_dup == q.seq_dup, return success. | |
800 | * 207) If r.seq_dup == 1, go to 301. | |
801 | * 208) Return error. | |
802 | * | |
803 | * 301) If --tries_left <= 0, return error. | |
804 | * 302) If q.seq_dup == 1, go to 105. | |
805 | * 303) q.seq_dup = 1 | |
806 | * 304) Go to 104. | |
807 | * | |
808 | * EC algorithm when receiving a request q. | |
809 | * EC has response buffer r, error buffer e. | |
810 | * | |
811 | * 101) If q.struct_version != 4, set e.result = EC_RES_INVALID_HEADER_VERSION | |
812 | * and go to 301 | |
813 | * 102) If q.header_crc mismatches calculated CRC, set e.result = | |
814 | * EC_RES_INVALID_HEADER_CRC and go to 301 | |
815 | * 103) If q.data_crc_present, calculate data CRC. If that mismatches the CRC | |
816 | * byte at the end of the packet, set e.result = EC_RES_INVALID_DATA_CRC | |
817 | * and go to 301. | |
818 | * 104) If q.seq_dup == 0, go to 201. | |
819 | * 105) If q.seq_num != r.seq_num, go to 201. | |
820 | * 106) If q.seq_dup == r.seq_dup, go to 205, else go to 203. | |
821 | * | |
822 | * 201) Process request q into response r. | |
823 | * 202) r.seq_num = q.seq_num | |
824 | * 203) r.seq_dup = q.seq_dup | |
825 | * 204) Calculate r.header_crc | |
826 | * 205) If r.data_len > 0 and data is no longer available, set e.result = | |
827 | * EC_RES_DUP_UNAVAILABLE and go to 301. | |
828 | * 206) Send response r. | |
829 | * | |
830 | * 301) e.seq_num = q.seq_num | |
831 | * 302) e.seq_dup = q.seq_dup | |
832 | * 303) Calculate e.header_crc. | |
833 | * 304) Send error response e. | |
834 | */ | |
835 | ||
836 | /* Version 4 request from host */ | |
837 | struct ec_host_request4 { | |
838 | /* | |
839 | * bits 0-3: struct_version: Structure version (=4) | |
840 | * bit 4: is_response: Is response (=0) | |
841 | * bits 5-6: seq_num: Sequence number | |
842 | * bit 7: seq_dup: Sequence duplicate flag | |
843 | */ | |
844 | uint8_t fields0; | |
845 | ||
846 | /* | |
847 | * bits 0-4: command_version: Command version | |
848 | * bits 5-6: Reserved (set 0, ignore on read) | |
849 | * bit 7: data_crc_present: Is data CRC present after data | |
850 | */ | |
851 | uint8_t fields1; | |
852 | ||
853 | /* Command code (EC_CMD_*) */ | |
854 | uint16_t command; | |
855 | ||
856 | /* Length of data which follows this header (not including data CRC) */ | |
857 | uint16_t data_len; | |
858 | ||
859 | /* Reserved (set 0, ignore on read) */ | |
860 | uint8_t reserved; | |
861 | ||
862 | /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */ | |
863 | uint8_t header_crc; | |
864 | } __ec_align4; | |
865 | ||
866 | /* Version 4 response from EC */ | |
867 | struct ec_host_response4 { | |
868 | /* | |
869 | * bits 0-3: struct_version: Structure version (=4) | |
870 | * bit 4: is_response: Is response (=1) | |
871 | * bits 5-6: seq_num: Sequence number | |
872 | * bit 7: seq_dup: Sequence duplicate flag | |
873 | */ | |
874 | uint8_t fields0; | |
875 | ||
876 | /* | |
877 | * bits 0-6: Reserved (set 0, ignore on read) | |
878 | * bit 7: data_crc_present: Is data CRC present after data | |
879 | */ | |
880 | uint8_t fields1; | |
881 | ||
882 | /* Result code (EC_RES_*) */ | |
883 | uint16_t result; | |
884 | ||
885 | /* Length of data which follows this header (not including data CRC) */ | |
886 | uint16_t data_len; | |
887 | ||
888 | /* Reserved (set 0, ignore on read) */ | |
889 | uint8_t reserved; | |
890 | ||
891 | /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */ | |
892 | uint8_t header_crc; | |
893 | } __ec_align4; | |
894 | ||
895 | /* Fields in fields0 byte */ | |
896 | #define EC_PACKET4_0_STRUCT_VERSION_MASK 0x0f | |
897 | #define EC_PACKET4_0_IS_RESPONSE_MASK 0x10 | |
898 | #define EC_PACKET4_0_SEQ_NUM_SHIFT 5 | |
899 | #define EC_PACKET4_0_SEQ_NUM_MASK 0x60 | |
900 | #define EC_PACKET4_0_SEQ_DUP_MASK 0x80 | |
901 | ||
902 | /* Fields in fields1 byte */ | |
903 | #define EC_PACKET4_1_COMMAND_VERSION_MASK 0x1f /* (request only) */ | |
904 | #define EC_PACKET4_1_DATA_CRC_PRESENT_MASK 0x80 | |
905 | ||
5271db29 | 906 | /*****************************************************************************/ |
deaf39ef SG |
907 | /* |
908 | * Notes on commands: | |
909 | * | |
256ab950 | 910 | * Each command is an 16-bit command value. Commands which take params or |
df95a3bd | 911 | * return response data specify structures for that data. If no structure is |
deaf39ef SG |
912 | * specified, the command does not input or output data, respectively. |
913 | * Parameter/response length is implicit in the structs. Some underlying | |
914 | * communication protocols (I2C, SPI) may add length or checksum headers, but | |
915 | * those are implementation-dependent and not defined here. | |
ff834332 GG |
916 | * |
917 | * All commands MUST be #defined to be 4-digit UPPER CASE hex values | |
918 | * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. | |
deaf39ef SG |
919 | */ |
920 | ||
921 | /*****************************************************************************/ | |
922 | /* General / test commands */ | |
923 | ||
924 | /* | |
925 | * Get protocol version, used to deal with non-backward compatible protocol | |
926 | * changes. | |
927 | */ | |
ff834332 | 928 | #define EC_CMD_PROTO_VERSION 0x0000 |
deaf39ef | 929 | |
e2bbf91c EBS |
930 | /** |
931 | * struct ec_response_proto_version - Response to the proto version command. | |
932 | * @version: The protocol version. | |
933 | */ | |
deaf39ef SG |
934 | struct ec_response_proto_version { |
935 | uint32_t version; | |
6f72c3f9 | 936 | } __ec_align4; |
deaf39ef SG |
937 | |
938 | /* | |
939 | * Hello. This is a simple command to test the EC is responsive to | |
940 | * commands. | |
941 | */ | |
ff834332 | 942 | #define EC_CMD_HELLO 0x0001 |
deaf39ef | 943 | |
e2bbf91c EBS |
944 | /** |
945 | * struct ec_params_hello - Parameters to the hello command. | |
946 | * @in_data: Pass anything here. | |
947 | */ | |
deaf39ef | 948 | struct ec_params_hello { |
e2bbf91c | 949 | uint32_t in_data; |
6f72c3f9 | 950 | } __ec_align4; |
deaf39ef | 951 | |
e2bbf91c EBS |
952 | /** |
953 | * struct ec_response_hello - Response to the hello command. | |
954 | * @out_data: Output will be in_data + 0x01020304. | |
955 | */ | |
deaf39ef | 956 | struct ec_response_hello { |
e2bbf91c | 957 | uint32_t out_data; |
6f72c3f9 | 958 | } __ec_align4; |
deaf39ef SG |
959 | |
960 | /* Get version number */ | |
ff834332 | 961 | #define EC_CMD_GET_VERSION 0x0002 |
deaf39ef SG |
962 | |
963 | enum ec_current_image { | |
964 | EC_IMAGE_UNKNOWN = 0, | |
965 | EC_IMAGE_RO, | |
966 | EC_IMAGE_RW | |
967 | }; | |
968 | ||
e2bbf91c EBS |
969 | /** |
970 | * struct ec_response_get_version - Response to the get version command. | |
971 | * @version_string_ro: Null-terminated RO firmware version string. | |
972 | * @version_string_rw: Null-terminated RW firmware version string. | |
973 | * @reserved: Unused bytes; was previously RW-B firmware version string. | |
974 | * @current_image: One of ec_current_image. | |
975 | */ | |
deaf39ef | 976 | struct ec_response_get_version { |
deaf39ef SG |
977 | char version_string_ro[32]; |
978 | char version_string_rw[32]; | |
e2bbf91c EBS |
979 | char reserved[32]; |
980 | uint32_t current_image; | |
6f72c3f9 | 981 | } __ec_align4; |
deaf39ef SG |
982 | |
983 | /* Read test */ | |
ff834332 | 984 | #define EC_CMD_READ_TEST 0x0003 |
deaf39ef | 985 | |
e2bbf91c EBS |
986 | /** |
987 | * struct ec_params_read_test - Parameters for the read test command. | |
988 | * @offset: Starting value for read buffer. | |
989 | * @size: Size to read in bytes. | |
990 | */ | |
deaf39ef | 991 | struct ec_params_read_test { |
e2bbf91c EBS |
992 | uint32_t offset; |
993 | uint32_t size; | |
6f72c3f9 | 994 | } __ec_align4; |
deaf39ef | 995 | |
e2bbf91c EBS |
996 | /** |
997 | * struct ec_response_read_test - Response to the read test command. | |
998 | * @data: Data returned by the read test command. | |
999 | */ | |
deaf39ef SG |
1000 | struct ec_response_read_test { |
1001 | uint32_t data[32]; | |
6f72c3f9 | 1002 | } __ec_align4; |
deaf39ef SG |
1003 | |
1004 | /* | |
1005 | * Get build information | |
1006 | * | |
1007 | * Response is null-terminated string. | |
1008 | */ | |
ff834332 | 1009 | #define EC_CMD_GET_BUILD_INFO 0x0004 |
deaf39ef SG |
1010 | |
1011 | /* Get chip info */ | |
ff834332 | 1012 | #define EC_CMD_GET_CHIP_INFO 0x0005 |
deaf39ef | 1013 | |
e2bbf91c EBS |
1014 | /** |
1015 | * struct ec_response_get_chip_info - Response to the get chip info command. | |
1016 | * @vendor: Null-terminated string for chip vendor. | |
1017 | * @name: Null-terminated string for chip name. | |
1018 | * @revision: Null-terminated string for chip mask version. | |
1019 | */ | |
deaf39ef | 1020 | struct ec_response_get_chip_info { |
deaf39ef SG |
1021 | char vendor[32]; |
1022 | char name[32]; | |
e2bbf91c | 1023 | char revision[32]; |
6f72c3f9 | 1024 | } __ec_align4; |
deaf39ef SG |
1025 | |
1026 | /* Get board HW version */ | |
ff834332 | 1027 | #define EC_CMD_GET_BOARD_VERSION 0x0006 |
deaf39ef | 1028 | |
e2bbf91c EBS |
1029 | /** |
1030 | * struct ec_response_board_version - Response to the board version command. | |
1031 | * @board_version: A monotonously incrementing number. | |
1032 | */ | |
deaf39ef | 1033 | struct ec_response_board_version { |
e2bbf91c | 1034 | uint16_t board_version; |
6f72c3f9 | 1035 | } __ec_align2; |
deaf39ef SG |
1036 | |
1037 | /* | |
1038 | * Read memory-mapped data. | |
1039 | * | |
1040 | * This is an alternate interface to memory-mapped data for bus protocols | |
1041 | * which don't support direct-mapped memory - I2C, SPI, etc. | |
1042 | * | |
1043 | * Response is params.size bytes of data. | |
1044 | */ | |
ff834332 | 1045 | #define EC_CMD_READ_MEMMAP 0x0007 |
deaf39ef | 1046 | |
e2bbf91c EBS |
1047 | /** |
1048 | * struct ec_params_read_memmap - Parameters for the read memory map command. | |
1049 | * @offset: Offset in memmap (EC_MEMMAP_*). | |
1050 | * @size: Size to read in bytes. | |
1051 | */ | |
deaf39ef | 1052 | struct ec_params_read_memmap { |
e2bbf91c EBS |
1053 | uint8_t offset; |
1054 | uint8_t size; | |
6f72c3f9 | 1055 | } __ec_align1; |
deaf39ef SG |
1056 | |
1057 | /* Read versions supported for a command */ | |
ff834332 | 1058 | #define EC_CMD_GET_CMD_VERSIONS 0x0008 |
deaf39ef | 1059 | |
e2bbf91c EBS |
1060 | /** |
1061 | * struct ec_params_get_cmd_versions - Parameters for the get command versions. | |
1062 | * @cmd: Command to check. | |
1063 | */ | |
deaf39ef | 1064 | struct ec_params_get_cmd_versions { |
e2bbf91c | 1065 | uint8_t cmd; |
6f72c3f9 | 1066 | } __ec_align1; |
deaf39ef | 1067 | |
e2bbf91c EBS |
1068 | /** |
1069 | * struct ec_params_get_cmd_versions_v1 - Parameters for the get command | |
1070 | * versions (v1) | |
1071 | * @cmd: Command to check. | |
1072 | */ | |
0aa877c5 | 1073 | struct ec_params_get_cmd_versions_v1 { |
e2bbf91c | 1074 | uint16_t cmd; |
6f72c3f9 | 1075 | } __ec_align2; |
0aa877c5 | 1076 | |
e2bbf91c EBS |
1077 | /** |
1078 | * struct ec_response_get_cmd_version - Response to the get command versions. | |
1079 | * @version_mask: Mask of supported versions; use EC_VER_MASK() to compare with | |
1080 | * a desired version. | |
1081 | */ | |
deaf39ef | 1082 | struct ec_response_get_cmd_versions { |
deaf39ef | 1083 | uint32_t version_mask; |
6f72c3f9 | 1084 | } __ec_align4; |
deaf39ef SG |
1085 | |
1086 | /* | |
df95a3bd | 1087 | * Check EC communications status (busy). This is needed on i2c/spi but not |
deaf39ef SG |
1088 | * on lpc since it has its own out-of-band busy indicator. |
1089 | * | |
1090 | * lpc must read the status from the command register. Attempting this on | |
1091 | * lpc will overwrite the args/parameter space and corrupt its data. | |
1092 | */ | |
ff834332 | 1093 | #define EC_CMD_GET_COMMS_STATUS 0x0009 |
deaf39ef SG |
1094 | |
1095 | /* Avoid using ec_status which is for return values */ | |
1096 | enum ec_comms_status { | |
9e816560 | 1097 | EC_COMMS_STATUS_PROCESSING = BIT(0), /* Processing cmd */ |
deaf39ef SG |
1098 | }; |
1099 | ||
e2bbf91c EBS |
1100 | /** |
1101 | * struct ec_response_get_comms_status - Response to the get comms status | |
1102 | * command. | |
1103 | * @flags: Mask of enum ec_comms_status. | |
1104 | */ | |
deaf39ef SG |
1105 | struct ec_response_get_comms_status { |
1106 | uint32_t flags; /* Mask of enum ec_comms_status */ | |
6f72c3f9 | 1107 | } __ec_align4; |
deaf39ef | 1108 | |
5271db29 | 1109 | /* Fake a variety of responses, purely for testing purposes. */ |
ff834332 | 1110 | #define EC_CMD_TEST_PROTOCOL 0x000A |
5271db29 BR |
1111 | |
1112 | /* Tell the EC what to send back to us. */ | |
1113 | struct ec_params_test_protocol { | |
1114 | uint32_t ec_result; | |
1115 | uint32_t ret_len; | |
1116 | uint8_t buf[32]; | |
6f72c3f9 | 1117 | } __ec_align4; |
5271db29 BR |
1118 | |
1119 | /* Here it comes... */ | |
1120 | struct ec_response_test_protocol { | |
1121 | uint8_t buf[32]; | |
6f72c3f9 | 1122 | } __ec_align4; |
5271db29 | 1123 | |
df95a3bd | 1124 | /* Get protocol information */ |
ff834332 | 1125 | #define EC_CMD_GET_PROTOCOL_INFO 0x000B |
5271db29 BR |
1126 | |
1127 | /* Flags for ec_response_get_protocol_info.flags */ | |
1128 | /* EC_RES_IN_PROGRESS may be returned if a command is slow */ | |
9e816560 | 1129 | #define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED BIT(0) |
5271db29 | 1130 | |
e2bbf91c EBS |
1131 | /** |
1132 | * struct ec_response_get_protocol_info - Response to the get protocol info. | |
1133 | * @protocol_versions: Bitmask of protocol versions supported (1 << n means | |
1134 | * version n). | |
1135 | * @max_request_packet_size: Maximum request packet size in bytes. | |
1136 | * @max_response_packet_size: Maximum response packet size in bytes. | |
1137 | * @flags: see EC_PROTOCOL_INFO_* | |
1138 | */ | |
5271db29 BR |
1139 | struct ec_response_get_protocol_info { |
1140 | /* Fields which exist if at least protocol version 3 supported */ | |
5271db29 | 1141 | uint32_t protocol_versions; |
5271db29 | 1142 | uint16_t max_request_packet_size; |
5271db29 | 1143 | uint16_t max_response_packet_size; |
5271db29 | 1144 | uint32_t flags; |
6f72c3f9 | 1145 | } __ec_align4; |
5271db29 BR |
1146 | |
1147 | ||
1148 | /*****************************************************************************/ | |
1149 | /* Get/Set miscellaneous values */ | |
1150 | ||
1151 | /* The upper byte of .flags tells what to do (nothing means "get") */ | |
1152 | #define EC_GSV_SET 0x80000000 | |
1153 | ||
e2bbf91c EBS |
1154 | /* |
1155 | * The lower three bytes of .flags identifies the parameter, if that has | |
1156 | * meaning for an individual command. | |
1157 | */ | |
5271db29 BR |
1158 | #define EC_GSV_PARAM_MASK 0x00ffffff |
1159 | ||
1160 | struct ec_params_get_set_value { | |
1161 | uint32_t flags; | |
1162 | uint32_t value; | |
6f72c3f9 | 1163 | } __ec_align4; |
5271db29 BR |
1164 | |
1165 | struct ec_response_get_set_value { | |
1166 | uint32_t flags; | |
1167 | uint32_t value; | |
6f72c3f9 | 1168 | } __ec_align4; |
5271db29 | 1169 | |
df95a3bd | 1170 | /* More than one command can use these structs to get/set parameters. */ |
ff834332 | 1171 | #define EC_CMD_GSV_PAUSE_IN_S5 0x000C |
5271db29 | 1172 | |
e4244ebd VP |
1173 | /*****************************************************************************/ |
1174 | /* List the features supported by the firmware */ | |
ff834332 | 1175 | #define EC_CMD_GET_FEATURES 0x000D |
e4244ebd VP |
1176 | |
1177 | /* Supported features */ | |
1178 | enum ec_feature_code { | |
1179 | /* | |
1180 | * This image contains a limited set of features. Another image | |
1181 | * in RW partition may support more features. | |
1182 | */ | |
1183 | EC_FEATURE_LIMITED = 0, | |
1184 | /* | |
1185 | * Commands for probing/reading/writing/erasing the flash in the | |
1186 | * EC are present. | |
1187 | */ | |
1188 | EC_FEATURE_FLASH = 1, | |
1189 | /* | |
1190 | * Can control the fan speed directly. | |
1191 | */ | |
1192 | EC_FEATURE_PWM_FAN = 2, | |
1193 | /* | |
1194 | * Can control the intensity of the keyboard backlight. | |
1195 | */ | |
1196 | EC_FEATURE_PWM_KEYB = 3, | |
1197 | /* | |
1198 | * Support Google lightbar, introduced on Pixel. | |
1199 | */ | |
1200 | EC_FEATURE_LIGHTBAR = 4, | |
1201 | /* Control of LEDs */ | |
1202 | EC_FEATURE_LED = 5, | |
1203 | /* Exposes an interface to control gyro and sensors. | |
1204 | * The host goes through the EC to access these sensors. | |
1205 | * In addition, the EC may provide composite sensors, like lid angle. | |
1206 | */ | |
1207 | EC_FEATURE_MOTION_SENSE = 6, | |
1208 | /* The keyboard is controlled by the EC */ | |
1209 | EC_FEATURE_KEYB = 7, | |
1210 | /* The AP can use part of the EC flash as persistent storage. */ | |
1211 | EC_FEATURE_PSTORE = 8, | |
1212 | /* The EC monitors BIOS port 80h, and can return POST codes. */ | |
1213 | EC_FEATURE_PORT80 = 9, | |
1214 | /* | |
1215 | * Thermal management: include TMP specific commands. | |
1216 | * Higher level than direct fan control. | |
1217 | */ | |
1218 | EC_FEATURE_THERMAL = 10, | |
1219 | /* Can switch the screen backlight on/off */ | |
1220 | EC_FEATURE_BKLIGHT_SWITCH = 11, | |
1221 | /* Can switch the wifi module on/off */ | |
1222 | EC_FEATURE_WIFI_SWITCH = 12, | |
1223 | /* Monitor host events, through for example SMI or SCI */ | |
1224 | EC_FEATURE_HOST_EVENTS = 13, | |
1225 | /* The EC exposes GPIO commands to control/monitor connected devices. */ | |
1226 | EC_FEATURE_GPIO = 14, | |
1227 | /* The EC can send i2c messages to downstream devices. */ | |
1228 | EC_FEATURE_I2C = 15, | |
1229 | /* Command to control charger are included */ | |
1230 | EC_FEATURE_CHARGER = 16, | |
1231 | /* Simple battery support. */ | |
1232 | EC_FEATURE_BATTERY = 17, | |
1233 | /* | |
1234 | * Support Smart battery protocol | |
1235 | * (Common Smart Battery System Interface Specification) | |
1236 | */ | |
1237 | EC_FEATURE_SMART_BATTERY = 18, | |
93abf68b | 1238 | /* EC can detect when the host hangs. */ |
e4244ebd VP |
1239 | EC_FEATURE_HANG_DETECT = 19, |
1240 | /* Report power information, for pit only */ | |
1241 | EC_FEATURE_PMU = 20, | |
1242 | /* Another Cros EC device is present downstream of this one */ | |
1243 | EC_FEATURE_SUB_MCU = 21, | |
1244 | /* Support USB Power delivery (PD) commands */ | |
1245 | EC_FEATURE_USB_PD = 22, | |
1246 | /* Control USB multiplexer, for audio through USB port for instance. */ | |
1247 | EC_FEATURE_USB_MUX = 23, | |
1248 | /* Motion Sensor code has an internal software FIFO */ | |
1249 | EC_FEATURE_MOTION_SENSE_FIFO = 24, | |
93abf68b EBS |
1250 | /* Support temporary secure vstore */ |
1251 | EC_FEATURE_VSTORE = 25, | |
1252 | /* EC decides on USB-C SS mux state, muxes configured by host */ | |
1253 | EC_FEATURE_USBC_SS_MUX_VIRTUAL = 26, | |
3eff6d2c SB |
1254 | /* EC has RTC feature that can be controlled by host commands */ |
1255 | EC_FEATURE_RTC = 27, | |
93abf68b EBS |
1256 | /* The MCU exposes a Fingerprint sensor */ |
1257 | EC_FEATURE_FINGERPRINT = 28, | |
1258 | /* The MCU exposes a Touchpad */ | |
1259 | EC_FEATURE_TOUCHPAD = 29, | |
1260 | /* The MCU has RWSIG task enabled */ | |
1261 | EC_FEATURE_RWSIG = 30, | |
1262 | /* EC has device events support */ | |
1263 | EC_FEATURE_DEVICE_EVENT = 31, | |
1264 | /* EC supports the unified wake masks for LPC/eSPI systems */ | |
1265 | EC_FEATURE_UNIFIED_WAKE_MASKS = 32, | |
1266 | /* EC supports 64-bit host events */ | |
1267 | EC_FEATURE_HOST_EVENT64 = 33, | |
1268 | /* EC runs code in RAM (not in place, a.k.a. XIP) */ | |
1269 | EC_FEATURE_EXEC_IN_RAM = 34, | |
f47674e5 NA |
1270 | /* EC supports CEC commands */ |
1271 | EC_FEATURE_CEC = 35, | |
93abf68b EBS |
1272 | /* EC supports tight sensor timestamping. */ |
1273 | EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS = 36, | |
1274 | /* | |
1275 | * EC supports tablet mode detection aligned to Chrome and allows | |
1276 | * setting of threshold by host command using | |
1277 | * MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. | |
1278 | */ | |
1279 | EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS = 37, | |
1280 | /* EC supports audio codec. */ | |
1281 | EC_FEATURE_AUDIO_CODEC = 38, | |
784dd15c | 1282 | /* The MCU is a System Companion Processor (SCP). */ |
93abf68b | 1283 | EC_FEATURE_SCP = 39, |
d4cee950 RK |
1284 | /* The MCU is an Integrated Sensor Hub */ |
1285 | EC_FEATURE_ISH = 40, | |
e4244ebd VP |
1286 | }; |
1287 | ||
9e816560 GG |
1288 | #define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32) |
1289 | #define EC_FEATURE_MASK_1(event_code) BIT(event_code - 32) | |
e2bbf91c | 1290 | |
e4244ebd VP |
1291 | struct ec_response_get_features { |
1292 | uint32_t flags[2]; | |
6f72c3f9 | 1293 | } __ec_align4; |
deaf39ef SG |
1294 | |
1295 | /*****************************************************************************/ | |
1296 | /* Flash commands */ | |
1297 | ||
1298 | /* Get flash info */ | |
ff834332 | 1299 | #define EC_CMD_FLASH_INFO 0x0010 |
3c46ae61 | 1300 | #define EC_VER_FLASH_INFO 2 |
deaf39ef | 1301 | |
e2bbf91c EBS |
1302 | /** |
1303 | * struct ec_response_flash_info - Response to the flash info command. | |
1304 | * @flash_size: Usable flash size in bytes. | |
1305 | * @write_block_size: Write block size. Write offset and size must be a | |
1306 | * multiple of this. | |
1307 | * @erase_block_size: Erase block size. Erase offset and size must be a | |
1308 | * multiple of this. | |
1309 | * @protect_block_size: Protection block size. Protection offset and size | |
1310 | * must be a multiple of this. | |
1311 | * | |
1312 | * Version 0 returns these fields. | |
1313 | */ | |
deaf39ef | 1314 | struct ec_response_flash_info { |
deaf39ef | 1315 | uint32_t flash_size; |
deaf39ef | 1316 | uint32_t write_block_size; |
deaf39ef | 1317 | uint32_t erase_block_size; |
deaf39ef | 1318 | uint32_t protect_block_size; |
6f72c3f9 | 1319 | } __ec_align4; |
deaf39ef | 1320 | |
df95a3bd GG |
1321 | /* |
1322 | * Flags for version 1+ flash info command | |
1323 | * EC flash erases bits to 0 instead of 1. | |
1324 | */ | |
9e816560 | 1325 | #define EC_FLASH_INFO_ERASE_TO_0 BIT(0) |
5271db29 | 1326 | |
3c46ae61 GG |
1327 | /* |
1328 | * Flash must be selected for read/write/erase operations to succeed. This may | |
1329 | * be necessary on a chip where write/erase can be corrupted by other board | |
1330 | * activity, or where the chip needs to enable some sort of programming voltage, | |
1331 | * or where the read/write/erase operations require cleanly suspending other | |
1332 | * chip functionality. | |
1333 | */ | |
1334 | #define EC_FLASH_INFO_SELECT_REQUIRED BIT(1) | |
1335 | ||
e2bbf91c EBS |
1336 | /** |
1337 | * struct ec_response_flash_info_1 - Response to the flash info v1 command. | |
1338 | * @flash_size: Usable flash size in bytes. | |
1339 | * @write_block_size: Write block size. Write offset and size must be a | |
1340 | * multiple of this. | |
1341 | * @erase_block_size: Erase block size. Erase offset and size must be a | |
1342 | * multiple of this. | |
1343 | * @protect_block_size: Protection block size. Protection offset and size | |
1344 | * must be a multiple of this. | |
1345 | * @write_ideal_size: Ideal write size in bytes. Writes will be fastest if | |
1346 | * size is exactly this and offset is a multiple of this. | |
1347 | * For example, an EC may have a write buffer which can do | |
1348 | * half-page operations if data is aligned, and a slower | |
1349 | * word-at-a-time write mode. | |
1350 | * @flags: Flags; see EC_FLASH_INFO_* | |
1351 | * | |
5271db29 BR |
1352 | * Version 1 returns the same initial fields as version 0, with additional |
1353 | * fields following. | |
1354 | * | |
1355 | * gcc anonymous structs don't seem to get along with the __packed directive; | |
df95a3bd GG |
1356 | * if they did we'd define the version 0 structure as a sub-structure of this |
1357 | * one. | |
3c46ae61 GG |
1358 | * |
1359 | * Version 2 supports flash banks of different sizes: | |
1360 | * The caller specified the number of banks it has preallocated | |
1361 | * (num_banks_desc) | |
1362 | * The EC returns the number of banks describing the flash memory. | |
1363 | * It adds banks descriptions up to num_banks_desc. | |
5271db29 BR |
1364 | */ |
1365 | struct ec_response_flash_info_1 { | |
1366 | /* Version 0 fields; see above for description */ | |
1367 | uint32_t flash_size; | |
1368 | uint32_t write_block_size; | |
1369 | uint32_t erase_block_size; | |
1370 | uint32_t protect_block_size; | |
1371 | ||
1372 | /* Version 1 adds these fields: */ | |
5271db29 | 1373 | uint32_t write_ideal_size; |
5271db29 | 1374 | uint32_t flags; |
6f72c3f9 | 1375 | } __ec_align4; |
5271db29 | 1376 | |
3c46ae61 GG |
1377 | struct ec_params_flash_info_2 { |
1378 | /* Number of banks to describe */ | |
1379 | uint16_t num_banks_desc; | |
1380 | /* Reserved; set 0; ignore on read */ | |
1381 | uint8_t reserved[2]; | |
1382 | } __ec_align4; | |
1383 | ||
1384 | struct ec_flash_bank { | |
1385 | /* Number of sector is in this bank. */ | |
1386 | uint16_t count; | |
1387 | /* Size in power of 2 of each sector (8 --> 256 bytes) */ | |
1388 | uint8_t size_exp; | |
1389 | /* Minimal write size for the sectors in this bank */ | |
1390 | uint8_t write_size_exp; | |
1391 | /* Erase size for the sectors in this bank */ | |
1392 | uint8_t erase_size_exp; | |
1393 | /* Size for write protection, usually identical to erase size. */ | |
1394 | uint8_t protect_size_exp; | |
1395 | /* Reserved; set 0; ignore on read */ | |
1396 | uint8_t reserved[2]; | |
1397 | }; | |
1398 | ||
1399 | struct ec_response_flash_info_2 { | |
1400 | /* Total flash in the EC. */ | |
1401 | uint32_t flash_size; | |
1402 | /* Flags; see EC_FLASH_INFO_* */ | |
1403 | uint32_t flags; | |
1404 | /* Maximum size to use to send data to write to the EC. */ | |
1405 | uint32_t write_ideal_size; | |
1406 | /* Number of banks present in the EC. */ | |
1407 | uint16_t num_banks_total; | |
1408 | /* Number of banks described in banks array. */ | |
1409 | uint16_t num_banks_desc; | |
1410 | struct ec_flash_bank banks[0]; | |
1411 | } __ec_align4; | |
1412 | ||
deaf39ef SG |
1413 | /* |
1414 | * Read flash | |
1415 | * | |
1416 | * Response is params.size bytes of data. | |
1417 | */ | |
ff834332 | 1418 | #define EC_CMD_FLASH_READ 0x0011 |
deaf39ef | 1419 | |
e2bbf91c EBS |
1420 | /** |
1421 | * struct ec_params_flash_read - Parameters for the flash read command. | |
1422 | * @offset: Byte offset to read. | |
1423 | * @size: Size to read in bytes. | |
1424 | */ | |
deaf39ef | 1425 | struct ec_params_flash_read { |
e2bbf91c EBS |
1426 | uint32_t offset; |
1427 | uint32_t size; | |
6f72c3f9 | 1428 | } __ec_align4; |
deaf39ef SG |
1429 | |
1430 | /* Write flash */ | |
ff834332 | 1431 | #define EC_CMD_FLASH_WRITE 0x0012 |
5271db29 BR |
1432 | #define EC_VER_FLASH_WRITE 1 |
1433 | ||
1434 | /* Version 0 of the flash command supported only 64 bytes of data */ | |
1435 | #define EC_FLASH_WRITE_VER0_SIZE 64 | |
deaf39ef | 1436 | |
e2bbf91c EBS |
1437 | /** |
1438 | * struct ec_params_flash_write - Parameters for the flash write command. | |
1439 | * @offset: Byte offset to write. | |
1440 | * @size: Size to write in bytes. | |
1441 | */ | |
deaf39ef | 1442 | struct ec_params_flash_write { |
e2bbf91c EBS |
1443 | uint32_t offset; |
1444 | uint32_t size; | |
5271db29 | 1445 | /* Followed by data to write */ |
6f72c3f9 | 1446 | } __ec_align4; |
deaf39ef SG |
1447 | |
1448 | /* Erase flash */ | |
ff834332 | 1449 | #define EC_CMD_FLASH_ERASE 0x0013 |
deaf39ef | 1450 | |
e2bbf91c | 1451 | /** |
3c46ae61 | 1452 | * struct ec_params_flash_erase - Parameters for the flash erase command, v0. |
e2bbf91c EBS |
1453 | * @offset: Byte offset to erase. |
1454 | * @size: Size to erase in bytes. | |
1455 | */ | |
deaf39ef | 1456 | struct ec_params_flash_erase { |
e2bbf91c EBS |
1457 | uint32_t offset; |
1458 | uint32_t size; | |
6f72c3f9 | 1459 | } __ec_align4; |
deaf39ef | 1460 | |
3c46ae61 GG |
1461 | /* |
1462 | * v1 add async erase: | |
1463 | * subcommands can returns: | |
1464 | * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below). | |
1465 | * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary. | |
1466 | * EC_RES_ERROR : other errors. | |
1467 | * EC_RES_BUSY : an existing erase operation is in progress. | |
1468 | * EC_RES_ACCESS_DENIED: Trying to erase running image. | |
1469 | * | |
1470 | * When ERASE_SECTOR_ASYNC returns EC_RES_SUCCESS, the operation is just | |
1471 | * properly queued. The user must call ERASE_GET_RESULT subcommand to get | |
1472 | * the proper result. | |
1473 | * When ERASE_GET_RESULT returns EC_RES_BUSY, the caller must wait and send | |
1474 | * ERASE_GET_RESULT again to get the result of ERASE_SECTOR_ASYNC. | |
1475 | * ERASE_GET_RESULT command may timeout on EC where flash access is not | |
1476 | * permitted while erasing. (For instance, STM32F4). | |
1477 | */ | |
1478 | enum ec_flash_erase_cmd { | |
1479 | FLASH_ERASE_SECTOR, /* Erase and wait for result */ | |
1480 | FLASH_ERASE_SECTOR_ASYNC, /* Erase and return immediately. */ | |
1481 | FLASH_ERASE_GET_RESULT, /* Ask for last erase result */ | |
1482 | }; | |
1483 | ||
1484 | /** | |
1485 | * struct ec_params_flash_erase_v1 - Parameters for the flash erase command, v1. | |
1486 | * @cmd: One of ec_flash_erase_cmd. | |
1487 | * @reserved: Pad byte; currently always contains 0. | |
1488 | * @flag: No flags defined yet; set to 0. | |
1489 | * @params: Same as v0 parameters. | |
1490 | */ | |
1491 | struct ec_params_flash_erase_v1 { | |
1492 | uint8_t cmd; | |
1493 | uint8_t reserved; | |
1494 | uint16_t flag; | |
1495 | struct ec_params_flash_erase params; | |
1496 | } __ec_align4; | |
1497 | ||
deaf39ef SG |
1498 | /* |
1499 | * Get/set flash protection. | |
1500 | * | |
1501 | * If mask!=0, sets/clear the requested bits of flags. Depending on the | |
1502 | * firmware write protect GPIO, not all flags will take effect immediately; | |
1503 | * some flags require a subsequent hard reset to take effect. Check the | |
1504 | * returned flags bits to see what actually happened. | |
1505 | * | |
1506 | * If mask=0, simply returns the current flags state. | |
1507 | */ | |
ff834332 | 1508 | #define EC_CMD_FLASH_PROTECT 0x0015 |
deaf39ef SG |
1509 | #define EC_VER_FLASH_PROTECT 1 /* Command version 1 */ |
1510 | ||
1511 | /* Flags for flash protection */ | |
1512 | /* RO flash code protected when the EC boots */ | |
9e816560 | 1513 | #define EC_FLASH_PROTECT_RO_AT_BOOT BIT(0) |
deaf39ef SG |
1514 | /* |
1515 | * RO flash code protected now. If this bit is set, at-boot status cannot | |
1516 | * be changed. | |
1517 | */ | |
9e816560 | 1518 | #define EC_FLASH_PROTECT_RO_NOW BIT(1) |
deaf39ef | 1519 | /* Entire flash code protected now, until reboot. */ |
9e816560 | 1520 | #define EC_FLASH_PROTECT_ALL_NOW BIT(2) |
deaf39ef | 1521 | /* Flash write protect GPIO is asserted now */ |
9e816560 | 1522 | #define EC_FLASH_PROTECT_GPIO_ASSERTED BIT(3) |
deaf39ef | 1523 | /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */ |
9e816560 | 1524 | #define EC_FLASH_PROTECT_ERROR_STUCK BIT(4) |
deaf39ef SG |
1525 | /* |
1526 | * Error - flash protection is in inconsistent state. At least one bank of | |
1527 | * flash which should be protected is not protected. Usually fixed by | |
1528 | * re-requesting the desired flags, or by a hard reset if that fails. | |
1529 | */ | |
9e816560 | 1530 | #define EC_FLASH_PROTECT_ERROR_INCONSISTENT BIT(5) |
df95a3bd | 1531 | /* Entire flash code protected when the EC boots */ |
9e816560 | 1532 | #define EC_FLASH_PROTECT_ALL_AT_BOOT BIT(6) |
3c46ae61 GG |
1533 | /* RW flash code protected when the EC boots */ |
1534 | #define EC_FLASH_PROTECT_RW_AT_BOOT BIT(7) | |
1535 | /* RW flash code protected now. */ | |
1536 | #define EC_FLASH_PROTECT_RW_NOW BIT(8) | |
1537 | /* Rollback information flash region protected when the EC boots */ | |
1538 | #define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT BIT(9) | |
1539 | /* Rollback information flash region protected now */ | |
1540 | #define EC_FLASH_PROTECT_ROLLBACK_NOW BIT(10) | |
1541 | ||
deaf39ef | 1542 | |
e2bbf91c EBS |
1543 | /** |
1544 | * struct ec_params_flash_protect - Parameters for the flash protect command. | |
1545 | * @mask: Bits in flags to apply. | |
1546 | * @flags: New flags to apply. | |
1547 | */ | |
deaf39ef | 1548 | struct ec_params_flash_protect { |
e2bbf91c EBS |
1549 | uint32_t mask; |
1550 | uint32_t flags; | |
6f72c3f9 | 1551 | } __ec_align4; |
deaf39ef | 1552 | |
e2bbf91c EBS |
1553 | /** |
1554 | * struct ec_response_flash_protect - Response to the flash protect command. | |
1555 | * @flags: Current value of flash protect flags. | |
1556 | * @valid_flags: Flags which are valid on this platform. This allows the | |
1557 | * caller to distinguish between flags which aren't set vs. flags | |
1558 | * which can't be set on this platform. | |
1559 | * @writable_flags: Flags which can be changed given the current protection | |
1560 | * state. | |
1561 | */ | |
deaf39ef | 1562 | struct ec_response_flash_protect { |
deaf39ef | 1563 | uint32_t flags; |
deaf39ef | 1564 | uint32_t valid_flags; |
deaf39ef | 1565 | uint32_t writable_flags; |
6f72c3f9 | 1566 | } __ec_align4; |
deaf39ef SG |
1567 | |
1568 | /* | |
1569 | * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash | |
1570 | * write protect. These commands may be reused with version > 0. | |
1571 | */ | |
1572 | ||
1573 | /* Get the region offset/size */ | |
ff834332 | 1574 | #define EC_CMD_FLASH_REGION_INFO 0x0016 |
deaf39ef SG |
1575 | #define EC_VER_FLASH_REGION_INFO 1 |
1576 | ||
1577 | enum ec_flash_region { | |
1578 | /* Region which holds read-only EC image */ | |
5271db29 | 1579 | EC_FLASH_REGION_RO = 0, |
3c46ae61 GG |
1580 | /* |
1581 | * Region which holds active RW image. 'Active' is different from | |
1582 | * 'running'. Active means 'scheduled-to-run'. Since RO image always | |
1583 | * scheduled to run, active/non-active applies only to RW images (for | |
1584 | * the same reason 'update' applies only to RW images. It's a state of | |
1585 | * an image on a flash. Running image can be RO, RW_A, RW_B but active | |
1586 | * image can only be RW_A or RW_B. In recovery mode, an active RW image | |
1587 | * doesn't enter 'running' state but it's still active on a flash. | |
1588 | */ | |
1589 | EC_FLASH_REGION_ACTIVE, | |
deaf39ef SG |
1590 | /* |
1591 | * Region which should be write-protected in the factory (a superset of | |
1592 | * EC_FLASH_REGION_RO) | |
1593 | */ | |
1594 | EC_FLASH_REGION_WP_RO, | |
3c46ae61 GG |
1595 | /* Region which holds updatable (non-active) RW image */ |
1596 | EC_FLASH_REGION_UPDATE, | |
5271db29 BR |
1597 | /* Number of regions */ |
1598 | EC_FLASH_REGION_COUNT, | |
deaf39ef | 1599 | }; |
3c46ae61 GG |
1600 | /* |
1601 | * 'RW' is vague if there are multiple RW images; we mean the active one, | |
1602 | * so the old constant is deprecated. | |
1603 | */ | |
1604 | #define EC_FLASH_REGION_RW EC_FLASH_REGION_ACTIVE | |
deaf39ef | 1605 | |
e2bbf91c EBS |
1606 | /** |
1607 | * struct ec_params_flash_region_info - Parameters for the flash region info | |
1608 | * command. | |
1609 | * @region: Flash region; see EC_FLASH_REGION_* | |
1610 | */ | |
deaf39ef | 1611 | struct ec_params_flash_region_info { |
e2bbf91c | 1612 | uint32_t region; |
6f72c3f9 | 1613 | } __ec_align4; |
deaf39ef SG |
1614 | |
1615 | struct ec_response_flash_region_info { | |
1616 | uint32_t offset; | |
1617 | uint32_t size; | |
6f72c3f9 | 1618 | } __ec_align4; |
deaf39ef SG |
1619 | |
1620 | /* Read/write VbNvContext */ | |
ff834332 | 1621 | #define EC_CMD_VBNV_CONTEXT 0x0017 |
deaf39ef SG |
1622 | #define EC_VER_VBNV_CONTEXT 1 |
1623 | #define EC_VBNV_BLOCK_SIZE 16 | |
1624 | ||
1625 | enum ec_vbnvcontext_op { | |
1626 | EC_VBNV_CONTEXT_OP_READ, | |
1627 | EC_VBNV_CONTEXT_OP_WRITE, | |
1628 | }; | |
1629 | ||
1630 | struct ec_params_vbnvcontext { | |
1631 | uint32_t op; | |
1632 | uint8_t block[EC_VBNV_BLOCK_SIZE]; | |
6f72c3f9 | 1633 | } __ec_align4; |
deaf39ef SG |
1634 | |
1635 | struct ec_response_vbnvcontext { | |
1636 | uint8_t block[EC_VBNV_BLOCK_SIZE]; | |
6f72c3f9 | 1637 | } __ec_align4; |
deaf39ef | 1638 | |
3c46ae61 GG |
1639 | |
1640 | /* Get SPI flash information */ | |
1641 | #define EC_CMD_FLASH_SPI_INFO 0x0018 | |
1642 | ||
1643 | struct ec_response_flash_spi_info { | |
1644 | /* JEDEC info from command 0x9F (manufacturer, memory type, size) */ | |
1645 | uint8_t jedec[3]; | |
1646 | ||
1647 | /* Pad byte; currently always contains 0 */ | |
1648 | uint8_t reserved0; | |
1649 | ||
1650 | /* Manufacturer / device ID from command 0x90 */ | |
1651 | uint8_t mfr_dev_id[2]; | |
1652 | ||
1653 | /* Status registers from command 0x05 and 0x35 */ | |
1654 | uint8_t sr1, sr2; | |
1655 | } __ec_align1; | |
1656 | ||
1657 | ||
1658 | /* Select flash during flash operations */ | |
1659 | #define EC_CMD_FLASH_SELECT 0x0019 | |
1660 | ||
1661 | /** | |
1662 | * struct ec_params_flash_select - Parameters for the flash select command. | |
1663 | * @select: 1 to select flash, 0 to deselect flash | |
1664 | */ | |
1665 | struct ec_params_flash_select { | |
1666 | uint8_t select; | |
1667 | } __ec_align4; | |
1668 | ||
1669 | ||
deaf39ef SG |
1670 | /*****************************************************************************/ |
1671 | /* PWM commands */ | |
1672 | ||
1673 | /* Get fan target RPM */ | |
ff834332 | 1674 | #define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020 |
deaf39ef SG |
1675 | |
1676 | struct ec_response_pwm_get_fan_rpm { | |
1677 | uint32_t rpm; | |
6f72c3f9 | 1678 | } __ec_align4; |
deaf39ef SG |
1679 | |
1680 | /* Set target fan RPM */ | |
6f72c3f9 | 1681 | #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021 |
deaf39ef | 1682 | |
89193a04 GG |
1683 | /* Version 0 of input params */ |
1684 | struct ec_params_pwm_set_fan_target_rpm_v0 { | |
deaf39ef | 1685 | uint32_t rpm; |
89193a04 GG |
1686 | } __ec_align4; |
1687 | ||
1688 | /* Version 1 of input params */ | |
1689 | struct ec_params_pwm_set_fan_target_rpm_v1 { | |
1690 | uint32_t rpm; | |
1691 | uint8_t fan_idx; | |
6f72c3f9 | 1692 | } __ec_align_size1; |
deaf39ef SG |
1693 | |
1694 | /* Get keyboard backlight */ | |
89193a04 | 1695 | /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ |
ff834332 | 1696 | #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022 |
deaf39ef SG |
1697 | |
1698 | struct ec_response_pwm_get_keyboard_backlight { | |
1699 | uint8_t percent; | |
1700 | uint8_t enabled; | |
6f72c3f9 | 1701 | } __ec_align1; |
deaf39ef SG |
1702 | |
1703 | /* Set keyboard backlight */ | |
89193a04 | 1704 | /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ |
ff834332 | 1705 | #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023 |
deaf39ef SG |
1706 | |
1707 | struct ec_params_pwm_set_keyboard_backlight { | |
1708 | uint8_t percent; | |
6f72c3f9 | 1709 | } __ec_align1; |
deaf39ef SG |
1710 | |
1711 | /* Set target fan PWM duty cycle */ | |
ff834332 | 1712 | #define EC_CMD_PWM_SET_FAN_DUTY 0x0024 |
deaf39ef | 1713 | |
89193a04 GG |
1714 | /* Version 0 of input params */ |
1715 | struct ec_params_pwm_set_fan_duty_v0 { | |
deaf39ef | 1716 | uint32_t percent; |
6f72c3f9 | 1717 | } __ec_align4; |
deaf39ef | 1718 | |
89193a04 GG |
1719 | /* Version 1 of input params */ |
1720 | struct ec_params_pwm_set_fan_duty_v1 { | |
1721 | uint32_t percent; | |
1722 | uint8_t fan_idx; | |
1723 | } __ec_align_size1; | |
1724 | ||
ff834332 | 1725 | #define EC_CMD_PWM_SET_DUTY 0x0025 |
2b66bd69 BN |
1726 | /* 16 bit duty cycle, 0xffff = 100% */ |
1727 | #define EC_PWM_MAX_DUTY 0xffff | |
1728 | ||
1729 | enum ec_pwm_type { | |
1730 | /* All types, indexed by board-specific enum pwm_channel */ | |
1731 | EC_PWM_TYPE_GENERIC = 0, | |
1732 | /* Keyboard backlight */ | |
1733 | EC_PWM_TYPE_KB_LIGHT, | |
1734 | /* Display backlight */ | |
1735 | EC_PWM_TYPE_DISPLAY_LIGHT, | |
1736 | EC_PWM_TYPE_COUNT, | |
1737 | }; | |
1738 | ||
1739 | struct ec_params_pwm_set_duty { | |
1740 | uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ | |
1741 | uint8_t pwm_type; /* ec_pwm_type */ | |
1742 | uint8_t index; /* Type-specific index, or 0 if unique */ | |
6f72c3f9 | 1743 | } __ec_align4; |
2b66bd69 | 1744 | |
ff834332 | 1745 | #define EC_CMD_PWM_GET_DUTY 0x0026 |
2b66bd69 BN |
1746 | |
1747 | struct ec_params_pwm_get_duty { | |
1748 | uint8_t pwm_type; /* ec_pwm_type */ | |
1749 | uint8_t index; /* Type-specific index, or 0 if unique */ | |
6f72c3f9 | 1750 | } __ec_align1; |
2b66bd69 BN |
1751 | |
1752 | struct ec_response_pwm_get_duty { | |
1753 | uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ | |
6f72c3f9 | 1754 | } __ec_align2; |
2b66bd69 | 1755 | |
deaf39ef SG |
1756 | /*****************************************************************************/ |
1757 | /* | |
1758 | * Lightbar commands. This looks worse than it is. Since we only use one HOST | |
1759 | * command to say "talk to the lightbar", we put the "and tell it to do X" part | |
1760 | * into a subcommand. We'll make separate structs for subcommands with | |
1761 | * different input args, so that we know how much to expect. | |
1762 | */ | |
ff834332 | 1763 | #define EC_CMD_LIGHTBAR_CMD 0x0028 |
deaf39ef SG |
1764 | |
1765 | struct rgb_s { | |
1766 | uint8_t r, g, b; | |
6f72c3f9 | 1767 | } __ec_todo_unpacked; |
deaf39ef SG |
1768 | |
1769 | #define LB_BATTERY_LEVELS 4 | |
e2bbf91c EBS |
1770 | |
1771 | /* | |
1772 | * List of tweakable parameters. NOTE: It's __packed so it can be sent in a | |
deaf39ef SG |
1773 | * host command, but the alignment is the same regardless. Keep it that way. |
1774 | */ | |
256ab950 | 1775 | struct lightbar_params_v0 { |
deaf39ef | 1776 | /* Timing */ |
5271db29 BR |
1777 | int32_t google_ramp_up; |
1778 | int32_t google_ramp_down; | |
1779 | int32_t s3s0_ramp_up; | |
1780 | int32_t s0_tick_delay[2]; /* AC=0/1 */ | |
1781 | int32_t s0a_tick_delay[2]; /* AC=0/1 */ | |
1782 | int32_t s0s3_ramp_down; | |
1783 | int32_t s3_sleep_for; | |
1784 | int32_t s3_ramp_up; | |
1785 | int32_t s3_ramp_down; | |
deaf39ef SG |
1786 | |
1787 | /* Oscillation */ | |
1788 | uint8_t new_s0; | |
1789 | uint8_t osc_min[2]; /* AC=0/1 */ | |
1790 | uint8_t osc_max[2]; /* AC=0/1 */ | |
1791 | uint8_t w_ofs[2]; /* AC=0/1 */ | |
1792 | ||
1793 | /* Brightness limits based on the backlight and AC. */ | |
1794 | uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ | |
1795 | uint8_t bright_bl_on_min[2]; /* AC=0/1 */ | |
1796 | uint8_t bright_bl_on_max[2]; /* AC=0/1 */ | |
1797 | ||
1798 | /* Battery level thresholds */ | |
1799 | uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; | |
1800 | ||
1801 | /* Map [AC][battery_level] to color index */ | |
1802 | uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ | |
1803 | uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ | |
1804 | ||
1805 | /* Color palette */ | |
1806 | struct rgb_s color[8]; /* 0-3 are Google colors */ | |
6f72c3f9 | 1807 | } __ec_todo_packed; |
deaf39ef | 1808 | |
256ab950 SB |
1809 | struct lightbar_params_v1 { |
1810 | /* Timing */ | |
1811 | int32_t google_ramp_up; | |
1812 | int32_t google_ramp_down; | |
1813 | int32_t s3s0_ramp_up; | |
1814 | int32_t s0_tick_delay[2]; /* AC=0/1 */ | |
1815 | int32_t s0a_tick_delay[2]; /* AC=0/1 */ | |
1816 | int32_t s0s3_ramp_down; | |
1817 | int32_t s3_sleep_for; | |
1818 | int32_t s3_ramp_up; | |
1819 | int32_t s3_ramp_down; | |
de83db57 GG |
1820 | int32_t s5_ramp_up; |
1821 | int32_t s5_ramp_down; | |
256ab950 | 1822 | int32_t tap_tick_delay; |
de83db57 | 1823 | int32_t tap_gate_delay; |
256ab950 SB |
1824 | int32_t tap_display_time; |
1825 | ||
1826 | /* Tap-for-battery params */ | |
1827 | uint8_t tap_pct_red; | |
1828 | uint8_t tap_pct_green; | |
1829 | uint8_t tap_seg_min_on; | |
1830 | uint8_t tap_seg_max_on; | |
1831 | uint8_t tap_seg_osc; | |
1832 | uint8_t tap_idx[3]; | |
1833 | ||
1834 | /* Oscillation */ | |
1835 | uint8_t osc_min[2]; /* AC=0/1 */ | |
1836 | uint8_t osc_max[2]; /* AC=0/1 */ | |
1837 | uint8_t w_ofs[2]; /* AC=0/1 */ | |
1838 | ||
1839 | /* Brightness limits based on the backlight and AC. */ | |
1840 | uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ | |
1841 | uint8_t bright_bl_on_min[2]; /* AC=0/1 */ | |
1842 | uint8_t bright_bl_on_max[2]; /* AC=0/1 */ | |
1843 | ||
1844 | /* Battery level thresholds */ | |
1845 | uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; | |
1846 | ||
1847 | /* Map [AC][battery_level] to color index */ | |
1848 | uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ | |
1849 | uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ | |
1850 | ||
de83db57 GG |
1851 | /* s5: single color pulse on inhibited power-up */ |
1852 | uint8_t s5_idx; | |
1853 | ||
256ab950 SB |
1854 | /* Color palette */ |
1855 | struct rgb_s color[8]; /* 0-3 are Google colors */ | |
6f72c3f9 | 1856 | } __ec_todo_packed; |
256ab950 | 1857 | |
de83db57 GG |
1858 | /* Lightbar command params v2 |
1859 | * crbug.com/467716 | |
1860 | * | |
1861 | * lightbar_parms_v1 was too big for i2c, therefore in v2, we split them up by | |
1862 | * logical groups to make it more manageable ( < 120 bytes). | |
1863 | * | |
1864 | * NOTE: Each of these groups must be less than 120 bytes. | |
1865 | */ | |
1866 | ||
1867 | struct lightbar_params_v2_timing { | |
1868 | /* Timing */ | |
1869 | int32_t google_ramp_up; | |
1870 | int32_t google_ramp_down; | |
1871 | int32_t s3s0_ramp_up; | |
1872 | int32_t s0_tick_delay[2]; /* AC=0/1 */ | |
1873 | int32_t s0a_tick_delay[2]; /* AC=0/1 */ | |
1874 | int32_t s0s3_ramp_down; | |
1875 | int32_t s3_sleep_for; | |
1876 | int32_t s3_ramp_up; | |
1877 | int32_t s3_ramp_down; | |
1878 | int32_t s5_ramp_up; | |
1879 | int32_t s5_ramp_down; | |
1880 | int32_t tap_tick_delay; | |
1881 | int32_t tap_gate_delay; | |
1882 | int32_t tap_display_time; | |
1883 | } __ec_todo_packed; | |
1884 | ||
1885 | struct lightbar_params_v2_tap { | |
1886 | /* Tap-for-battery params */ | |
1887 | uint8_t tap_pct_red; | |
1888 | uint8_t tap_pct_green; | |
1889 | uint8_t tap_seg_min_on; | |
1890 | uint8_t tap_seg_max_on; | |
1891 | uint8_t tap_seg_osc; | |
1892 | uint8_t tap_idx[3]; | |
1893 | } __ec_todo_packed; | |
1894 | ||
1895 | struct lightbar_params_v2_oscillation { | |
1896 | /* Oscillation */ | |
1897 | uint8_t osc_min[2]; /* AC=0/1 */ | |
1898 | uint8_t osc_max[2]; /* AC=0/1 */ | |
1899 | uint8_t w_ofs[2]; /* AC=0/1 */ | |
1900 | } __ec_todo_packed; | |
1901 | ||
1902 | struct lightbar_params_v2_brightness { | |
1903 | /* Brightness limits based on the backlight and AC. */ | |
1904 | uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ | |
1905 | uint8_t bright_bl_on_min[2]; /* AC=0/1 */ | |
1906 | uint8_t bright_bl_on_max[2]; /* AC=0/1 */ | |
1907 | } __ec_todo_packed; | |
1908 | ||
1909 | struct lightbar_params_v2_thresholds { | |
1910 | /* Battery level thresholds */ | |
1911 | uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; | |
1912 | } __ec_todo_packed; | |
1913 | ||
1914 | struct lightbar_params_v2_colors { | |
1915 | /* Map [AC][battery_level] to color index */ | |
1916 | uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ | |
1917 | uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ | |
1918 | ||
1919 | /* s5: single color pulse on inhibited power-up */ | |
1920 | uint8_t s5_idx; | |
1921 | ||
1922 | /* Color palette */ | |
1923 | struct rgb_s color[8]; /* 0-3 are Google colors */ | |
1924 | } __ec_todo_packed; | |
1925 | ||
1926 | /* Lightbar program. */ | |
be3ebebf EC |
1927 | #define EC_LB_PROG_LEN 192 |
1928 | struct lightbar_program { | |
1929 | uint8_t size; | |
1930 | uint8_t data[EC_LB_PROG_LEN]; | |
6f72c3f9 | 1931 | } __ec_todo_unpacked; |
be3ebebf | 1932 | |
deaf39ef SG |
1933 | struct ec_params_lightbar { |
1934 | uint8_t cmd; /* Command (see enum lightbar_command) */ | |
1935 | union { | |
fd3bbf4a GG |
1936 | /* |
1937 | * The following commands have no args: | |
1938 | * | |
1939 | * dump, off, on, init, get_seq, get_params_v0, get_params_v1, | |
de83db57 GG |
1940 | * version, get_brightness, get_demo, suspend, resume, |
1941 | * get_params_v2_timing, get_params_v2_tap, get_params_v2_osc, | |
1942 | * get_params_v2_bright, get_params_v2_thlds, | |
1943 | * get_params_v2_colors | |
fd3bbf4a GG |
1944 | * |
1945 | * Don't use an empty struct, because C++ hates that. | |
1946 | */ | |
deaf39ef | 1947 | |
6f72c3f9 | 1948 | struct __ec_todo_unpacked { |
deaf39ef | 1949 | uint8_t num; |
256ab950 | 1950 | } set_brightness, seq, demo; |
deaf39ef | 1951 | |
6f72c3f9 | 1952 | struct __ec_todo_unpacked { |
deaf39ef SG |
1953 | uint8_t ctrl, reg, value; |
1954 | } reg; | |
1955 | ||
6f72c3f9 | 1956 | struct __ec_todo_unpacked { |
deaf39ef | 1957 | uint8_t led, red, green, blue; |
256ab950 SB |
1958 | } set_rgb; |
1959 | ||
6f72c3f9 | 1960 | struct __ec_todo_unpacked { |
256ab950 SB |
1961 | uint8_t led; |
1962 | } get_rgb; | |
deaf39ef | 1963 | |
6f72c3f9 | 1964 | struct __ec_todo_unpacked { |
405c8430 EC |
1965 | uint8_t enable; |
1966 | } manual_suspend_ctrl; | |
1967 | ||
256ab950 SB |
1968 | struct lightbar_params_v0 set_params_v0; |
1969 | struct lightbar_params_v1 set_params_v1; | |
de83db57 GG |
1970 | |
1971 | struct lightbar_params_v2_timing set_v2par_timing; | |
1972 | struct lightbar_params_v2_tap set_v2par_tap; | |
1973 | struct lightbar_params_v2_oscillation set_v2par_osc; | |
1974 | struct lightbar_params_v2_brightness set_v2par_bright; | |
1975 | struct lightbar_params_v2_thresholds set_v2par_thlds; | |
1976 | struct lightbar_params_v2_colors set_v2par_colors; | |
1977 | ||
be3ebebf | 1978 | struct lightbar_program set_program; |
deaf39ef | 1979 | }; |
6f72c3f9 | 1980 | } __ec_todo_packed; |
deaf39ef SG |
1981 | |
1982 | struct ec_response_lightbar { | |
1983 | union { | |
6f72c3f9 GG |
1984 | struct __ec_todo_unpacked { |
1985 | struct __ec_todo_unpacked { | |
deaf39ef SG |
1986 | uint8_t reg; |
1987 | uint8_t ic0; | |
1988 | uint8_t ic1; | |
1989 | } vals[23]; | |
1990 | } dump; | |
1991 | ||
6f72c3f9 | 1992 | struct __ec_todo_unpacked { |
deaf39ef | 1993 | uint8_t num; |
256ab950 | 1994 | } get_seq, get_brightness, get_demo; |
deaf39ef | 1995 | |
256ab950 SB |
1996 | struct lightbar_params_v0 get_params_v0; |
1997 | struct lightbar_params_v1 get_params_v1; | |
deaf39ef | 1998 | |
de83db57 GG |
1999 | |
2000 | struct lightbar_params_v2_timing get_params_v2_timing; | |
2001 | struct lightbar_params_v2_tap get_params_v2_tap; | |
2002 | struct lightbar_params_v2_oscillation get_params_v2_osc; | |
2003 | struct lightbar_params_v2_brightness get_params_v2_bright; | |
2004 | struct lightbar_params_v2_thresholds get_params_v2_thlds; | |
2005 | struct lightbar_params_v2_colors get_params_v2_colors; | |
2006 | ||
6f72c3f9 | 2007 | struct __ec_todo_unpacked { |
5271db29 BR |
2008 | uint32_t num; |
2009 | uint32_t flags; | |
2010 | } version; | |
2011 | ||
6f72c3f9 | 2012 | struct __ec_todo_unpacked { |
256ab950 SB |
2013 | uint8_t red, green, blue; |
2014 | } get_rgb; | |
2015 | ||
fd3bbf4a GG |
2016 | /* |
2017 | * The following commands have no response: | |
2018 | * | |
de83db57 | 2019 | * off, on, init, set_brightness, seq, reg, set_rgb, demo, |
fd3bbf4a | 2020 | * set_params_v0, set_params_v1, set_program, |
de83db57 GG |
2021 | * manual_suspend_ctrl, suspend, resume, set_v2par_timing, |
2022 | * set_v2par_tap, set_v2par_osc, set_v2par_bright, | |
2023 | * set_v2par_thlds, set_v2par_colors | |
fd3bbf4a | 2024 | */ |
deaf39ef | 2025 | }; |
6f72c3f9 | 2026 | } __ec_todo_packed; |
deaf39ef SG |
2027 | |
2028 | /* Lightbar commands */ | |
2029 | enum lightbar_command { | |
2030 | LIGHTBAR_CMD_DUMP = 0, | |
2031 | LIGHTBAR_CMD_OFF = 1, | |
2032 | LIGHTBAR_CMD_ON = 2, | |
2033 | LIGHTBAR_CMD_INIT = 3, | |
256ab950 | 2034 | LIGHTBAR_CMD_SET_BRIGHTNESS = 4, |
deaf39ef SG |
2035 | LIGHTBAR_CMD_SEQ = 5, |
2036 | LIGHTBAR_CMD_REG = 6, | |
256ab950 | 2037 | LIGHTBAR_CMD_SET_RGB = 7, |
deaf39ef SG |
2038 | LIGHTBAR_CMD_GET_SEQ = 8, |
2039 | LIGHTBAR_CMD_DEMO = 9, | |
256ab950 SB |
2040 | LIGHTBAR_CMD_GET_PARAMS_V0 = 10, |
2041 | LIGHTBAR_CMD_SET_PARAMS_V0 = 11, | |
5271db29 | 2042 | LIGHTBAR_CMD_VERSION = 12, |
256ab950 SB |
2043 | LIGHTBAR_CMD_GET_BRIGHTNESS = 13, |
2044 | LIGHTBAR_CMD_GET_RGB = 14, | |
2045 | LIGHTBAR_CMD_GET_DEMO = 15, | |
2046 | LIGHTBAR_CMD_GET_PARAMS_V1 = 16, | |
2047 | LIGHTBAR_CMD_SET_PARAMS_V1 = 17, | |
be3ebebf | 2048 | LIGHTBAR_CMD_SET_PROGRAM = 18, |
405c8430 EC |
2049 | LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19, |
2050 | LIGHTBAR_CMD_SUSPEND = 20, | |
2051 | LIGHTBAR_CMD_RESUME = 21, | |
de83db57 GG |
2052 | LIGHTBAR_CMD_GET_PARAMS_V2_TIMING = 22, |
2053 | LIGHTBAR_CMD_SET_PARAMS_V2_TIMING = 23, | |
2054 | LIGHTBAR_CMD_GET_PARAMS_V2_TAP = 24, | |
2055 | LIGHTBAR_CMD_SET_PARAMS_V2_TAP = 25, | |
2056 | LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION = 26, | |
2057 | LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION = 27, | |
2058 | LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS = 28, | |
2059 | LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS = 29, | |
2060 | LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS = 30, | |
2061 | LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31, | |
2062 | LIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32, | |
2063 | LIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33, | |
deaf39ef SG |
2064 | LIGHTBAR_NUM_CMDS |
2065 | }; | |
2066 | ||
5271db29 BR |
2067 | /*****************************************************************************/ |
2068 | /* LED control commands */ | |
2069 | ||
ff834332 | 2070 | #define EC_CMD_LED_CONTROL 0x0029 |
5271db29 BR |
2071 | |
2072 | enum ec_led_id { | |
2073 | /* LED to indicate battery state of charge */ | |
2074 | EC_LED_ID_BATTERY_LED = 0, | |
2075 | /* | |
2076 | * LED to indicate system power state (on or in suspend). | |
2077 | * May be on power button or on C-panel. | |
2078 | */ | |
2079 | EC_LED_ID_POWER_LED, | |
2080 | /* LED on power adapter or its plug */ | |
2081 | EC_LED_ID_ADAPTER_LED, | |
de83db57 GG |
2082 | /* LED to indicate left side */ |
2083 | EC_LED_ID_LEFT_LED, | |
2084 | /* LED to indicate right side */ | |
2085 | EC_LED_ID_RIGHT_LED, | |
2086 | /* LED to indicate recovery mode with HW_REINIT */ | |
2087 | EC_LED_ID_RECOVERY_HW_REINIT_LED, | |
2088 | /* LED to indicate sysrq debug mode. */ | |
2089 | EC_LED_ID_SYSRQ_DEBUG_LED, | |
5271db29 BR |
2090 | |
2091 | EC_LED_ID_COUNT | |
2092 | }; | |
2093 | ||
2094 | /* LED control flags */ | |
9e816560 GG |
2095 | #define EC_LED_FLAGS_QUERY BIT(0) /* Query LED capability only */ |
2096 | #define EC_LED_FLAGS_AUTO BIT(1) /* Switch LED back to automatic control */ | |
5271db29 BR |
2097 | |
2098 | enum ec_led_colors { | |
2099 | EC_LED_COLOR_RED = 0, | |
2100 | EC_LED_COLOR_GREEN, | |
2101 | EC_LED_COLOR_BLUE, | |
2102 | EC_LED_COLOR_YELLOW, | |
2103 | EC_LED_COLOR_WHITE, | |
de83db57 | 2104 | EC_LED_COLOR_AMBER, |
5271db29 BR |
2105 | |
2106 | EC_LED_COLOR_COUNT | |
2107 | }; | |
2108 | ||
2109 | struct ec_params_led_control { | |
2110 | uint8_t led_id; /* Which LED to control */ | |
2111 | uint8_t flags; /* Control flags */ | |
2112 | ||
2113 | uint8_t brightness[EC_LED_COLOR_COUNT]; | |
6f72c3f9 | 2114 | } __ec_align1; |
5271db29 BR |
2115 | |
2116 | struct ec_response_led_control { | |
2117 | /* | |
2118 | * Available brightness value range. | |
2119 | * | |
2120 | * Range 0 means color channel not present. | |
2121 | * Range 1 means on/off control. | |
2122 | * Other values means the LED is control by PWM. | |
2123 | */ | |
2124 | uint8_t brightness_range[EC_LED_COLOR_COUNT]; | |
6f72c3f9 | 2125 | } __ec_align1; |
5271db29 | 2126 | |
deaf39ef SG |
2127 | /*****************************************************************************/ |
2128 | /* Verified boot commands */ | |
2129 | ||
2130 | /* | |
2131 | * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be | |
2132 | * reused for other purposes with version > 0. | |
2133 | */ | |
2134 | ||
2135 | /* Verified boot hash command */ | |
ff834332 | 2136 | #define EC_CMD_VBOOT_HASH 0x002A |
deaf39ef SG |
2137 | |
2138 | struct ec_params_vboot_hash { | |
2139 | uint8_t cmd; /* enum ec_vboot_hash_cmd */ | |
2140 | uint8_t hash_type; /* enum ec_vboot_hash_type */ | |
2141 | uint8_t nonce_size; /* Nonce size; may be 0 */ | |
2142 | uint8_t reserved0; /* Reserved; set 0 */ | |
2143 | uint32_t offset; /* Offset in flash to hash */ | |
2144 | uint32_t size; /* Number of bytes to hash */ | |
2145 | uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */ | |
6f72c3f9 | 2146 | } __ec_align4; |
deaf39ef SG |
2147 | |
2148 | struct ec_response_vboot_hash { | |
2149 | uint8_t status; /* enum ec_vboot_hash_status */ | |
2150 | uint8_t hash_type; /* enum ec_vboot_hash_type */ | |
2151 | uint8_t digest_size; /* Size of hash digest in bytes */ | |
2152 | uint8_t reserved0; /* Ignore; will be 0 */ | |
2153 | uint32_t offset; /* Offset in flash which was hashed */ | |
2154 | uint32_t size; /* Number of bytes hashed */ | |
2155 | uint8_t hash_digest[64]; /* Hash digest data */ | |
6f72c3f9 | 2156 | } __ec_align4; |
deaf39ef SG |
2157 | |
2158 | enum ec_vboot_hash_cmd { | |
2159 | EC_VBOOT_HASH_GET = 0, /* Get current hash status */ | |
2160 | EC_VBOOT_HASH_ABORT = 1, /* Abort calculating current hash */ | |
2161 | EC_VBOOT_HASH_START = 2, /* Start computing a new hash */ | |
2162 | EC_VBOOT_HASH_RECALC = 3, /* Synchronously compute a new hash */ | |
2163 | }; | |
2164 | ||
2165 | enum ec_vboot_hash_type { | |
2166 | EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */ | |
2167 | }; | |
2168 | ||
2169 | enum ec_vboot_hash_status { | |
2170 | EC_VBOOT_HASH_STATUS_NONE = 0, /* No hash (not started, or aborted) */ | |
2171 | EC_VBOOT_HASH_STATUS_DONE = 1, /* Finished computing a hash */ | |
2172 | EC_VBOOT_HASH_STATUS_BUSY = 2, /* Busy computing a hash */ | |
2173 | }; | |
2174 | ||
2175 | /* | |
2176 | * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC. | |
2177 | * If one of these is specified, the EC will automatically update offset and | |
2178 | * size to the correct values for the specified image (RO or RW). | |
2179 | */ | |
03f6896a GG |
2180 | #define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe |
2181 | #define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd | |
2182 | #define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc | |
2183 | ||
2184 | /* | |
2185 | * 'RW' is vague if there are multiple RW images; we mean the active one, | |
2186 | * so the old constant is deprecated. | |
2187 | */ | |
2188 | #define EC_VBOOT_HASH_OFFSET_RW EC_VBOOT_HASH_OFFSET_ACTIVE | |
deaf39ef | 2189 | |
5271db29 BR |
2190 | /*****************************************************************************/ |
2191 | /* | |
2192 | * Motion sense commands. We'll make separate structs for sub-commands with | |
2193 | * different input args, so that we know how much to expect. | |
2194 | */ | |
ff834332 | 2195 | #define EC_CMD_MOTION_SENSE_CMD 0x002B |
5271db29 BR |
2196 | |
2197 | /* Motion sense commands */ | |
2198 | enum motionsense_command { | |
2199 | /* | |
2200 | * Dump command returns all motion sensor data including motion sense | |
2201 | * module flags and individual sensor flags. | |
2202 | */ | |
2203 | MOTIONSENSE_CMD_DUMP = 0, | |
2204 | ||
2205 | /* | |
2206 | * Info command returns data describing the details of a given sensor, | |
2207 | * including enum motionsensor_type, enum motionsensor_location, and | |
2208 | * enum motionsensor_chip. | |
2209 | */ | |
2210 | MOTIONSENSE_CMD_INFO = 1, | |
2211 | ||
2212 | /* | |
2213 | * EC Rate command is a setter/getter command for the EC sampling rate | |
a517bb4b GG |
2214 | * in milliseconds. |
2215 | * It is per sensor, the EC run sample task at the minimum of all | |
2216 | * sensors EC_RATE. | |
2217 | * For sensors without hardware FIFO, EC_RATE should be equals to 1/ODR | |
2218 | * to collect all the sensor samples. | |
2219 | * For sensor with hardware FIFO, EC_RATE is used as the maximal delay | |
2220 | * to process of all motion sensors in milliseconds. | |
5271db29 BR |
2221 | */ |
2222 | MOTIONSENSE_CMD_EC_RATE = 2, | |
2223 | ||
2224 | /* | |
2225 | * Sensor ODR command is a setter/getter command for the output data | |
2226 | * rate of a specific motion sensor in millihertz. | |
2227 | */ | |
2228 | MOTIONSENSE_CMD_SENSOR_ODR = 3, | |
2229 | ||
2230 | /* | |
2231 | * Sensor range command is a setter/getter command for the range of | |
2232 | * a specified motion sensor in +/-G's or +/- deg/s. | |
2233 | */ | |
2234 | MOTIONSENSE_CMD_SENSOR_RANGE = 4, | |
2235 | ||
2236 | /* | |
2237 | * Setter/getter command for the keyboard wake angle. When the lid | |
2238 | * angle is greater than this value, keyboard wake is disabled in S3, | |
2239 | * and when the lid angle goes less than this value, keyboard wake is | |
2240 | * enabled. Note, the lid angle measurement is an approximate, | |
2241 | * un-calibrated value, hence the wake angle isn't exact. | |
2242 | */ | |
2243 | MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5, | |
2244 | ||
974e6f02 EBS |
2245 | /* |
2246 | * Returns a single sensor data. | |
2247 | */ | |
2248 | MOTIONSENSE_CMD_DATA = 6, | |
2249 | ||
2250 | /* | |
a517bb4b GG |
2251 | * Return sensor fifo info. |
2252 | */ | |
2253 | MOTIONSENSE_CMD_FIFO_INFO = 7, | |
2254 | ||
2255 | /* | |
2256 | * Insert a flush element in the fifo and return sensor fifo info. | |
2257 | * The host can use that element to synchronize its operation. | |
2258 | */ | |
2259 | MOTIONSENSE_CMD_FIFO_FLUSH = 8, | |
2260 | ||
2261 | /* | |
2262 | * Return a portion of the fifo. | |
2263 | */ | |
2264 | MOTIONSENSE_CMD_FIFO_READ = 9, | |
2265 | ||
2266 | /* | |
2267 | * Perform low level calibration. | |
2268 | * On sensors that support it, ask to do offset calibration. | |
974e6f02 EBS |
2269 | */ |
2270 | MOTIONSENSE_CMD_PERFORM_CALIB = 10, | |
2271 | ||
2272 | /* | |
a517bb4b GG |
2273 | * Sensor Offset command is a setter/getter command for the offset |
2274 | * used for calibration. | |
2275 | * The offsets can be calculated by the host, or via | |
974e6f02 EBS |
2276 | * PERFORM_CALIB command. |
2277 | */ | |
2278 | MOTIONSENSE_CMD_SENSOR_OFFSET = 11, | |
2279 | ||
a517bb4b GG |
2280 | /* |
2281 | * List available activities for a MOTION sensor. | |
2282 | * Indicates if they are enabled or disabled. | |
2283 | */ | |
2284 | MOTIONSENSE_CMD_LIST_ACTIVITIES = 12, | |
2285 | ||
2286 | /* | |
2287 | * Activity management | |
2288 | * Enable/Disable activity recognition. | |
2289 | */ | |
2290 | MOTIONSENSE_CMD_SET_ACTIVITY = 13, | |
2291 | ||
2292 | /* | |
2293 | * Lid Angle | |
2294 | */ | |
2295 | MOTIONSENSE_CMD_LID_ANGLE = 14, | |
2296 | ||
2297 | /* | |
2298 | * Allow the FIFO to trigger interrupt via MKBP events. | |
2299 | * By default the FIFO does not send interrupt to process the FIFO | |
2300 | * until the AP is ready or it is coming from a wakeup sensor. | |
2301 | */ | |
2302 | MOTIONSENSE_CMD_FIFO_INT_ENABLE = 15, | |
2303 | ||
2304 | /* | |
2305 | * Spoof the readings of the sensors. The spoofed readings can be set | |
2306 | * to arbitrary values, or will lock to the last read actual values. | |
2307 | */ | |
2308 | MOTIONSENSE_CMD_SPOOF = 16, | |
5271db29 | 2309 | |
a517bb4b GG |
2310 | /* Set lid angle for tablet mode detection. */ |
2311 | MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE = 17, | |
5271db29 BR |
2312 | |
2313 | /* | |
a517bb4b GG |
2314 | * Sensor Scale command is a setter/getter command for the calibration |
2315 | * scale. | |
5271db29 | 2316 | */ |
a517bb4b GG |
2317 | MOTIONSENSE_CMD_SENSOR_SCALE = 18, |
2318 | ||
2319 | /* Number of motionsense sub-commands. */ | |
2320 | MOTIONSENSE_NUM_CMDS | |
5271db29 BR |
2321 | }; |
2322 | ||
2323 | /* List of motion sensor types. */ | |
2324 | enum motionsensor_type { | |
2325 | MOTIONSENSE_TYPE_ACCEL = 0, | |
2326 | MOTIONSENSE_TYPE_GYRO = 1, | |
974e6f02 EBS |
2327 | MOTIONSENSE_TYPE_MAG = 2, |
2328 | MOTIONSENSE_TYPE_PROX = 3, | |
2329 | MOTIONSENSE_TYPE_LIGHT = 4, | |
2330 | MOTIONSENSE_TYPE_ACTIVITY = 5, | |
d732248f | 2331 | MOTIONSENSE_TYPE_BARO = 6, |
a517bb4b | 2332 | MOTIONSENSE_TYPE_SYNC = 7, |
d732248f | 2333 | MOTIONSENSE_TYPE_MAX, |
5271db29 BR |
2334 | }; |
2335 | ||
2336 | /* List of motion sensor locations. */ | |
2337 | enum motionsensor_location { | |
2338 | MOTIONSENSE_LOC_BASE = 0, | |
2339 | MOTIONSENSE_LOC_LID = 1, | |
a517bb4b | 2340 | MOTIONSENSE_LOC_CAMERA = 2, |
974e6f02 | 2341 | MOTIONSENSE_LOC_MAX, |
5271db29 BR |
2342 | }; |
2343 | ||
2344 | /* List of motion sensor chips. */ | |
2345 | enum motionsensor_chip { | |
2346 | MOTIONSENSE_CHIP_KXCJ9 = 0, | |
a517bb4b GG |
2347 | MOTIONSENSE_CHIP_LSM6DS0 = 1, |
2348 | MOTIONSENSE_CHIP_BMI160 = 2, | |
2349 | MOTIONSENSE_CHIP_SI1141 = 3, | |
2350 | MOTIONSENSE_CHIP_SI1142 = 4, | |
2351 | MOTIONSENSE_CHIP_SI1143 = 5, | |
2352 | MOTIONSENSE_CHIP_KX022 = 6, | |
2353 | MOTIONSENSE_CHIP_L3GD20H = 7, | |
2354 | MOTIONSENSE_CHIP_BMA255 = 8, | |
2355 | MOTIONSENSE_CHIP_BMP280 = 9, | |
2356 | MOTIONSENSE_CHIP_OPT3001 = 10, | |
2357 | MOTIONSENSE_CHIP_BH1730 = 11, | |
2358 | MOTIONSENSE_CHIP_GPIO = 12, | |
2359 | MOTIONSENSE_CHIP_LIS2DH = 13, | |
2360 | MOTIONSENSE_CHIP_LSM6DSM = 14, | |
2361 | MOTIONSENSE_CHIP_LIS2DE = 15, | |
2362 | MOTIONSENSE_CHIP_LIS2MDL = 16, | |
2363 | MOTIONSENSE_CHIP_LSM6DS3 = 17, | |
2364 | MOTIONSENSE_CHIP_LSM6DSO = 18, | |
2365 | MOTIONSENSE_CHIP_LNG2DM = 19, | |
2366 | MOTIONSENSE_CHIP_MAX, | |
5271db29 BR |
2367 | }; |
2368 | ||
a517bb4b GG |
2369 | /* List of orientation positions */ |
2370 | enum motionsensor_orientation { | |
2371 | MOTIONSENSE_ORIENTATION_LANDSCAPE = 0, | |
2372 | MOTIONSENSE_ORIENTATION_PORTRAIT = 1, | |
2373 | MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_PORTRAIT = 2, | |
2374 | MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_LANDSCAPE = 3, | |
2375 | MOTIONSENSE_ORIENTATION_UNKNOWN = 4, | |
2376 | }; | |
974e6f02 EBS |
2377 | |
2378 | struct ec_response_motion_sensor_data { | |
2379 | /* Flags for each sensor. */ | |
2380 | uint8_t flags; | |
a517bb4b | 2381 | /* Sensor number the data comes from. */ |
974e6f02 EBS |
2382 | uint8_t sensor_num; |
2383 | /* Each sensor is up to 3-axis. */ | |
2384 | union { | |
2385 | int16_t data[3]; | |
6f72c3f9 | 2386 | struct __ec_todo_packed { |
df95a3bd | 2387 | uint16_t reserved; |
974e6f02 | 2388 | uint32_t timestamp; |
6f72c3f9 GG |
2389 | }; |
2390 | struct __ec_todo_unpacked { | |
974e6f02 EBS |
2391 | uint8_t activity; /* motionsensor_activity */ |
2392 | uint8_t state; | |
2393 | int16_t add_info[2]; | |
2394 | }; | |
2395 | }; | |
6f72c3f9 | 2396 | } __ec_todo_packed; |
974e6f02 | 2397 | |
a517bb4b GG |
2398 | /* Note: used in ec_response_get_next_data */ |
2399 | struct ec_response_motion_sense_fifo_info { | |
2400 | /* Size of the fifo */ | |
2401 | uint16_t size; | |
2402 | /* Amount of space used in the fifo */ | |
2403 | uint16_t count; | |
2404 | /* Timestamp recorded in us. | |
2405 | * aka accurate timestamp when host event was triggered. | |
2406 | */ | |
2407 | uint32_t timestamp; | |
2408 | /* Total amount of vector lost */ | |
2409 | uint16_t total_lost; | |
2410 | /* Lost events since the last fifo_info, per sensors */ | |
2411 | uint16_t lost[0]; | |
2412 | } __ec_todo_packed; | |
2413 | ||
2414 | struct ec_response_motion_sense_fifo_data { | |
2415 | uint32_t number_data; | |
2416 | struct ec_response_motion_sensor_data data[0]; | |
2417 | } __ec_todo_packed; | |
2418 | ||
2419 | /* List supported activity recognition */ | |
2420 | enum motionsensor_activity { | |
2421 | MOTIONSENSE_ACTIVITY_RESERVED = 0, | |
2422 | MOTIONSENSE_ACTIVITY_SIG_MOTION = 1, | |
2423 | MOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2, | |
2424 | MOTIONSENSE_ACTIVITY_ORIENTATION = 3, | |
2425 | }; | |
2426 | ||
2427 | struct ec_motion_sense_activity { | |
2428 | uint8_t sensor_num; | |
2429 | uint8_t activity; /* one of enum motionsensor_activity */ | |
2430 | uint8_t enable; /* 1: enable, 0: disable */ | |
2431 | uint8_t reserved; | |
2432 | uint16_t parameters[3]; /* activity dependent parameters */ | |
2433 | } __ec_todo_unpacked; | |
2434 | ||
2435 | /* Module flag masks used for the dump sub-command. */ | |
2436 | #define MOTIONSENSE_MODULE_FLAG_ACTIVE BIT(0) | |
2437 | ||
2438 | /* Sensor flag masks used for the dump sub-command. */ | |
2439 | #define MOTIONSENSE_SENSOR_FLAG_PRESENT BIT(0) | |
2440 | ||
2441 | /* | |
2442 | * Flush entry for synchronization. | |
2443 | * data contains time stamp | |
2444 | */ | |
2445 | #define MOTIONSENSE_SENSOR_FLAG_FLUSH BIT(0) | |
2446 | #define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP BIT(1) | |
2447 | #define MOTIONSENSE_SENSOR_FLAG_WAKEUP BIT(2) | |
2448 | #define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE BIT(3) | |
2449 | #define MOTIONSENSE_SENSOR_FLAG_ODR BIT(4) | |
2450 | ||
2451 | /* | |
2452 | * Send this value for the data element to only perform a read. If you | |
2453 | * send any other value, the EC will interpret it as data to set and will | |
2454 | * return the actual value set. | |
2455 | */ | |
2456 | #define EC_MOTION_SENSE_NO_VALUE -1 | |
2457 | ||
2458 | #define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000 | |
2459 | ||
2460 | /* MOTIONSENSE_CMD_SENSOR_OFFSET subcommand flag */ | |
2461 | /* Set Calibration information */ | |
2462 | #define MOTION_SENSE_SET_OFFSET BIT(0) | |
2463 | ||
2464 | /* Default Scale value, factor 1. */ | |
2465 | #define MOTION_SENSE_DEFAULT_SCALE BIT(15) | |
2466 | ||
2467 | #define LID_ANGLE_UNRELIABLE 500 | |
2468 | ||
2469 | enum motionsense_spoof_mode { | |
2470 | /* Disable spoof mode. */ | |
2471 | MOTIONSENSE_SPOOF_MODE_DISABLE = 0, | |
2472 | ||
2473 | /* Enable spoof mode, but use provided component values. */ | |
2474 | MOTIONSENSE_SPOOF_MODE_CUSTOM, | |
2475 | ||
2476 | /* Enable spoof mode, but use the current sensor values. */ | |
2477 | MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT, | |
2478 | ||
2479 | /* Query the current spoof mode status for the sensor. */ | |
2480 | MOTIONSENSE_SPOOF_MODE_QUERY, | |
2481 | }; | |
2482 | ||
5271db29 BR |
2483 | struct ec_params_motion_sense { |
2484 | uint8_t cmd; | |
2485 | union { | |
2486 | /* Used for MOTIONSENSE_CMD_DUMP. */ | |
6f72c3f9 | 2487 | struct __ec_todo_unpacked { |
a517bb4b GG |
2488 | /* |
2489 | * Maximal number of sensor the host is expecting. | |
2490 | * 0 means the host is only interested in the number | |
2491 | * of sensors controlled by the EC. | |
2492 | */ | |
2493 | uint8_t max_sensor_count; | |
5271db29 BR |
2494 | } dump; |
2495 | ||
2496 | /* | |
a517bb4b | 2497 | * Used for MOTIONSENSE_CMD_KB_WAKE_ANGLE. |
5271db29 | 2498 | */ |
6f72c3f9 | 2499 | struct __ec_todo_unpacked { |
a517bb4b GG |
2500 | /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. |
2501 | * kb_wake_angle: angle to wakup AP. | |
2502 | */ | |
5271db29 | 2503 | int16_t data; |
a517bb4b GG |
2504 | } kb_wake_angle; |
2505 | ||
2506 | /* | |
2507 | * Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA | |
2508 | * and MOTIONSENSE_CMD_PERFORM_CALIB. | |
2509 | */ | |
2510 | struct __ec_todo_unpacked { | |
2511 | uint8_t sensor_num; | |
2512 | } info, info_3, data, fifo_flush, perform_calib, | |
2513 | list_activities; | |
2514 | ||
2515 | /* | |
2516 | * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR | |
2517 | * and MOTIONSENSE_CMD_SENSOR_RANGE. | |
2518 | */ | |
2519 | struct __ec_todo_unpacked { | |
2520 | uint8_t sensor_num; | |
2521 | ||
2522 | /* Rounding flag, true for round-up, false for down. */ | |
2523 | uint8_t roundup; | |
2524 | ||
2525 | uint16_t reserved; | |
2526 | ||
2527 | /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */ | |
2528 | int32_t data; | |
2529 | } ec_rate, sensor_odr, sensor_range; | |
5271db29 | 2530 | |
974e6f02 | 2531 | /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */ |
6f72c3f9 | 2532 | struct __ec_todo_packed { |
974e6f02 EBS |
2533 | uint8_t sensor_num; |
2534 | ||
2535 | /* | |
2536 | * bit 0: If set (MOTION_SENSE_SET_OFFSET), set | |
2537 | * the calibration information in the EC. | |
2538 | * If unset, just retrieve calibration information. | |
2539 | */ | |
2540 | uint16_t flags; | |
2541 | ||
2542 | /* | |
2543 | * Temperature at calibration, in units of 0.01 C | |
2544 | * 0x8000: invalid / unknown. | |
2545 | * 0x0: 0C | |
2546 | * 0x7fff: +327.67C | |
2547 | */ | |
2548 | int16_t temp; | |
2549 | ||
2550 | /* | |
2551 | * Offset for calibration. | |
2552 | * Unit: | |
2553 | * Accelerometer: 1/1024 g | |
2554 | * Gyro: 1/1024 deg/s | |
2555 | * Compass: 1/16 uT | |
2556 | */ | |
2557 | int16_t offset[3]; | |
6f72c3f9 | 2558 | } sensor_offset; |
974e6f02 | 2559 | |
a517bb4b | 2560 | /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */ |
6f72c3f9 | 2561 | struct __ec_todo_packed { |
5271db29 | 2562 | uint8_t sensor_num; |
5271db29 | 2563 | |
a517bb4b GG |
2564 | /* |
2565 | * bit 0: If set (MOTION_SENSE_SET_OFFSET), set | |
2566 | * the calibration information in the EC. | |
2567 | * If unset, just retrieve calibration information. | |
2568 | */ | |
2569 | uint16_t flags; | |
5271db29 | 2570 | |
a517bb4b GG |
2571 | /* |
2572 | * Temperature at calibration, in units of 0.01 C | |
2573 | * 0x8000: invalid / unknown. | |
2574 | * 0x0: 0C | |
2575 | * 0x7fff: +327.67C | |
2576 | */ | |
2577 | int16_t temp; | |
5271db29 | 2578 | |
a517bb4b GG |
2579 | /* |
2580 | * Scale for calibration: | |
2581 | * By default scale is 1, it is encoded on 16bits: | |
2582 | * 1 = BIT(15) | |
2583 | * ~2 = 0xFFFF | |
2584 | * ~0 = 0. | |
2585 | */ | |
2586 | uint16_t scale[3]; | |
2587 | } sensor_scale; | |
5271db29 | 2588 | |
a517bb4b GG |
2589 | |
2590 | /* Used for MOTIONSENSE_CMD_FIFO_INFO */ | |
2591 | /* (no params) */ | |
2592 | ||
2593 | /* Used for MOTIONSENSE_CMD_FIFO_READ */ | |
2594 | struct __ec_todo_unpacked { | |
2595 | /* | |
2596 | * Number of expected vector to return. | |
2597 | * EC may return less or 0 if none available. | |
2598 | */ | |
2599 | uint32_t max_data_vector; | |
2600 | } fifo_read; | |
2601 | ||
2602 | struct ec_motion_sense_activity set_activity; | |
2603 | ||
2604 | /* Used for MOTIONSENSE_CMD_LID_ANGLE */ | |
2605 | /* (no params) */ | |
2606 | ||
2607 | /* Used for MOTIONSENSE_CMD_FIFO_INT_ENABLE */ | |
2608 | struct __ec_todo_unpacked { | |
2609 | /* | |
2610 | * 1: enable, 0 disable fifo, | |
2611 | * EC_MOTION_SENSE_NO_VALUE return value. | |
2612 | */ | |
2613 | int8_t enable; | |
2614 | } fifo_int_enable; | |
2615 | ||
2616 | /* Used for MOTIONSENSE_CMD_SPOOF */ | |
2617 | struct __ec_todo_packed { | |
2618 | uint8_t sensor_id; | |
2619 | ||
2620 | /* See enum motionsense_spoof_mode. */ | |
2621 | uint8_t spoof_enable; | |
2622 | ||
2623 | /* Ignored, used for alignment. */ | |
2624 | uint8_t reserved; | |
2625 | ||
2626 | /* Individual component values to spoof. */ | |
2627 | int16_t components[3]; | |
2628 | } spoof; | |
2629 | ||
2630 | /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */ | |
2631 | struct __ec_todo_unpacked { | |
2632 | /* | |
2633 | * Lid angle threshold for switching between tablet and | |
2634 | * clamshell mode. | |
2635 | */ | |
2636 | int16_t lid_angle; | |
2637 | ||
2638 | /* | |
2639 | * Hysteresis degree to prevent fluctuations between | |
2640 | * clamshell and tablet mode if lid angle keeps | |
2641 | * changing around the threshold. Lid motion driver will | |
2642 | * use lid_angle + hys_degree to trigger tablet mode and | |
2643 | * lid_angle - hys_degree to trigger clamshell mode. | |
2644 | */ | |
2645 | int16_t hys_degree; | |
2646 | } tablet_mode_threshold; | |
5271db29 | 2647 | }; |
6f72c3f9 | 2648 | } __ec_todo_packed; |
5271db29 BR |
2649 | |
2650 | struct ec_response_motion_sense { | |
2651 | union { | |
a517bb4b | 2652 | /* Used for MOTIONSENSE_CMD_DUMP */ |
6f72c3f9 | 2653 | struct __ec_todo_unpacked { |
5271db29 BR |
2654 | /* Flags representing the motion sensor module. */ |
2655 | uint8_t module_flags; | |
2656 | ||
974e6f02 EBS |
2657 | /* Number of sensors managed directly by the EC. */ |
2658 | uint8_t sensor_count; | |
5271db29 | 2659 | |
974e6f02 EBS |
2660 | /* |
2661 | * Sensor data is truncated if response_max is too small | |
2662 | * for holding all the data. | |
2663 | */ | |
2664 | struct ec_response_motion_sensor_data sensor[0]; | |
5271db29 BR |
2665 | } dump; |
2666 | ||
2667 | /* Used for MOTIONSENSE_CMD_INFO. */ | |
6f72c3f9 | 2668 | struct __ec_todo_unpacked { |
5271db29 BR |
2669 | /* Should be element of enum motionsensor_type. */ |
2670 | uint8_t type; | |
2671 | ||
2672 | /* Should be element of enum motionsensor_location. */ | |
2673 | uint8_t location; | |
2674 | ||
2675 | /* Should be element of enum motionsensor_chip. */ | |
2676 | uint8_t chip; | |
2677 | } info; | |
2678 | ||
a517bb4b GG |
2679 | /* Used for MOTIONSENSE_CMD_INFO version 3 */ |
2680 | struct __ec_todo_unpacked { | |
2681 | /* Should be element of enum motionsensor_type. */ | |
2682 | uint8_t type; | |
2683 | ||
2684 | /* Should be element of enum motionsensor_location. */ | |
2685 | uint8_t location; | |
2686 | ||
2687 | /* Should be element of enum motionsensor_chip. */ | |
2688 | uint8_t chip; | |
2689 | ||
2690 | /* Minimum sensor sampling frequency */ | |
2691 | uint32_t min_frequency; | |
2692 | ||
2693 | /* Maximum sensor sampling frequency */ | |
2694 | uint32_t max_frequency; | |
2695 | ||
2696 | /* Max number of sensor events that could be in fifo */ | |
2697 | uint32_t fifo_max_event_count; | |
2698 | } info_3; | |
2699 | ||
974e6f02 EBS |
2700 | /* Used for MOTIONSENSE_CMD_DATA */ |
2701 | struct ec_response_motion_sensor_data data; | |
2702 | ||
5271db29 BR |
2703 | /* |
2704 | * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR, | |
a517bb4b GG |
2705 | * MOTIONSENSE_CMD_SENSOR_RANGE, |
2706 | * MOTIONSENSE_CMD_KB_WAKE_ANGLE, | |
2707 | * MOTIONSENSE_CMD_FIFO_INT_ENABLE and | |
2708 | * MOTIONSENSE_CMD_SPOOF. | |
5271db29 | 2709 | */ |
6f72c3f9 | 2710 | struct __ec_todo_unpacked { |
5271db29 BR |
2711 | /* Current value of the parameter queried. */ |
2712 | int32_t ret; | |
a517bb4b GG |
2713 | } ec_rate, sensor_odr, sensor_range, kb_wake_angle, |
2714 | fifo_int_enable, spoof; | |
974e6f02 | 2715 | |
a517bb4b GG |
2716 | /* |
2717 | * Used for MOTIONSENSE_CMD_SENSOR_OFFSET, | |
2718 | * PERFORM_CALIB. | |
2719 | */ | |
6f72c3f9 | 2720 | struct __ec_todo_unpacked { |
974e6f02 EBS |
2721 | int16_t temp; |
2722 | int16_t offset[3]; | |
2723 | } sensor_offset, perform_calib; | |
a517bb4b GG |
2724 | |
2725 | /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */ | |
2726 | struct __ec_todo_unpacked { | |
2727 | int16_t temp; | |
2728 | uint16_t scale[3]; | |
2729 | } sensor_scale; | |
2730 | ||
2731 | struct ec_response_motion_sense_fifo_info fifo_info, fifo_flush; | |
2732 | ||
2733 | struct ec_response_motion_sense_fifo_data fifo_read; | |
2734 | ||
2735 | struct __ec_todo_packed { | |
2736 | uint16_t reserved; | |
2737 | uint32_t enabled; | |
2738 | uint32_t disabled; | |
2739 | } list_activities; | |
2740 | ||
2741 | /* No params for set activity */ | |
2742 | ||
2743 | /* Used for MOTIONSENSE_CMD_LID_ANGLE */ | |
2744 | struct __ec_todo_unpacked { | |
2745 | /* | |
2746 | * Angle between 0 and 360 degree if available, | |
2747 | * LID_ANGLE_UNRELIABLE otherwise. | |
2748 | */ | |
2749 | uint16_t value; | |
2750 | } lid_angle; | |
2751 | ||
2752 | /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */ | |
2753 | struct __ec_todo_unpacked { | |
2754 | /* | |
2755 | * Lid angle threshold for switching between tablet and | |
2756 | * clamshell mode. | |
2757 | */ | |
2758 | uint16_t lid_angle; | |
2759 | ||
2760 | /* Hysteresis degree. */ | |
2761 | uint16_t hys_degree; | |
2762 | } tablet_mode_threshold; | |
2763 | ||
5271db29 | 2764 | }; |
6f72c3f9 | 2765 | } __ec_todo_packed; |
5271db29 | 2766 | |
a517bb4b GG |
2767 | /*****************************************************************************/ |
2768 | /* Force lid open command */ | |
2769 | ||
2770 | /* Make lid event always open */ | |
2771 | #define EC_CMD_FORCE_LID_OPEN 0x002C | |
2772 | ||
2773 | struct ec_params_force_lid_open { | |
2774 | uint8_t enabled; | |
2775 | } __ec_align1; | |
2776 | ||
2777 | /*****************************************************************************/ | |
2778 | /* Configure the behavior of the power button */ | |
2779 | #define EC_CMD_CONFIG_POWER_BUTTON 0x002D | |
2780 | ||
2781 | enum ec_config_power_button_flags { | |
2782 | /* Enable/Disable power button pulses for x86 devices */ | |
2783 | EC_POWER_BUTTON_ENABLE_PULSE = BIT(0), | |
2784 | }; | |
2785 | ||
2786 | struct ec_params_config_power_button { | |
2787 | /* See enum ec_config_power_button_flags */ | |
2788 | uint8_t flags; | |
2789 | } __ec_align1; | |
2790 | ||
deaf39ef SG |
2791 | /*****************************************************************************/ |
2792 | /* USB charging control commands */ | |
2793 | ||
2794 | /* Set USB port charging mode */ | |
ff834332 | 2795 | #define EC_CMD_USB_CHARGE_SET_MODE 0x0030 |
deaf39ef SG |
2796 | |
2797 | struct ec_params_usb_charge_set_mode { | |
2798 | uint8_t usb_port_id; | |
e16efdf1 GG |
2799 | uint8_t mode:7; |
2800 | uint8_t inhibit_charge:1; | |
6f72c3f9 | 2801 | } __ec_align1; |
deaf39ef SG |
2802 | |
2803 | /*****************************************************************************/ | |
2804 | /* Persistent storage for host */ | |
2805 | ||
2806 | /* Maximum bytes that can be read/written in a single command */ | |
2807 | #define EC_PSTORE_SIZE_MAX 64 | |
2808 | ||
2809 | /* Get persistent storage info */ | |
ff834332 | 2810 | #define EC_CMD_PSTORE_INFO 0x0040 |
deaf39ef SG |
2811 | |
2812 | struct ec_response_pstore_info { | |
2813 | /* Persistent storage size, in bytes */ | |
2814 | uint32_t pstore_size; | |
2815 | /* Access size; read/write offset and size must be a multiple of this */ | |
2816 | uint32_t access_size; | |
6f72c3f9 | 2817 | } __ec_align4; |
deaf39ef SG |
2818 | |
2819 | /* | |
2820 | * Read persistent storage | |
2821 | * | |
2822 | * Response is params.size bytes of data. | |
2823 | */ | |
ff834332 | 2824 | #define EC_CMD_PSTORE_READ 0x0041 |
deaf39ef SG |
2825 | |
2826 | struct ec_params_pstore_read { | |
2827 | uint32_t offset; /* Byte offset to read */ | |
2828 | uint32_t size; /* Size to read in bytes */ | |
6f72c3f9 | 2829 | } __ec_align4; |
deaf39ef SG |
2830 | |
2831 | /* Write persistent storage */ | |
ff834332 | 2832 | #define EC_CMD_PSTORE_WRITE 0x0042 |
deaf39ef SG |
2833 | |
2834 | struct ec_params_pstore_write { | |
2835 | uint32_t offset; /* Byte offset to write */ | |
2836 | uint32_t size; /* Size to write in bytes */ | |
2837 | uint8_t data[EC_PSTORE_SIZE_MAX]; | |
6f72c3f9 | 2838 | } __ec_align4; |
deaf39ef SG |
2839 | |
2840 | /*****************************************************************************/ | |
2841 | /* Real-time clock */ | |
2842 | ||
2843 | /* RTC params and response structures */ | |
2844 | struct ec_params_rtc { | |
2845 | uint32_t time; | |
6f72c3f9 | 2846 | } __ec_align4; |
deaf39ef SG |
2847 | |
2848 | struct ec_response_rtc { | |
2849 | uint32_t time; | |
6f72c3f9 | 2850 | } __ec_align4; |
deaf39ef SG |
2851 | |
2852 | /* These use ec_response_rtc */ | |
ff834332 GG |
2853 | #define EC_CMD_RTC_GET_VALUE 0x0044 |
2854 | #define EC_CMD_RTC_GET_ALARM 0x0045 | |
deaf39ef SG |
2855 | |
2856 | /* These all use ec_params_rtc */ | |
ff834332 GG |
2857 | #define EC_CMD_RTC_SET_VALUE 0x0046 |
2858 | #define EC_CMD_RTC_SET_ALARM 0x0047 | |
deaf39ef | 2859 | |
df95a3bd | 2860 | /* Pass as time param to SET_ALARM to clear the current alarm */ |
3eff6d2c SB |
2861 | #define EC_RTC_ALARM_CLEAR 0 |
2862 | ||
deaf39ef SG |
2863 | /*****************************************************************************/ |
2864 | /* Port80 log access */ | |
2865 | ||
256ab950 SB |
2866 | /* Maximum entries that can be read/written in a single command */ |
2867 | #define EC_PORT80_SIZE_MAX 32 | |
2868 | ||
deaf39ef | 2869 | /* Get last port80 code from previous boot */ |
ff834332 GG |
2870 | #define EC_CMD_PORT80_LAST_BOOT 0x0048 |
2871 | #define EC_CMD_PORT80_READ 0x0048 | |
256ab950 SB |
2872 | |
2873 | enum ec_port80_subcmd { | |
2874 | EC_PORT80_GET_INFO = 0, | |
2875 | EC_PORT80_READ_BUFFER, | |
2876 | }; | |
2877 | ||
2878 | struct ec_params_port80_read { | |
2879 | uint16_t subcmd; | |
2880 | union { | |
6f72c3f9 | 2881 | struct __ec_todo_unpacked { |
256ab950 SB |
2882 | uint32_t offset; |
2883 | uint32_t num_entries; | |
2884 | } read_buffer; | |
2885 | }; | |
6f72c3f9 | 2886 | } __ec_todo_packed; |
256ab950 SB |
2887 | |
2888 | struct ec_response_port80_read { | |
2889 | union { | |
6f72c3f9 | 2890 | struct __ec_todo_unpacked { |
256ab950 SB |
2891 | uint32_t writes; |
2892 | uint32_t history_size; | |
2893 | uint32_t last_boot; | |
2894 | } get_info; | |
6f72c3f9 | 2895 | struct __ec_todo_unpacked { |
256ab950 SB |
2896 | uint16_t codes[EC_PORT80_SIZE_MAX]; |
2897 | } data; | |
2898 | }; | |
6f72c3f9 | 2899 | } __ec_todo_packed; |
deaf39ef SG |
2900 | |
2901 | struct ec_response_port80_last_boot { | |
2902 | uint16_t code; | |
6f72c3f9 | 2903 | } __ec_align2; |
deaf39ef SG |
2904 | |
2905 | /*****************************************************************************/ | |
5271db29 BR |
2906 | /* Thermal engine commands. Note that there are two implementations. We'll |
2907 | * reuse the command number, but the data and behavior is incompatible. | |
2908 | * Version 0 is what originally shipped on Link. | |
2909 | * Version 1 separates the CPU thermal limits from the fan control. | |
2910 | */ | |
deaf39ef | 2911 | |
ff834332 GG |
2912 | #define EC_CMD_THERMAL_SET_THRESHOLD 0x0050 |
2913 | #define EC_CMD_THERMAL_GET_THRESHOLD 0x0051 | |
5271db29 BR |
2914 | |
2915 | /* The version 0 structs are opaque. You have to know what they are for | |
2916 | * the get/set commands to make any sense. | |
2917 | */ | |
deaf39ef | 2918 | |
5271db29 | 2919 | /* Version 0 - set */ |
deaf39ef SG |
2920 | struct ec_params_thermal_set_threshold { |
2921 | uint8_t sensor_type; | |
2922 | uint8_t threshold_id; | |
2923 | uint16_t value; | |
6f72c3f9 | 2924 | } __ec_align2; |
deaf39ef | 2925 | |
5271db29 | 2926 | /* Version 0 - get */ |
deaf39ef SG |
2927 | struct ec_params_thermal_get_threshold { |
2928 | uint8_t sensor_type; | |
2929 | uint8_t threshold_id; | |
6f72c3f9 | 2930 | } __ec_align1; |
deaf39ef SG |
2931 | |
2932 | struct ec_response_thermal_get_threshold { | |
2933 | uint16_t value; | |
6f72c3f9 | 2934 | } __ec_align2; |
deaf39ef | 2935 | |
5271db29 BR |
2936 | |
2937 | /* The version 1 structs are visible. */ | |
2938 | enum ec_temp_thresholds { | |
2939 | EC_TEMP_THRESH_WARN = 0, | |
2940 | EC_TEMP_THRESH_HIGH, | |
2941 | EC_TEMP_THRESH_HALT, | |
2942 | ||
2943 | EC_TEMP_THRESH_COUNT | |
2944 | }; | |
2945 | ||
df95a3bd GG |
2946 | /* |
2947 | * Thermal configuration for one temperature sensor. Temps are in degrees K. | |
5271db29 | 2948 | * Zero values will be silently ignored by the thermal task. |
170309b4 GG |
2949 | * |
2950 | * Set 'temp_host' value allows thermal task to trigger some event with 1 degree | |
2951 | * hysteresis. | |
2952 | * For example, | |
2953 | * temp_host[EC_TEMP_THRESH_HIGH] = 300 K | |
2954 | * temp_host_release[EC_TEMP_THRESH_HIGH] = 0 K | |
2955 | * EC will throttle ap when temperature >= 301 K, and release throttling when | |
2956 | * temperature <= 299 K. | |
2957 | * | |
2958 | * Set 'temp_host_release' value allows thermal task has a custom hysteresis. | |
2959 | * For example, | |
2960 | * temp_host[EC_TEMP_THRESH_HIGH] = 300 K | |
2961 | * temp_host_release[EC_TEMP_THRESH_HIGH] = 295 K | |
2962 | * EC will throttle ap when temperature >= 301 K, and release throttling when | |
2963 | * temperature <= 294 K. | |
2964 | * | |
2965 | * Note that this structure is a sub-structure of | |
2966 | * ec_params_thermal_set_threshold_v1, but maintains its alignment there. | |
5271db29 BR |
2967 | */ |
2968 | struct ec_thermal_config { | |
2969 | uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */ | |
170309b4 | 2970 | uint32_t temp_host_release[EC_TEMP_THRESH_COUNT]; /* release levels */ |
5271db29 BR |
2971 | uint32_t temp_fan_off; /* no active cooling needed */ |
2972 | uint32_t temp_fan_max; /* max active cooling needed */ | |
6f72c3f9 | 2973 | } __ec_align4; |
5271db29 BR |
2974 | |
2975 | /* Version 1 - get config for one sensor. */ | |
2976 | struct ec_params_thermal_get_threshold_v1 { | |
2977 | uint32_t sensor_num; | |
6f72c3f9 | 2978 | } __ec_align4; |
5271db29 BR |
2979 | /* This returns a struct ec_thermal_config */ |
2980 | ||
df95a3bd GG |
2981 | /* |
2982 | * Version 1 - set config for one sensor. | |
2983 | * Use read-modify-write for best results! | |
2984 | */ | |
5271db29 BR |
2985 | struct ec_params_thermal_set_threshold_v1 { |
2986 | uint32_t sensor_num; | |
2987 | struct ec_thermal_config cfg; | |
6f72c3f9 | 2988 | } __ec_align4; |
5271db29 BR |
2989 | /* This returns no data */ |
2990 | ||
2991 | /****************************************************************************/ | |
2992 | ||
deaf39ef | 2993 | /* Toggle automatic fan control */ |
ff834332 | 2994 | #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052 |
deaf39ef | 2995 | |
170309b4 GG |
2996 | /* Version 1 of input params */ |
2997 | struct ec_params_auto_fan_ctrl_v1 { | |
2998 | uint8_t fan_idx; | |
2999 | } __ec_align1; | |
3000 | ||
3001 | /* Get/Set TMP006 calibration data */ | |
ff834332 | 3002 | #define EC_CMD_TMP006_GET_CALIBRATION 0x0053 |
170309b4 GG |
3003 | #define EC_CMD_TMP006_SET_CALIBRATION 0x0054 |
3004 | ||
3005 | /* | |
3006 | * The original TMP006 calibration only needed four params, but now we need | |
3007 | * more. Since the algorithm is nothing but magic numbers anyway, we'll leave | |
3008 | * the params opaque. The v1 "get" response will include the algorithm number | |
3009 | * and how many params it requires. That way we can change the EC code without | |
3010 | * needing to update this file. We can also use a different algorithm on each | |
3011 | * sensor. | |
3012 | */ | |
deaf39ef | 3013 | |
170309b4 | 3014 | /* This is the same struct for both v0 and v1. */ |
deaf39ef SG |
3015 | struct ec_params_tmp006_get_calibration { |
3016 | uint8_t index; | |
6f72c3f9 | 3017 | } __ec_align1; |
deaf39ef | 3018 | |
170309b4 GG |
3019 | /* Version 0 */ |
3020 | struct ec_response_tmp006_get_calibration_v0 { | |
deaf39ef SG |
3021 | float s0; |
3022 | float b0; | |
3023 | float b1; | |
3024 | float b2; | |
6f72c3f9 | 3025 | } __ec_align4; |
deaf39ef | 3026 | |
170309b4 | 3027 | struct ec_params_tmp006_set_calibration_v0 { |
deaf39ef | 3028 | uint8_t index; |
170309b4 | 3029 | uint8_t reserved[3]; |
deaf39ef SG |
3030 | float s0; |
3031 | float b0; | |
3032 | float b1; | |
3033 | float b2; | |
6f72c3f9 | 3034 | } __ec_align4; |
deaf39ef | 3035 | |
170309b4 GG |
3036 | /* Version 1 */ |
3037 | struct ec_response_tmp006_get_calibration_v1 { | |
3038 | uint8_t algorithm; | |
3039 | uint8_t num_params; | |
3040 | uint8_t reserved[2]; | |
3041 | float val[0]; | |
3042 | } __ec_align4; | |
3043 | ||
3044 | struct ec_params_tmp006_set_calibration_v1 { | |
3045 | uint8_t index; | |
3046 | uint8_t algorithm; | |
3047 | uint8_t num_params; | |
3048 | uint8_t reserved; | |
3049 | float val[0]; | |
3050 | } __ec_align4; | |
3051 | ||
3052 | ||
5271db29 | 3053 | /* Read raw TMP006 data */ |
ff834332 | 3054 | #define EC_CMD_TMP006_GET_RAW 0x0055 |
5271db29 BR |
3055 | |
3056 | struct ec_params_tmp006_get_raw { | |
3057 | uint8_t index; | |
6f72c3f9 | 3058 | } __ec_align1; |
5271db29 BR |
3059 | |
3060 | struct ec_response_tmp006_get_raw { | |
3061 | int32_t t; /* In 1/100 K */ | |
3062 | int32_t v; /* In nV */ | |
6f72c3f9 | 3063 | } __ec_align4; |
5271db29 | 3064 | |
deaf39ef SG |
3065 | /*****************************************************************************/ |
3066 | /* MKBP - Matrix KeyBoard Protocol */ | |
3067 | ||
3068 | /* | |
3069 | * Read key state | |
3070 | * | |
3071 | * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for | |
3072 | * expected response size. | |
b44c4d3f DA |
3073 | * |
3074 | * NOTE: This has been superseded by EC_CMD_MKBP_GET_NEXT_EVENT. If you wish | |
3075 | * to obtain the instantaneous state, use EC_CMD_MKBP_INFO with the type | |
3076 | * EC_MKBP_INFO_CURRENT and event EC_MKBP_EVENT_KEY_MATRIX. | |
deaf39ef | 3077 | */ |
ff834332 | 3078 | #define EC_CMD_MKBP_STATE 0x0060 |
deaf39ef | 3079 | |
b44c4d3f DA |
3080 | /* |
3081 | * Provide information about various MKBP things. See enum ec_mkbp_info_type. | |
3082 | */ | |
ff834332 | 3083 | #define EC_CMD_MKBP_INFO 0x0061 |
deaf39ef SG |
3084 | |
3085 | struct ec_response_mkbp_info { | |
3086 | uint32_t rows; | |
3087 | uint32_t cols; | |
b44c4d3f DA |
3088 | /* Formerly "switches", which was 0. */ |
3089 | uint8_t reserved; | |
6f72c3f9 | 3090 | } __ec_align_size1; |
deaf39ef | 3091 | |
b44c4d3f DA |
3092 | struct ec_params_mkbp_info { |
3093 | uint8_t info_type; | |
3094 | uint8_t event_type; | |
6f72c3f9 | 3095 | } __ec_align1; |
b44c4d3f DA |
3096 | |
3097 | enum ec_mkbp_info_type { | |
3098 | /* | |
3099 | * Info about the keyboard matrix: number of rows and columns. | |
3100 | * | |
3101 | * Returns struct ec_response_mkbp_info. | |
3102 | */ | |
3103 | EC_MKBP_INFO_KBD = 0, | |
3104 | ||
3105 | /* | |
3106 | * For buttons and switches, info about which specifically are | |
3107 | * supported. event_type must be set to one of the values in enum | |
3108 | * ec_mkbp_event. | |
3109 | * | |
3110 | * For EC_MKBP_EVENT_BUTTON and EC_MKBP_EVENT_SWITCH, returns a 4 byte | |
3111 | * bitmask indicating which buttons or switches are present. See the | |
3112 | * bit inidices below. | |
3113 | */ | |
3114 | EC_MKBP_INFO_SUPPORTED = 1, | |
3115 | ||
3116 | /* | |
3117 | * Instantaneous state of buttons and switches. | |
3118 | * | |
3119 | * event_type must be set to one of the values in enum ec_mkbp_event. | |
3120 | * | |
3121 | * For EC_MKBP_EVENT_KEY_MATRIX, returns uint8_t key_matrix[13] | |
3122 | * indicating the current state of the keyboard matrix. | |
3123 | * | |
3124 | * For EC_MKBP_EVENT_HOST_EVENT, return uint32_t host_event, the raw | |
3125 | * event state. | |
3126 | * | |
3127 | * For EC_MKBP_EVENT_BUTTON, returns uint32_t buttons, indicating the | |
3128 | * state of supported buttons. | |
3129 | * | |
3130 | * For EC_MKBP_EVENT_SWITCH, returns uint32_t switches, indicating the | |
3131 | * state of supported switches. | |
3132 | */ | |
3133 | EC_MKBP_INFO_CURRENT = 2, | |
3134 | }; | |
3135 | ||
deaf39ef | 3136 | /* Simulate key press */ |
ff834332 | 3137 | #define EC_CMD_MKBP_SIMULATE_KEY 0x0062 |
deaf39ef SG |
3138 | |
3139 | struct ec_params_mkbp_simulate_key { | |
3140 | uint8_t col; | |
3141 | uint8_t row; | |
3142 | uint8_t pressed; | |
6f72c3f9 | 3143 | } __ec_align1; |
deaf39ef | 3144 | |
fd537284 GG |
3145 | #define EC_CMD_GET_KEYBOARD_ID 0x0063 |
3146 | ||
3147 | struct ec_response_keyboard_id { | |
3148 | uint32_t keyboard_id; | |
3149 | } __ec_align4; | |
3150 | ||
3151 | enum keyboard_id { | |
3152 | KEYBOARD_ID_UNSUPPORTED = 0, | |
3153 | KEYBOARD_ID_UNREADABLE = 0xffffffff, | |
3154 | }; | |
3155 | ||
deaf39ef | 3156 | /* Configure keyboard scanning */ |
ff834332 GG |
3157 | #define EC_CMD_MKBP_SET_CONFIG 0x0064 |
3158 | #define EC_CMD_MKBP_GET_CONFIG 0x0065 | |
deaf39ef SG |
3159 | |
3160 | /* flags */ | |
3161 | enum mkbp_config_flags { | |
3162 | EC_MKBP_FLAGS_ENABLE = 1, /* Enable keyboard scanning */ | |
3163 | }; | |
3164 | ||
3165 | enum mkbp_config_valid { | |
9e816560 GG |
3166 | EC_MKBP_VALID_SCAN_PERIOD = BIT(0), |
3167 | EC_MKBP_VALID_POLL_TIMEOUT = BIT(1), | |
3168 | EC_MKBP_VALID_MIN_POST_SCAN_DELAY = BIT(3), | |
3169 | EC_MKBP_VALID_OUTPUT_SETTLE = BIT(4), | |
3170 | EC_MKBP_VALID_DEBOUNCE_DOWN = BIT(5), | |
3171 | EC_MKBP_VALID_DEBOUNCE_UP = BIT(6), | |
3172 | EC_MKBP_VALID_FIFO_MAX_DEPTH = BIT(7), | |
deaf39ef SG |
3173 | }; |
3174 | ||
df95a3bd GG |
3175 | /* |
3176 | * Configuration for our key scanning algorithm. | |
3177 | * | |
3178 | * Note that this is used as a sub-structure of | |
3179 | * ec_{params/response}_mkbp_get_config. | |
3180 | */ | |
deaf39ef SG |
3181 | struct ec_mkbp_config { |
3182 | uint32_t valid_mask; /* valid fields */ | |
3183 | uint8_t flags; /* some flags (enum mkbp_config_flags) */ | |
3184 | uint8_t valid_flags; /* which flags are valid */ | |
3185 | uint16_t scan_period_us; /* period between start of scans */ | |
3186 | /* revert to interrupt mode after no activity for this long */ | |
3187 | uint32_t poll_timeout_us; | |
3188 | /* | |
3189 | * minimum post-scan relax time. Once we finish a scan we check | |
3190 | * the time until we are due to start the next one. If this time is | |
3191 | * shorter this field, we use this instead. | |
3192 | */ | |
3193 | uint16_t min_post_scan_delay_us; | |
3194 | /* delay between setting up output and waiting for it to settle */ | |
3195 | uint16_t output_settle_us; | |
3196 | uint16_t debounce_down_us; /* time for debounce on key down */ | |
3197 | uint16_t debounce_up_us; /* time for debounce on key up */ | |
3198 | /* maximum depth to allow for fifo (0 = no keyscan output) */ | |
3199 | uint8_t fifo_max_depth; | |
6f72c3f9 | 3200 | } __ec_align_size1; |
deaf39ef SG |
3201 | |
3202 | struct ec_params_mkbp_set_config { | |
3203 | struct ec_mkbp_config config; | |
6f72c3f9 | 3204 | } __ec_align_size1; |
deaf39ef SG |
3205 | |
3206 | struct ec_response_mkbp_get_config { | |
3207 | struct ec_mkbp_config config; | |
6f72c3f9 | 3208 | } __ec_align_size1; |
deaf39ef SG |
3209 | |
3210 | /* Run the key scan emulation */ | |
ff834332 | 3211 | #define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066 |
deaf39ef SG |
3212 | |
3213 | enum ec_keyscan_seq_cmd { | |
3214 | EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */ | |
3215 | EC_KEYSCAN_SEQ_CLEAR = 1, /* Clear sequence */ | |
3216 | EC_KEYSCAN_SEQ_ADD = 2, /* Add item to sequence */ | |
3217 | EC_KEYSCAN_SEQ_START = 3, /* Start running sequence */ | |
3218 | EC_KEYSCAN_SEQ_COLLECT = 4, /* Collect sequence summary data */ | |
3219 | }; | |
3220 | ||
3221 | enum ec_collect_flags { | |
3222 | /* | |
3223 | * Indicates this scan was processed by the EC. Due to timing, some | |
3224 | * scans may be skipped. | |
3225 | */ | |
9e816560 | 3226 | EC_KEYSCAN_SEQ_FLAG_DONE = BIT(0), |
deaf39ef SG |
3227 | }; |
3228 | ||
3229 | struct ec_collect_item { | |
3230 | uint8_t flags; /* some flags (enum ec_collect_flags) */ | |
6f72c3f9 | 3231 | } __ec_align1; |
deaf39ef SG |
3232 | |
3233 | struct ec_params_keyscan_seq_ctrl { | |
3234 | uint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */ | |
3235 | union { | |
6f72c3f9 | 3236 | struct __ec_align1 { |
deaf39ef SG |
3237 | uint8_t active; /* still active */ |
3238 | uint8_t num_items; /* number of items */ | |
3239 | /* Current item being presented */ | |
3240 | uint8_t cur_item; | |
3241 | } status; | |
6f72c3f9 | 3242 | struct __ec_todo_unpacked { |
deaf39ef SG |
3243 | /* |
3244 | * Absolute time for this scan, measured from the | |
3245 | * start of the sequence. | |
3246 | */ | |
3247 | uint32_t time_us; | |
3248 | uint8_t scan[0]; /* keyscan data */ | |
3249 | } add; | |
6f72c3f9 | 3250 | struct __ec_align1 { |
deaf39ef SG |
3251 | uint8_t start_item; /* First item to return */ |
3252 | uint8_t num_items; /* Number of items to return */ | |
3253 | } collect; | |
3254 | }; | |
6f72c3f9 | 3255 | } __ec_todo_packed; |
deaf39ef SG |
3256 | |
3257 | struct ec_result_keyscan_seq_ctrl { | |
3258 | union { | |
6f72c3f9 | 3259 | struct __ec_todo_unpacked { |
deaf39ef SG |
3260 | uint8_t num_items; /* Number of items */ |
3261 | /* Data for each item */ | |
3262 | struct ec_collect_item item[0]; | |
3263 | } collect; | |
3264 | }; | |
6f72c3f9 | 3265 | } __ec_todo_packed; |
deaf39ef | 3266 | |
6f1d912b | 3267 | /* |
784dd15c | 3268 | * Get the next pending MKBP event. |
6f1d912b | 3269 | * |
784dd15c | 3270 | * Returns EC_RES_UNAVAILABLE if there is no event pending. |
6f1d912b | 3271 | */ |
ff834332 | 3272 | #define EC_CMD_GET_NEXT_EVENT 0x0067 |
6f1d912b | 3273 | |
784dd15c GG |
3274 | #define EC_MKBP_HAS_MORE_EVENTS_SHIFT 7 |
3275 | ||
3276 | /* | |
3277 | * We use the most significant bit of the event type to indicate to the host | |
3278 | * that the EC has more MKBP events available to provide. | |
3279 | */ | |
3280 | #define EC_MKBP_HAS_MORE_EVENTS BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) | |
3281 | ||
3282 | /* The mask to apply to get the raw event type */ | |
3283 | #define EC_MKBP_EVENT_TYPE_MASK (BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) - 1) | |
3284 | ||
6f1d912b VY |
3285 | enum ec_mkbp_event { |
3286 | /* Keyboard matrix changed. The event data is the new matrix state. */ | |
3287 | EC_MKBP_EVENT_KEY_MATRIX = 0, | |
3288 | ||
3289 | /* New host event. The event data is 4 bytes of host event flags. */ | |
3290 | EC_MKBP_EVENT_HOST_EVENT = 1, | |
3291 | ||
3292 | /* New Sensor FIFO data. The event data is fifo_info structure. */ | |
3293 | EC_MKBP_EVENT_SENSOR_FIFO = 2, | |
3294 | ||
b44c4d3f DA |
3295 | /* The state of the non-matrixed buttons have changed. */ |
3296 | EC_MKBP_EVENT_BUTTON = 3, | |
3297 | ||
3298 | /* The state of the switches have changed. */ | |
3299 | EC_MKBP_EVENT_SWITCH = 4, | |
3300 | ||
784dd15c GG |
3301 | /* New Fingerprint sensor event, the event data is fp_events bitmap. */ |
3302 | EC_MKBP_EVENT_FINGERPRINT = 5, | |
3303 | ||
3304 | /* | |
3305 | * Sysrq event: send emulated sysrq. The event data is sysrq, | |
3306 | * corresponding to the key to be pressed. | |
3307 | */ | |
e6eba3fa RJ |
3308 | EC_MKBP_EVENT_SYSRQ = 6, |
3309 | ||
784dd15c GG |
3310 | /* |
3311 | * New 64-bit host event. | |
3312 | * The event data is 8 bytes of host event flags. | |
3313 | */ | |
3314 | EC_MKBP_EVENT_HOST_EVENT64 = 7, | |
3315 | ||
f47674e5 NA |
3316 | /* Notify the AP that something happened on CEC */ |
3317 | EC_MKBP_EVENT_CEC_EVENT = 8, | |
3318 | ||
3319 | /* Send an incoming CEC message to the AP */ | |
3320 | EC_MKBP_EVENT_CEC_MESSAGE = 9, | |
3321 | ||
6f1d912b VY |
3322 | /* Number of MKBP events */ |
3323 | EC_MKBP_EVENT_COUNT, | |
3324 | }; | |
784dd15c | 3325 | BUILD_ASSERT(EC_MKBP_EVENT_COUNT <= EC_MKBP_EVENT_TYPE_MASK); |
6f1d912b | 3326 | |
6f72c3f9 GG |
3327 | union __ec_align_offset1 ec_response_get_next_data { |
3328 | uint8_t key_matrix[13]; | |
6f1d912b VY |
3329 | |
3330 | /* Unaligned */ | |
784dd15c GG |
3331 | uint32_t host_event; |
3332 | uint64_t host_event64; | |
b44c4d3f | 3333 | |
a517bb4b GG |
3334 | struct __ec_todo_unpacked { |
3335 | /* For aligning the fifo_info */ | |
3336 | uint8_t reserved[3]; | |
3337 | struct ec_response_motion_sense_fifo_info info; | |
3338 | } sensor_fifo; | |
3339 | ||
784dd15c GG |
3340 | uint32_t buttons; |
3341 | ||
3342 | uint32_t switches; | |
3343 | ||
3344 | uint32_t fp_events; | |
3345 | ||
3346 | uint32_t sysrq; | |
3347 | ||
3348 | /* CEC events from enum mkbp_cec_event */ | |
3349 | uint32_t cec_events; | |
6f72c3f9 | 3350 | }; |
6f1d912b | 3351 | |
6f72c3f9 | 3352 | union __ec_align_offset1 ec_response_get_next_data_v1 { |
57e94c8b | 3353 | uint8_t key_matrix[16]; |
784dd15c GG |
3354 | |
3355 | /* Unaligned */ | |
57e94c8b | 3356 | uint32_t host_event; |
784dd15c GG |
3357 | uint64_t host_event64; |
3358 | ||
a517bb4b GG |
3359 | struct __ec_todo_unpacked { |
3360 | /* For aligning the fifo_info */ | |
3361 | uint8_t reserved[3]; | |
3362 | struct ec_response_motion_sense_fifo_info info; | |
3363 | } sensor_fifo; | |
3364 | ||
57e94c8b | 3365 | uint32_t buttons; |
784dd15c | 3366 | |
57e94c8b | 3367 | uint32_t switches; |
784dd15c GG |
3368 | |
3369 | uint32_t fp_events; | |
3370 | ||
57e94c8b | 3371 | uint32_t sysrq; |
784dd15c GG |
3372 | |
3373 | /* CEC events from enum mkbp_cec_event */ | |
57e94c8b | 3374 | uint32_t cec_events; |
784dd15c | 3375 | |
57e94c8b | 3376 | uint8_t cec_message[16]; |
6f72c3f9 | 3377 | }; |
784dd15c | 3378 | BUILD_ASSERT(sizeof(union ec_response_get_next_data_v1) == 16); |
57e94c8b | 3379 | |
6f1d912b VY |
3380 | struct ec_response_get_next_event { |
3381 | uint8_t event_type; | |
3382 | /* Followed by event data if any */ | |
3383 | union ec_response_get_next_data data; | |
6f72c3f9 | 3384 | } __ec_align1; |
6f1d912b | 3385 | |
57e94c8b NA |
3386 | struct ec_response_get_next_event_v1 { |
3387 | uint8_t event_type; | |
3388 | /* Followed by event data if any */ | |
3389 | union ec_response_get_next_data_v1 data; | |
6f72c3f9 | 3390 | } __ec_align1; |
57e94c8b | 3391 | |
b44c4d3f DA |
3392 | /* Bit indices for buttons and switches.*/ |
3393 | /* Buttons */ | |
3394 | #define EC_MKBP_POWER_BUTTON 0 | |
3395 | #define EC_MKBP_VOL_UP 1 | |
3396 | #define EC_MKBP_VOL_DOWN 2 | |
784dd15c | 3397 | #define EC_MKBP_RECOVERY 3 |
b44c4d3f DA |
3398 | |
3399 | /* Switches */ | |
3400 | #define EC_MKBP_LID_OPEN 0 | |
6ccc3a33 | 3401 | #define EC_MKBP_TABLET_MODE 1 |
78d8f8f1 | 3402 | #define EC_MKBP_BASE_ATTACHED 2 |
b44c4d3f | 3403 | |
fd537284 GG |
3404 | /* Run keyboard factory test scanning */ |
3405 | #define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068 | |
3406 | ||
3407 | struct ec_response_keyboard_factory_test { | |
3408 | uint16_t shorted; /* Keyboard pins are shorted */ | |
3409 | } __ec_align2; | |
3410 | ||
716bf50e GG |
3411 | /* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */ |
3412 | #define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF) | |
3413 | #define EC_MKBP_FP_ERRCODE(fp_events) ((fp_events) & 0x0000000F) | |
3414 | #define EC_MKBP_FP_ENROLL_PROGRESS_OFFSET 4 | |
3415 | #define EC_MKBP_FP_ENROLL_PROGRESS(fpe) (((fpe) & 0x00000FF0) \ | |
3416 | >> EC_MKBP_FP_ENROLL_PROGRESS_OFFSET) | |
3417 | #define EC_MKBP_FP_MATCH_IDX_OFFSET 12 | |
3418 | #define EC_MKBP_FP_MATCH_IDX_MASK 0x0000F000 | |
3419 | #define EC_MKBP_FP_MATCH_IDX(fpe) (((fpe) & EC_MKBP_FP_MATCH_IDX_MASK) \ | |
3420 | >> EC_MKBP_FP_MATCH_IDX_OFFSET) | |
3421 | #define EC_MKBP_FP_ENROLL BIT(27) | |
3422 | #define EC_MKBP_FP_MATCH BIT(28) | |
3423 | #define EC_MKBP_FP_FINGER_DOWN BIT(29) | |
3424 | #define EC_MKBP_FP_FINGER_UP BIT(30) | |
3425 | #define EC_MKBP_FP_IMAGE_READY BIT(31) | |
3426 | /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_ENROLL is set */ | |
3427 | #define EC_MKBP_FP_ERR_ENROLL_OK 0 | |
3428 | #define EC_MKBP_FP_ERR_ENROLL_LOW_QUALITY 1 | |
3429 | #define EC_MKBP_FP_ERR_ENROLL_IMMOBILE 2 | |
3430 | #define EC_MKBP_FP_ERR_ENROLL_LOW_COVERAGE 3 | |
3431 | #define EC_MKBP_FP_ERR_ENROLL_INTERNAL 5 | |
3432 | /* Can be used to detect if image was usable for enrollment or not. */ | |
3433 | #define EC_MKBP_FP_ERR_ENROLL_PROBLEM_MASK 1 | |
3434 | /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_MATCH is set */ | |
3435 | #define EC_MKBP_FP_ERR_MATCH_NO 0 | |
3436 | #define EC_MKBP_FP_ERR_MATCH_NO_INTERNAL 6 | |
3437 | #define EC_MKBP_FP_ERR_MATCH_NO_TEMPLATES 7 | |
3438 | #define EC_MKBP_FP_ERR_MATCH_NO_LOW_QUALITY 2 | |
3439 | #define EC_MKBP_FP_ERR_MATCH_NO_LOW_COVERAGE 4 | |
3440 | #define EC_MKBP_FP_ERR_MATCH_YES 1 | |
3441 | #define EC_MKBP_FP_ERR_MATCH_YES_UPDATED 3 | |
3442 | #define EC_MKBP_FP_ERR_MATCH_YES_UPDATE_FAILED 5 | |
3443 | ||
3444 | ||
deaf39ef SG |
3445 | /*****************************************************************************/ |
3446 | /* Temperature sensor commands */ | |
3447 | ||
3448 | /* Read temperature sensor info */ | |
ff834332 | 3449 | #define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070 |
deaf39ef SG |
3450 | |
3451 | struct ec_params_temp_sensor_get_info { | |
3452 | uint8_t id; | |
6f72c3f9 | 3453 | } __ec_align1; |
deaf39ef SG |
3454 | |
3455 | struct ec_response_temp_sensor_get_info { | |
3456 | char sensor_name[32]; | |
3457 | uint8_t sensor_type; | |
6f72c3f9 | 3458 | } __ec_align1; |
deaf39ef SG |
3459 | |
3460 | /*****************************************************************************/ | |
3461 | ||
3462 | /* | |
3463 | * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI | |
3464 | * commands accidentally sent to the wrong interface. See the ACPI section | |
3465 | * below. | |
3466 | */ | |
3467 | ||
3468 | /*****************************************************************************/ | |
3469 | /* Host event commands */ | |
3470 | ||
ce86c87d GG |
3471 | |
3472 | /* Obsolete. New implementation should use EC_CMD_HOST_EVENT instead */ | |
deaf39ef SG |
3473 | /* |
3474 | * Host event mask params and response structures, shared by all of the host | |
3475 | * event commands below. | |
3476 | */ | |
3477 | struct ec_params_host_event_mask { | |
3478 | uint32_t mask; | |
6f72c3f9 | 3479 | } __ec_align4; |
deaf39ef SG |
3480 | |
3481 | struct ec_response_host_event_mask { | |
3482 | uint32_t mask; | |
6f72c3f9 | 3483 | } __ec_align4; |
deaf39ef SG |
3484 | |
3485 | /* These all use ec_response_host_event_mask */ | |
ff834332 GG |
3486 | #define EC_CMD_HOST_EVENT_GET_B 0x0087 |
3487 | #define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088 | |
3488 | #define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089 | |
3489 | #define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D | |
deaf39ef SG |
3490 | |
3491 | /* These all use ec_params_host_event_mask */ | |
ff834332 GG |
3492 | #define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A |
3493 | #define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B | |
3494 | #define EC_CMD_HOST_EVENT_CLEAR 0x008C | |
3495 | #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E | |
3496 | #define EC_CMD_HOST_EVENT_CLEAR_B 0x008F | |
deaf39ef | 3497 | |
ce86c87d GG |
3498 | /* |
3499 | * Unified host event programming interface - Should be used by newer versions | |
3500 | * of BIOS/OS to program host events and masks | |
3501 | */ | |
3502 | ||
3503 | struct ec_params_host_event { | |
3504 | ||
3505 | /* Action requested by host - one of enum ec_host_event_action. */ | |
3506 | uint8_t action; | |
3507 | ||
3508 | /* | |
3509 | * Mask type that the host requested the action on - one of | |
3510 | * enum ec_host_event_mask_type. | |
3511 | */ | |
3512 | uint8_t mask_type; | |
3513 | ||
3514 | /* Set to 0, ignore on read */ | |
3515 | uint16_t reserved; | |
3516 | ||
3517 | /* Value to be used in case of set operations. */ | |
3518 | uint64_t value; | |
3519 | } __ec_align4; | |
3520 | ||
3521 | /* | |
3522 | * Response structure returned by EC_CMD_HOST_EVENT. | |
3523 | * Update the value on a GET request. Set to 0 on GET/CLEAR | |
3524 | */ | |
3525 | ||
3526 | struct ec_response_host_event { | |
3527 | ||
3528 | /* Mask value in case of get operation */ | |
3529 | uint64_t value; | |
3530 | } __ec_align4; | |
3531 | ||
3532 | enum ec_host_event_action { | |
3533 | /* | |
3534 | * params.value is ignored. Value of mask_type populated | |
3535 | * in response.value | |
3536 | */ | |
3537 | EC_HOST_EVENT_GET, | |
3538 | ||
3539 | /* Bits in params.value are set */ | |
3540 | EC_HOST_EVENT_SET, | |
3541 | ||
3542 | /* Bits in params.value are cleared */ | |
3543 | EC_HOST_EVENT_CLEAR, | |
3544 | }; | |
3545 | ||
3546 | enum ec_host_event_mask_type { | |
3547 | ||
3548 | /* Main host event copy */ | |
3549 | EC_HOST_EVENT_MAIN, | |
3550 | ||
3551 | /* Copy B of host events */ | |
3552 | EC_HOST_EVENT_B, | |
3553 | ||
3554 | /* SCI Mask */ | |
3555 | EC_HOST_EVENT_SCI_MASK, | |
3556 | ||
3557 | /* SMI Mask */ | |
3558 | EC_HOST_EVENT_SMI_MASK, | |
3559 | ||
3560 | /* Mask of events that should be always reported in hostevents */ | |
3561 | EC_HOST_EVENT_ALWAYS_REPORT_MASK, | |
3562 | ||
3563 | /* Active wake mask */ | |
3564 | EC_HOST_EVENT_ACTIVE_WAKE_MASK, | |
3565 | ||
3566 | /* Lazy wake mask for S0ix */ | |
3567 | EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX, | |
3568 | ||
3569 | /* Lazy wake mask for S3 */ | |
3570 | EC_HOST_EVENT_LAZY_WAKE_MASK_S3, | |
3571 | ||
3572 | /* Lazy wake mask for S5 */ | |
3573 | EC_HOST_EVENT_LAZY_WAKE_MASK_S5, | |
3574 | }; | |
3575 | ||
3576 | #define EC_CMD_HOST_EVENT 0x00A4 | |
3577 | ||
deaf39ef SG |
3578 | /*****************************************************************************/ |
3579 | /* Switch commands */ | |
3580 | ||
3581 | /* Enable/disable LCD backlight */ | |
ff834332 | 3582 | #define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090 |
deaf39ef SG |
3583 | |
3584 | struct ec_params_switch_enable_backlight { | |
3585 | uint8_t enabled; | |
6f72c3f9 | 3586 | } __ec_align1; |
deaf39ef SG |
3587 | |
3588 | /* Enable/disable WLAN/Bluetooth */ | |
ff834332 | 3589 | #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091 |
5271db29 | 3590 | #define EC_VER_SWITCH_ENABLE_WIRELESS 1 |
deaf39ef | 3591 | |
5271db29 BR |
3592 | /* Version 0 params; no response */ |
3593 | struct ec_params_switch_enable_wireless_v0 { | |
deaf39ef | 3594 | uint8_t enabled; |
6f72c3f9 | 3595 | } __ec_align1; |
deaf39ef | 3596 | |
5271db29 BR |
3597 | /* Version 1 params */ |
3598 | struct ec_params_switch_enable_wireless_v1 { | |
3599 | /* Flags to enable now */ | |
3600 | uint8_t now_flags; | |
3601 | ||
3602 | /* Which flags to copy from now_flags */ | |
3603 | uint8_t now_mask; | |
3604 | ||
3605 | /* | |
3606 | * Flags to leave enabled in S3, if they're on at the S0->S3 | |
3607 | * transition. (Other flags will be disabled by the S0->S3 | |
3608 | * transition.) | |
3609 | */ | |
3610 | uint8_t suspend_flags; | |
3611 | ||
3612 | /* Which flags to copy from suspend_flags */ | |
3613 | uint8_t suspend_mask; | |
6f72c3f9 | 3614 | } __ec_align1; |
5271db29 BR |
3615 | |
3616 | /* Version 1 response */ | |
3617 | struct ec_response_switch_enable_wireless_v1 { | |
3618 | /* Flags to enable now */ | |
3619 | uint8_t now_flags; | |
3620 | ||
3621 | /* Flags to leave enabled in S3 */ | |
3622 | uint8_t suspend_flags; | |
6f72c3f9 | 3623 | } __ec_align1; |
5271db29 | 3624 | |
deaf39ef SG |
3625 | /*****************************************************************************/ |
3626 | /* GPIO commands. Only available on EC if write protect has been disabled. */ | |
3627 | ||
3628 | /* Set GPIO output value */ | |
ff834332 | 3629 | #define EC_CMD_GPIO_SET 0x0092 |
deaf39ef SG |
3630 | |
3631 | struct ec_params_gpio_set { | |
3632 | char name[32]; | |
3633 | uint8_t val; | |
6f72c3f9 | 3634 | } __ec_align1; |
deaf39ef SG |
3635 | |
3636 | /* Get GPIO value */ | |
ff834332 | 3637 | #define EC_CMD_GPIO_GET 0x0093 |
deaf39ef | 3638 | |
256ab950 | 3639 | /* Version 0 of input params and response */ |
deaf39ef SG |
3640 | struct ec_params_gpio_get { |
3641 | char name[32]; | |
6f72c3f9 | 3642 | } __ec_align1; |
df95a3bd | 3643 | |
deaf39ef SG |
3644 | struct ec_response_gpio_get { |
3645 | uint8_t val; | |
6f72c3f9 | 3646 | } __ec_align1; |
deaf39ef | 3647 | |
256ab950 SB |
3648 | /* Version 1 of input params and response */ |
3649 | struct ec_params_gpio_get_v1 { | |
3650 | uint8_t subcmd; | |
3651 | union { | |
6f72c3f9 | 3652 | struct __ec_align1 { |
256ab950 SB |
3653 | char name[32]; |
3654 | } get_value_by_name; | |
6f72c3f9 | 3655 | struct __ec_align1 { |
256ab950 SB |
3656 | uint8_t index; |
3657 | } get_info; | |
3658 | }; | |
6f72c3f9 | 3659 | } __ec_align1; |
256ab950 SB |
3660 | |
3661 | struct ec_response_gpio_get_v1 { | |
3662 | union { | |
6f72c3f9 | 3663 | struct __ec_align1 { |
256ab950 SB |
3664 | uint8_t val; |
3665 | } get_value_by_name, get_count; | |
6f72c3f9 | 3666 | struct __ec_todo_unpacked { |
256ab950 SB |
3667 | uint8_t val; |
3668 | char name[32]; | |
3669 | uint32_t flags; | |
3670 | } get_info; | |
3671 | }; | |
6f72c3f9 | 3672 | } __ec_todo_packed; |
256ab950 SB |
3673 | |
3674 | enum gpio_get_subcmd { | |
3675 | EC_GPIO_GET_BY_NAME = 0, | |
3676 | EC_GPIO_GET_COUNT = 1, | |
3677 | EC_GPIO_GET_INFO = 2, | |
3678 | }; | |
3679 | ||
deaf39ef SG |
3680 | /*****************************************************************************/ |
3681 | /* I2C commands. Only available when flash write protect is unlocked. */ | |
3682 | ||
5271db29 | 3683 | /* |
df95a3bd GG |
3684 | * CAUTION: These commands are deprecated, and are not supported anymore in EC |
3685 | * builds >= 8398.0.0 (see crosbug.com/p/23570). | |
3686 | * | |
3687 | * Use EC_CMD_I2C_PASSTHRU instead. | |
5271db29 BR |
3688 | */ |
3689 | ||
deaf39ef | 3690 | /* Read I2C bus */ |
ff834332 | 3691 | #define EC_CMD_I2C_READ 0x0094 |
deaf39ef SG |
3692 | |
3693 | struct ec_params_i2c_read { | |
5271db29 | 3694 | uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ |
deaf39ef SG |
3695 | uint8_t read_size; /* Either 8 or 16. */ |
3696 | uint8_t port; | |
3697 | uint8_t offset; | |
6f72c3f9 | 3698 | } __ec_align_size1; |
df95a3bd | 3699 | |
deaf39ef SG |
3700 | struct ec_response_i2c_read { |
3701 | uint16_t data; | |
6f72c3f9 | 3702 | } __ec_align2; |
deaf39ef SG |
3703 | |
3704 | /* Write I2C bus */ | |
ff834332 | 3705 | #define EC_CMD_I2C_WRITE 0x0095 |
deaf39ef SG |
3706 | |
3707 | struct ec_params_i2c_write { | |
3708 | uint16_t data; | |
5271db29 | 3709 | uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ |
deaf39ef SG |
3710 | uint8_t write_size; /* Either 8 or 16. */ |
3711 | uint8_t port; | |
3712 | uint8_t offset; | |
6f72c3f9 | 3713 | } __ec_align_size1; |
deaf39ef SG |
3714 | |
3715 | /*****************************************************************************/ | |
3716 | /* Charge state commands. Only available when flash write protect unlocked. */ | |
3717 | ||
5271db29 BR |
3718 | /* Force charge state machine to stop charging the battery or force it to |
3719 | * discharge the battery. | |
3720 | */ | |
ff834332 | 3721 | #define EC_CMD_CHARGE_CONTROL 0x0096 |
5271db29 | 3722 | #define EC_VER_CHARGE_CONTROL 1 |
deaf39ef | 3723 | |
5271db29 BR |
3724 | enum ec_charge_control_mode { |
3725 | CHARGE_CONTROL_NORMAL = 0, | |
3726 | CHARGE_CONTROL_IDLE, | |
3727 | CHARGE_CONTROL_DISCHARGE, | |
3728 | }; | |
3729 | ||
3730 | struct ec_params_charge_control { | |
3731 | uint32_t mode; /* enum charge_control_mode */ | |
6f72c3f9 | 3732 | } __ec_align4; |
deaf39ef SG |
3733 | |
3734 | /*****************************************************************************/ | |
deaf39ef SG |
3735 | |
3736 | /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */ | |
ff834332 | 3737 | #define EC_CMD_CONSOLE_SNAPSHOT 0x0097 |
deaf39ef SG |
3738 | |
3739 | /* | |
0aa877c5 NB |
3740 | * Read data from the saved snapshot. If the subcmd parameter is |
3741 | * CONSOLE_READ_NEXT, this will return data starting from the beginning of | |
3742 | * the latest snapshot. If it is CONSOLE_READ_RECENT, it will start from the | |
3743 | * end of the previous snapshot. | |
3744 | * | |
3745 | * The params are only looked at in version >= 1 of this command. Prior | |
3746 | * versions will just default to CONSOLE_READ_NEXT behavior. | |
deaf39ef SG |
3747 | * |
3748 | * Response is null-terminated string. Empty string, if there is no more | |
3749 | * remaining output. | |
3750 | */ | |
ff834332 | 3751 | #define EC_CMD_CONSOLE_READ 0x0098 |
deaf39ef | 3752 | |
0aa877c5 NB |
3753 | enum ec_console_read_subcmd { |
3754 | CONSOLE_READ_NEXT = 0, | |
3755 | CONSOLE_READ_RECENT | |
3756 | }; | |
3757 | ||
3758 | struct ec_params_console_read_v1 { | |
3759 | uint8_t subcmd; /* enum ec_console_read_subcmd */ | |
6f72c3f9 | 3760 | } __ec_align1; |
0aa877c5 | 3761 | |
deaf39ef SG |
3762 | /*****************************************************************************/ |
3763 | ||
3764 | /* | |
256ab950 | 3765 | * Cut off battery power immediately or after the host has shut down. |
deaf39ef | 3766 | * |
256ab950 SB |
3767 | * return EC_RES_INVALID_COMMAND if unsupported by a board/battery. |
3768 | * EC_RES_SUCCESS if the command was successful. | |
3769 | * EC_RES_ERROR if the cut off command failed. | |
deaf39ef | 3770 | */ |
ff834332 | 3771 | #define EC_CMD_BATTERY_CUT_OFF 0x0099 |
deaf39ef | 3772 | |
9e816560 | 3773 | #define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN BIT(0) |
256ab950 SB |
3774 | |
3775 | struct ec_params_battery_cutoff { | |
3776 | uint8_t flags; | |
6f72c3f9 | 3777 | } __ec_align1; |
256ab950 | 3778 | |
deaf39ef | 3779 | /*****************************************************************************/ |
5271db29 | 3780 | /* USB port mux control. */ |
deaf39ef SG |
3781 | |
3782 | /* | |
5271db29 BR |
3783 | * Switch USB mux or return to automatic switching. |
3784 | */ | |
ff834332 | 3785 | #define EC_CMD_USB_MUX 0x009A |
5271db29 BR |
3786 | |
3787 | struct ec_params_usb_mux { | |
3788 | uint8_t mux; | |
6f72c3f9 | 3789 | } __ec_align1; |
5271db29 BR |
3790 | |
3791 | /*****************************************************************************/ | |
3792 | /* LDOs / FETs control. */ | |
3793 | ||
3794 | enum ec_ldo_state { | |
3795 | EC_LDO_STATE_OFF = 0, /* the LDO / FET is shut down */ | |
3796 | EC_LDO_STATE_ON = 1, /* the LDO / FET is ON / providing power */ | |
3797 | }; | |
3798 | ||
3799 | /* | |
3800 | * Switch on/off a LDO. | |
3801 | */ | |
ff834332 | 3802 | #define EC_CMD_LDO_SET 0x009B |
5271db29 BR |
3803 | |
3804 | struct ec_params_ldo_set { | |
3805 | uint8_t index; | |
3806 | uint8_t state; | |
6f72c3f9 | 3807 | } __ec_align1; |
5271db29 BR |
3808 | |
3809 | /* | |
3810 | * Get LDO state. | |
3811 | */ | |
ff834332 | 3812 | #define EC_CMD_LDO_GET 0x009C |
5271db29 BR |
3813 | |
3814 | struct ec_params_ldo_get { | |
3815 | uint8_t index; | |
6f72c3f9 | 3816 | } __ec_align1; |
5271db29 BR |
3817 | |
3818 | struct ec_response_ldo_get { | |
3819 | uint8_t state; | |
6f72c3f9 | 3820 | } __ec_align1; |
5271db29 BR |
3821 | |
3822 | /*****************************************************************************/ | |
3823 | /* Power info. */ | |
3824 | ||
3825 | /* | |
3826 | * Get power info. | |
3827 | */ | |
ff834332 | 3828 | #define EC_CMD_POWER_INFO 0x009D |
5271db29 BR |
3829 | |
3830 | struct ec_response_power_info { | |
3831 | uint32_t usb_dev_type; | |
3832 | uint16_t voltage_ac; | |
3833 | uint16_t voltage_system; | |
3834 | uint16_t current_system; | |
3835 | uint16_t usb_current_limit; | |
6f72c3f9 | 3836 | } __ec_align4; |
5271db29 BR |
3837 | |
3838 | /*****************************************************************************/ | |
3839 | /* I2C passthru command */ | |
3840 | ||
ff834332 | 3841 | #define EC_CMD_I2C_PASSTHRU 0x009E |
5271db29 | 3842 | |
5271db29 | 3843 | /* Read data; if not present, message is a write */ |
9e816560 | 3844 | #define EC_I2C_FLAG_READ BIT(15) |
5271db29 BR |
3845 | |
3846 | /* Mask for address */ | |
3847 | #define EC_I2C_ADDR_MASK 0x3ff | |
3848 | ||
9e816560 GG |
3849 | #define EC_I2C_STATUS_NAK BIT(0) /* Transfer was not acknowledged */ |
3850 | #define EC_I2C_STATUS_TIMEOUT BIT(1) /* Timeout during transfer */ | |
5271db29 BR |
3851 | |
3852 | /* Any error */ | |
3853 | #define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT) | |
3854 | ||
3855 | struct ec_params_i2c_passthru_msg { | |
3856 | uint16_t addr_flags; /* I2C slave address (7 or 10 bits) and flags */ | |
3857 | uint16_t len; /* Number of bytes to read or write */ | |
6f72c3f9 | 3858 | } __ec_align2; |
5271db29 BR |
3859 | |
3860 | struct ec_params_i2c_passthru { | |
3861 | uint8_t port; /* I2C port number */ | |
3862 | uint8_t num_msgs; /* Number of messages */ | |
3863 | struct ec_params_i2c_passthru_msg msg[]; | |
3864 | /* Data to write for all messages is concatenated here */ | |
6f72c3f9 | 3865 | } __ec_align2; |
5271db29 BR |
3866 | |
3867 | struct ec_response_i2c_passthru { | |
3868 | uint8_t i2c_status; /* Status flags (EC_I2C_STATUS_...) */ | |
3869 | uint8_t num_msgs; /* Number of messages processed */ | |
3870 | uint8_t data[]; /* Data read by messages concatenated here */ | |
6f72c3f9 | 3871 | } __ec_align1; |
5271db29 BR |
3872 | |
3873 | /*****************************************************************************/ | |
3874 | /* Power button hang detect */ | |
3875 | ||
ff834332 | 3876 | #define EC_CMD_HANG_DETECT 0x009F |
5271db29 BR |
3877 | |
3878 | /* Reasons to start hang detection timer */ | |
3879 | /* Power button pressed */ | |
9e816560 | 3880 | #define EC_HANG_START_ON_POWER_PRESS BIT(0) |
5271db29 BR |
3881 | |
3882 | /* Lid closed */ | |
9e816560 | 3883 | #define EC_HANG_START_ON_LID_CLOSE BIT(1) |
5271db29 BR |
3884 | |
3885 | /* Lid opened */ | |
9e816560 | 3886 | #define EC_HANG_START_ON_LID_OPEN BIT(2) |
5271db29 BR |
3887 | |
3888 | /* Start of AP S3->S0 transition (booting or resuming from suspend) */ | |
9e816560 | 3889 | #define EC_HANG_START_ON_RESUME BIT(3) |
5271db29 BR |
3890 | |
3891 | /* Reasons to cancel hang detection */ | |
3892 | ||
3893 | /* Power button released */ | |
9e816560 | 3894 | #define EC_HANG_STOP_ON_POWER_RELEASE BIT(8) |
5271db29 BR |
3895 | |
3896 | /* Any host command from AP received */ | |
9e816560 | 3897 | #define EC_HANG_STOP_ON_HOST_COMMAND BIT(9) |
5271db29 BR |
3898 | |
3899 | /* Stop on end of AP S0->S3 transition (suspending or shutting down) */ | |
9e816560 | 3900 | #define EC_HANG_STOP_ON_SUSPEND BIT(10) |
5271db29 BR |
3901 | |
3902 | /* | |
3903 | * If this flag is set, all the other fields are ignored, and the hang detect | |
3904 | * timer is started. This provides the AP a way to start the hang timer | |
3905 | * without reconfiguring any of the other hang detect settings. Note that | |
3906 | * you must previously have configured the timeouts. | |
3907 | */ | |
9e816560 | 3908 | #define EC_HANG_START_NOW BIT(30) |
5271db29 BR |
3909 | |
3910 | /* | |
3911 | * If this flag is set, all the other fields are ignored (including | |
3912 | * EC_HANG_START_NOW). This provides the AP a way to stop the hang timer | |
3913 | * without reconfiguring any of the other hang detect settings. | |
deaf39ef | 3914 | */ |
9e816560 | 3915 | #define EC_HANG_STOP_NOW BIT(31) |
5271db29 BR |
3916 | |
3917 | struct ec_params_hang_detect { | |
3918 | /* Flags; see EC_HANG_* */ | |
3919 | uint32_t flags; | |
3920 | ||
3921 | /* Timeout in msec before generating host event, if enabled */ | |
3922 | uint16_t host_event_timeout_msec; | |
3923 | ||
3924 | /* Timeout in msec before generating warm reboot, if enabled */ | |
3925 | uint16_t warm_reboot_timeout_msec; | |
6f72c3f9 | 3926 | } __ec_align4; |
5271db29 BR |
3927 | |
3928 | /*****************************************************************************/ | |
3929 | /* Commands for battery charging */ | |
3930 | ||
3931 | /* | |
3932 | * This is the single catch-all host command to exchange data regarding the | |
3933 | * charge state machine (v2 and up). | |
3934 | */ | |
ff834332 | 3935 | #define EC_CMD_CHARGE_STATE 0x00A0 |
5271db29 BR |
3936 | |
3937 | /* Subcommands for this host command */ | |
3938 | enum charge_state_command { | |
3939 | CHARGE_STATE_CMD_GET_STATE, | |
3940 | CHARGE_STATE_CMD_GET_PARAM, | |
3941 | CHARGE_STATE_CMD_SET_PARAM, | |
3942 | CHARGE_STATE_NUM_CMDS | |
3943 | }; | |
3944 | ||
3945 | /* | |
3946 | * Known param numbers are defined here. Ranges are reserved for board-specific | |
3947 | * params, which are handled by the particular implementations. | |
3948 | */ | |
3949 | enum charge_state_params { | |
3950 | CS_PARAM_CHG_VOLTAGE, /* charger voltage limit */ | |
3951 | CS_PARAM_CHG_CURRENT, /* charger current limit */ | |
3952 | CS_PARAM_CHG_INPUT_CURRENT, /* charger input current limit */ | |
3953 | CS_PARAM_CHG_STATUS, /* charger-specific status */ | |
3954 | CS_PARAM_CHG_OPTION, /* charger-specific options */ | |
e16efdf1 GG |
3955 | CS_PARAM_LIMIT_POWER, /* |
3956 | * Check if power is limited due to | |
3957 | * low battery and / or a weak external | |
3958 | * charger. READ ONLY. | |
3959 | */ | |
5271db29 BR |
3960 | /* How many so far? */ |
3961 | CS_NUM_BASE_PARAMS, | |
3962 | ||
3963 | /* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */ | |
3964 | CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000, | |
3965 | CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff, | |
3966 | ||
e16efdf1 GG |
3967 | /* Range for CONFIG_CHARGE_STATE_DEBUG params */ |
3968 | CS_PARAM_DEBUG_MIN = 0x20000, | |
3969 | CS_PARAM_DEBUG_CTL_MODE = 0x20000, | |
3970 | CS_PARAM_DEBUG_MANUAL_MODE, | |
3971 | CS_PARAM_DEBUG_SEEMS_DEAD, | |
3972 | CS_PARAM_DEBUG_SEEMS_DISCONNECTED, | |
3973 | CS_PARAM_DEBUG_BATT_REMOVED, | |
3974 | CS_PARAM_DEBUG_MANUAL_CURRENT, | |
3975 | CS_PARAM_DEBUG_MANUAL_VOLTAGE, | |
3976 | CS_PARAM_DEBUG_MAX = 0x2ffff, | |
3977 | ||
5271db29 BR |
3978 | /* Other custom param ranges go here... */ |
3979 | }; | |
3980 | ||
3981 | struct ec_params_charge_state { | |
3982 | uint8_t cmd; /* enum charge_state_command */ | |
3983 | union { | |
fd3bbf4a | 3984 | /* get_state has no args */ |
5271db29 | 3985 | |
6f72c3f9 | 3986 | struct __ec_todo_unpacked { |
5271db29 BR |
3987 | uint32_t param; /* enum charge_state_param */ |
3988 | } get_param; | |
3989 | ||
6f72c3f9 | 3990 | struct __ec_todo_unpacked { |
5271db29 BR |
3991 | uint32_t param; /* param to set */ |
3992 | uint32_t value; /* value to set */ | |
3993 | } set_param; | |
3994 | }; | |
6f72c3f9 | 3995 | } __ec_todo_packed; |
5271db29 BR |
3996 | |
3997 | struct ec_response_charge_state { | |
3998 | union { | |
6f72c3f9 | 3999 | struct __ec_align4 { |
5271db29 BR |
4000 | int ac; |
4001 | int chg_voltage; | |
4002 | int chg_current; | |
4003 | int chg_input_current; | |
4004 | int batt_state_of_charge; | |
4005 | } get_state; | |
4006 | ||
6f72c3f9 | 4007 | struct __ec_align4 { |
5271db29 BR |
4008 | uint32_t value; |
4009 | } get_param; | |
fd3bbf4a GG |
4010 | |
4011 | /* set_param returns no args */ | |
5271db29 | 4012 | }; |
6f72c3f9 | 4013 | } __ec_align4; |
5271db29 | 4014 | |
deaf39ef SG |
4015 | |
4016 | /* | |
4017 | * Set maximum battery charging current. | |
4018 | */ | |
ff834332 | 4019 | #define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1 |
deaf39ef SG |
4020 | |
4021 | struct ec_params_current_limit { | |
5271db29 | 4022 | uint32_t limit; /* in mA */ |
6f72c3f9 | 4023 | } __ec_align4; |
5271db29 BR |
4024 | |
4025 | /* | |
06635894 | 4026 | * Set maximum external voltage / current. |
5271db29 | 4027 | */ |
06635894 | 4028 | #define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2 |
5271db29 | 4029 | |
06635894 SN |
4030 | /* Command v0 is used only on Spring and is obsolete + unsupported */ |
4031 | struct ec_params_external_power_limit_v1 { | |
4032 | uint16_t current_lim; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */ | |
4033 | uint16_t voltage_lim; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */ | |
6f72c3f9 | 4034 | } __ec_align2; |
5271db29 | 4035 | |
06635894 SN |
4036 | #define EC_POWER_LIMIT_NONE 0xffff |
4037 | ||
e16efdf1 GG |
4038 | /* |
4039 | * Set maximum voltage & current of a dedicated charge port | |
4040 | */ | |
4041 | #define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3 | |
4042 | ||
4043 | struct ec_params_dedicated_charger_limit { | |
4044 | uint16_t current_lim; /* in mA */ | |
4045 | uint16_t voltage_lim; /* in mV */ | |
4046 | } __ec_align2; | |
4047 | ||
f00c06fd | 4048 | /* Inform the EC when entering a sleep state */ |
ff834332 | 4049 | #define EC_CMD_HOST_SLEEP_EVENT 0x00A9 |
f00c06fd SN |
4050 | |
4051 | enum host_sleep_event { | |
4052 | HOST_SLEEP_EVENT_S3_SUSPEND = 1, | |
4053 | HOST_SLEEP_EVENT_S3_RESUME = 2, | |
4054 | HOST_SLEEP_EVENT_S0IX_SUSPEND = 3, | |
4055 | HOST_SLEEP_EVENT_S0IX_RESUME = 4 | |
4056 | }; | |
4057 | ||
4058 | struct ec_params_host_sleep_event { | |
4059 | uint8_t sleep_event; | |
6f72c3f9 | 4060 | } __ec_align1; |
f00c06fd | 4061 | |
afe2bb5c EG |
4062 | /* |
4063 | * Use a default timeout value (CONFIG_SLEEP_TIMEOUT_MS) for detecting sleep | |
4064 | * transition failures | |
4065 | */ | |
4066 | #define EC_HOST_SLEEP_TIMEOUT_DEFAULT 0 | |
4067 | ||
4068 | /* Disable timeout detection for this sleep transition */ | |
4069 | #define EC_HOST_SLEEP_TIMEOUT_INFINITE 0xFFFF | |
4070 | ||
4071 | struct ec_params_host_sleep_event_v1 { | |
4072 | /* The type of sleep being entered or exited. */ | |
4073 | uint8_t sleep_event; | |
4074 | ||
4075 | /* Padding */ | |
4076 | uint8_t reserved; | |
4077 | union { | |
4078 | /* Parameters that apply for suspend messages. */ | |
4079 | struct { | |
4080 | /* | |
4081 | * The timeout in milliseconds between when this message | |
4082 | * is received and when the EC will declare sleep | |
4083 | * transition failure if the sleep signal is not | |
4084 | * asserted. | |
4085 | */ | |
4086 | uint16_t sleep_timeout_ms; | |
4087 | } suspend_params; | |
4088 | ||
4089 | /* No parameters for non-suspend messages. */ | |
4090 | }; | |
6f72c3f9 | 4091 | } __ec_align2; |
afe2bb5c EG |
4092 | |
4093 | /* A timeout occurred when this bit is set */ | |
4094 | #define EC_HOST_RESUME_SLEEP_TIMEOUT 0x80000000 | |
4095 | ||
4096 | /* | |
4097 | * The mask defining which bits correspond to the number of sleep transitions, | |
4098 | * as well as the maximum number of suspend line transitions that will be | |
4099 | * reported back to the host. | |
4100 | */ | |
4101 | #define EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK 0x7FFFFFFF | |
4102 | ||
4103 | struct ec_response_host_sleep_event_v1 { | |
4104 | union { | |
4105 | /* Response fields that apply for resume messages. */ | |
4106 | struct { | |
4107 | /* | |
4108 | * The number of sleep power signal transitions that | |
4109 | * occurred since the suspend message. The high bit | |
4110 | * indicates a timeout occurred. | |
4111 | */ | |
4112 | uint32_t sleep_transitions; | |
4113 | } resume_response; | |
4114 | ||
4115 | /* No response fields for non-resume messages. */ | |
4116 | }; | |
6f72c3f9 | 4117 | } __ec_align4; |
afe2bb5c | 4118 | |
5271db29 BR |
4119 | /*****************************************************************************/ |
4120 | /* Smart battery pass-through */ | |
4121 | ||
4122 | /* Get / Set 16-bit smart battery registers */ | |
ff834332 GG |
4123 | #define EC_CMD_SB_READ_WORD 0x00B0 |
4124 | #define EC_CMD_SB_WRITE_WORD 0x00B1 | |
5271db29 BR |
4125 | |
4126 | /* Get / Set string smart battery parameters | |
4127 | * formatted as SMBUS "block". | |
4128 | */ | |
ff834332 GG |
4129 | #define EC_CMD_SB_READ_BLOCK 0x00B2 |
4130 | #define EC_CMD_SB_WRITE_BLOCK 0x00B3 | |
5271db29 BR |
4131 | |
4132 | struct ec_params_sb_rd { | |
4133 | uint8_t reg; | |
6f72c3f9 | 4134 | } __ec_align1; |
5271db29 BR |
4135 | |
4136 | struct ec_response_sb_rd_word { | |
4137 | uint16_t value; | |
6f72c3f9 | 4138 | } __ec_align2; |
5271db29 BR |
4139 | |
4140 | struct ec_params_sb_wr_word { | |
4141 | uint8_t reg; | |
4142 | uint16_t value; | |
6f72c3f9 | 4143 | } __ec_align1; |
5271db29 BR |
4144 | |
4145 | struct ec_response_sb_rd_block { | |
4146 | uint8_t data[32]; | |
6f72c3f9 | 4147 | } __ec_align1; |
5271db29 BR |
4148 | |
4149 | struct ec_params_sb_wr_block { | |
4150 | uint8_t reg; | |
4151 | uint16_t data[32]; | |
6f72c3f9 | 4152 | } __ec_align1; |
deaf39ef | 4153 | |
256ab950 SB |
4154 | /*****************************************************************************/ |
4155 | /* Battery vendor parameters | |
4156 | * | |
4157 | * Get or set vendor-specific parameters in the battery. Implementations may | |
4158 | * differ between boards or batteries. On a set operation, the response | |
4159 | * contains the actual value set, which may be rounded or clipped from the | |
4160 | * requested value. | |
4161 | */ | |
4162 | ||
ff834332 | 4163 | #define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4 |
256ab950 SB |
4164 | |
4165 | enum ec_battery_vendor_param_mode { | |
4166 | BATTERY_VENDOR_PARAM_MODE_GET = 0, | |
4167 | BATTERY_VENDOR_PARAM_MODE_SET, | |
4168 | }; | |
4169 | ||
4170 | struct ec_params_battery_vendor_param { | |
4171 | uint32_t param; | |
4172 | uint32_t value; | |
4173 | uint8_t mode; | |
6f72c3f9 | 4174 | } __ec_align_size1; |
256ab950 SB |
4175 | |
4176 | struct ec_response_battery_vendor_param { | |
4177 | uint32_t value; | |
6f72c3f9 | 4178 | } __ec_align4; |
256ab950 | 4179 | |
c1f3375b | 4180 | /*****************************************************************************/ |
e849b874 GG |
4181 | /* |
4182 | * HDMI CEC commands | |
4183 | * | |
4184 | * These commands are for sending and receiving message via HDMI CEC | |
4185 | */ | |
4186 | ||
4187 | #define MAX_CEC_MSG_LEN 16 | |
4188 | ||
4189 | /* CEC message from the AP to be written on the CEC bus */ | |
4190 | #define EC_CMD_CEC_WRITE_MSG 0x00B8 | |
4191 | ||
4192 | /** | |
4193 | * struct ec_params_cec_write - Message to write to the CEC bus | |
4194 | * @msg: message content to write to the CEC bus | |
4195 | */ | |
4196 | struct ec_params_cec_write { | |
4197 | uint8_t msg[MAX_CEC_MSG_LEN]; | |
4198 | } __ec_align1; | |
4199 | ||
4200 | /* Set various CEC parameters */ | |
4201 | #define EC_CMD_CEC_SET 0x00BA | |
4202 | ||
4203 | /** | |
4204 | * struct ec_params_cec_set - CEC parameters set | |
4205 | * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS | |
4206 | * @val: in case cmd is CEC_CMD_ENABLE, this field can be 0 to disable CEC | |
4207 | * or 1 to enable CEC functionality, in case cmd is | |
4208 | * CEC_CMD_LOGICAL_ADDRESS, this field encodes the requested logical | |
4209 | * address between 0 and 15 or 0xff to unregister | |
4210 | */ | |
4211 | struct ec_params_cec_set { | |
4212 | uint8_t cmd; /* enum cec_command */ | |
4213 | uint8_t val; | |
4214 | } __ec_align1; | |
4215 | ||
4216 | /* Read various CEC parameters */ | |
4217 | #define EC_CMD_CEC_GET 0x00BB | |
4218 | ||
4219 | /** | |
4220 | * struct ec_params_cec_get - CEC parameters get | |
4221 | * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS | |
4222 | */ | |
4223 | struct ec_params_cec_get { | |
4224 | uint8_t cmd; /* enum cec_command */ | |
4225 | } __ec_align1; | |
4226 | ||
4227 | /** | |
4228 | * struct ec_response_cec_get - CEC parameters get response | |
4229 | * @val: in case cmd was CEC_CMD_ENABLE, this field will 0 if CEC is | |
4230 | * disabled or 1 if CEC functionality is enabled, | |
4231 | * in case cmd was CEC_CMD_LOGICAL_ADDRESS, this will encode the | |
4232 | * configured logical address between 0 and 15 or 0xff if unregistered | |
4233 | */ | |
4234 | struct ec_response_cec_get { | |
4235 | uint8_t val; | |
4236 | } __ec_align1; | |
4237 | ||
4238 | /* CEC parameters command */ | |
4239 | enum cec_command { | |
4240 | /* CEC reading, writing and events enable */ | |
4241 | CEC_CMD_ENABLE, | |
4242 | /* CEC logical address */ | |
4243 | CEC_CMD_LOGICAL_ADDRESS, | |
4244 | }; | |
4245 | ||
4246 | /* Events from CEC to AP */ | |
4247 | enum mkbp_cec_event { | |
4248 | /* Outgoing message was acknowledged by a follower */ | |
4249 | EC_MKBP_CEC_SEND_OK = BIT(0), | |
4250 | /* Outgoing message was not acknowledged */ | |
4251 | EC_MKBP_CEC_SEND_FAILED = BIT(1), | |
4252 | }; | |
4253 | ||
4254 | /*****************************************************************************/ | |
4255 | ||
c1f3375b CYC |
4256 | /* Commands for I2S recording on audio codec. */ |
4257 | ||
4258 | #define EC_CMD_CODEC_I2S 0x00BC | |
4259 | ||
4260 | enum ec_codec_i2s_subcmd { | |
4261 | EC_CODEC_SET_SAMPLE_DEPTH = 0x0, | |
4262 | EC_CODEC_SET_GAIN = 0x1, | |
4263 | EC_CODEC_GET_GAIN = 0x2, | |
4264 | EC_CODEC_I2S_ENABLE = 0x3, | |
4265 | EC_CODEC_I2S_SET_CONFIG = 0x4, | |
4266 | EC_CODEC_I2S_SET_TDM_CONFIG = 0x5, | |
4267 | EC_CODEC_I2S_SET_BCLK = 0x6, | |
4268 | }; | |
4269 | ||
4270 | enum ec_sample_depth_value { | |
4271 | EC_CODEC_SAMPLE_DEPTH_16 = 0, | |
4272 | EC_CODEC_SAMPLE_DEPTH_24 = 1, | |
4273 | }; | |
4274 | ||
4275 | enum ec_i2s_config { | |
4276 | EC_DAI_FMT_I2S = 0, | |
4277 | EC_DAI_FMT_RIGHT_J = 1, | |
4278 | EC_DAI_FMT_LEFT_J = 2, | |
4279 | EC_DAI_FMT_PCM_A = 3, | |
4280 | EC_DAI_FMT_PCM_B = 4, | |
4281 | EC_DAI_FMT_PCM_TDM = 5, | |
4282 | }; | |
4283 | ||
6f72c3f9 | 4284 | struct __ec_todo_packed ec_param_codec_i2s { |
df95a3bd | 4285 | /* enum ec_codec_i2s_subcmd */ |
c1f3375b CYC |
4286 | uint8_t cmd; |
4287 | union { | |
4288 | /* | |
4289 | * EC_CODEC_SET_SAMPLE_DEPTH | |
4290 | * Value should be one of ec_sample_depth_value. | |
4291 | */ | |
4292 | uint8_t depth; | |
4293 | ||
4294 | /* | |
4295 | * EC_CODEC_SET_GAIN | |
4296 | * Value should be 0~43 for both channels. | |
4297 | */ | |
6f72c3f9 | 4298 | struct __ec_align1 ec_param_codec_i2s_set_gain { |
c1f3375b CYC |
4299 | uint8_t left; |
4300 | uint8_t right; | |
6f72c3f9 | 4301 | } gain; |
c1f3375b CYC |
4302 | |
4303 | /* | |
4304 | * EC_CODEC_I2S_ENABLE | |
4305 | * 1 to enable, 0 to disable. | |
4306 | */ | |
4307 | uint8_t i2s_enable; | |
4308 | ||
4309 | /* | |
4310 | * EC_CODEC_I2S_SET_COFNIG | |
4311 | * Value should be one of ec_i2s_config. | |
4312 | */ | |
4313 | uint8_t i2s_config; | |
4314 | ||
4315 | /* | |
4316 | * EC_CODEC_I2S_SET_TDM_CONFIG | |
4317 | * Value should be one of ec_i2s_config. | |
4318 | */ | |
6f72c3f9 | 4319 | struct __ec_todo_unpacked ec_param_codec_i2s_tdm { |
c1f3375b CYC |
4320 | /* |
4321 | * 0 to 496 | |
4322 | */ | |
4323 | int16_t ch0_delay; | |
4324 | /* | |
4325 | * -1 to 496 | |
4326 | */ | |
4327 | int16_t ch1_delay; | |
4328 | uint8_t adjacent_to_ch0; | |
4329 | uint8_t adjacent_to_ch1; | |
6f72c3f9 | 4330 | } tdm_param; |
c1f3375b CYC |
4331 | |
4332 | /* | |
4333 | * EC_CODEC_I2S_SET_BCLK | |
4334 | */ | |
4335 | uint32_t bclk; | |
4336 | }; | |
6f72c3f9 | 4337 | }; |
c1f3375b CYC |
4338 | |
4339 | /* | |
4340 | * For subcommand EC_CODEC_GET_GAIN. | |
4341 | */ | |
4342 | struct ec_response_codec_gain { | |
4343 | uint8_t left; | |
4344 | uint8_t right; | |
6f72c3f9 | 4345 | } __ec_align1; |
c1f3375b | 4346 | |
deaf39ef SG |
4347 | /*****************************************************************************/ |
4348 | /* System commands */ | |
4349 | ||
4350 | /* | |
5271db29 BR |
4351 | * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't |
4352 | * necessarily reboot the EC. Rename to "image" or something similar? | |
deaf39ef | 4353 | */ |
ff834332 | 4354 | #define EC_CMD_REBOOT_EC 0x00D2 |
deaf39ef SG |
4355 | |
4356 | /* Command */ | |
4357 | enum ec_reboot_cmd { | |
4358 | EC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */ | |
4359 | EC_REBOOT_JUMP_RO = 1, /* Jump to RO without rebooting */ | |
df95a3bd | 4360 | EC_REBOOT_JUMP_RW = 2, /* Jump to active RW without rebooting */ |
deaf39ef SG |
4361 | /* (command 3 was jump to RW-B) */ |
4362 | EC_REBOOT_COLD = 4, /* Cold-reboot */ | |
4363 | EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */ | |
4364 | EC_REBOOT_HIBERNATE = 6 /* Hibernate EC */ | |
4365 | }; | |
4366 | ||
4367 | /* Flags for ec_params_reboot_ec.reboot_flags */ | |
9e816560 GG |
4368 | #define EC_REBOOT_FLAG_RESERVED0 BIT(0) /* Was recovery request */ |
4369 | #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN BIT(1) /* Reboot after AP shutdown */ | |
deaf39ef SG |
4370 | |
4371 | struct ec_params_reboot_ec { | |
4372 | uint8_t cmd; /* enum ec_reboot_cmd */ | |
4373 | uint8_t flags; /* See EC_REBOOT_FLAG_* */ | |
6f72c3f9 | 4374 | } __ec_align1; |
deaf39ef SG |
4375 | |
4376 | /* | |
4377 | * Get information on last EC panic. | |
4378 | * | |
4379 | * Returns variable-length platform-dependent panic information. See panic.h | |
4380 | * for details. | |
4381 | */ | |
ff834332 | 4382 | #define EC_CMD_GET_PANIC_INFO 0x00D3 |
deaf39ef | 4383 | |
deaf39ef SG |
4384 | /*****************************************************************************/ |
4385 | /* | |
4386 | * Special commands | |
4387 | * | |
4388 | * These do not follow the normal rules for commands. See each command for | |
4389 | * details. | |
4390 | */ | |
4391 | ||
4392 | /* | |
4393 | * Reboot NOW | |
4394 | * | |
4395 | * This command will work even when the EC LPC interface is busy, because the | |
4396 | * reboot command is processed at interrupt level. Note that when the EC | |
4397 | * reboots, the host will reboot too, so there is no response to this command. | |
4398 | * | |
4399 | * Use EC_CMD_REBOOT_EC to reboot the EC more politely. | |
4400 | */ | |
ff834332 | 4401 | #define EC_CMD_REBOOT 0x00D1 /* Think "die" */ |
deaf39ef SG |
4402 | |
4403 | /* | |
4404 | * Resend last response (not supported on LPC). | |
4405 | * | |
4406 | * Returns EC_RES_UNAVAILABLE if there is no response available - for example, | |
4407 | * there was no previous command, or the previous command's response was too | |
4408 | * big to save. | |
4409 | */ | |
ff834332 | 4410 | #define EC_CMD_RESEND_RESPONSE 0x00DB |
deaf39ef SG |
4411 | |
4412 | /* | |
4413 | * This header byte on a command indicate version 0. Any header byte less | |
4414 | * than this means that we are talking to an old EC which doesn't support | |
4415 | * versioning. In that case, we assume version 0. | |
4416 | * | |
4417 | * Header bytes greater than this indicate a later version. For example, | |
4418 | * EC_CMD_VERSION0 + 1 means we are using version 1. | |
4419 | * | |
5271db29 | 4420 | * The old EC interface must not use commands 0xdc or higher. |
deaf39ef | 4421 | */ |
ff834332 | 4422 | #define EC_CMD_VERSION0 0x00DC |
deaf39ef | 4423 | |
256ab950 SB |
4424 | /*****************************************************************************/ |
4425 | /* | |
4426 | * PD commands | |
4427 | * | |
4428 | * These commands are for PD MCU communication. | |
4429 | */ | |
4430 | ||
4431 | /* EC to PD MCU exchange status command */ | |
ff834332 | 4432 | #define EC_CMD_PD_EXCHANGE_STATUS 0x0100 |
e16efdf1 GG |
4433 | #define EC_VER_PD_EXCHANGE_STATUS 2 |
4434 | ||
4435 | enum pd_charge_state { | |
4436 | PD_CHARGE_NO_CHANGE = 0, /* Don't change charge state */ | |
4437 | PD_CHARGE_NONE, /* No charging allowed */ | |
4438 | PD_CHARGE_5V, /* 5V charging only */ | |
4439 | PD_CHARGE_MAX /* Charge at max voltage */ | |
4440 | }; | |
256ab950 SB |
4441 | |
4442 | /* Status of EC being sent to PD */ | |
e16efdf1 GG |
4443 | #define EC_STATUS_HIBERNATING BIT(0) |
4444 | ||
256ab950 | 4445 | struct ec_params_pd_status { |
e16efdf1 GG |
4446 | uint8_t status; /* EC status */ |
4447 | int8_t batt_soc; /* battery state of charge */ | |
4448 | uint8_t charge_state; /* charging state (from enum pd_charge_state) */ | |
6f72c3f9 | 4449 | } __ec_align1; |
256ab950 SB |
4450 | |
4451 | /* Status of PD being sent back to EC */ | |
e16efdf1 GG |
4452 | #define PD_STATUS_HOST_EVENT BIT(0) /* Forward host event to AP */ |
4453 | #define PD_STATUS_IN_RW BIT(1) /* Running RW image */ | |
4454 | #define PD_STATUS_JUMPED_TO_IMAGE BIT(2) /* Current image was jumped to */ | |
4455 | #define PD_STATUS_TCPC_ALERT_0 BIT(3) /* Alert active in port 0 TCPC */ | |
4456 | #define PD_STATUS_TCPC_ALERT_1 BIT(4) /* Alert active in port 1 TCPC */ | |
4457 | #define PD_STATUS_TCPC_ALERT_2 BIT(5) /* Alert active in port 2 TCPC */ | |
4458 | #define PD_STATUS_TCPC_ALERT_3 BIT(6) /* Alert active in port 3 TCPC */ | |
4459 | #define PD_STATUS_EC_INT_ACTIVE (PD_STATUS_TCPC_ALERT_0 | \ | |
4460 | PD_STATUS_TCPC_ALERT_1 | \ | |
4461 | PD_STATUS_HOST_EVENT) | |
256ab950 | 4462 | struct ec_response_pd_status { |
e16efdf1 GG |
4463 | uint32_t curr_lim_ma; /* input current limit */ |
4464 | uint16_t status; /* PD MCU status */ | |
4465 | int8_t active_charge_port; /* active charging port */ | |
6f72c3f9 | 4466 | } __ec_align_size1; |
256ab950 | 4467 | |
e16efdf1 GG |
4468 | /* AP to PD MCU host event status command, cleared on read */ |
4469 | #define EC_CMD_PD_HOST_EVENT_STATUS 0x0104 | |
4470 | ||
4471 | /* PD MCU host event status bits */ | |
4472 | #define PD_EVENT_UPDATE_DEVICE BIT(0) | |
4473 | #define PD_EVENT_POWER_CHANGE BIT(1) | |
4474 | #define PD_EVENT_IDENTITY_RECEIVED BIT(2) | |
4475 | #define PD_EVENT_DATA_SWAP BIT(3) | |
4476 | struct ec_response_host_event_status { | |
4477 | uint32_t status; /* PD MCU host event status */ | |
4478 | } __ec_align4; | |
4479 | ||
256ab950 | 4480 | /* Set USB type-C port role and muxes */ |
ff834332 | 4481 | #define EC_CMD_USB_PD_CONTROL 0x0101 |
256ab950 SB |
4482 | |
4483 | enum usb_pd_control_role { | |
4484 | USB_PD_CTRL_ROLE_NO_CHANGE = 0, | |
4485 | USB_PD_CTRL_ROLE_TOGGLE_ON = 1, /* == AUTO */ | |
4486 | USB_PD_CTRL_ROLE_TOGGLE_OFF = 2, | |
4487 | USB_PD_CTRL_ROLE_FORCE_SINK = 3, | |
4488 | USB_PD_CTRL_ROLE_FORCE_SOURCE = 4, | |
e16efdf1 GG |
4489 | USB_PD_CTRL_ROLE_FREEZE = 5, |
4490 | USB_PD_CTRL_ROLE_COUNT | |
256ab950 SB |
4491 | }; |
4492 | ||
4493 | enum usb_pd_control_mux { | |
4494 | USB_PD_CTRL_MUX_NO_CHANGE = 0, | |
4495 | USB_PD_CTRL_MUX_NONE = 1, | |
4496 | USB_PD_CTRL_MUX_USB = 2, | |
4497 | USB_PD_CTRL_MUX_DP = 3, | |
4498 | USB_PD_CTRL_MUX_DOCK = 4, | |
4499 | USB_PD_CTRL_MUX_AUTO = 5, | |
e16efdf1 | 4500 | USB_PD_CTRL_MUX_COUNT |
256ab950 SB |
4501 | }; |
4502 | ||
c7eb47f9 BL |
4503 | enum usb_pd_control_swap { |
4504 | USB_PD_CTRL_SWAP_NONE = 0, | |
4505 | USB_PD_CTRL_SWAP_DATA = 1, | |
4506 | USB_PD_CTRL_SWAP_POWER = 2, | |
4507 | USB_PD_CTRL_SWAP_VCONN = 3, | |
4508 | USB_PD_CTRL_SWAP_COUNT | |
4509 | }; | |
4510 | ||
256ab950 SB |
4511 | struct ec_params_usb_pd_control { |
4512 | uint8_t port; | |
4513 | uint8_t role; | |
4514 | uint8_t mux; | |
c7eb47f9 | 4515 | uint8_t swap; |
6f72c3f9 | 4516 | } __ec_align1; |
256ab950 | 4517 | |
9e816560 GG |
4518 | #define PD_CTRL_RESP_ENABLED_COMMS BIT(0) /* Communication enabled */ |
4519 | #define PD_CTRL_RESP_ENABLED_CONNECTED BIT(1) /* Device connected */ | |
4520 | #define PD_CTRL_RESP_ENABLED_PD_CAPABLE BIT(2) /* Partner is PD capable */ | |
c6983166 | 4521 | |
c7eb47f9 BL |
4522 | #define PD_CTRL_RESP_ROLE_POWER BIT(0) /* 0=SNK/1=SRC */ |
4523 | #define PD_CTRL_RESP_ROLE_DATA BIT(1) /* 0=UFP/1=DFP */ | |
4524 | #define PD_CTRL_RESP_ROLE_VCONN BIT(2) /* Vconn status */ | |
4525 | #define PD_CTRL_RESP_ROLE_DR_POWER BIT(3) /* Partner is dualrole power */ | |
4526 | #define PD_CTRL_RESP_ROLE_DR_DATA BIT(4) /* Partner is dualrole data */ | |
4527 | #define PD_CTRL_RESP_ROLE_USB_COMM BIT(5) /* Partner USB comm capable */ | |
4528 | #define PD_CTRL_RESP_ROLE_EXT_POWERED BIT(6) /* Partner externally powerd */ | |
4529 | ||
e16efdf1 GG |
4530 | struct ec_response_usb_pd_control { |
4531 | uint8_t enabled; | |
4532 | uint8_t role; | |
4533 | uint8_t polarity; | |
4534 | uint8_t state; | |
4535 | } __ec_align1; | |
4536 | ||
c6983166 BL |
4537 | struct ec_response_usb_pd_control_v1 { |
4538 | uint8_t enabled; | |
4539 | uint8_t role; | |
4540 | uint8_t polarity; | |
4541 | char state[32]; | |
6f72c3f9 | 4542 | } __ec_align1; |
c6983166 | 4543 | |
e16efdf1 GG |
4544 | /* Values representing usbc PD CC state */ |
4545 | #define USBC_PD_CC_NONE 0 /* No accessory connected */ | |
4546 | #define USBC_PD_CC_NO_UFP 1 /* No UFP accessory connected */ | |
4547 | #define USBC_PD_CC_AUDIO_ACC 2 /* Audio accessory connected */ | |
4548 | #define USBC_PD_CC_DEBUG_ACC 3 /* Debug accessory connected */ | |
4549 | #define USBC_PD_CC_UFP_ATTACHED 4 /* UFP attached to usbc */ | |
4550 | #define USBC_PD_CC_DFP_ATTACHED 5 /* DPF attached to usbc */ | |
4551 | ||
4552 | struct ec_response_usb_pd_control_v2 { | |
4553 | uint8_t enabled; | |
4554 | uint8_t role; | |
4555 | uint8_t polarity; | |
4556 | char state[32]; | |
4557 | uint8_t cc_state; /* USBC_PD_CC_*Encoded cc state */ | |
4558 | uint8_t dp_mode; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */ | |
4559 | /* CL:1500994 Current cable type */ | |
4560 | uint8_t reserved_cable_type; | |
4561 | } __ec_align1; | |
4562 | ||
ff834332 | 4563 | #define EC_CMD_USB_PD_PORTS 0x0102 |
c6983166 | 4564 | |
b082b2e1 SN |
4565 | /* Maximum number of PD ports on a device, num_ports will be <= this */ |
4566 | #define EC_USB_PD_MAX_PORTS 8 | |
4567 | ||
c6983166 BL |
4568 | struct ec_response_usb_pd_ports { |
4569 | uint8_t num_ports; | |
6f72c3f9 | 4570 | } __ec_align1; |
c6983166 | 4571 | |
ff834332 | 4572 | #define EC_CMD_USB_PD_POWER_INFO 0x0103 |
c6983166 BL |
4573 | |
4574 | #define PD_POWER_CHARGING_PORT 0xff | |
4575 | struct ec_params_usb_pd_power_info { | |
4576 | uint8_t port; | |
6f72c3f9 | 4577 | } __ec_align1; |
c6983166 BL |
4578 | |
4579 | enum usb_chg_type { | |
4580 | USB_CHG_TYPE_NONE, | |
4581 | USB_CHG_TYPE_PD, | |
4582 | USB_CHG_TYPE_C, | |
4583 | USB_CHG_TYPE_PROPRIETARY, | |
4584 | USB_CHG_TYPE_BC12_DCP, | |
4585 | USB_CHG_TYPE_BC12_CDP, | |
4586 | USB_CHG_TYPE_BC12_SDP, | |
4587 | USB_CHG_TYPE_OTHER, | |
4588 | USB_CHG_TYPE_VBUS, | |
4589 | USB_CHG_TYPE_UNKNOWN, | |
e16efdf1 | 4590 | USB_CHG_TYPE_DEDICATED, |
c6983166 | 4591 | }; |
06635894 SN |
4592 | enum usb_power_roles { |
4593 | USB_PD_PORT_POWER_DISCONNECTED, | |
4594 | USB_PD_PORT_POWER_SOURCE, | |
4595 | USB_PD_PORT_POWER_SINK, | |
4596 | USB_PD_PORT_POWER_SINK_NOT_CHARGING, | |
4597 | }; | |
c6983166 BL |
4598 | |
4599 | struct usb_chg_measures { | |
4600 | uint16_t voltage_max; | |
4601 | uint16_t voltage_now; | |
4602 | uint16_t current_max; | |
4603 | uint16_t current_lim; | |
6f72c3f9 | 4604 | } __ec_align2; |
c6983166 BL |
4605 | |
4606 | struct ec_response_usb_pd_power_info { | |
4607 | uint8_t role; | |
4608 | uint8_t type; | |
4609 | uint8_t dualrole; | |
4610 | uint8_t reserved1; | |
4611 | struct usb_chg_measures meas; | |
4612 | uint32_t max_power; | |
6f72c3f9 | 4613 | } __ec_align4; |
c6983166 | 4614 | |
06635894 | 4615 | |
36f47383 FP |
4616 | /* |
4617 | * This command will return the number of USB PD charge port + the number | |
4618 | * of dedicated port present. | |
4619 | * EC_CMD_USB_PD_PORTS does NOT include the dedicated ports | |
4620 | */ | |
4621 | #define EC_CMD_CHARGE_PORT_COUNT 0x0105 | |
4622 | struct ec_response_charge_port_count { | |
4623 | uint8_t port_count; | |
6f72c3f9 | 4624 | } __ec_align1; |
36f47383 | 4625 | |
e16efdf1 GG |
4626 | /* Write USB-PD device FW */ |
4627 | #define EC_CMD_USB_PD_FW_UPDATE 0x0110 | |
4628 | ||
4629 | enum usb_pd_fw_update_cmds { | |
4630 | USB_PD_FW_REBOOT, | |
4631 | USB_PD_FW_FLASH_ERASE, | |
4632 | USB_PD_FW_FLASH_WRITE, | |
4633 | USB_PD_FW_ERASE_SIG, | |
4634 | }; | |
4635 | ||
4636 | struct ec_params_usb_pd_fw_update { | |
4637 | uint16_t dev_id; | |
4638 | uint8_t cmd; | |
4639 | uint8_t port; | |
4640 | uint32_t size; /* Size to write in bytes */ | |
4641 | /* Followed by data to write */ | |
4642 | } __ec_align4; | |
4643 | ||
4644 | /* Write USB-PD Accessory RW_HASH table entry */ | |
4645 | #define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111 | |
4646 | /* RW hash is first 20 bytes of SHA-256 of RW section */ | |
4647 | #define PD_RW_HASH_SIZE 20 | |
4648 | struct ec_params_usb_pd_rw_hash_entry { | |
4649 | uint16_t dev_id; | |
4650 | uint8_t dev_rw_hash[PD_RW_HASH_SIZE]; | |
4651 | uint8_t reserved; /* | |
4652 | * For alignment of current_image | |
4653 | * TODO(rspangler) but it's not aligned! | |
4654 | * Should have been reserved[2]. | |
4655 | */ | |
4656 | uint32_t current_image; /* One of ec_current_image */ | |
4657 | } __ec_align1; | |
4658 | ||
4659 | /* Read USB-PD Accessory info */ | |
4660 | #define EC_CMD_USB_PD_DEV_INFO 0x0112 | |
4661 | ||
4662 | struct ec_params_usb_pd_info_request { | |
4663 | uint8_t port; | |
4664 | } __ec_align1; | |
4665 | ||
06635894 SN |
4666 | /* Read USB-PD Device discovery info */ |
4667 | #define EC_CMD_USB_PD_DISCOVERY 0x0113 | |
4668 | struct ec_params_usb_pd_discovery_entry { | |
4669 | uint16_t vid; /* USB-IF VID */ | |
4670 | uint16_t pid; /* USB-IF PID */ | |
4671 | uint8_t ptype; /* product type (hub,periph,cable,ama) */ | |
6f72c3f9 | 4672 | } __ec_align_size1; |
06635894 SN |
4673 | |
4674 | /* Override default charge behavior */ | |
4675 | #define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114 | |
4676 | ||
4677 | /* Negative port parameters have special meaning */ | |
4678 | enum usb_pd_override_ports { | |
4679 | OVERRIDE_DONT_CHARGE = -2, | |
4680 | OVERRIDE_OFF = -1, | |
4681 | /* [0, CONFIG_USB_PD_PORT_COUNT): Port# */ | |
4682 | }; | |
4683 | ||
4684 | struct ec_params_charge_port_override { | |
4685 | int16_t override_port; /* Override port# */ | |
6f72c3f9 | 4686 | } __ec_align2; |
06635894 | 4687 | |
e16efdf1 GG |
4688 | /* |
4689 | * Read (and delete) one entry of PD event log. | |
4690 | * TODO(crbug.com/751742): Make this host command more generic to accommodate | |
4691 | * future non-PD logs that use the same internal EC event_log. | |
4692 | */ | |
06635894 SN |
4693 | #define EC_CMD_PD_GET_LOG_ENTRY 0x0115 |
4694 | ||
4695 | struct ec_response_pd_log { | |
4696 | uint32_t timestamp; /* relative timestamp in milliseconds */ | |
4697 | uint8_t type; /* event type : see PD_EVENT_xx below */ | |
4698 | uint8_t size_port; /* [7:5] port number [4:0] payload size in bytes */ | |
4699 | uint16_t data; /* type-defined data payload */ | |
4700 | uint8_t payload[0]; /* optional additional data payload: 0..16 bytes */ | |
6f72c3f9 | 4701 | } __ec_align4; |
06635894 SN |
4702 | |
4703 | /* The timestamp is the microsecond counter shifted to get about a ms. */ | |
4704 | #define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */ | |
4705 | ||
4706 | #define PD_LOG_SIZE_MASK 0x1f | |
4707 | #define PD_LOG_PORT_MASK 0xe0 | |
4708 | #define PD_LOG_PORT_SHIFT 5 | |
4709 | #define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \ | |
4710 | ((size) & PD_LOG_SIZE_MASK)) | |
4711 | #define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT) | |
4712 | #define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK) | |
4713 | ||
4714 | /* PD event log : entry types */ | |
4715 | /* PD MCU events */ | |
4716 | #define PD_EVENT_MCU_BASE 0x00 | |
4717 | #define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE+0) | |
4718 | #define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE+1) | |
4719 | /* Reserved for custom board event */ | |
4720 | #define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE+2) | |
4721 | /* PD generic accessory events */ | |
4722 | #define PD_EVENT_ACC_BASE 0x20 | |
4723 | #define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE+0) | |
4724 | #define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE+1) | |
4725 | /* PD power supply events */ | |
4726 | #define PD_EVENT_PS_BASE 0x40 | |
4727 | #define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE+0) | |
4728 | /* PD video dongles events */ | |
4729 | #define PD_EVENT_VIDEO_BASE 0x60 | |
4730 | #define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0) | |
4731 | #define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE+1) | |
4732 | /* Returned in the "type" field, when there is no entry available */ | |
4733 | #define PD_EVENT_NO_ENTRY 0xff | |
4734 | ||
4735 | /* | |
4736 | * PD_EVENT_MCU_CHARGE event definition : | |
4737 | * the payload is "struct usb_chg_measures" | |
4738 | * the data field contains the port state flags as defined below : | |
4739 | */ | |
4740 | /* Port partner is a dual role device */ | |
4741 | #define CHARGE_FLAGS_DUAL_ROLE BIT(15) | |
4742 | /* Port is the pending override port */ | |
4743 | #define CHARGE_FLAGS_DELAYED_OVERRIDE BIT(14) | |
4744 | /* Port is the override port */ | |
4745 | #define CHARGE_FLAGS_OVERRIDE BIT(13) | |
4746 | /* Charger type */ | |
4747 | #define CHARGE_FLAGS_TYPE_SHIFT 3 | |
4748 | #define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT) | |
4749 | /* Power delivery role */ | |
4750 | #define CHARGE_FLAGS_ROLE_MASK (7 << 0) | |
4751 | ||
4752 | /* | |
4753 | * PD_EVENT_PS_FAULT data field flags definition : | |
4754 | */ | |
4755 | #define PS_FAULT_OCP 1 | |
4756 | #define PS_FAULT_FAST_OCP 2 | |
4757 | #define PS_FAULT_OVP 3 | |
4758 | #define PS_FAULT_DISCH 4 | |
4759 | ||
4760 | /* | |
4761 | * PD_EVENT_VIDEO_CODEC payload is "struct mcdp_info". | |
4762 | */ | |
4763 | struct mcdp_version { | |
4764 | uint8_t major; | |
4765 | uint8_t minor; | |
4766 | uint16_t build; | |
6f72c3f9 | 4767 | } __ec_align4; |
06635894 SN |
4768 | |
4769 | struct mcdp_info { | |
4770 | uint8_t family[2]; | |
4771 | uint8_t chipid[2]; | |
4772 | struct mcdp_version irom; | |
4773 | struct mcdp_version fw; | |
6f72c3f9 | 4774 | } __ec_align4; |
06635894 SN |
4775 | |
4776 | /* struct mcdp_info field decoding */ | |
4777 | #define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1]) | |
4778 | #define MCDP_FAMILY(family) ((family[0] << 8) | family[1]) | |
4779 | ||
e16efdf1 GG |
4780 | /* Get/Set USB-PD Alternate mode info */ |
4781 | #define EC_CMD_USB_PD_GET_AMODE 0x0116 | |
4782 | struct ec_params_usb_pd_get_mode_request { | |
4783 | uint16_t svid_idx; /* SVID index to get */ | |
4784 | uint8_t port; /* port */ | |
4785 | } __ec_align_size1; | |
4786 | ||
4787 | struct ec_params_usb_pd_get_mode_response { | |
4788 | uint16_t svid; /* SVID */ | |
4789 | uint16_t opos; /* Object Position */ | |
4790 | uint32_t vdo[6]; /* Mode VDOs */ | |
4791 | } __ec_align4; | |
4792 | ||
4793 | #define EC_CMD_USB_PD_SET_AMODE 0x0117 | |
4794 | ||
4795 | enum pd_mode_cmd { | |
4796 | PD_EXIT_MODE = 0, | |
4797 | PD_ENTER_MODE = 1, | |
4798 | /* Not a command. Do NOT remove. */ | |
4799 | PD_MODE_CMD_COUNT, | |
4800 | }; | |
4801 | ||
4802 | struct ec_params_usb_pd_set_mode_request { | |
4803 | uint32_t cmd; /* enum pd_mode_cmd */ | |
4804 | uint16_t svid; /* SVID to set */ | |
4805 | uint8_t opos; /* Object Position */ | |
4806 | uint8_t port; /* port */ | |
4807 | } __ec_align4; | |
4808 | ||
4809 | /* Ask the PD MCU to record a log of a requested type */ | |
4810 | #define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118 | |
4811 | ||
4812 | struct ec_params_pd_write_log_entry { | |
4813 | uint8_t type; /* event type : see PD_EVENT_xx above */ | |
4814 | uint8_t port; /* port#, or 0 for events unrelated to a given port */ | |
4815 | } __ec_align1; | |
4816 | ||
4817 | ||
4818 | /* Control USB-PD chip */ | |
4819 | #define EC_CMD_PD_CONTROL 0x0119 | |
4820 | ||
4821 | enum ec_pd_control_cmd { | |
4822 | PD_SUSPEND = 0, /* Suspend the PD chip (EC: stop talking to PD) */ | |
4823 | PD_RESUME, /* Resume the PD chip (EC: start talking to PD) */ | |
4824 | PD_RESET, /* Force reset the PD chip */ | |
4825 | PD_CONTROL_DISABLE, /* Disable further calls to this command */ | |
4826 | PD_CHIP_ON, /* Power on the PD chip */ | |
4827 | }; | |
4828 | ||
4829 | struct ec_params_pd_control { | |
4830 | uint8_t chip; /* chip id */ | |
4831 | uint8_t subcmd; | |
4832 | } __ec_align1; | |
4833 | ||
c6983166 | 4834 | /* Get info about USB-C SS muxes */ |
ff834332 | 4835 | #define EC_CMD_USB_PD_MUX_INFO 0x011A |
c6983166 BL |
4836 | |
4837 | struct ec_params_usb_pd_mux_info { | |
4838 | uint8_t port; /* USB-C port number */ | |
6f72c3f9 | 4839 | } __ec_align1; |
c6983166 BL |
4840 | |
4841 | /* Flags representing mux state */ | |
9e816560 GG |
4842 | #define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */ |
4843 | #define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */ | |
4844 | #define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */ | |
4845 | #define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */ | |
e16efdf1 | 4846 | #define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */ |
c6983166 BL |
4847 | |
4848 | struct ec_response_usb_pd_mux_info { | |
4849 | uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */ | |
6f72c3f9 | 4850 | } __ec_align1; |
e16efdf1 GG |
4851 | |
4852 | #define EC_CMD_PD_CHIP_INFO 0x011B | |
4853 | ||
4854 | struct ec_params_pd_chip_info { | |
4855 | uint8_t port; /* USB-C port number */ | |
4856 | uint8_t renew; /* Force renewal */ | |
4857 | } __ec_align1; | |
4858 | ||
4859 | struct ec_response_pd_chip_info { | |
4860 | uint16_t vendor_id; | |
4861 | uint16_t product_id; | |
4862 | uint16_t device_id; | |
4863 | union { | |
4864 | uint8_t fw_version_string[8]; | |
4865 | uint64_t fw_version_number; | |
4866 | }; | |
4867 | } __ec_align2; | |
4868 | ||
4869 | struct ec_response_pd_chip_info_v1 { | |
4870 | uint16_t vendor_id; | |
4871 | uint16_t product_id; | |
4872 | uint16_t device_id; | |
4873 | union { | |
4874 | uint8_t fw_version_string[8]; | |
4875 | uint64_t fw_version_number; | |
4876 | }; | |
4877 | union { | |
4878 | uint8_t min_req_fw_version_string[8]; | |
4879 | uint64_t min_req_fw_version_number; | |
4880 | }; | |
4881 | } __ec_align2; | |
4882 | ||
ff834332 GG |
4883 | /*****************************************************************************/ |
4884 | /* | |
4885 | * Reserve a range of host commands for board-specific, experimental, or | |
4886 | * special purpose features. These can be (re)used without updating this file. | |
4887 | * | |
4888 | * CAUTION: Don't go nuts with this. Shipping products should document ALL | |
4889 | * their EC commands for easier development, testing, debugging, and support. | |
4890 | * | |
4891 | * All commands MUST be #defined to be 4-digit UPPER CASE hex values | |
4892 | * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. | |
4893 | * | |
4894 | * In your experimental code, you may want to do something like this: | |
4895 | * | |
4896 | * #define EC_CMD_MAGIC_FOO 0x0000 | |
4897 | * #define EC_CMD_MAGIC_BAR 0x0001 | |
4898 | * #define EC_CMD_MAGIC_HEY 0x0002 | |
4899 | * | |
4900 | * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_FOO, magic_foo_handler, | |
4901 | * EC_VER_MASK(0); | |
4902 | * | |
4903 | * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_BAR, magic_bar_handler, | |
4904 | * EC_VER_MASK(0); | |
4905 | * | |
4906 | * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_HEY, magic_hey_handler, | |
4907 | * EC_VER_MASK(0); | |
4908 | */ | |
4909 | #define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00 | |
4910 | #define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF | |
4911 | ||
4912 | /* | |
4913 | * Given the private host command offset, calculate the true private host | |
4914 | * command value. | |
4915 | */ | |
4916 | #define EC_PRIVATE_HOST_COMMAND_VALUE(command) \ | |
4917 | (EC_CMD_BOARD_SPECIFIC_BASE + (command)) | |
c6983166 | 4918 | |
256ab950 SB |
4919 | /*****************************************************************************/ |
4920 | /* | |
4921 | * Passthru commands | |
4922 | * | |
4923 | * Some platforms have sub-processors chained to each other. For example. | |
4924 | * | |
4925 | * AP <--> EC <--> PD MCU | |
4926 | * | |
4927 | * The top 2 bits of the command number are used to indicate which device the | |
4928 | * command is intended for. Device 0 is always the device receiving the | |
4929 | * command; other device mapping is board-specific. | |
4930 | * | |
4931 | * When a device receives a command to be passed to a sub-processor, it passes | |
4932 | * it on with the device number set back to 0. This allows the sub-processor | |
4933 | * to remain blissfully unaware of whether the command originated on the next | |
4934 | * device up the chain, or was passed through from the AP. | |
4935 | * | |
4936 | * In the above example, if the AP wants to send command 0x0002 to the PD MCU, | |
4937 | * AP sends command 0x4002 to the EC | |
4938 | * EC sends command 0x0002 to the PD MCU | |
4939 | * EC forwards PD MCU response back to the AP | |
4940 | */ | |
4941 | ||
4942 | /* Offset and max command number for sub-device n */ | |
4943 | #define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n)) | |
4944 | #define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff) | |
4945 | ||
5271db29 BR |
4946 | /*****************************************************************************/ |
4947 | /* | |
4948 | * Deprecated constants. These constants have been renamed for clarity. The | |
4949 | * meaning and size has not changed. Programs that use the old names should | |
4950 | * switch to the new names soon, as the old names may not be carried forward | |
4951 | * forever. | |
4952 | */ | |
4953 | #define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE | |
4954 | #define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1 | |
4955 | #define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE | |
4956 | ||
ce86c87d GG |
4957 | |
4958 | ||
deaf39ef | 4959 | #endif /* __CROS_EC_COMMANDS_H */ |