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1 | /* |
2 | * Host communication command constants for ChromeOS EC | |
3 | * | |
4 | * Copyright (C) 2012 Google, Inc | |
5 | * | |
6 | * This software is licensed under the terms of the GNU General Public | |
7 | * License version 2, as published by the Free Software Foundation, and | |
8 | * may be copied, distributed, and modified under those terms. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * The ChromeOS EC multi function device is used to mux all the requests | |
16 | * to the EC device for its multiple features: keyboard controller, | |
17 | * battery charging and regulator control, firmware update. | |
18 | * | |
19 | * NOTE: This file is copied verbatim from the ChromeOS EC Open Source | |
20 | * project in an attempt to make future updates easy to make. | |
21 | */ | |
22 | ||
23 | #ifndef __CROS_EC_COMMANDS_H | |
24 | #define __CROS_EC_COMMANDS_H | |
25 | ||
26 | /* | |
27 | * Protocol overview | |
28 | * | |
29 | * request: CMD [ P0 P1 P2 ... Pn S ] | |
30 | * response: ERR [ P0 P1 P2 ... Pn S ] | |
31 | * | |
32 | * where the bytes are defined as follow : | |
33 | * - CMD is the command code. (defined by EC_CMD_ constants) | |
34 | * - ERR is the error code. (defined by EC_RES_ constants) | |
35 | * - Px is the optional payload. | |
36 | * it is not sent if the error code is not success. | |
37 | * (defined by ec_params_ and ec_response_ structures) | |
38 | * - S is the checksum which is the sum of all payload bytes. | |
39 | * | |
40 | * On LPC, CMD and ERR are sent/received at EC_LPC_ADDR_KERNEL|USER_CMD | |
41 | * and the payloads are sent/received at EC_LPC_ADDR_KERNEL|USER_PARAM. | |
42 | * On I2C, all bytes are sent serially in the same message. | |
43 | */ | |
44 | ||
45 | /* Current version of this protocol */ | |
46 | #define EC_PROTO_VERSION 0x00000002 | |
47 | ||
48 | /* Command version mask */ | |
49 | #define EC_VER_MASK(version) (1UL << (version)) | |
50 | ||
51 | /* I/O addresses for ACPI commands */ | |
52 | #define EC_LPC_ADDR_ACPI_DATA 0x62 | |
53 | #define EC_LPC_ADDR_ACPI_CMD 0x66 | |
54 | ||
55 | /* I/O addresses for host command */ | |
56 | #define EC_LPC_ADDR_HOST_DATA 0x200 | |
57 | #define EC_LPC_ADDR_HOST_CMD 0x204 | |
58 | ||
59 | /* I/O addresses for host command args and params */ | |
60 | #define EC_LPC_ADDR_HOST_ARGS 0x800 | |
61 | #define EC_LPC_ADDR_HOST_PARAM 0x804 | |
62 | #define EC_HOST_PARAM_SIZE 0x0fc /* Size of param area in bytes */ | |
63 | ||
64 | /* I/O addresses for host command params, old interface */ | |
65 | #define EC_LPC_ADDR_OLD_PARAM 0x880 | |
66 | #define EC_OLD_PARAM_SIZE 0x080 /* Size of param area in bytes */ | |
67 | ||
68 | /* EC command register bit functions */ | |
69 | #define EC_LPC_CMDR_DATA (1 << 0) /* Data ready for host to read */ | |
70 | #define EC_LPC_CMDR_PENDING (1 << 1) /* Write pending to EC */ | |
71 | #define EC_LPC_CMDR_BUSY (1 << 2) /* EC is busy processing a command */ | |
72 | #define EC_LPC_CMDR_CMD (1 << 3) /* Last host write was a command */ | |
73 | #define EC_LPC_CMDR_ACPI_BRST (1 << 4) /* Burst mode (not used) */ | |
74 | #define EC_LPC_CMDR_SCI (1 << 5) /* SCI event is pending */ | |
75 | #define EC_LPC_CMDR_SMI (1 << 6) /* SMI event is pending */ | |
76 | ||
77 | #define EC_LPC_ADDR_MEMMAP 0x900 | |
78 | #define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */ | |
79 | #define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */ | |
80 | ||
81 | /* The offset address of each type of data in mapped memory. */ | |
82 | #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors */ | |
83 | #define EC_MEMMAP_FAN 0x10 /* Fan speeds */ | |
84 | #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* Temp sensors (second set) */ | |
85 | #define EC_MEMMAP_ID 0x20 /* 'E' 'C' */ | |
86 | #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */ | |
87 | #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */ | |
88 | #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */ | |
89 | #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */ | |
90 | #define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */ | |
91 | #define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host command interface flags */ | |
92 | #define EC_MEMMAP_SWITCHES 0x30 | |
93 | #define EC_MEMMAP_HOST_EVENTS 0x34 | |
94 | #define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */ | |
95 | #define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */ | |
96 | #define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */ | |
97 | #define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, defined below */ | |
98 | #define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */ | |
99 | #define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */ | |
100 | #define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */ | |
101 | #define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */ | |
102 | #define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */ | |
103 | #define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */ | |
104 | #define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */ | |
105 | #define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */ | |
106 | ||
107 | /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */ | |
108 | #define EC_TEMP_SENSOR_ENTRIES 16 | |
109 | /* | |
110 | * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B. | |
111 | * | |
112 | * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2. | |
113 | */ | |
114 | #define EC_TEMP_SENSOR_B_ENTRIES 8 | |
115 | #define EC_TEMP_SENSOR_NOT_PRESENT 0xff | |
116 | #define EC_TEMP_SENSOR_ERROR 0xfe | |
117 | #define EC_TEMP_SENSOR_NOT_POWERED 0xfd | |
118 | #define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc | |
119 | /* | |
120 | * The offset of temperature value stored in mapped memory. This allows | |
121 | * reporting a temperature range of 200K to 454K = -73C to 181C. | |
122 | */ | |
123 | #define EC_TEMP_SENSOR_OFFSET 200 | |
124 | ||
125 | #define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */ | |
126 | #define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */ | |
127 | #define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */ | |
128 | ||
129 | /* Battery bit flags at EC_MEMMAP_BATT_FLAG. */ | |
130 | #define EC_BATT_FLAG_AC_PRESENT 0x01 | |
131 | #define EC_BATT_FLAG_BATT_PRESENT 0x02 | |
132 | #define EC_BATT_FLAG_DISCHARGING 0x04 | |
133 | #define EC_BATT_FLAG_CHARGING 0x08 | |
134 | #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10 | |
135 | ||
136 | /* Switch flags at EC_MEMMAP_SWITCHES */ | |
137 | #define EC_SWITCH_LID_OPEN 0x01 | |
138 | #define EC_SWITCH_POWER_BUTTON_PRESSED 0x02 | |
139 | #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04 | |
140 | /* Recovery requested via keyboard */ | |
141 | #define EC_SWITCH_KEYBOARD_RECOVERY 0x08 | |
142 | /* Recovery requested via dedicated signal (from servo board) */ | |
143 | #define EC_SWITCH_DEDICATED_RECOVERY 0x10 | |
144 | /* Was fake developer mode switch; now unused. Remove in next refactor. */ | |
145 | #define EC_SWITCH_IGNORE0 0x20 | |
146 | ||
147 | /* Host command interface flags */ | |
148 | /* Host command interface supports LPC args (LPC interface only) */ | |
149 | #define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01 | |
150 | ||
151 | /* Wireless switch flags */ | |
152 | #define EC_WIRELESS_SWITCH_WLAN 0x01 | |
153 | #define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 | |
154 | ||
155 | /* | |
156 | * This header file is used in coreboot both in C and ACPI code. The ACPI code | |
157 | * is pre-processed to handle constants but the ASL compiler is unable to | |
158 | * handle actual C code so keep it separate. | |
159 | */ | |
160 | #ifndef __ACPI__ | |
161 | ||
162 | /* LPC command status byte masks */ | |
163 | /* EC has written a byte in the data register and host hasn't read it yet */ | |
164 | #define EC_LPC_STATUS_TO_HOST 0x01 | |
165 | /* Host has written a command/data byte and the EC hasn't read it yet */ | |
166 | #define EC_LPC_STATUS_FROM_HOST 0x02 | |
167 | /* EC is processing a command */ | |
168 | #define EC_LPC_STATUS_PROCESSING 0x04 | |
169 | /* Last write to EC was a command, not data */ | |
170 | #define EC_LPC_STATUS_LAST_CMD 0x08 | |
171 | /* EC is in burst mode. Unsupported by Chrome EC, so this bit is never set */ | |
172 | #define EC_LPC_STATUS_BURST_MODE 0x10 | |
173 | /* SCI event is pending (requesting SCI query) */ | |
174 | #define EC_LPC_STATUS_SCI_PENDING 0x20 | |
175 | /* SMI event is pending (requesting SMI query) */ | |
176 | #define EC_LPC_STATUS_SMI_PENDING 0x40 | |
177 | /* (reserved) */ | |
178 | #define EC_LPC_STATUS_RESERVED 0x80 | |
179 | ||
180 | /* | |
181 | * EC is busy. This covers both the EC processing a command, and the host has | |
182 | * written a new command but the EC hasn't picked it up yet. | |
183 | */ | |
184 | #define EC_LPC_STATUS_BUSY_MASK \ | |
185 | (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING) | |
186 | ||
187 | /* Host command response codes */ | |
188 | enum ec_status { | |
189 | EC_RES_SUCCESS = 0, | |
190 | EC_RES_INVALID_COMMAND = 1, | |
191 | EC_RES_ERROR = 2, | |
192 | EC_RES_INVALID_PARAM = 3, | |
193 | EC_RES_ACCESS_DENIED = 4, | |
194 | EC_RES_INVALID_RESPONSE = 5, | |
195 | EC_RES_INVALID_VERSION = 6, | |
196 | EC_RES_INVALID_CHECKSUM = 7, | |
197 | EC_RES_IN_PROGRESS = 8, /* Accepted, command in progress */ | |
198 | EC_RES_UNAVAILABLE = 9, /* No response available */ | |
199 | EC_RES_TIMEOUT = 10, /* We got a timeout */ | |
200 | EC_RES_OVERFLOW = 11, /* Table / data overflow */ | |
201 | }; | |
202 | ||
203 | /* | |
204 | * Host event codes. Note these are 1-based, not 0-based, because ACPI query | |
205 | * EC command uses code 0 to mean "no event pending". We explicitly specify | |
206 | * each value in the enum listing so they won't change if we delete/insert an | |
207 | * item or rearrange the list (it needs to be stable across platforms, not | |
208 | * just within a single compiled instance). | |
209 | */ | |
210 | enum host_event_code { | |
211 | EC_HOST_EVENT_LID_CLOSED = 1, | |
212 | EC_HOST_EVENT_LID_OPEN = 2, | |
213 | EC_HOST_EVENT_POWER_BUTTON = 3, | |
214 | EC_HOST_EVENT_AC_CONNECTED = 4, | |
215 | EC_HOST_EVENT_AC_DISCONNECTED = 5, | |
216 | EC_HOST_EVENT_BATTERY_LOW = 6, | |
217 | EC_HOST_EVENT_BATTERY_CRITICAL = 7, | |
218 | EC_HOST_EVENT_BATTERY = 8, | |
219 | EC_HOST_EVENT_THERMAL_THRESHOLD = 9, | |
220 | EC_HOST_EVENT_THERMAL_OVERLOAD = 10, | |
221 | EC_HOST_EVENT_THERMAL = 11, | |
222 | EC_HOST_EVENT_USB_CHARGER = 12, | |
223 | EC_HOST_EVENT_KEY_PRESSED = 13, | |
224 | /* | |
225 | * EC has finished initializing the host interface. The host can check | |
226 | * for this event following sending a EC_CMD_REBOOT_EC command to | |
227 | * determine when the EC is ready to accept subsequent commands. | |
228 | */ | |
229 | EC_HOST_EVENT_INTERFACE_READY = 14, | |
230 | /* Keyboard recovery combo has been pressed */ | |
231 | EC_HOST_EVENT_KEYBOARD_RECOVERY = 15, | |
232 | ||
233 | /* Shutdown due to thermal overload */ | |
234 | EC_HOST_EVENT_THERMAL_SHUTDOWN = 16, | |
235 | /* Shutdown due to battery level too low */ | |
236 | EC_HOST_EVENT_BATTERY_SHUTDOWN = 17, | |
237 | ||
238 | /* | |
239 | * The high bit of the event mask is not used as a host event code. If | |
240 | * it reads back as set, then the entire event mask should be | |
241 | * considered invalid by the host. This can happen when reading the | |
242 | * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is | |
243 | * not initialized on the EC, or improperly configured on the host. | |
244 | */ | |
245 | EC_HOST_EVENT_INVALID = 32 | |
246 | }; | |
247 | /* Host event mask */ | |
248 | #define EC_HOST_EVENT_MASK(event_code) (1UL << ((event_code) - 1)) | |
249 | ||
250 | /* Arguments at EC_LPC_ADDR_HOST_ARGS */ | |
251 | struct ec_lpc_host_args { | |
252 | uint8_t flags; | |
253 | uint8_t command_version; | |
254 | uint8_t data_size; | |
255 | /* | |
256 | * Checksum; sum of command + flags + command_version + data_size + | |
257 | * all params/response data bytes. | |
258 | */ | |
259 | uint8_t checksum; | |
260 | } __packed; | |
261 | ||
262 | /* Flags for ec_lpc_host_args.flags */ | |
263 | /* | |
264 | * Args are from host. Data area at EC_LPC_ADDR_HOST_PARAM contains command | |
265 | * params. | |
266 | * | |
267 | * If EC gets a command and this flag is not set, this is an old-style command. | |
268 | * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with | |
269 | * unknown length. EC must respond with an old-style response (that is, | |
270 | * withouth setting EC_HOST_ARGS_FLAG_TO_HOST). | |
271 | */ | |
272 | #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01 | |
273 | /* | |
274 | * Args are from EC. Data area at EC_LPC_ADDR_HOST_PARAM contains response. | |
275 | * | |
276 | * If EC responds to a command and this flag is not set, this is an old-style | |
277 | * response. Command version is 0 and response data from EC is at | |
278 | * EC_LPC_ADDR_OLD_PARAM with unknown length. | |
279 | */ | |
280 | #define EC_HOST_ARGS_FLAG_TO_HOST 0x02 | |
281 | ||
282 | /* | |
283 | * Notes on commands: | |
284 | * | |
285 | * Each command is an 8-byte command value. Commands which take params or | |
286 | * return response data specify structs for that data. If no struct is | |
287 | * specified, the command does not input or output data, respectively. | |
288 | * Parameter/response length is implicit in the structs. Some underlying | |
289 | * communication protocols (I2C, SPI) may add length or checksum headers, but | |
290 | * those are implementation-dependent and not defined here. | |
291 | */ | |
292 | ||
293 | /*****************************************************************************/ | |
294 | /* General / test commands */ | |
295 | ||
296 | /* | |
297 | * Get protocol version, used to deal with non-backward compatible protocol | |
298 | * changes. | |
299 | */ | |
300 | #define EC_CMD_PROTO_VERSION 0x00 | |
301 | ||
302 | struct ec_response_proto_version { | |
303 | uint32_t version; | |
304 | } __packed; | |
305 | ||
306 | /* | |
307 | * Hello. This is a simple command to test the EC is responsive to | |
308 | * commands. | |
309 | */ | |
310 | #define EC_CMD_HELLO 0x01 | |
311 | ||
312 | struct ec_params_hello { | |
313 | uint32_t in_data; /* Pass anything here */ | |
314 | } __packed; | |
315 | ||
316 | struct ec_response_hello { | |
317 | uint32_t out_data; /* Output will be in_data + 0x01020304 */ | |
318 | } __packed; | |
319 | ||
320 | /* Get version number */ | |
321 | #define EC_CMD_GET_VERSION 0x02 | |
322 | ||
323 | enum ec_current_image { | |
324 | EC_IMAGE_UNKNOWN = 0, | |
325 | EC_IMAGE_RO, | |
326 | EC_IMAGE_RW | |
327 | }; | |
328 | ||
329 | struct ec_response_get_version { | |
330 | /* Null-terminated version strings for RO, RW */ | |
331 | char version_string_ro[32]; | |
332 | char version_string_rw[32]; | |
333 | char reserved[32]; /* Was previously RW-B string */ | |
334 | uint32_t current_image; /* One of ec_current_image */ | |
335 | } __packed; | |
336 | ||
337 | /* Read test */ | |
338 | #define EC_CMD_READ_TEST 0x03 | |
339 | ||
340 | struct ec_params_read_test { | |
341 | uint32_t offset; /* Starting value for read buffer */ | |
342 | uint32_t size; /* Size to read in bytes */ | |
343 | } __packed; | |
344 | ||
345 | struct ec_response_read_test { | |
346 | uint32_t data[32]; | |
347 | } __packed; | |
348 | ||
349 | /* | |
350 | * Get build information | |
351 | * | |
352 | * Response is null-terminated string. | |
353 | */ | |
354 | #define EC_CMD_GET_BUILD_INFO 0x04 | |
355 | ||
356 | /* Get chip info */ | |
357 | #define EC_CMD_GET_CHIP_INFO 0x05 | |
358 | ||
359 | struct ec_response_get_chip_info { | |
360 | /* Null-terminated strings */ | |
361 | char vendor[32]; | |
362 | char name[32]; | |
363 | char revision[32]; /* Mask version */ | |
364 | } __packed; | |
365 | ||
366 | /* Get board HW version */ | |
367 | #define EC_CMD_GET_BOARD_VERSION 0x06 | |
368 | ||
369 | struct ec_response_board_version { | |
370 | uint16_t board_version; /* A monotonously incrementing number. */ | |
371 | } __packed; | |
372 | ||
373 | /* | |
374 | * Read memory-mapped data. | |
375 | * | |
376 | * This is an alternate interface to memory-mapped data for bus protocols | |
377 | * which don't support direct-mapped memory - I2C, SPI, etc. | |
378 | * | |
379 | * Response is params.size bytes of data. | |
380 | */ | |
381 | #define EC_CMD_READ_MEMMAP 0x07 | |
382 | ||
383 | struct ec_params_read_memmap { | |
384 | uint8_t offset; /* Offset in memmap (EC_MEMMAP_*) */ | |
385 | uint8_t size; /* Size to read in bytes */ | |
386 | } __packed; | |
387 | ||
388 | /* Read versions supported for a command */ | |
389 | #define EC_CMD_GET_CMD_VERSIONS 0x08 | |
390 | ||
391 | struct ec_params_get_cmd_versions { | |
392 | uint8_t cmd; /* Command to check */ | |
393 | } __packed; | |
394 | ||
395 | struct ec_response_get_cmd_versions { | |
396 | /* | |
397 | * Mask of supported versions; use EC_VER_MASK() to compare with a | |
398 | * desired version. | |
399 | */ | |
400 | uint32_t version_mask; | |
401 | } __packed; | |
402 | ||
403 | /* | |
404 | * Check EC communcations status (busy). This is needed on i2c/spi but not | |
405 | * on lpc since it has its own out-of-band busy indicator. | |
406 | * | |
407 | * lpc must read the status from the command register. Attempting this on | |
408 | * lpc will overwrite the args/parameter space and corrupt its data. | |
409 | */ | |
410 | #define EC_CMD_GET_COMMS_STATUS 0x09 | |
411 | ||
412 | /* Avoid using ec_status which is for return values */ | |
413 | enum ec_comms_status { | |
414 | EC_COMMS_STATUS_PROCESSING = 1 << 0, /* Processing cmd */ | |
415 | }; | |
416 | ||
417 | struct ec_response_get_comms_status { | |
418 | uint32_t flags; /* Mask of enum ec_comms_status */ | |
419 | } __packed; | |
420 | ||
421 | ||
422 | /*****************************************************************************/ | |
423 | /* Flash commands */ | |
424 | ||
425 | /* Get flash info */ | |
426 | #define EC_CMD_FLASH_INFO 0x10 | |
427 | ||
428 | struct ec_response_flash_info { | |
429 | /* Usable flash size, in bytes */ | |
430 | uint32_t flash_size; | |
431 | /* | |
432 | * Write block size. Write offset and size must be a multiple | |
433 | * of this. | |
434 | */ | |
435 | uint32_t write_block_size; | |
436 | /* | |
437 | * Erase block size. Erase offset and size must be a multiple | |
438 | * of this. | |
439 | */ | |
440 | uint32_t erase_block_size; | |
441 | /* | |
442 | * Protection block size. Protection offset and size must be a | |
443 | * multiple of this. | |
444 | */ | |
445 | uint32_t protect_block_size; | |
446 | } __packed; | |
447 | ||
448 | /* | |
449 | * Read flash | |
450 | * | |
451 | * Response is params.size bytes of data. | |
452 | */ | |
453 | #define EC_CMD_FLASH_READ 0x11 | |
454 | ||
455 | struct ec_params_flash_read { | |
456 | uint32_t offset; /* Byte offset to read */ | |
457 | uint32_t size; /* Size to read in bytes */ | |
458 | } __packed; | |
459 | ||
460 | /* Write flash */ | |
461 | #define EC_CMD_FLASH_WRITE 0x12 | |
462 | ||
463 | struct ec_params_flash_write { | |
464 | uint32_t offset; /* Byte offset to write */ | |
465 | uint32_t size; /* Size to write in bytes */ | |
466 | /* | |
467 | * Data to write. Could really use EC_PARAM_SIZE - 8, but tidiest to | |
468 | * use a power of 2 so writes stay aligned. | |
469 | */ | |
470 | uint8_t data[64]; | |
471 | } __packed; | |
472 | ||
473 | /* Erase flash */ | |
474 | #define EC_CMD_FLASH_ERASE 0x13 | |
475 | ||
476 | struct ec_params_flash_erase { | |
477 | uint32_t offset; /* Byte offset to erase */ | |
478 | uint32_t size; /* Size to erase in bytes */ | |
479 | } __packed; | |
480 | ||
481 | /* | |
482 | * Get/set flash protection. | |
483 | * | |
484 | * If mask!=0, sets/clear the requested bits of flags. Depending on the | |
485 | * firmware write protect GPIO, not all flags will take effect immediately; | |
486 | * some flags require a subsequent hard reset to take effect. Check the | |
487 | * returned flags bits to see what actually happened. | |
488 | * | |
489 | * If mask=0, simply returns the current flags state. | |
490 | */ | |
491 | #define EC_CMD_FLASH_PROTECT 0x15 | |
492 | #define EC_VER_FLASH_PROTECT 1 /* Command version 1 */ | |
493 | ||
494 | /* Flags for flash protection */ | |
495 | /* RO flash code protected when the EC boots */ | |
496 | #define EC_FLASH_PROTECT_RO_AT_BOOT (1 << 0) | |
497 | /* | |
498 | * RO flash code protected now. If this bit is set, at-boot status cannot | |
499 | * be changed. | |
500 | */ | |
501 | #define EC_FLASH_PROTECT_RO_NOW (1 << 1) | |
502 | /* Entire flash code protected now, until reboot. */ | |
503 | #define EC_FLASH_PROTECT_ALL_NOW (1 << 2) | |
504 | /* Flash write protect GPIO is asserted now */ | |
505 | #define EC_FLASH_PROTECT_GPIO_ASSERTED (1 << 3) | |
506 | /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */ | |
507 | #define EC_FLASH_PROTECT_ERROR_STUCK (1 << 4) | |
508 | /* | |
509 | * Error - flash protection is in inconsistent state. At least one bank of | |
510 | * flash which should be protected is not protected. Usually fixed by | |
511 | * re-requesting the desired flags, or by a hard reset if that fails. | |
512 | */ | |
513 | #define EC_FLASH_PROTECT_ERROR_INCONSISTENT (1 << 5) | |
514 | /* Entile flash code protected when the EC boots */ | |
515 | #define EC_FLASH_PROTECT_ALL_AT_BOOT (1 << 6) | |
516 | ||
517 | struct ec_params_flash_protect { | |
518 | uint32_t mask; /* Bits in flags to apply */ | |
519 | uint32_t flags; /* New flags to apply */ | |
520 | } __packed; | |
521 | ||
522 | struct ec_response_flash_protect { | |
523 | /* Current value of flash protect flags */ | |
524 | uint32_t flags; | |
525 | /* | |
526 | * Flags which are valid on this platform. This allows the caller | |
527 | * to distinguish between flags which aren't set vs. flags which can't | |
528 | * be set on this platform. | |
529 | */ | |
530 | uint32_t valid_flags; | |
531 | /* Flags which can be changed given the current protection state */ | |
532 | uint32_t writable_flags; | |
533 | } __packed; | |
534 | ||
535 | /* | |
536 | * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash | |
537 | * write protect. These commands may be reused with version > 0. | |
538 | */ | |
539 | ||
540 | /* Get the region offset/size */ | |
541 | #define EC_CMD_FLASH_REGION_INFO 0x16 | |
542 | #define EC_VER_FLASH_REGION_INFO 1 | |
543 | ||
544 | enum ec_flash_region { | |
545 | /* Region which holds read-only EC image */ | |
546 | EC_FLASH_REGION_RO, | |
547 | /* Region which holds rewritable EC image */ | |
548 | EC_FLASH_REGION_RW, | |
549 | /* | |
550 | * Region which should be write-protected in the factory (a superset of | |
551 | * EC_FLASH_REGION_RO) | |
552 | */ | |
553 | EC_FLASH_REGION_WP_RO, | |
554 | }; | |
555 | ||
556 | struct ec_params_flash_region_info { | |
557 | uint32_t region; /* enum ec_flash_region */ | |
558 | } __packed; | |
559 | ||
560 | struct ec_response_flash_region_info { | |
561 | uint32_t offset; | |
562 | uint32_t size; | |
563 | } __packed; | |
564 | ||
565 | /* Read/write VbNvContext */ | |
566 | #define EC_CMD_VBNV_CONTEXT 0x17 | |
567 | #define EC_VER_VBNV_CONTEXT 1 | |
568 | #define EC_VBNV_BLOCK_SIZE 16 | |
569 | ||
570 | enum ec_vbnvcontext_op { | |
571 | EC_VBNV_CONTEXT_OP_READ, | |
572 | EC_VBNV_CONTEXT_OP_WRITE, | |
573 | }; | |
574 | ||
575 | struct ec_params_vbnvcontext { | |
576 | uint32_t op; | |
577 | uint8_t block[EC_VBNV_BLOCK_SIZE]; | |
578 | } __packed; | |
579 | ||
580 | struct ec_response_vbnvcontext { | |
581 | uint8_t block[EC_VBNV_BLOCK_SIZE]; | |
582 | } __packed; | |
583 | ||
584 | /*****************************************************************************/ | |
585 | /* PWM commands */ | |
586 | ||
587 | /* Get fan target RPM */ | |
588 | #define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x20 | |
589 | ||
590 | struct ec_response_pwm_get_fan_rpm { | |
591 | uint32_t rpm; | |
592 | } __packed; | |
593 | ||
594 | /* Set target fan RPM */ | |
595 | #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x21 | |
596 | ||
597 | struct ec_params_pwm_set_fan_target_rpm { | |
598 | uint32_t rpm; | |
599 | } __packed; | |
600 | ||
601 | /* Get keyboard backlight */ | |
602 | #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x22 | |
603 | ||
604 | struct ec_response_pwm_get_keyboard_backlight { | |
605 | uint8_t percent; | |
606 | uint8_t enabled; | |
607 | } __packed; | |
608 | ||
609 | /* Set keyboard backlight */ | |
610 | #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x23 | |
611 | ||
612 | struct ec_params_pwm_set_keyboard_backlight { | |
613 | uint8_t percent; | |
614 | } __packed; | |
615 | ||
616 | /* Set target fan PWM duty cycle */ | |
617 | #define EC_CMD_PWM_SET_FAN_DUTY 0x24 | |
618 | ||
619 | struct ec_params_pwm_set_fan_duty { | |
620 | uint32_t percent; | |
621 | } __packed; | |
622 | ||
623 | /*****************************************************************************/ | |
624 | /* | |
625 | * Lightbar commands. This looks worse than it is. Since we only use one HOST | |
626 | * command to say "talk to the lightbar", we put the "and tell it to do X" part | |
627 | * into a subcommand. We'll make separate structs for subcommands with | |
628 | * different input args, so that we know how much to expect. | |
629 | */ | |
630 | #define EC_CMD_LIGHTBAR_CMD 0x28 | |
631 | ||
632 | struct rgb_s { | |
633 | uint8_t r, g, b; | |
634 | }; | |
635 | ||
636 | #define LB_BATTERY_LEVELS 4 | |
637 | /* List of tweakable parameters. NOTE: It's __packed so it can be sent in a | |
638 | * host command, but the alignment is the same regardless. Keep it that way. | |
639 | */ | |
640 | struct lightbar_params { | |
641 | /* Timing */ | |
642 | int google_ramp_up; | |
643 | int google_ramp_down; | |
644 | int s3s0_ramp_up; | |
645 | int s0_tick_delay[2]; /* AC=0/1 */ | |
646 | int s0a_tick_delay[2]; /* AC=0/1 */ | |
647 | int s0s3_ramp_down; | |
648 | int s3_sleep_for; | |
649 | int s3_ramp_up; | |
650 | int s3_ramp_down; | |
651 | ||
652 | /* Oscillation */ | |
653 | uint8_t new_s0; | |
654 | uint8_t osc_min[2]; /* AC=0/1 */ | |
655 | uint8_t osc_max[2]; /* AC=0/1 */ | |
656 | uint8_t w_ofs[2]; /* AC=0/1 */ | |
657 | ||
658 | /* Brightness limits based on the backlight and AC. */ | |
659 | uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ | |
660 | uint8_t bright_bl_on_min[2]; /* AC=0/1 */ | |
661 | uint8_t bright_bl_on_max[2]; /* AC=0/1 */ | |
662 | ||
663 | /* Battery level thresholds */ | |
664 | uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; | |
665 | ||
666 | /* Map [AC][battery_level] to color index */ | |
667 | uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ | |
668 | uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ | |
669 | ||
670 | /* Color palette */ | |
671 | struct rgb_s color[8]; /* 0-3 are Google colors */ | |
672 | } __packed; | |
673 | ||
674 | struct ec_params_lightbar { | |
675 | uint8_t cmd; /* Command (see enum lightbar_command) */ | |
676 | union { | |
677 | struct { | |
678 | /* no args */ | |
679 | } dump, off, on, init, get_seq, get_params; | |
680 | ||
681 | struct num { | |
682 | uint8_t num; | |
683 | } brightness, seq, demo; | |
684 | ||
685 | struct reg { | |
686 | uint8_t ctrl, reg, value; | |
687 | } reg; | |
688 | ||
689 | struct rgb { | |
690 | uint8_t led, red, green, blue; | |
691 | } rgb; | |
692 | ||
693 | struct lightbar_params set_params; | |
694 | }; | |
695 | } __packed; | |
696 | ||
697 | struct ec_response_lightbar { | |
698 | union { | |
699 | struct dump { | |
700 | struct { | |
701 | uint8_t reg; | |
702 | uint8_t ic0; | |
703 | uint8_t ic1; | |
704 | } vals[23]; | |
705 | } dump; | |
706 | ||
707 | struct get_seq { | |
708 | uint8_t num; | |
709 | } get_seq; | |
710 | ||
711 | struct lightbar_params get_params; | |
712 | ||
713 | struct { | |
714 | /* no return params */ | |
715 | } off, on, init, brightness, seq, reg, rgb, demo, set_params; | |
716 | }; | |
717 | } __packed; | |
718 | ||
719 | /* Lightbar commands */ | |
720 | enum lightbar_command { | |
721 | LIGHTBAR_CMD_DUMP = 0, | |
722 | LIGHTBAR_CMD_OFF = 1, | |
723 | LIGHTBAR_CMD_ON = 2, | |
724 | LIGHTBAR_CMD_INIT = 3, | |
725 | LIGHTBAR_CMD_BRIGHTNESS = 4, | |
726 | LIGHTBAR_CMD_SEQ = 5, | |
727 | LIGHTBAR_CMD_REG = 6, | |
728 | LIGHTBAR_CMD_RGB = 7, | |
729 | LIGHTBAR_CMD_GET_SEQ = 8, | |
730 | LIGHTBAR_CMD_DEMO = 9, | |
731 | LIGHTBAR_CMD_GET_PARAMS = 10, | |
732 | LIGHTBAR_CMD_SET_PARAMS = 11, | |
733 | LIGHTBAR_NUM_CMDS | |
734 | }; | |
735 | ||
736 | /*****************************************************************************/ | |
737 | /* Verified boot commands */ | |
738 | ||
739 | /* | |
740 | * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be | |
741 | * reused for other purposes with version > 0. | |
742 | */ | |
743 | ||
744 | /* Verified boot hash command */ | |
745 | #define EC_CMD_VBOOT_HASH 0x2A | |
746 | ||
747 | struct ec_params_vboot_hash { | |
748 | uint8_t cmd; /* enum ec_vboot_hash_cmd */ | |
749 | uint8_t hash_type; /* enum ec_vboot_hash_type */ | |
750 | uint8_t nonce_size; /* Nonce size; may be 0 */ | |
751 | uint8_t reserved0; /* Reserved; set 0 */ | |
752 | uint32_t offset; /* Offset in flash to hash */ | |
753 | uint32_t size; /* Number of bytes to hash */ | |
754 | uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */ | |
755 | } __packed; | |
756 | ||
757 | struct ec_response_vboot_hash { | |
758 | uint8_t status; /* enum ec_vboot_hash_status */ | |
759 | uint8_t hash_type; /* enum ec_vboot_hash_type */ | |
760 | uint8_t digest_size; /* Size of hash digest in bytes */ | |
761 | uint8_t reserved0; /* Ignore; will be 0 */ | |
762 | uint32_t offset; /* Offset in flash which was hashed */ | |
763 | uint32_t size; /* Number of bytes hashed */ | |
764 | uint8_t hash_digest[64]; /* Hash digest data */ | |
765 | } __packed; | |
766 | ||
767 | enum ec_vboot_hash_cmd { | |
768 | EC_VBOOT_HASH_GET = 0, /* Get current hash status */ | |
769 | EC_VBOOT_HASH_ABORT = 1, /* Abort calculating current hash */ | |
770 | EC_VBOOT_HASH_START = 2, /* Start computing a new hash */ | |
771 | EC_VBOOT_HASH_RECALC = 3, /* Synchronously compute a new hash */ | |
772 | }; | |
773 | ||
774 | enum ec_vboot_hash_type { | |
775 | EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */ | |
776 | }; | |
777 | ||
778 | enum ec_vboot_hash_status { | |
779 | EC_VBOOT_HASH_STATUS_NONE = 0, /* No hash (not started, or aborted) */ | |
780 | EC_VBOOT_HASH_STATUS_DONE = 1, /* Finished computing a hash */ | |
781 | EC_VBOOT_HASH_STATUS_BUSY = 2, /* Busy computing a hash */ | |
782 | }; | |
783 | ||
784 | /* | |
785 | * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC. | |
786 | * If one of these is specified, the EC will automatically update offset and | |
787 | * size to the correct values for the specified image (RO or RW). | |
788 | */ | |
789 | #define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe | |
790 | #define EC_VBOOT_HASH_OFFSET_RW 0xfffffffd | |
791 | ||
792 | /*****************************************************************************/ | |
793 | /* USB charging control commands */ | |
794 | ||
795 | /* Set USB port charging mode */ | |
796 | #define EC_CMD_USB_CHARGE_SET_MODE 0x30 | |
797 | ||
798 | struct ec_params_usb_charge_set_mode { | |
799 | uint8_t usb_port_id; | |
800 | uint8_t mode; | |
801 | } __packed; | |
802 | ||
803 | /*****************************************************************************/ | |
804 | /* Persistent storage for host */ | |
805 | ||
806 | /* Maximum bytes that can be read/written in a single command */ | |
807 | #define EC_PSTORE_SIZE_MAX 64 | |
808 | ||
809 | /* Get persistent storage info */ | |
810 | #define EC_CMD_PSTORE_INFO 0x40 | |
811 | ||
812 | struct ec_response_pstore_info { | |
813 | /* Persistent storage size, in bytes */ | |
814 | uint32_t pstore_size; | |
815 | /* Access size; read/write offset and size must be a multiple of this */ | |
816 | uint32_t access_size; | |
817 | } __packed; | |
818 | ||
819 | /* | |
820 | * Read persistent storage | |
821 | * | |
822 | * Response is params.size bytes of data. | |
823 | */ | |
824 | #define EC_CMD_PSTORE_READ 0x41 | |
825 | ||
826 | struct ec_params_pstore_read { | |
827 | uint32_t offset; /* Byte offset to read */ | |
828 | uint32_t size; /* Size to read in bytes */ | |
829 | } __packed; | |
830 | ||
831 | /* Write persistent storage */ | |
832 | #define EC_CMD_PSTORE_WRITE 0x42 | |
833 | ||
834 | struct ec_params_pstore_write { | |
835 | uint32_t offset; /* Byte offset to write */ | |
836 | uint32_t size; /* Size to write in bytes */ | |
837 | uint8_t data[EC_PSTORE_SIZE_MAX]; | |
838 | } __packed; | |
839 | ||
840 | /*****************************************************************************/ | |
841 | /* Real-time clock */ | |
842 | ||
843 | /* RTC params and response structures */ | |
844 | struct ec_params_rtc { | |
845 | uint32_t time; | |
846 | } __packed; | |
847 | ||
848 | struct ec_response_rtc { | |
849 | uint32_t time; | |
850 | } __packed; | |
851 | ||
852 | /* These use ec_response_rtc */ | |
853 | #define EC_CMD_RTC_GET_VALUE 0x44 | |
854 | #define EC_CMD_RTC_GET_ALARM 0x45 | |
855 | ||
856 | /* These all use ec_params_rtc */ | |
857 | #define EC_CMD_RTC_SET_VALUE 0x46 | |
858 | #define EC_CMD_RTC_SET_ALARM 0x47 | |
859 | ||
860 | /*****************************************************************************/ | |
861 | /* Port80 log access */ | |
862 | ||
863 | /* Get last port80 code from previous boot */ | |
864 | #define EC_CMD_PORT80_LAST_BOOT 0x48 | |
865 | ||
866 | struct ec_response_port80_last_boot { | |
867 | uint16_t code; | |
868 | } __packed; | |
869 | ||
870 | /*****************************************************************************/ | |
871 | /* Thermal engine commands */ | |
872 | ||
873 | /* Set thershold value */ | |
874 | #define EC_CMD_THERMAL_SET_THRESHOLD 0x50 | |
875 | ||
876 | struct ec_params_thermal_set_threshold { | |
877 | uint8_t sensor_type; | |
878 | uint8_t threshold_id; | |
879 | uint16_t value; | |
880 | } __packed; | |
881 | ||
882 | /* Get threshold value */ | |
883 | #define EC_CMD_THERMAL_GET_THRESHOLD 0x51 | |
884 | ||
885 | struct ec_params_thermal_get_threshold { | |
886 | uint8_t sensor_type; | |
887 | uint8_t threshold_id; | |
888 | } __packed; | |
889 | ||
890 | struct ec_response_thermal_get_threshold { | |
891 | uint16_t value; | |
892 | } __packed; | |
893 | ||
894 | /* Toggle automatic fan control */ | |
895 | #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x52 | |
896 | ||
897 | /* Get TMP006 calibration data */ | |
898 | #define EC_CMD_TMP006_GET_CALIBRATION 0x53 | |
899 | ||
900 | struct ec_params_tmp006_get_calibration { | |
901 | uint8_t index; | |
902 | } __packed; | |
903 | ||
904 | struct ec_response_tmp006_get_calibration { | |
905 | float s0; | |
906 | float b0; | |
907 | float b1; | |
908 | float b2; | |
909 | } __packed; | |
910 | ||
911 | /* Set TMP006 calibration data */ | |
912 | #define EC_CMD_TMP006_SET_CALIBRATION 0x54 | |
913 | ||
914 | struct ec_params_tmp006_set_calibration { | |
915 | uint8_t index; | |
916 | uint8_t reserved[3]; /* Reserved; set 0 */ | |
917 | float s0; | |
918 | float b0; | |
919 | float b1; | |
920 | float b2; | |
921 | } __packed; | |
922 | ||
923 | /*****************************************************************************/ | |
924 | /* MKBP - Matrix KeyBoard Protocol */ | |
925 | ||
926 | /* | |
927 | * Read key state | |
928 | * | |
929 | * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for | |
930 | * expected response size. | |
931 | */ | |
932 | #define EC_CMD_MKBP_STATE 0x60 | |
933 | ||
934 | /* Provide information about the matrix : number of rows and columns */ | |
935 | #define EC_CMD_MKBP_INFO 0x61 | |
936 | ||
937 | struct ec_response_mkbp_info { | |
938 | uint32_t rows; | |
939 | uint32_t cols; | |
940 | uint8_t switches; | |
941 | } __packed; | |
942 | ||
943 | /* Simulate key press */ | |
944 | #define EC_CMD_MKBP_SIMULATE_KEY 0x62 | |
945 | ||
946 | struct ec_params_mkbp_simulate_key { | |
947 | uint8_t col; | |
948 | uint8_t row; | |
949 | uint8_t pressed; | |
950 | } __packed; | |
951 | ||
952 | /* Configure keyboard scanning */ | |
953 | #define EC_CMD_MKBP_SET_CONFIG 0x64 | |
954 | #define EC_CMD_MKBP_GET_CONFIG 0x65 | |
955 | ||
956 | /* flags */ | |
957 | enum mkbp_config_flags { | |
958 | EC_MKBP_FLAGS_ENABLE = 1, /* Enable keyboard scanning */ | |
959 | }; | |
960 | ||
961 | enum mkbp_config_valid { | |
962 | EC_MKBP_VALID_SCAN_PERIOD = 1 << 0, | |
963 | EC_MKBP_VALID_POLL_TIMEOUT = 1 << 1, | |
964 | EC_MKBP_VALID_MIN_POST_SCAN_DELAY = 1 << 3, | |
965 | EC_MKBP_VALID_OUTPUT_SETTLE = 1 << 4, | |
966 | EC_MKBP_VALID_DEBOUNCE_DOWN = 1 << 5, | |
967 | EC_MKBP_VALID_DEBOUNCE_UP = 1 << 6, | |
968 | EC_MKBP_VALID_FIFO_MAX_DEPTH = 1 << 7, | |
969 | }; | |
970 | ||
971 | /* Configuration for our key scanning algorithm */ | |
972 | struct ec_mkbp_config { | |
973 | uint32_t valid_mask; /* valid fields */ | |
974 | uint8_t flags; /* some flags (enum mkbp_config_flags) */ | |
975 | uint8_t valid_flags; /* which flags are valid */ | |
976 | uint16_t scan_period_us; /* period between start of scans */ | |
977 | /* revert to interrupt mode after no activity for this long */ | |
978 | uint32_t poll_timeout_us; | |
979 | /* | |
980 | * minimum post-scan relax time. Once we finish a scan we check | |
981 | * the time until we are due to start the next one. If this time is | |
982 | * shorter this field, we use this instead. | |
983 | */ | |
984 | uint16_t min_post_scan_delay_us; | |
985 | /* delay between setting up output and waiting for it to settle */ | |
986 | uint16_t output_settle_us; | |
987 | uint16_t debounce_down_us; /* time for debounce on key down */ | |
988 | uint16_t debounce_up_us; /* time for debounce on key up */ | |
989 | /* maximum depth to allow for fifo (0 = no keyscan output) */ | |
990 | uint8_t fifo_max_depth; | |
991 | } __packed; | |
992 | ||
993 | struct ec_params_mkbp_set_config { | |
994 | struct ec_mkbp_config config; | |
995 | } __packed; | |
996 | ||
997 | struct ec_response_mkbp_get_config { | |
998 | struct ec_mkbp_config config; | |
999 | } __packed; | |
1000 | ||
1001 | /* Run the key scan emulation */ | |
1002 | #define EC_CMD_KEYSCAN_SEQ_CTRL 0x66 | |
1003 | ||
1004 | enum ec_keyscan_seq_cmd { | |
1005 | EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */ | |
1006 | EC_KEYSCAN_SEQ_CLEAR = 1, /* Clear sequence */ | |
1007 | EC_KEYSCAN_SEQ_ADD = 2, /* Add item to sequence */ | |
1008 | EC_KEYSCAN_SEQ_START = 3, /* Start running sequence */ | |
1009 | EC_KEYSCAN_SEQ_COLLECT = 4, /* Collect sequence summary data */ | |
1010 | }; | |
1011 | ||
1012 | enum ec_collect_flags { | |
1013 | /* | |
1014 | * Indicates this scan was processed by the EC. Due to timing, some | |
1015 | * scans may be skipped. | |
1016 | */ | |
1017 | EC_KEYSCAN_SEQ_FLAG_DONE = 1 << 0, | |
1018 | }; | |
1019 | ||
1020 | struct ec_collect_item { | |
1021 | uint8_t flags; /* some flags (enum ec_collect_flags) */ | |
1022 | }; | |
1023 | ||
1024 | struct ec_params_keyscan_seq_ctrl { | |
1025 | uint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */ | |
1026 | union { | |
1027 | struct { | |
1028 | uint8_t active; /* still active */ | |
1029 | uint8_t num_items; /* number of items */ | |
1030 | /* Current item being presented */ | |
1031 | uint8_t cur_item; | |
1032 | } status; | |
1033 | struct { | |
1034 | /* | |
1035 | * Absolute time for this scan, measured from the | |
1036 | * start of the sequence. | |
1037 | */ | |
1038 | uint32_t time_us; | |
1039 | uint8_t scan[0]; /* keyscan data */ | |
1040 | } add; | |
1041 | struct { | |
1042 | uint8_t start_item; /* First item to return */ | |
1043 | uint8_t num_items; /* Number of items to return */ | |
1044 | } collect; | |
1045 | }; | |
1046 | } __packed; | |
1047 | ||
1048 | struct ec_result_keyscan_seq_ctrl { | |
1049 | union { | |
1050 | struct { | |
1051 | uint8_t num_items; /* Number of items */ | |
1052 | /* Data for each item */ | |
1053 | struct ec_collect_item item[0]; | |
1054 | } collect; | |
1055 | }; | |
1056 | } __packed; | |
1057 | ||
1058 | /*****************************************************************************/ | |
1059 | /* Temperature sensor commands */ | |
1060 | ||
1061 | /* Read temperature sensor info */ | |
1062 | #define EC_CMD_TEMP_SENSOR_GET_INFO 0x70 | |
1063 | ||
1064 | struct ec_params_temp_sensor_get_info { | |
1065 | uint8_t id; | |
1066 | } __packed; | |
1067 | ||
1068 | struct ec_response_temp_sensor_get_info { | |
1069 | char sensor_name[32]; | |
1070 | uint8_t sensor_type; | |
1071 | } __packed; | |
1072 | ||
1073 | /*****************************************************************************/ | |
1074 | ||
1075 | /* | |
1076 | * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI | |
1077 | * commands accidentally sent to the wrong interface. See the ACPI section | |
1078 | * below. | |
1079 | */ | |
1080 | ||
1081 | /*****************************************************************************/ | |
1082 | /* Host event commands */ | |
1083 | ||
1084 | /* | |
1085 | * Host event mask params and response structures, shared by all of the host | |
1086 | * event commands below. | |
1087 | */ | |
1088 | struct ec_params_host_event_mask { | |
1089 | uint32_t mask; | |
1090 | } __packed; | |
1091 | ||
1092 | struct ec_response_host_event_mask { | |
1093 | uint32_t mask; | |
1094 | } __packed; | |
1095 | ||
1096 | /* These all use ec_response_host_event_mask */ | |
1097 | #define EC_CMD_HOST_EVENT_GET_B 0x87 | |
1098 | #define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x88 | |
1099 | #define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x89 | |
1100 | #define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x8d | |
1101 | ||
1102 | /* These all use ec_params_host_event_mask */ | |
1103 | #define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x8a | |
1104 | #define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x8b | |
1105 | #define EC_CMD_HOST_EVENT_CLEAR 0x8c | |
1106 | #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x8e | |
1107 | #define EC_CMD_HOST_EVENT_CLEAR_B 0x8f | |
1108 | ||
1109 | /*****************************************************************************/ | |
1110 | /* Switch commands */ | |
1111 | ||
1112 | /* Enable/disable LCD backlight */ | |
1113 | #define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x90 | |
1114 | ||
1115 | struct ec_params_switch_enable_backlight { | |
1116 | uint8_t enabled; | |
1117 | } __packed; | |
1118 | ||
1119 | /* Enable/disable WLAN/Bluetooth */ | |
1120 | #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x91 | |
1121 | ||
1122 | struct ec_params_switch_enable_wireless { | |
1123 | uint8_t enabled; | |
1124 | } __packed; | |
1125 | ||
1126 | /*****************************************************************************/ | |
1127 | /* GPIO commands. Only available on EC if write protect has been disabled. */ | |
1128 | ||
1129 | /* Set GPIO output value */ | |
1130 | #define EC_CMD_GPIO_SET 0x92 | |
1131 | ||
1132 | struct ec_params_gpio_set { | |
1133 | char name[32]; | |
1134 | uint8_t val; | |
1135 | } __packed; | |
1136 | ||
1137 | /* Get GPIO value */ | |
1138 | #define EC_CMD_GPIO_GET 0x93 | |
1139 | ||
1140 | struct ec_params_gpio_get { | |
1141 | char name[32]; | |
1142 | } __packed; | |
1143 | struct ec_response_gpio_get { | |
1144 | uint8_t val; | |
1145 | } __packed; | |
1146 | ||
1147 | /*****************************************************************************/ | |
1148 | /* I2C commands. Only available when flash write protect is unlocked. */ | |
1149 | ||
1150 | /* Read I2C bus */ | |
1151 | #define EC_CMD_I2C_READ 0x94 | |
1152 | ||
1153 | struct ec_params_i2c_read { | |
1154 | uint16_t addr; | |
1155 | uint8_t read_size; /* Either 8 or 16. */ | |
1156 | uint8_t port; | |
1157 | uint8_t offset; | |
1158 | } __packed; | |
1159 | struct ec_response_i2c_read { | |
1160 | uint16_t data; | |
1161 | } __packed; | |
1162 | ||
1163 | /* Write I2C bus */ | |
1164 | #define EC_CMD_I2C_WRITE 0x95 | |
1165 | ||
1166 | struct ec_params_i2c_write { | |
1167 | uint16_t data; | |
1168 | uint16_t addr; | |
1169 | uint8_t write_size; /* Either 8 or 16. */ | |
1170 | uint8_t port; | |
1171 | uint8_t offset; | |
1172 | } __packed; | |
1173 | ||
1174 | /*****************************************************************************/ | |
1175 | /* Charge state commands. Only available when flash write protect unlocked. */ | |
1176 | ||
1177 | /* Force charge state machine to stop in idle mode */ | |
1178 | #define EC_CMD_CHARGE_FORCE_IDLE 0x96 | |
1179 | ||
1180 | struct ec_params_force_idle { | |
1181 | uint8_t enabled; | |
1182 | } __packed; | |
1183 | ||
1184 | /*****************************************************************************/ | |
1185 | /* Console commands. Only available when flash write protect is unlocked. */ | |
1186 | ||
1187 | /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */ | |
1188 | #define EC_CMD_CONSOLE_SNAPSHOT 0x97 | |
1189 | ||
1190 | /* | |
1191 | * Read next chunk of data from saved snapshot. | |
1192 | * | |
1193 | * Response is null-terminated string. Empty string, if there is no more | |
1194 | * remaining output. | |
1195 | */ | |
1196 | #define EC_CMD_CONSOLE_READ 0x98 | |
1197 | ||
1198 | /*****************************************************************************/ | |
1199 | ||
1200 | /* | |
1201 | * Cut off battery power output if the battery supports. | |
1202 | * | |
1203 | * For unsupported battery, just don't implement this command and lets EC | |
1204 | * return EC_RES_INVALID_COMMAND. | |
1205 | */ | |
1206 | #define EC_CMD_BATTERY_CUT_OFF 0x99 | |
1207 | ||
1208 | /*****************************************************************************/ | |
1209 | /* Temporary debug commands. TODO: remove this crosbug.com/p/13849 */ | |
1210 | ||
1211 | /* | |
1212 | * Dump charge state machine context. | |
1213 | * | |
1214 | * Response is a binary dump of charge state machine context. | |
1215 | */ | |
1216 | #define EC_CMD_CHARGE_DUMP 0xa0 | |
1217 | ||
1218 | /* | |
1219 | * Set maximum battery charging current. | |
1220 | */ | |
1221 | #define EC_CMD_CHARGE_CURRENT_LIMIT 0xa1 | |
1222 | ||
1223 | struct ec_params_current_limit { | |
1224 | uint32_t limit; | |
1225 | } __packed; | |
1226 | ||
1227 | /*****************************************************************************/ | |
1228 | /* System commands */ | |
1229 | ||
1230 | /* | |
1231 | * TODO: this is a confusing name, since it doesn't necessarily reboot the EC. | |
1232 | * Rename to "set image" or something similar. | |
1233 | */ | |
1234 | #define EC_CMD_REBOOT_EC 0xd2 | |
1235 | ||
1236 | /* Command */ | |
1237 | enum ec_reboot_cmd { | |
1238 | EC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */ | |
1239 | EC_REBOOT_JUMP_RO = 1, /* Jump to RO without rebooting */ | |
1240 | EC_REBOOT_JUMP_RW = 2, /* Jump to RW without rebooting */ | |
1241 | /* (command 3 was jump to RW-B) */ | |
1242 | EC_REBOOT_COLD = 4, /* Cold-reboot */ | |
1243 | EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */ | |
1244 | EC_REBOOT_HIBERNATE = 6 /* Hibernate EC */ | |
1245 | }; | |
1246 | ||
1247 | /* Flags for ec_params_reboot_ec.reboot_flags */ | |
1248 | #define EC_REBOOT_FLAG_RESERVED0 (1 << 0) /* Was recovery request */ | |
1249 | #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN (1 << 1) /* Reboot after AP shutdown */ | |
1250 | ||
1251 | struct ec_params_reboot_ec { | |
1252 | uint8_t cmd; /* enum ec_reboot_cmd */ | |
1253 | uint8_t flags; /* See EC_REBOOT_FLAG_* */ | |
1254 | } __packed; | |
1255 | ||
1256 | /* | |
1257 | * Get information on last EC panic. | |
1258 | * | |
1259 | * Returns variable-length platform-dependent panic information. See panic.h | |
1260 | * for details. | |
1261 | */ | |
1262 | #define EC_CMD_GET_PANIC_INFO 0xd3 | |
1263 | ||
1264 | /*****************************************************************************/ | |
1265 | /* | |
1266 | * ACPI commands | |
1267 | * | |
1268 | * These are valid ONLY on the ACPI command/data port. | |
1269 | */ | |
1270 | ||
1271 | /* | |
1272 | * ACPI Read Embedded Controller | |
1273 | * | |
1274 | * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). | |
1275 | * | |
1276 | * Use the following sequence: | |
1277 | * | |
1278 | * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD | |
1279 | * - Wait for EC_LPC_CMDR_PENDING bit to clear | |
1280 | * - Write address to EC_LPC_ADDR_ACPI_DATA | |
1281 | * - Wait for EC_LPC_CMDR_DATA bit to set | |
1282 | * - Read value from EC_LPC_ADDR_ACPI_DATA | |
1283 | */ | |
1284 | #define EC_CMD_ACPI_READ 0x80 | |
1285 | ||
1286 | /* | |
1287 | * ACPI Write Embedded Controller | |
1288 | * | |
1289 | * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). | |
1290 | * | |
1291 | * Use the following sequence: | |
1292 | * | |
1293 | * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD | |
1294 | * - Wait for EC_LPC_CMDR_PENDING bit to clear | |
1295 | * - Write address to EC_LPC_ADDR_ACPI_DATA | |
1296 | * - Wait for EC_LPC_CMDR_PENDING bit to clear | |
1297 | * - Write value to EC_LPC_ADDR_ACPI_DATA | |
1298 | */ | |
1299 | #define EC_CMD_ACPI_WRITE 0x81 | |
1300 | ||
1301 | /* | |
1302 | * ACPI Query Embedded Controller | |
1303 | * | |
1304 | * This clears the lowest-order bit in the currently pending host events, and | |
1305 | * sets the result code to the 1-based index of the bit (event 0x00000001 = 1, | |
1306 | * event 0x80000000 = 32), or 0 if no event was pending. | |
1307 | */ | |
1308 | #define EC_CMD_ACPI_QUERY_EVENT 0x84 | |
1309 | ||
1310 | /* Valid addresses in ACPI memory space, for read/write commands */ | |
1311 | /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */ | |
1312 | #define EC_ACPI_MEM_VERSION 0x00 | |
1313 | /* | |
1314 | * Test location; writing value here updates test compliment byte to (0xff - | |
1315 | * value). | |
1316 | */ | |
1317 | #define EC_ACPI_MEM_TEST 0x01 | |
1318 | /* Test compliment; writes here are ignored. */ | |
1319 | #define EC_ACPI_MEM_TEST_COMPLIMENT 0x02 | |
1320 | /* Keyboard backlight brightness percent (0 - 100) */ | |
1321 | #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03 | |
1322 | ||
1323 | /* Current version of ACPI memory address space */ | |
1324 | #define EC_ACPI_MEM_VERSION_CURRENT 1 | |
1325 | ||
1326 | ||
1327 | /*****************************************************************************/ | |
1328 | /* | |
1329 | * Special commands | |
1330 | * | |
1331 | * These do not follow the normal rules for commands. See each command for | |
1332 | * details. | |
1333 | */ | |
1334 | ||
1335 | /* | |
1336 | * Reboot NOW | |
1337 | * | |
1338 | * This command will work even when the EC LPC interface is busy, because the | |
1339 | * reboot command is processed at interrupt level. Note that when the EC | |
1340 | * reboots, the host will reboot too, so there is no response to this command. | |
1341 | * | |
1342 | * Use EC_CMD_REBOOT_EC to reboot the EC more politely. | |
1343 | */ | |
1344 | #define EC_CMD_REBOOT 0xd1 /* Think "die" */ | |
1345 | ||
1346 | /* | |
1347 | * Resend last response (not supported on LPC). | |
1348 | * | |
1349 | * Returns EC_RES_UNAVAILABLE if there is no response available - for example, | |
1350 | * there was no previous command, or the previous command's response was too | |
1351 | * big to save. | |
1352 | */ | |
1353 | #define EC_CMD_RESEND_RESPONSE 0xdb | |
1354 | ||
1355 | /* | |
1356 | * This header byte on a command indicate version 0. Any header byte less | |
1357 | * than this means that we are talking to an old EC which doesn't support | |
1358 | * versioning. In that case, we assume version 0. | |
1359 | * | |
1360 | * Header bytes greater than this indicate a later version. For example, | |
1361 | * EC_CMD_VERSION0 + 1 means we are using version 1. | |
1362 | * | |
1363 | * The old EC interface must not use commands 0dc or higher. | |
1364 | */ | |
1365 | #define EC_CMD_VERSION0 0xdc | |
1366 | ||
1367 | #endif /* !__ACPI__ */ | |
1368 | ||
1369 | #endif /* __CROS_EC_COMMANDS_H */ |