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b94d5230 DW |
1 | /* |
2 | * libnvdimm - Non-volatile-memory Devices Subsystem | |
3 | * | |
4 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of version 2 of the GNU General Public License as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, but | |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
13 | * General Public License for more details. | |
14 | */ | |
15 | #ifndef __LIBNVDIMM_H__ | |
16 | #define __LIBNVDIMM_H__ | |
047fc8a1 | 17 | #include <linux/kernel.h> |
62232e45 DW |
18 | #include <linux/sizes.h> |
19 | #include <linux/types.h> | |
e6dfb2de DW |
20 | |
21 | enum { | |
22 | /* when a dimm supports both PMEM and BLK access a label is required */ | |
23 | NDD_ALIASING = 1 << 0, | |
58138820 DW |
24 | /* unarmed memory devices may not persist writes */ |
25 | NDD_UNARMED = 1 << 1, | |
62232e45 DW |
26 | |
27 | /* need to set a limit somewhere, but yes, this is likely overkill */ | |
28 | ND_IOCTL_MAX_BUFLEN = SZ_4M, | |
29 | ND_CMD_MAX_ELEM = 4, | |
30 | ND_CMD_MAX_ENVELOPE = 16, | |
31 | ND_CMD_ARS_STATUS_MAX = SZ_4K, | |
1f7df6f8 | 32 | ND_MAX_MAPPINGS = 32, |
1b40e09a DW |
33 | |
34 | /* mark newly adjusted resources as requiring a label update */ | |
35 | DPA_RESOURCE_ADJUSTED = 1 << 0, | |
e6dfb2de DW |
36 | }; |
37 | ||
45def22c | 38 | extern struct attribute_group nvdimm_bus_attribute_group; |
62232e45 | 39 | extern struct attribute_group nvdimm_attribute_group; |
4d88a97a | 40 | extern struct attribute_group nd_device_attribute_group; |
74ae66c3 | 41 | extern struct attribute_group nd_numa_attribute_group; |
1f7df6f8 DW |
42 | extern struct attribute_group nd_region_attribute_group; |
43 | extern struct attribute_group nd_mapping_attribute_group; | |
45def22c | 44 | |
b94d5230 DW |
45 | struct nvdimm; |
46 | struct nvdimm_bus_descriptor; | |
47 | typedef int (*ndctl_fn)(struct nvdimm_bus_descriptor *nd_desc, | |
48 | struct nvdimm *nvdimm, unsigned int cmd, void *buf, | |
49 | unsigned int buf_len); | |
50 | ||
bf9bccc1 DW |
51 | struct nd_namespace_label; |
52 | struct nvdimm_drvdata; | |
1f7df6f8 DW |
53 | struct nd_mapping { |
54 | struct nvdimm *nvdimm; | |
bf9bccc1 | 55 | struct nd_namespace_label **labels; |
1f7df6f8 DW |
56 | u64 start; |
57 | u64 size; | |
bf9bccc1 DW |
58 | /* |
59 | * @ndd is for private use at region enable / disable time for | |
60 | * get_ndd() + put_ndd(), all other nd_mapping to ndd | |
61 | * conversions use to_ndd() which respects enabled state of the | |
62 | * nvdimm. | |
63 | */ | |
64 | struct nvdimm_drvdata *ndd; | |
1f7df6f8 DW |
65 | }; |
66 | ||
b94d5230 | 67 | struct nvdimm_bus_descriptor { |
45def22c | 68 | const struct attribute_group **attr_groups; |
b94d5230 DW |
69 | unsigned long dsm_mask; |
70 | char *provider_name; | |
71 | ndctl_fn ndctl; | |
72 | }; | |
73 | ||
62232e45 DW |
74 | struct nd_cmd_desc { |
75 | int in_num; | |
76 | int out_num; | |
77 | u32 in_sizes[ND_CMD_MAX_ELEM]; | |
78 | int out_sizes[ND_CMD_MAX_ELEM]; | |
79 | }; | |
80 | ||
eaf96153 DW |
81 | struct nd_interleave_set { |
82 | u64 cookie; | |
83 | }; | |
84 | ||
1f7df6f8 DW |
85 | struct nd_region_desc { |
86 | struct resource *res; | |
87 | struct nd_mapping *nd_mapping; | |
88 | u16 num_mappings; | |
89 | const struct attribute_group **attr_groups; | |
eaf96153 | 90 | struct nd_interleave_set *nd_set; |
1f7df6f8 | 91 | void *provider_data; |
5212e11f | 92 | int num_lanes; |
41d7a6d6 | 93 | int numa_node; |
1f7df6f8 DW |
94 | }; |
95 | ||
62232e45 | 96 | struct nvdimm_bus; |
3d88002e | 97 | struct module; |
047fc8a1 RZ |
98 | struct device; |
99 | struct nd_blk_region; | |
100 | struct nd_blk_region_desc { | |
101 | int (*enable)(struct nvdimm_bus *nvdimm_bus, struct device *dev); | |
102 | void (*disable)(struct nvdimm_bus *nvdimm_bus, struct device *dev); | |
103 | int (*do_io)(struct nd_blk_region *ndbr, resource_size_t dpa, | |
104 | void *iobuf, u64 len, int rw); | |
105 | struct nd_region_desc ndr_desc; | |
106 | }; | |
107 | ||
108 | static inline struct nd_blk_region_desc *to_blk_region_desc( | |
109 | struct nd_region_desc *ndr_desc) | |
110 | { | |
111 | return container_of(ndr_desc, struct nd_blk_region_desc, ndr_desc); | |
112 | ||
113 | } | |
114 | ||
3d88002e DW |
115 | struct nvdimm_bus *__nvdimm_bus_register(struct device *parent, |
116 | struct nvdimm_bus_descriptor *nfit_desc, struct module *module); | |
117 | #define nvdimm_bus_register(parent, desc) \ | |
118 | __nvdimm_bus_register(parent, desc, THIS_MODULE) | |
b94d5230 | 119 | void nvdimm_bus_unregister(struct nvdimm_bus *nvdimm_bus); |
45def22c | 120 | struct nvdimm_bus *to_nvdimm_bus(struct device *dev); |
e6dfb2de | 121 | struct nvdimm *to_nvdimm(struct device *dev); |
1f7df6f8 | 122 | struct nd_region *to_nd_region(struct device *dev); |
047fc8a1 | 123 | struct nd_blk_region *to_nd_blk_region(struct device *dev); |
45def22c | 124 | struct nvdimm_bus_descriptor *to_nd_desc(struct nvdimm_bus *nvdimm_bus); |
e6dfb2de DW |
125 | const char *nvdimm_name(struct nvdimm *nvdimm); |
126 | void *nvdimm_provider_data(struct nvdimm *nvdimm); | |
127 | struct nvdimm *nvdimm_create(struct nvdimm_bus *nvdimm_bus, void *provider_data, | |
62232e45 DW |
128 | const struct attribute_group **groups, unsigned long flags, |
129 | unsigned long *dsm_mask); | |
130 | const struct nd_cmd_desc *nd_cmd_dimm_desc(int cmd); | |
131 | const struct nd_cmd_desc *nd_cmd_bus_desc(int cmd); | |
132 | u32 nd_cmd_in_size(struct nvdimm *nvdimm, int cmd, | |
133 | const struct nd_cmd_desc *desc, int idx, void *buf); | |
134 | u32 nd_cmd_out_size(struct nvdimm *nvdimm, int cmd, | |
135 | const struct nd_cmd_desc *desc, int idx, const u32 *in_field, | |
136 | const u32 *out_field); | |
4d88a97a | 137 | int nvdimm_bus_check_dimm_count(struct nvdimm_bus *nvdimm_bus, int dimm_count); |
1f7df6f8 DW |
138 | struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus, |
139 | struct nd_region_desc *ndr_desc); | |
140 | struct nd_region *nvdimm_blk_region_create(struct nvdimm_bus *nvdimm_bus, | |
141 | struct nd_region_desc *ndr_desc); | |
142 | struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus, | |
143 | struct nd_region_desc *ndr_desc); | |
047fc8a1 RZ |
144 | void *nd_region_provider_data(struct nd_region *nd_region); |
145 | void *nd_blk_region_provider_data(struct nd_blk_region *ndbr); | |
146 | void nd_blk_region_set_provider_data(struct nd_blk_region *ndbr, void *data); | |
147 | struct nvdimm *nd_blk_region_to_dimm(struct nd_blk_region *ndbr); | |
148 | unsigned int nd_region_acquire_lane(struct nd_region *nd_region); | |
149 | void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane); | |
eaf96153 | 150 | u64 nd_fletcher64(void *addr, size_t len, bool le); |
b94d5230 | 151 | #endif /* __LIBNVDIMM_H__ */ |