Merge tag 'perf-tools-fixes-for-v6.9-2024-04-19' of git://git.kernel.org/pub/scm...
[linux-2.6-block.git] / include / linux / libnvdimm.h
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5b497af4 1/* SPDX-License-Identifier: GPL-2.0-only */
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2/*
3 * libnvdimm - Non-volatile-memory Devices Subsystem
4 *
5 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
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6 */
7#ifndef __LIBNVDIMM_H__
8#define __LIBNVDIMM_H__
047fc8a1 9#include <linux/kernel.h>
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10#include <linux/sizes.h>
11#include <linux/types.h>
faec6f8a 12#include <linux/uuid.h>
aa9ad44a 13#include <linux/spinlock.h>
c5d4355d 14#include <linux/bio.h>
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15
16struct badrange_entry {
17 u64 start;
18 u64 length;
19 struct list_head list;
20};
21
22struct badrange {
23 struct list_head list;
24 spinlock_t lock;
25};
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26
27enum {
58138820 28 /* unarmed memory devices may not persist writes */
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29 NDD_UNARMED = 1,
30 /* locked memory devices should not be accessed */
31 NDD_LOCKED = 2,
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32 /* memory under security wipes should not be accessed */
33 NDD_SECURITY_OVERWRITE = 3,
34 /* tracking whether or not there is a pending device reference */
35 NDD_WORK_PENDING = 4,
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36 /* dimm supports namespace labels */
37 NDD_LABELING = 6,
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38 /*
39 * dimm contents have changed requiring invalidation of CPU caches prior
40 * to activation of a region that includes this device
41 */
42 NDD_INCOHERENT = 7,
62232e45 43
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44 /* dimm provider wants synchronous registration by __nvdimm_create() */
45 NDD_REGISTER_SYNC = 8,
46
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47 /* need to set a limit somewhere, but yes, this is likely overkill */
48 ND_IOCTL_MAX_BUFLEN = SZ_4M,
4577b066 49 ND_CMD_MAX_ELEM = 5,
40abf9be 50 ND_CMD_MAX_ENVELOPE = 256,
1f7df6f8 51 ND_MAX_MAPPINGS = 32,
1b40e09a 52
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53 /* region flag indicating to direct-map persistent memory by default */
54 ND_REGION_PAGEMAP = 0,
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55 /*
56 * Platform ensures entire CPU store data path is flushed to pmem on
57 * system power loss.
58 */
59 ND_REGION_PERSIST_CACHE = 1,
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60 /*
61 * Platform provides mechanisms to automatically flush outstanding
62 * write data from memory controler to pmem on system power loss.
63 * (ADR)
64 */
65 ND_REGION_PERSIST_MEMCTRL = 2,
004f1afb 66
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67 /* Platform provides asynchronous flush mechanism */
68 ND_REGION_ASYNC = 3,
69
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70 /* Region was created by CXL subsystem */
71 ND_REGION_CXL = 4,
72
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73 /* mark newly adjusted resources as requiring a label update */
74 DPA_RESOURCE_ADJUSTED = 1 << 0,
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75};
76
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77struct nvdimm;
78struct nvdimm_bus_descriptor;
79typedef int (*ndctl_fn)(struct nvdimm_bus_descriptor *nd_desc,
80 struct nvdimm *nvdimm, unsigned int cmd, void *buf,
aef25338 81 unsigned int buf_len, int *cmd_rc);
b94d5230 82
1ff19f48 83struct device_node;
b94d5230 84struct nvdimm_bus_descriptor {
45def22c 85 const struct attribute_group **attr_groups;
e3654eca 86 unsigned long cmd_mask;
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87 unsigned long dimm_family_mask;
88 unsigned long bus_family_mask;
bc9775d8 89 struct module *module;
b94d5230 90 char *provider_name;
1ff19f48 91 struct device_node *of_node;
b94d5230 92 ndctl_fn ndctl;
7ae0fa43 93 int (*flush_probe)(struct nvdimm_bus_descriptor *nd_desc);
87bf572e 94 int (*clear_to_send)(struct nvdimm_bus_descriptor *nd_desc,
b3ed2ce0 95 struct nvdimm *nvdimm, unsigned int cmd, void *data);
48001ea5 96 const struct nvdimm_bus_fw_ops *fw_ops;
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97};
98
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99struct nd_cmd_desc {
100 int in_num;
101 int out_num;
102 u32 in_sizes[ND_CMD_MAX_ELEM];
103 int out_sizes[ND_CMD_MAX_ELEM];
104};
105
eaf96153 106struct nd_interleave_set {
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107 /* v1.1 definition of the interleave-set-cookie algorithm */
108 u64 cookie1;
109 /* v1.2 definition of the interleave-set-cookie algorithm */
110 u64 cookie2;
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111 /* compatibility with initial buggy Linux implementation */
112 u64 altcookie;
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113
114 guid_t type_guid;
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115};
116
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117struct nd_mapping_desc {
118 struct nvdimm *nvdimm;
119 u64 start;
120 u64 size;
401c0a19 121 int position;
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122};
123
c5d4355d 124struct nd_region;
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125struct nd_region_desc {
126 struct resource *res;
44c462eb 127 struct nd_mapping_desc *mapping;
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128 u16 num_mappings;
129 const struct attribute_group **attr_groups;
eaf96153 130 struct nd_interleave_set *nd_set;
1f7df6f8 131 void *provider_data;
5212e11f 132 int num_lanes;
41d7a6d6 133 int numa_node;
8fc5c735 134 int target_node;
004f1afb 135 unsigned long flags;
04ad63f0 136 int memregion;
1ff19f48 137 struct device_node *of_node;
c5d4355d 138 int (*flush)(struct nd_region *nd_region, struct bio *bio);
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139};
140
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141struct device;
142void *devm_nvdimm_memremap(struct device *dev, resource_size_t offset,
143 size_t size, unsigned long flags);
144static inline void __iomem *devm_nvdimm_ioremap(struct device *dev,
145 resource_size_t offset, size_t size)
146{
147 return (void __iomem *) devm_nvdimm_memremap(dev, offset, size, 0);
148}
149
62232e45 150struct nvdimm_bus;
047fc8a1 151
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152/*
153 * Note that separate bits for locked + unlocked are defined so that
154 * 'flags == 0' corresponds to an error / not-supported state.
155 */
156enum nvdimm_security_bits {
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157 NVDIMM_SECURITY_DISABLED,
158 NVDIMM_SECURITY_UNLOCKED,
159 NVDIMM_SECURITY_LOCKED,
160 NVDIMM_SECURITY_FROZEN,
161 NVDIMM_SECURITY_OVERWRITE,
162};
163
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164#define NVDIMM_PASSPHRASE_LEN 32
165#define NVDIMM_KEY_DESC_LEN 22
166
167struct nvdimm_key_data {
168 u8 data[NVDIMM_PASSPHRASE_LEN];
169};
170
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171enum nvdimm_passphrase_type {
172 NVDIMM_USER,
173 NVDIMM_MASTER,
174};
175
f2989396 176struct nvdimm_security_ops {
d78c620a 177 unsigned long (*get_flags)(struct nvdimm *nvdimm,
89fa9d8e 178 enum nvdimm_passphrase_type pass_type);
37833fb7 179 int (*freeze)(struct nvdimm *nvdimm);
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180 int (*change_key)(struct nvdimm *nvdimm,
181 const struct nvdimm_key_data *old_data,
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182 const struct nvdimm_key_data *new_data,
183 enum nvdimm_passphrase_type pass_type);
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184 int (*unlock)(struct nvdimm *nvdimm,
185 const struct nvdimm_key_data *key_data);
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186 int (*disable)(struct nvdimm *nvdimm,
187 const struct nvdimm_key_data *key_data);
64e77c8c 188 int (*erase)(struct nvdimm *nvdimm,
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189 const struct nvdimm_key_data *key_data,
190 enum nvdimm_passphrase_type pass_type);
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191 int (*overwrite)(struct nvdimm *nvdimm,
192 const struct nvdimm_key_data *key_data);
193 int (*query_overwrite)(struct nvdimm *nvdimm);
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194 int (*disable_master)(struct nvdimm *nvdimm,
195 const struct nvdimm_key_data *key_data);
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196};
197
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198enum nvdimm_fwa_state {
199 NVDIMM_FWA_INVALID,
200 NVDIMM_FWA_IDLE,
201 NVDIMM_FWA_ARMED,
202 NVDIMM_FWA_BUSY,
203 NVDIMM_FWA_ARM_OVERFLOW,
204};
205
206enum nvdimm_fwa_trigger {
207 NVDIMM_FWA_ARM,
208 NVDIMM_FWA_DISARM,
209};
210
211enum nvdimm_fwa_capability {
212 NVDIMM_FWA_CAP_INVALID,
213 NVDIMM_FWA_CAP_NONE,
214 NVDIMM_FWA_CAP_QUIESCE,
215 NVDIMM_FWA_CAP_LIVE,
216};
217
218enum nvdimm_fwa_result {
219 NVDIMM_FWA_RESULT_INVALID,
220 NVDIMM_FWA_RESULT_NONE,
221 NVDIMM_FWA_RESULT_SUCCESS,
222 NVDIMM_FWA_RESULT_NOTSTAGED,
223 NVDIMM_FWA_RESULT_NEEDRESET,
224 NVDIMM_FWA_RESULT_FAIL,
225};
226
227struct nvdimm_bus_fw_ops {
228 enum nvdimm_fwa_state (*activate_state)
229 (struct nvdimm_bus_descriptor *nd_desc);
230 enum nvdimm_fwa_capability (*capability)
231 (struct nvdimm_bus_descriptor *nd_desc);
232 int (*activate)(struct nvdimm_bus_descriptor *nd_desc);
233};
234
235struct nvdimm_fw_ops {
236 enum nvdimm_fwa_state (*activate_state)(struct nvdimm *nvdimm);
237 enum nvdimm_fwa_result (*activate_result)(struct nvdimm *nvdimm);
238 int (*arm)(struct nvdimm *nvdimm, enum nvdimm_fwa_trigger arg);
239};
240
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241void badrange_init(struct badrange *badrange);
242int badrange_add(struct badrange *badrange, u64 addr, u64 length);
243void badrange_forget(struct badrange *badrange, phys_addr_t start,
244 unsigned int len);
245int nvdimm_bus_add_badrange(struct nvdimm_bus *nvdimm_bus, u64 addr,
246 u64 length);
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247struct nvdimm_bus *nvdimm_bus_register(struct device *parent,
248 struct nvdimm_bus_descriptor *nfit_desc);
b94d5230 249void nvdimm_bus_unregister(struct nvdimm_bus *nvdimm_bus);
45def22c 250struct nvdimm_bus *to_nvdimm_bus(struct device *dev);
f2989396 251struct nvdimm_bus *nvdimm_to_bus(struct nvdimm *nvdimm);
e6dfb2de 252struct nvdimm *to_nvdimm(struct device *dev);
1f7df6f8 253struct nd_region *to_nd_region(struct device *dev);
243f29fe 254struct device *nd_region_dev(struct nd_region *nd_region);
45def22c 255struct nvdimm_bus_descriptor *to_nd_desc(struct nvdimm_bus *nvdimm_bus);
37b137ff 256struct device *to_nvdimm_bus_dev(struct nvdimm_bus *nvdimm_bus);
e6dfb2de 257const char *nvdimm_name(struct nvdimm *nvdimm);
ba9c8dd3 258struct kobject *nvdimm_kobj(struct nvdimm *nvdimm);
e3654eca 259unsigned long nvdimm_cmd_mask(struct nvdimm *nvdimm);
e6dfb2de 260void *nvdimm_provider_data(struct nvdimm *nvdimm);
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261struct nvdimm *__nvdimm_create(struct nvdimm_bus *nvdimm_bus,
262 void *provider_data, const struct attribute_group **groups,
263 unsigned long flags, unsigned long cmd_mask, int num_flush,
f2989396 264 struct resource *flush_wpq, const char *dimm_id,
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265 const struct nvdimm_security_ops *sec_ops,
266 const struct nvdimm_fw_ops *fw_ops);
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267static inline struct nvdimm *nvdimm_create(struct nvdimm_bus *nvdimm_bus,
268 void *provider_data, const struct attribute_group **groups,
269 unsigned long flags, unsigned long cmd_mask, int num_flush,
270 struct resource *flush_wpq)
271{
272 return __nvdimm_create(nvdimm_bus, provider_data, groups, flags,
a1facc1f 273 cmd_mask, num_flush, flush_wpq, NULL, NULL, NULL);
d6548ae4 274}
fd14602d 275void nvdimm_delete(struct nvdimm *nvdimm);
04ad63f0 276void nvdimm_region_delete(struct nd_region *nd_region);
d6548ae4 277
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278const struct nd_cmd_desc *nd_cmd_dimm_desc(int cmd);
279const struct nd_cmd_desc *nd_cmd_bus_desc(int cmd);
280u32 nd_cmd_in_size(struct nvdimm *nvdimm, int cmd,
281 const struct nd_cmd_desc *desc, int idx, void *buf);
282u32 nd_cmd_out_size(struct nvdimm *nvdimm, int cmd,
283 const struct nd_cmd_desc *desc, int idx, const u32 *in_field,
efda1b5d 284 const u32 *out_field, unsigned long remainder);
4d88a97a 285int nvdimm_bus_check_dimm_count(struct nvdimm_bus *nvdimm_bus, int dimm_count);
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286struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus,
287 struct nd_region_desc *ndr_desc);
288struct nd_region *nvdimm_blk_region_create(struct nvdimm_bus *nvdimm_bus,
289 struct nd_region_desc *ndr_desc);
290struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus,
291 struct nd_region_desc *ndr_desc);
047fc8a1 292void *nd_region_provider_data(struct nd_region *nd_region);
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293unsigned int nd_region_acquire_lane(struct nd_region *nd_region);
294void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane);
eaf96153 295u64 nd_fletcher64(void *addr, size_t len, bool le);
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296int nvdimm_flush(struct nd_region *nd_region, struct bio *bio);
297int generic_nvdimm_flush(struct nd_region *nd_region);
f284a4f2 298int nvdimm_has_flush(struct nd_region *nd_region);
0b277961 299int nvdimm_has_cache(struct nd_region *nd_region);
7d988097 300int nvdimm_in_overwrite(struct nvdimm *nvdimm);
fefc1d97 301bool is_nvdimm_sync(struct nd_region *nd_region);
5deb67f7 302
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303static inline int nvdimm_ctl(struct nvdimm *nvdimm, unsigned int cmd, void *buf,
304 unsigned int buf_len, int *cmd_rc)
305{
306 struct nvdimm_bus *nvdimm_bus = nvdimm_to_bus(nvdimm);
307 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
308
309 return nd_desc->ndctl(nd_desc, nvdimm, cmd, buf, buf_len, cmd_rc);
310}
311
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312#ifdef CONFIG_ARCH_HAS_PMEM_API
313#define ARCH_MEMREMAP_PMEM MEMREMAP_WB
314void arch_wb_cache_pmem(void *addr, size_t size);
315void arch_invalidate_pmem(void *addr, size_t size);
316#else
317#define ARCH_MEMREMAP_PMEM MEMREMAP_WT
318static inline void arch_wb_cache_pmem(void *addr, size_t size)
319{
320}
321static inline void arch_invalidate_pmem(void *addr, size_t size)
322{
323}
324#endif
325
b94d5230 326#endif /* __LIBNVDIMM_H__ */