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b94d5230 DW |
1 | /* |
2 | * libnvdimm - Non-volatile-memory Devices Subsystem | |
3 | * | |
4 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of version 2 of the GNU General Public License as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, but | |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
13 | * General Public License for more details. | |
14 | */ | |
15 | #ifndef __LIBNVDIMM_H__ | |
16 | #define __LIBNVDIMM_H__ | |
047fc8a1 | 17 | #include <linux/kernel.h> |
62232e45 DW |
18 | #include <linux/sizes.h> |
19 | #include <linux/types.h> | |
faec6f8a | 20 | #include <linux/uuid.h> |
aa9ad44a DJ |
21 | #include <linux/spinlock.h> |
22 | ||
23 | struct badrange_entry { | |
24 | u64 start; | |
25 | u64 length; | |
26 | struct list_head list; | |
27 | }; | |
28 | ||
29 | struct badrange { | |
30 | struct list_head list; | |
31 | spinlock_t lock; | |
32 | }; | |
e6dfb2de DW |
33 | |
34 | enum { | |
35 | /* when a dimm supports both PMEM and BLK access a label is required */ | |
8f078b38 | 36 | NDD_ALIASING = 0, |
58138820 | 37 | /* unarmed memory devices may not persist writes */ |
8f078b38 DW |
38 | NDD_UNARMED = 1, |
39 | /* locked memory devices should not be accessed */ | |
40 | NDD_LOCKED = 2, | |
7d988097 DJ |
41 | /* memory under security wipes should not be accessed */ |
42 | NDD_SECURITY_OVERWRITE = 3, | |
43 | /* tracking whether or not there is a pending device reference */ | |
44 | NDD_WORK_PENDING = 4, | |
62232e45 DW |
45 | |
46 | /* need to set a limit somewhere, but yes, this is likely overkill */ | |
47 | ND_IOCTL_MAX_BUFLEN = SZ_4M, | |
4577b066 | 48 | ND_CMD_MAX_ELEM = 5, |
40abf9be | 49 | ND_CMD_MAX_ENVELOPE = 256, |
1f7df6f8 | 50 | ND_MAX_MAPPINGS = 32, |
1b40e09a | 51 | |
004f1afb DW |
52 | /* region flag indicating to direct-map persistent memory by default */ |
53 | ND_REGION_PAGEMAP = 0, | |
06e8ccda DJ |
54 | /* |
55 | * Platform ensures entire CPU store data path is flushed to pmem on | |
56 | * system power loss. | |
57 | */ | |
58 | ND_REGION_PERSIST_CACHE = 1, | |
30e6d7bf DJ |
59 | /* |
60 | * Platform provides mechanisms to automatically flush outstanding | |
61 | * write data from memory controler to pmem on system power loss. | |
62 | * (ADR) | |
63 | */ | |
64 | ND_REGION_PERSIST_MEMCTRL = 2, | |
004f1afb | 65 | |
1b40e09a DW |
66 | /* mark newly adjusted resources as requiring a label update */ |
67 | DPA_RESOURCE_ADJUSTED = 1 << 0, | |
e6dfb2de DW |
68 | }; |
69 | ||
45def22c | 70 | extern struct attribute_group nvdimm_bus_attribute_group; |
62232e45 | 71 | extern struct attribute_group nvdimm_attribute_group; |
4d88a97a | 72 | extern struct attribute_group nd_device_attribute_group; |
74ae66c3 | 73 | extern struct attribute_group nd_numa_attribute_group; |
1f7df6f8 DW |
74 | extern struct attribute_group nd_region_attribute_group; |
75 | extern struct attribute_group nd_mapping_attribute_group; | |
45def22c | 76 | |
b94d5230 DW |
77 | struct nvdimm; |
78 | struct nvdimm_bus_descriptor; | |
79 | typedef int (*ndctl_fn)(struct nvdimm_bus_descriptor *nd_desc, | |
80 | struct nvdimm *nvdimm, unsigned int cmd, void *buf, | |
aef25338 | 81 | unsigned int buf_len, int *cmd_rc); |
b94d5230 | 82 | |
1ff19f48 | 83 | struct device_node; |
b94d5230 | 84 | struct nvdimm_bus_descriptor { |
45def22c | 85 | const struct attribute_group **attr_groups; |
7db5bb33 | 86 | unsigned long bus_dsm_mask; |
e3654eca | 87 | unsigned long cmd_mask; |
bc9775d8 | 88 | struct module *module; |
b94d5230 | 89 | char *provider_name; |
1ff19f48 | 90 | struct device_node *of_node; |
b94d5230 | 91 | ndctl_fn ndctl; |
7ae0fa43 | 92 | int (*flush_probe)(struct nvdimm_bus_descriptor *nd_desc); |
87bf572e | 93 | int (*clear_to_send)(struct nvdimm_bus_descriptor *nd_desc, |
b3ed2ce0 | 94 | struct nvdimm *nvdimm, unsigned int cmd, void *data); |
b94d5230 DW |
95 | }; |
96 | ||
62232e45 DW |
97 | struct nd_cmd_desc { |
98 | int in_num; | |
99 | int out_num; | |
100 | u32 in_sizes[ND_CMD_MAX_ELEM]; | |
101 | int out_sizes[ND_CMD_MAX_ELEM]; | |
102 | }; | |
103 | ||
eaf96153 | 104 | struct nd_interleave_set { |
c12c48ce DW |
105 | /* v1.1 definition of the interleave-set-cookie algorithm */ |
106 | u64 cookie1; | |
107 | /* v1.2 definition of the interleave-set-cookie algorithm */ | |
108 | u64 cookie2; | |
86ef58a4 DW |
109 | /* compatibility with initial buggy Linux implementation */ |
110 | u64 altcookie; | |
faec6f8a DW |
111 | |
112 | guid_t type_guid; | |
eaf96153 DW |
113 | }; |
114 | ||
44c462eb DW |
115 | struct nd_mapping_desc { |
116 | struct nvdimm *nvdimm; | |
117 | u64 start; | |
118 | u64 size; | |
401c0a19 | 119 | int position; |
44c462eb DW |
120 | }; |
121 | ||
1f7df6f8 DW |
122 | struct nd_region_desc { |
123 | struct resource *res; | |
44c462eb | 124 | struct nd_mapping_desc *mapping; |
1f7df6f8 DW |
125 | u16 num_mappings; |
126 | const struct attribute_group **attr_groups; | |
eaf96153 | 127 | struct nd_interleave_set *nd_set; |
1f7df6f8 | 128 | void *provider_data; |
5212e11f | 129 | int num_lanes; |
41d7a6d6 | 130 | int numa_node; |
004f1afb | 131 | unsigned long flags; |
1ff19f48 | 132 | struct device_node *of_node; |
1f7df6f8 DW |
133 | }; |
134 | ||
29b9aa0a DW |
135 | struct device; |
136 | void *devm_nvdimm_memremap(struct device *dev, resource_size_t offset, | |
137 | size_t size, unsigned long flags); | |
138 | static inline void __iomem *devm_nvdimm_ioremap(struct device *dev, | |
139 | resource_size_t offset, size_t size) | |
140 | { | |
141 | return (void __iomem *) devm_nvdimm_memremap(dev, offset, size, 0); | |
142 | } | |
143 | ||
62232e45 | 144 | struct nvdimm_bus; |
3d88002e | 145 | struct module; |
047fc8a1 RZ |
146 | struct device; |
147 | struct nd_blk_region; | |
148 | struct nd_blk_region_desc { | |
149 | int (*enable)(struct nvdimm_bus *nvdimm_bus, struct device *dev); | |
047fc8a1 RZ |
150 | int (*do_io)(struct nd_blk_region *ndbr, resource_size_t dpa, |
151 | void *iobuf, u64 len, int rw); | |
152 | struct nd_region_desc ndr_desc; | |
153 | }; | |
154 | ||
155 | static inline struct nd_blk_region_desc *to_blk_region_desc( | |
156 | struct nd_region_desc *ndr_desc) | |
157 | { | |
158 | return container_of(ndr_desc, struct nd_blk_region_desc, ndr_desc); | |
159 | ||
160 | } | |
161 | ||
f2989396 DJ |
162 | enum nvdimm_security_state { |
163 | NVDIMM_SECURITY_DISABLED, | |
164 | NVDIMM_SECURITY_UNLOCKED, | |
165 | NVDIMM_SECURITY_LOCKED, | |
166 | NVDIMM_SECURITY_FROZEN, | |
167 | NVDIMM_SECURITY_OVERWRITE, | |
168 | }; | |
169 | ||
4c6926a2 DJ |
170 | #define NVDIMM_PASSPHRASE_LEN 32 |
171 | #define NVDIMM_KEY_DESC_LEN 22 | |
172 | ||
173 | struct nvdimm_key_data { | |
174 | u8 data[NVDIMM_PASSPHRASE_LEN]; | |
175 | }; | |
176 | ||
89fa9d8e DJ |
177 | enum nvdimm_passphrase_type { |
178 | NVDIMM_USER, | |
179 | NVDIMM_MASTER, | |
180 | }; | |
181 | ||
f2989396 | 182 | struct nvdimm_security_ops { |
89fa9d8e DJ |
183 | enum nvdimm_security_state (*state)(struct nvdimm *nvdimm, |
184 | enum nvdimm_passphrase_type pass_type); | |
37833fb7 | 185 | int (*freeze)(struct nvdimm *nvdimm); |
4c6926a2 DJ |
186 | int (*change_key)(struct nvdimm *nvdimm, |
187 | const struct nvdimm_key_data *old_data, | |
89fa9d8e DJ |
188 | const struct nvdimm_key_data *new_data, |
189 | enum nvdimm_passphrase_type pass_type); | |
4c6926a2 DJ |
190 | int (*unlock)(struct nvdimm *nvdimm, |
191 | const struct nvdimm_key_data *key_data); | |
03b65b22 DJ |
192 | int (*disable)(struct nvdimm *nvdimm, |
193 | const struct nvdimm_key_data *key_data); | |
64e77c8c | 194 | int (*erase)(struct nvdimm *nvdimm, |
89fa9d8e DJ |
195 | const struct nvdimm_key_data *key_data, |
196 | enum nvdimm_passphrase_type pass_type); | |
7d988097 DJ |
197 | int (*overwrite)(struct nvdimm *nvdimm, |
198 | const struct nvdimm_key_data *key_data); | |
199 | int (*query_overwrite)(struct nvdimm *nvdimm); | |
f2989396 DJ |
200 | }; |
201 | ||
aa9ad44a DJ |
202 | void badrange_init(struct badrange *badrange); |
203 | int badrange_add(struct badrange *badrange, u64 addr, u64 length); | |
204 | void badrange_forget(struct badrange *badrange, phys_addr_t start, | |
205 | unsigned int len); | |
206 | int nvdimm_bus_add_badrange(struct nvdimm_bus *nvdimm_bus, u64 addr, | |
207 | u64 length); | |
bc9775d8 DW |
208 | struct nvdimm_bus *nvdimm_bus_register(struct device *parent, |
209 | struct nvdimm_bus_descriptor *nfit_desc); | |
b94d5230 | 210 | void nvdimm_bus_unregister(struct nvdimm_bus *nvdimm_bus); |
45def22c | 211 | struct nvdimm_bus *to_nvdimm_bus(struct device *dev); |
f2989396 | 212 | struct nvdimm_bus *nvdimm_to_bus(struct nvdimm *nvdimm); |
e6dfb2de | 213 | struct nvdimm *to_nvdimm(struct device *dev); |
1f7df6f8 | 214 | struct nd_region *to_nd_region(struct device *dev); |
243f29fe | 215 | struct device *nd_region_dev(struct nd_region *nd_region); |
047fc8a1 | 216 | struct nd_blk_region *to_nd_blk_region(struct device *dev); |
45def22c | 217 | struct nvdimm_bus_descriptor *to_nd_desc(struct nvdimm_bus *nvdimm_bus); |
37b137ff | 218 | struct device *to_nvdimm_bus_dev(struct nvdimm_bus *nvdimm_bus); |
e6dfb2de | 219 | const char *nvdimm_name(struct nvdimm *nvdimm); |
ba9c8dd3 | 220 | struct kobject *nvdimm_kobj(struct nvdimm *nvdimm); |
e3654eca | 221 | unsigned long nvdimm_cmd_mask(struct nvdimm *nvdimm); |
e6dfb2de | 222 | void *nvdimm_provider_data(struct nvdimm *nvdimm); |
d6548ae4 DJ |
223 | struct nvdimm *__nvdimm_create(struct nvdimm_bus *nvdimm_bus, |
224 | void *provider_data, const struct attribute_group **groups, | |
225 | unsigned long flags, unsigned long cmd_mask, int num_flush, | |
f2989396 DJ |
226 | struct resource *flush_wpq, const char *dimm_id, |
227 | const struct nvdimm_security_ops *sec_ops); | |
d6548ae4 DJ |
228 | static inline struct nvdimm *nvdimm_create(struct nvdimm_bus *nvdimm_bus, |
229 | void *provider_data, const struct attribute_group **groups, | |
230 | unsigned long flags, unsigned long cmd_mask, int num_flush, | |
231 | struct resource *flush_wpq) | |
232 | { | |
233 | return __nvdimm_create(nvdimm_bus, provider_data, groups, flags, | |
f2989396 | 234 | cmd_mask, num_flush, flush_wpq, NULL, NULL); |
d6548ae4 DJ |
235 | } |
236 | ||
7d988097 | 237 | int nvdimm_security_setup_events(struct nvdimm *nvdimm); |
62232e45 DW |
238 | const struct nd_cmd_desc *nd_cmd_dimm_desc(int cmd); |
239 | const struct nd_cmd_desc *nd_cmd_bus_desc(int cmd); | |
240 | u32 nd_cmd_in_size(struct nvdimm *nvdimm, int cmd, | |
241 | const struct nd_cmd_desc *desc, int idx, void *buf); | |
242 | u32 nd_cmd_out_size(struct nvdimm *nvdimm, int cmd, | |
243 | const struct nd_cmd_desc *desc, int idx, const u32 *in_field, | |
efda1b5d | 244 | const u32 *out_field, unsigned long remainder); |
4d88a97a | 245 | int nvdimm_bus_check_dimm_count(struct nvdimm_bus *nvdimm_bus, int dimm_count); |
1f7df6f8 DW |
246 | struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus, |
247 | struct nd_region_desc *ndr_desc); | |
248 | struct nd_region *nvdimm_blk_region_create(struct nvdimm_bus *nvdimm_bus, | |
249 | struct nd_region_desc *ndr_desc); | |
250 | struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus, | |
251 | struct nd_region_desc *ndr_desc); | |
047fc8a1 RZ |
252 | void *nd_region_provider_data(struct nd_region *nd_region); |
253 | void *nd_blk_region_provider_data(struct nd_blk_region *ndbr); | |
254 | void nd_blk_region_set_provider_data(struct nd_blk_region *ndbr, void *data); | |
255 | struct nvdimm *nd_blk_region_to_dimm(struct nd_blk_region *ndbr); | |
ca6a4657 | 256 | unsigned long nd_blk_memremap_flags(struct nd_blk_region *ndbr); |
047fc8a1 RZ |
257 | unsigned int nd_region_acquire_lane(struct nd_region *nd_region); |
258 | void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane); | |
eaf96153 | 259 | u64 nd_fletcher64(void *addr, size_t len, bool le); |
f284a4f2 DW |
260 | void nvdimm_flush(struct nd_region *nd_region); |
261 | int nvdimm_has_flush(struct nd_region *nd_region); | |
0b277961 | 262 | int nvdimm_has_cache(struct nd_region *nd_region); |
7d988097 | 263 | int nvdimm_in_overwrite(struct nvdimm *nvdimm); |
5deb67f7 | 264 | |
f2989396 DJ |
265 | static inline int nvdimm_ctl(struct nvdimm *nvdimm, unsigned int cmd, void *buf, |
266 | unsigned int buf_len, int *cmd_rc) | |
267 | { | |
268 | struct nvdimm_bus *nvdimm_bus = nvdimm_to_bus(nvdimm); | |
269 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); | |
270 | ||
271 | return nd_desc->ndctl(nd_desc, nvdimm, cmd, buf, buf_len, cmd_rc); | |
272 | } | |
273 | ||
5deb67f7 RM |
274 | #ifdef CONFIG_ARCH_HAS_PMEM_API |
275 | #define ARCH_MEMREMAP_PMEM MEMREMAP_WB | |
276 | void arch_wb_cache_pmem(void *addr, size_t size); | |
277 | void arch_invalidate_pmem(void *addr, size_t size); | |
278 | #else | |
279 | #define ARCH_MEMREMAP_PMEM MEMREMAP_WT | |
280 | static inline void arch_wb_cache_pmem(void *addr, size_t size) | |
281 | { | |
282 | } | |
283 | static inline void arch_invalidate_pmem(void *addr, size_t size) | |
284 | { | |
285 | } | |
286 | #endif | |
287 | ||
b94d5230 | 288 | #endif /* __LIBNVDIMM_H__ */ |