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b94d5230 DW |
1 | /* |
2 | * libnvdimm - Non-volatile-memory Devices Subsystem | |
3 | * | |
4 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of version 2 of the GNU General Public License as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, but | |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
13 | * General Public License for more details. | |
14 | */ | |
15 | #ifndef __LIBNVDIMM_H__ | |
16 | #define __LIBNVDIMM_H__ | |
047fc8a1 | 17 | #include <linux/kernel.h> |
62232e45 DW |
18 | #include <linux/sizes.h> |
19 | #include <linux/types.h> | |
faec6f8a | 20 | #include <linux/uuid.h> |
e6dfb2de DW |
21 | |
22 | enum { | |
23 | /* when a dimm supports both PMEM and BLK access a label is required */ | |
8f078b38 | 24 | NDD_ALIASING = 0, |
58138820 | 25 | /* unarmed memory devices may not persist writes */ |
8f078b38 DW |
26 | NDD_UNARMED = 1, |
27 | /* locked memory devices should not be accessed */ | |
28 | NDD_LOCKED = 2, | |
62232e45 DW |
29 | |
30 | /* need to set a limit somewhere, but yes, this is likely overkill */ | |
31 | ND_IOCTL_MAX_BUFLEN = SZ_4M, | |
4577b066 | 32 | ND_CMD_MAX_ELEM = 5, |
40abf9be | 33 | ND_CMD_MAX_ENVELOPE = 256, |
1f7df6f8 | 34 | ND_MAX_MAPPINGS = 32, |
1b40e09a | 35 | |
004f1afb DW |
36 | /* region flag indicating to direct-map persistent memory by default */ |
37 | ND_REGION_PAGEMAP = 0, | |
38 | ||
1b40e09a DW |
39 | /* mark newly adjusted resources as requiring a label update */ |
40 | DPA_RESOURCE_ADJUSTED = 1 << 0, | |
e6dfb2de DW |
41 | }; |
42 | ||
45def22c | 43 | extern struct attribute_group nvdimm_bus_attribute_group; |
62232e45 | 44 | extern struct attribute_group nvdimm_attribute_group; |
4d88a97a | 45 | extern struct attribute_group nd_device_attribute_group; |
74ae66c3 | 46 | extern struct attribute_group nd_numa_attribute_group; |
1f7df6f8 DW |
47 | extern struct attribute_group nd_region_attribute_group; |
48 | extern struct attribute_group nd_mapping_attribute_group; | |
45def22c | 49 | |
b94d5230 DW |
50 | struct nvdimm; |
51 | struct nvdimm_bus_descriptor; | |
52 | typedef int (*ndctl_fn)(struct nvdimm_bus_descriptor *nd_desc, | |
53 | struct nvdimm *nvdimm, unsigned int cmd, void *buf, | |
aef25338 | 54 | unsigned int buf_len, int *cmd_rc); |
b94d5230 DW |
55 | |
56 | struct nvdimm_bus_descriptor { | |
45def22c | 57 | const struct attribute_group **attr_groups; |
7db5bb33 | 58 | unsigned long bus_dsm_mask; |
e3654eca | 59 | unsigned long cmd_mask; |
bc9775d8 | 60 | struct module *module; |
b94d5230 DW |
61 | char *provider_name; |
62 | ndctl_fn ndctl; | |
7ae0fa43 | 63 | int (*flush_probe)(struct nvdimm_bus_descriptor *nd_desc); |
87bf572e DW |
64 | int (*clear_to_send)(struct nvdimm_bus_descriptor *nd_desc, |
65 | struct nvdimm *nvdimm, unsigned int cmd); | |
b94d5230 DW |
66 | }; |
67 | ||
62232e45 DW |
68 | struct nd_cmd_desc { |
69 | int in_num; | |
70 | int out_num; | |
71 | u32 in_sizes[ND_CMD_MAX_ELEM]; | |
72 | int out_sizes[ND_CMD_MAX_ELEM]; | |
73 | }; | |
74 | ||
eaf96153 | 75 | struct nd_interleave_set { |
c12c48ce DW |
76 | /* v1.1 definition of the interleave-set-cookie algorithm */ |
77 | u64 cookie1; | |
78 | /* v1.2 definition of the interleave-set-cookie algorithm */ | |
79 | u64 cookie2; | |
86ef58a4 DW |
80 | /* compatibility with initial buggy Linux implementation */ |
81 | u64 altcookie; | |
faec6f8a DW |
82 | |
83 | guid_t type_guid; | |
eaf96153 DW |
84 | }; |
85 | ||
44c462eb DW |
86 | struct nd_mapping_desc { |
87 | struct nvdimm *nvdimm; | |
88 | u64 start; | |
89 | u64 size; | |
401c0a19 | 90 | int position; |
44c462eb DW |
91 | }; |
92 | ||
1f7df6f8 DW |
93 | struct nd_region_desc { |
94 | struct resource *res; | |
44c462eb | 95 | struct nd_mapping_desc *mapping; |
1f7df6f8 DW |
96 | u16 num_mappings; |
97 | const struct attribute_group **attr_groups; | |
eaf96153 | 98 | struct nd_interleave_set *nd_set; |
1f7df6f8 | 99 | void *provider_data; |
5212e11f | 100 | int num_lanes; |
41d7a6d6 | 101 | int numa_node; |
004f1afb | 102 | unsigned long flags; |
1f7df6f8 DW |
103 | }; |
104 | ||
29b9aa0a DW |
105 | struct device; |
106 | void *devm_nvdimm_memremap(struct device *dev, resource_size_t offset, | |
107 | size_t size, unsigned long flags); | |
108 | static inline void __iomem *devm_nvdimm_ioremap(struct device *dev, | |
109 | resource_size_t offset, size_t size) | |
110 | { | |
111 | return (void __iomem *) devm_nvdimm_memremap(dev, offset, size, 0); | |
112 | } | |
113 | ||
62232e45 | 114 | struct nvdimm_bus; |
3d88002e | 115 | struct module; |
047fc8a1 RZ |
116 | struct device; |
117 | struct nd_blk_region; | |
118 | struct nd_blk_region_desc { | |
119 | int (*enable)(struct nvdimm_bus *nvdimm_bus, struct device *dev); | |
047fc8a1 RZ |
120 | int (*do_io)(struct nd_blk_region *ndbr, resource_size_t dpa, |
121 | void *iobuf, u64 len, int rw); | |
122 | struct nd_region_desc ndr_desc; | |
123 | }; | |
124 | ||
125 | static inline struct nd_blk_region_desc *to_blk_region_desc( | |
126 | struct nd_region_desc *ndr_desc) | |
127 | { | |
128 | return container_of(ndr_desc, struct nd_blk_region_desc, ndr_desc); | |
129 | ||
130 | } | |
131 | ||
0caeef63 | 132 | int nvdimm_bus_add_poison(struct nvdimm_bus *nvdimm_bus, u64 addr, u64 length); |
006358b3 DJ |
133 | void nvdimm_forget_poison(struct nvdimm_bus *nvdimm_bus, |
134 | phys_addr_t start, unsigned int len); | |
bc9775d8 DW |
135 | struct nvdimm_bus *nvdimm_bus_register(struct device *parent, |
136 | struct nvdimm_bus_descriptor *nfit_desc); | |
b94d5230 | 137 | void nvdimm_bus_unregister(struct nvdimm_bus *nvdimm_bus); |
45def22c | 138 | struct nvdimm_bus *to_nvdimm_bus(struct device *dev); |
e6dfb2de | 139 | struct nvdimm *to_nvdimm(struct device *dev); |
1f7df6f8 | 140 | struct nd_region *to_nd_region(struct device *dev); |
047fc8a1 | 141 | struct nd_blk_region *to_nd_blk_region(struct device *dev); |
45def22c | 142 | struct nvdimm_bus_descriptor *to_nd_desc(struct nvdimm_bus *nvdimm_bus); |
37b137ff | 143 | struct device *to_nvdimm_bus_dev(struct nvdimm_bus *nvdimm_bus); |
e6dfb2de | 144 | const char *nvdimm_name(struct nvdimm *nvdimm); |
ba9c8dd3 | 145 | struct kobject *nvdimm_kobj(struct nvdimm *nvdimm); |
e3654eca | 146 | unsigned long nvdimm_cmd_mask(struct nvdimm *nvdimm); |
e6dfb2de DW |
147 | void *nvdimm_provider_data(struct nvdimm *nvdimm); |
148 | struct nvdimm *nvdimm_create(struct nvdimm_bus *nvdimm_bus, void *provider_data, | |
62232e45 | 149 | const struct attribute_group **groups, unsigned long flags, |
e5ae3b25 DW |
150 | unsigned long cmd_mask, int num_flush, |
151 | struct resource *flush_wpq); | |
62232e45 DW |
152 | const struct nd_cmd_desc *nd_cmd_dimm_desc(int cmd); |
153 | const struct nd_cmd_desc *nd_cmd_bus_desc(int cmd); | |
154 | u32 nd_cmd_in_size(struct nvdimm *nvdimm, int cmd, | |
155 | const struct nd_cmd_desc *desc, int idx, void *buf); | |
156 | u32 nd_cmd_out_size(struct nvdimm *nvdimm, int cmd, | |
157 | const struct nd_cmd_desc *desc, int idx, const u32 *in_field, | |
efda1b5d | 158 | const u32 *out_field, unsigned long remainder); |
4d88a97a | 159 | int nvdimm_bus_check_dimm_count(struct nvdimm_bus *nvdimm_bus, int dimm_count); |
1f7df6f8 DW |
160 | struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus, |
161 | struct nd_region_desc *ndr_desc); | |
162 | struct nd_region *nvdimm_blk_region_create(struct nvdimm_bus *nvdimm_bus, | |
163 | struct nd_region_desc *ndr_desc); | |
164 | struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus, | |
165 | struct nd_region_desc *ndr_desc); | |
047fc8a1 RZ |
166 | void *nd_region_provider_data(struct nd_region *nd_region); |
167 | void *nd_blk_region_provider_data(struct nd_blk_region *ndbr); | |
168 | void nd_blk_region_set_provider_data(struct nd_blk_region *ndbr, void *data); | |
169 | struct nvdimm *nd_blk_region_to_dimm(struct nd_blk_region *ndbr); | |
ca6a4657 | 170 | unsigned long nd_blk_memremap_flags(struct nd_blk_region *ndbr); |
047fc8a1 RZ |
171 | unsigned int nd_region_acquire_lane(struct nd_region *nd_region); |
172 | void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane); | |
eaf96153 | 173 | u64 nd_fletcher64(void *addr, size_t len, bool le); |
f284a4f2 DW |
174 | void nvdimm_flush(struct nd_region *nd_region); |
175 | int nvdimm_has_flush(struct nd_region *nd_region); | |
0b277961 | 176 | int nvdimm_has_cache(struct nd_region *nd_region); |
5deb67f7 RM |
177 | |
178 | #ifdef CONFIG_ARCH_HAS_PMEM_API | |
179 | #define ARCH_MEMREMAP_PMEM MEMREMAP_WB | |
180 | void arch_wb_cache_pmem(void *addr, size_t size); | |
181 | void arch_invalidate_pmem(void *addr, size_t size); | |
182 | #else | |
183 | #define ARCH_MEMREMAP_PMEM MEMREMAP_WT | |
184 | static inline void arch_wb_cache_pmem(void *addr, size_t size) | |
185 | { | |
186 | } | |
187 | static inline void arch_invalidate_pmem(void *addr, size_t size) | |
188 | { | |
189 | } | |
190 | #endif | |
191 | ||
b94d5230 | 192 | #endif /* __LIBNVDIMM_H__ */ |