devres: device resource management
[linux-2.6-block.git] / include / linux / libata.h
CommitLineData
1da177e4 1/*
af36d7f0
JG
2 * Copyright 2003-2005 Red Hat, Inc. All rights reserved.
3 * Copyright 2003-2005 Jeff Garzik
4 *
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; see the file COPYING. If not, write to
18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 *
21 * libata documentation is available via 'make {ps|pdf}docs',
22 * as Documentation/DocBook/libata.*
23 *
1da177e4
LT
24 */
25
26#ifndef __LINUX_LIBATA_H__
27#define __LINUX_LIBATA_H__
28
29#include <linux/delay.h>
30#include <linux/interrupt.h>
31#include <linux/pci.h>
1c72d8d9 32#include <linux/dma-mapping.h>
41542dbe 33#include <asm/scatterlist.h>
1da177e4
LT
34#include <asm/io.h>
35#include <linux/ata.h>
36#include <linux/workqueue.h>
35bb94b1 37#include <scsi/scsi_host.h>
1da177e4 38
a6d967a4
JG
39/*
40 * Define if arch has non-standard setup. This is a _PCI_ standard
41 * not a legacy or ISA standard.
42 */
43#ifdef CONFIG_ATA_NONSTANDARD
2ec7df04 44#include <asm/libata-portmap.h>
a6d967a4
JG
45#else
46#include <asm-generic/libata-portmap.h>
47#endif
2ec7df04 48
1da177e4 49/*
bfd60579
RD
50 * compile-time options: to be removed as soon as all the drivers are
51 * converted to the new debugging mechanism
1da177e4
LT
52 */
53#undef ATA_DEBUG /* debugging output */
54#undef ATA_VERBOSE_DEBUG /* yet more debugging output */
55#undef ATA_IRQ_TRAP /* define to ack screaming irqs */
56#undef ATA_NDEBUG /* define to disable quick runtime checks */
669a5db4 57#define ATA_ENABLE_PATA /* define to enable PATA support in some
1da177e4 58 * low-level drivers */
1da177e4
LT
59
60
61/* note: prints function name for you */
62#ifdef ATA_DEBUG
63#define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
64#ifdef ATA_VERBOSE_DEBUG
65#define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
66#else
67#define VPRINTK(fmt, args...)
68#endif /* ATA_VERBOSE_DEBUG */
69#else
70#define DPRINTK(fmt, args...)
71#define VPRINTK(fmt, args...)
72#endif /* ATA_DEBUG */
73
2c13b7ce
JG
74#define BPRINTK(fmt, args...) if (ap->flags & ATA_FLAG_DEBUGMSG) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
75
bfd60579
RD
76/* NEW: debug levels */
77#define HAVE_LIBATA_MSG 1
78
79enum {
80 ATA_MSG_DRV = 0x0001,
81 ATA_MSG_INFO = 0x0002,
82 ATA_MSG_PROBE = 0x0004,
83 ATA_MSG_WARN = 0x0008,
84 ATA_MSG_MALLOC = 0x0010,
85 ATA_MSG_CTL = 0x0020,
86 ATA_MSG_INTR = 0x0040,
87 ATA_MSG_ERR = 0x0080,
88};
89
90#define ata_msg_drv(p) ((p)->msg_enable & ATA_MSG_DRV)
91#define ata_msg_info(p) ((p)->msg_enable & ATA_MSG_INFO)
92#define ata_msg_probe(p) ((p)->msg_enable & ATA_MSG_PROBE)
93#define ata_msg_warn(p) ((p)->msg_enable & ATA_MSG_WARN)
94#define ata_msg_malloc(p) ((p)->msg_enable & ATA_MSG_MALLOC)
95#define ata_msg_ctl(p) ((p)->msg_enable & ATA_MSG_CTL)
96#define ata_msg_intr(p) ((p)->msg_enable & ATA_MSG_INTR)
97#define ata_msg_err(p) ((p)->msg_enable & ATA_MSG_ERR)
98
99static inline u32 ata_msg_init(int dval, int default_msg_enable_bits)
100{
101 if (dval < 0 || dval >= (sizeof(u32) * 8))
102 return default_msg_enable_bits; /* should be 0x1 - only driver info msgs */
103 if (!dval)
104 return 0;
105 return (1 << dval) - 1;
106}
107
1da177e4
LT
108/* defines only for the constants which don't work well as enums */
109#define ATA_TAG_POISON 0xfafbfcfdU
110
111/* move to PCI layer? */
112static inline struct device *pci_dev_to_dev(struct pci_dev *pdev)
113{
114 return &pdev->dev;
115}
116
117enum {
118 /* various global constants */
119 LIBATA_MAX_PRD = ATA_MAX_PRD / 2,
120 ATA_MAX_PORTS = 8,
121 ATA_DEF_QUEUE = 1,
2ab7db1f 122 /* tag ATA_MAX_QUEUE - 1 is reserved for internal commands */
a6e6ce8e 123 ATA_MAX_QUEUE = 32,
2ab7db1f 124 ATA_TAG_INTERNAL = ATA_MAX_QUEUE - 1,
1da177e4
LT
125 ATA_MAX_BUS = 2,
126 ATA_DEF_BUSY_WAIT = 10000,
127 ATA_SHORT_PAUSE = (HZ >> 6) + 1,
128
129 ATA_SHT_EMULATED = 1,
130 ATA_SHT_CMD_PER_LUN = 1,
131 ATA_SHT_THIS_ID = -1,
cf482935 132 ATA_SHT_USE_CLUSTERING = 1,
1da177e4
LT
133
134 /* struct ata_device stuff */
949b38af
TH
135 ATA_DFLAG_LBA = (1 << 0), /* device supports LBA */
136 ATA_DFLAG_LBA48 = (1 << 1), /* device supports LBA48 */
029f5468 137 ATA_DFLAG_CDB_INTR = (1 << 2), /* device asserts INTRQ when ready for CDB */
88e49034 138 ATA_DFLAG_NCQ = (1 << 3), /* device supports NCQ */
6fc49adb 139 ATA_DFLAG_FLUSH_EXT = (1 << 4), /* do FLUSH_EXT instead of FLUSH */
ea1dd4e1 140 ATA_DFLAG_CFG_MASK = (1 << 8) - 1,
949b38af 141
e5c9e081 142 ATA_DFLAG_PIO = (1 << 8), /* device limited to PIO mode */
3343571d 143 ATA_DFLAG_NCQ_OFF = (1 << 9), /* device limited to non-NCQ mode */
e5c9e081 144 ATA_DFLAG_SUSPENDED = (1 << 10), /* device suspended */
72fa4b74 145 ATA_DFLAG_INIT_MASK = (1 << 16) - 1,
1da177e4 146
abdda733
TH
147 ATA_DFLAG_DETACH = (1 << 16),
148 ATA_DFLAG_DETACHED = (1 << 17),
149
1da177e4
LT
150 ATA_DEV_UNKNOWN = 0, /* unknown device */
151 ATA_DEV_ATA = 1, /* ATA device */
152 ATA_DEV_ATA_UNSUP = 2, /* ATA device (unsupported) */
153 ATA_DEV_ATAPI = 3, /* ATAPI device */
154 ATA_DEV_ATAPI_UNSUP = 4, /* ATAPI device (unsupported) */
155 ATA_DEV_NONE = 5, /* no device */
156
157 /* struct ata_port flags */
949b38af 158 ATA_FLAG_SLAVE_POSS = (1 << 0), /* host supports slave dev */
1da177e4 159 /* (doesn't imply presence) */
949b38af
TH
160 ATA_FLAG_SATA = (1 << 1),
161 ATA_FLAG_NO_LEGACY = (1 << 2), /* no legacy mode check */
162 ATA_FLAG_MMIO = (1 << 3), /* use MMIO, not PIO */
163 ATA_FLAG_SRST = (1 << 4), /* (obsolete) use ATA SRST, not E.D.D. */
164 ATA_FLAG_SATA_RESET = (1 << 5), /* (obsolete) use COMRESET */
165 ATA_FLAG_NO_ATAPI = (1 << 6), /* No ATAPI support */
166 ATA_FLAG_PIO_DMA = (1 << 7), /* PIO cmds via DMA */
167 ATA_FLAG_PIO_LBA48 = (1 << 8), /* Host DMA engine is LBA28 only */
7395acb2
TH
168 ATA_FLAG_PIO_POLLING = (1 << 9), /* use polling PIO if LLD
169 * doesn't handle PIO interrupts */
170 ATA_FLAG_NCQ = (1 << 10), /* host supports NCQ */
abdda733
TH
171 ATA_FLAG_HRST_TO_RESUME = (1 << 11), /* hardreset to resume phy */
172 ATA_FLAG_SKIP_D2H_BSY = (1 << 12), /* can't wait for the first D2H
173 * Register FIS clearing BSY */
7395acb2 174 ATA_FLAG_DEBUGMSG = (1 << 13),
800b3996 175 ATA_FLAG_SETXFER_POLLING= (1 << 14), /* use polling for SETXFER */
b2a8bbe6 176 ATA_FLAG_IGN_SIMPLEX = (1 << 15), /* ignore SIMPLEX */
949b38af 177
b51e9e5d
TH
178 /* The following flag belongs to ap->pflags but is kept in
179 * ap->flags because it's referenced in many LLDs and will be
180 * removed in not-too-distant future.
181 */
182 ATA_FLAG_DISABLED = (1 << 23), /* port is disabled, ignore it */
183
184 /* bits 24:31 of ap->flags are reserved for LLD specific flags */
9ec957f2 185
b51e9e5d
TH
186 /* struct ata_port pflags */
187 ATA_PFLAG_EH_PENDING = (1 << 0), /* EH pending */
188 ATA_PFLAG_EH_IN_PROGRESS = (1 << 1), /* EH in progress */
189 ATA_PFLAG_FROZEN = (1 << 2), /* port is frozen */
190 ATA_PFLAG_RECOVERED = (1 << 3), /* recovery action performed */
191 ATA_PFLAG_LOADING = (1 << 4), /* boot/loading probe */
192 ATA_PFLAG_UNLOADING = (1 << 5), /* module is unloading */
193 ATA_PFLAG_SCSI_HOTPLUG = (1 << 6), /* SCSI hotplug scheduled */
949b38af 194
b51e9e5d
TH
195 ATA_PFLAG_FLUSH_PORT_TASK = (1 << 16), /* flush port task */
196 ATA_PFLAG_SUSPENDED = (1 << 17), /* port is suspended (power) */
500530f6 197 ATA_PFLAG_PM_PENDING = (1 << 18), /* PM operation pending */
949b38af
TH
198
199 /* struct ata_queued_cmd flags */
200 ATA_QCFLAG_ACTIVE = (1 << 0), /* cmd not yet ack'd to scsi lyer */
201 ATA_QCFLAG_SG = (1 << 1), /* have s/g table? */
202 ATA_QCFLAG_SINGLE = (1 << 2), /* no s/g, just a single buffer */
1da177e4 203 ATA_QCFLAG_DMAMAP = ATA_QCFLAG_SG | ATA_QCFLAG_SINGLE,
27197367 204 ATA_QCFLAG_IO = (1 << 3), /* standard IO command */
e61e0672
TH
205 ATA_QCFLAG_RESULT_TF = (1 << 4), /* result TF requested */
206
9ec957f2
TH
207 ATA_QCFLAG_FAILED = (1 << 16), /* cmd failed and is owned by EH */
208 ATA_QCFLAG_SENSE_VALID = (1 << 17), /* sense data valid */
209 ATA_QCFLAG_EH_SCHEDULED = (1 << 18), /* EH scheduled (obsolete) */
1da177e4 210
4e5ec5db 211 /* host set flags */
cca3974e 212 ATA_HOST_SIMPLEX = (1 << 0), /* Host is simplex, one DMA channel per host only */
9bec2e38 213
1da177e4 214 /* various lengths of time */
8d238e01
AC
215 ATA_TMOUT_BOOT = 30 * HZ, /* heuristic */
216 ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* heuristic */
a2a7a662
TH
217 ATA_TMOUT_INTERNAL = 30 * HZ,
218 ATA_TMOUT_INTERNAL_QUICK = 5 * HZ,
1da177e4
LT
219
220 /* ATA bus states */
221 BUS_UNKNOWN = 0,
222 BUS_DMA = 1,
223 BUS_IDLE = 2,
224 BUS_NOINTR = 3,
225 BUS_NODATA = 4,
226 BUS_TIMER = 5,
227 BUS_PIO = 6,
228 BUS_EDD = 7,
229 BUS_IDENTIFY = 8,
230 BUS_PACKET = 9,
231
232 /* SATA port states */
233 PORT_UNKNOWN = 0,
234 PORT_ENABLED = 1,
235 PORT_DISABLED = 2,
236
237 /* encoding various smaller bitmaps into a single
1da7b0d0 238 * unsigned int bitmap
1da177e4 239 */
b352e57d
AC
240 ATA_BITS_PIO = 7,
241 ATA_BITS_MWDMA = 5,
1da7b0d0
TH
242 ATA_BITS_UDMA = 8,
243
244 ATA_SHIFT_PIO = 0,
245 ATA_SHIFT_MWDMA = ATA_SHIFT_PIO + ATA_BITS_PIO,
246 ATA_SHIFT_UDMA = ATA_SHIFT_MWDMA + ATA_BITS_MWDMA,
247
248 ATA_MASK_PIO = ((1 << ATA_BITS_PIO) - 1) << ATA_SHIFT_PIO,
249 ATA_MASK_MWDMA = ((1 << ATA_BITS_MWDMA) - 1) << ATA_SHIFT_MWDMA,
250 ATA_MASK_UDMA = ((1 << ATA_BITS_UDMA) - 1) << ATA_SHIFT_UDMA,
cedc9a47
JG
251
252 /* size of buffer to pad xfers ending on unaligned boundaries */
253 ATA_DMA_PAD_SZ = 4,
254 ATA_DMA_PAD_BUF_SZ = ATA_DMA_PAD_SZ * ATA_MAX_QUEUE,
949b38af
TH
255
256 /* masks for port functions */
47a86593
AC
257 ATA_PORT_PRIMARY = (1 << 0),
258 ATA_PORT_SECONDARY = (1 << 1),
14d2bac1 259
0c247c55
TH
260 /* ering size */
261 ATA_ERING_SIZE = 32,
262
f3e81b19
TH
263 /* desc_len for ata_eh_info and context */
264 ATA_EH_DESC_LEN = 80,
265
9be1e979
TH
266 /* reset / recovery action types */
267 ATA_EH_REVALIDATE = (1 << 0),
268 ATA_EH_SOFTRESET = (1 << 1),
269 ATA_EH_HARDRESET = (1 << 2),
02670bf3
TH
270 ATA_EH_SUSPEND = (1 << 3),
271 ATA_EH_RESUME = (1 << 4),
272 ATA_EH_PM_FREEZE = (1 << 5),
9be1e979
TH
273
274 ATA_EH_RESET_MASK = ATA_EH_SOFTRESET | ATA_EH_HARDRESET,
02670bf3
TH
275 ATA_EH_PERDEV_MASK = ATA_EH_REVALIDATE | ATA_EH_SUSPEND |
276 ATA_EH_RESUME | ATA_EH_PM_FREEZE,
9be1e979 277
f3e81b19 278 /* ata_eh_info->flags */
abdda733 279 ATA_EHI_HOTPLUGGED = (1 << 0), /* could have been hotplugged */
13abf50d 280 ATA_EHI_RESUME_LINK = (1 << 1), /* resume link (reset modifier) */
1cdaf534
TH
281 ATA_EHI_NO_AUTOPSY = (1 << 2), /* no autopsy */
282 ATA_EHI_QUIET = (1 << 3), /* be quiet */
abdda733
TH
283
284 ATA_EHI_DID_RESET = (1 << 16), /* already reset this port */
efdaedc4 285 ATA_EHI_PRINTINFO = (1 << 17), /* print configuration info */
baa1e78a
TH
286 ATA_EHI_SETMODE = (1 << 18), /* configure transfer mode */
287 ATA_EHI_POST_SETMODE = (1 << 19), /* revaildating after setmode */
f3e81b19 288
13abf50d
TH
289 ATA_EHI_RESET_MODIFIER_MASK = ATA_EHI_RESUME_LINK,
290
ad9e2762
TH
291 /* max repeat if error condition is still set after ->error_handler */
292 ATA_EH_MAX_REPEAT = 5,
293
14d2bac1
TH
294 /* how hard are we gonna try to probe/recover devices */
295 ATA_PROBE_MAX_TRIES = 3,
022bdb07
TH
296 ATA_EH_RESET_TRIES = 3,
297 ATA_EH_DEV_TRIES = 3,
f5914a46
TH
298
299 /* Drive spinup time (time from power-on to the first D2H FIS)
300 * in msecs - 8s currently. Failing to get ready in this time
301 * isn't critical. It will result in reset failure for
302 * controllers which can't wait for the first D2H FIS. libata
303 * will retry, so it just has to be long enough to spin up
304 * most devices.
305 */
306 ATA_SPINUP_WAIT = 8000,
f20b16ff 307
93590859
AC
308 /* Horkage types. May be set by libata or controller on drives
309 (some horkage may be drive/controller pair dependant */
310
311 ATA_HORKAGE_DIAGNOSTIC = (1 << 0), /* Failed boot diag */
6919a0a6
AC
312 ATA_HORKAGE_NODMA = (1 << 1), /* DMA problems */
313 ATA_HORKAGE_NONCQ = (1 << 2), /* Don't use NCQ */
1da177e4
LT
314};
315
14be71f4 316enum hsm_task_states {
c56b14d2 317 HSM_ST_IDLE, /* no command on going */
c56b14d2
AL
318 HSM_ST, /* (waiting the device to) transfer data */
319 HSM_ST_LAST, /* (waiting the device to) complete command */
c56b14d2
AL
320 HSM_ST_ERR, /* error */
321 HSM_ST_FIRST, /* (waiting the device to)
322 write CDB or first data block */
1da177e4
LT
323};
324
a7dac447 325enum ata_completion_errors {
11a56d24
TH
326 AC_ERR_DEV = (1 << 0), /* device reported error */
327 AC_ERR_HSM = (1 << 1), /* host state machine violation */
328 AC_ERR_TIMEOUT = (1 << 2), /* timeout */
329 AC_ERR_MEDIA = (1 << 3), /* media error */
330 AC_ERR_ATA_BUS = (1 << 4), /* ATA bus error */
331 AC_ERR_HOST_BUS = (1 << 5), /* host bus error */
332 AC_ERR_SYSTEM = (1 << 6), /* system error */
333 AC_ERR_INVALID = (1 << 7), /* invalid argument */
334 AC_ERR_OTHER = (1 << 8), /* unknown */
55a8e2c8 335 AC_ERR_NODEV_HINT = (1 << 9), /* polling device detection hint */
a7dac447
JG
336};
337
1da177e4
LT
338/* forward declarations */
339struct scsi_device;
340struct ata_port_operations;
341struct ata_port;
342struct ata_queued_cmd;
343
344/* typedefs */
77853bf2 345typedef void (*ata_qc_cb_t) (struct ata_queued_cmd *qc);
f5914a46
TH
346typedef int (*ata_prereset_fn_t)(struct ata_port *ap);
347typedef int (*ata_reset_fn_t)(struct ata_port *ap, unsigned int *classes);
348typedef void (*ata_postreset_fn_t)(struct ata_port *ap, unsigned int *classes);
1da177e4
LT
349
350struct ata_ioports {
351 unsigned long cmd_addr;
352 unsigned long data_addr;
353 unsigned long error_addr;
354 unsigned long feature_addr;
355 unsigned long nsect_addr;
356 unsigned long lbal_addr;
357 unsigned long lbam_addr;
358 unsigned long lbah_addr;
359 unsigned long device_addr;
360 unsigned long status_addr;
361 unsigned long command_addr;
362 unsigned long altstatus_addr;
363 unsigned long ctl_addr;
364 unsigned long bmdma_addr;
365 unsigned long scr_addr;
366};
367
368struct ata_probe_ent {
369 struct list_head node;
370 struct device *dev;
057ace5e 371 const struct ata_port_operations *port_ops;
193515d5 372 struct scsi_host_template *sht;
1da177e4
LT
373 struct ata_ioports port[ATA_MAX_PORTS];
374 unsigned int n_ports;
dd5b06c4 375 unsigned int dummy_port_mask;
1da177e4
LT
376 unsigned int pio_mask;
377 unsigned int mwdma_mask;
378 unsigned int udma_mask;
1da177e4 379 unsigned long irq;
2ec7df04 380 unsigned long irq2;
1da177e4 381 unsigned int irq_flags;
cca3974e
JG
382 unsigned long port_flags;
383 unsigned long _host_flags;
1da177e4
LT
384 void __iomem *mmio_base;
385 void *private_data;
fea63e38
TH
386
387 /* port_info for the secondary port. Together with irq2, it's
388 * used to implement non-uniform secondary port. Currently,
389 * the only user is ata_piix combined mode. This workaround
390 * will be removed together with ata_probe_ent when init model
391 * is updated.
392 */
393 const struct ata_port_info *pinfo2;
1da177e4
LT
394};
395
cca3974e 396struct ata_host {
1da177e4
LT
397 spinlock_t lock;
398 struct device *dev;
399 unsigned long irq;
2ec7df04 400 unsigned long irq2;
1da177e4
LT
401 void __iomem *mmio_base;
402 unsigned int n_ports;
403 void *private_data;
057ace5e 404 const struct ata_port_operations *ops;
5444a6f4
AC
405 unsigned long flags;
406 int simplex_claimed; /* Keep seperate in case we
407 ever need to do this locked */
f0eb62b8 408 struct ata_port *ports[0];
1da177e4
LT
409};
410
411struct ata_queued_cmd {
412 struct ata_port *ap;
413 struct ata_device *dev;
414
415 struct scsi_cmnd *scsicmd;
416 void (*scsidone)(struct scsi_cmnd *);
417
418 struct ata_taskfile tf;
419 u8 cdb[ATAPI_CDB_LEN];
420
421 unsigned long flags; /* ATA_QCFLAG_xxx */
422 unsigned int tag;
423 unsigned int n_elem;
cedc9a47 424 unsigned int orig_n_elem;
1da177e4
LT
425
426 int dma_dir;
427
cedc9a47
JG
428 unsigned int pad_len;
429
1da177e4
LT
430 unsigned int nbytes;
431 unsigned int curbytes;
432
433 unsigned int cursg;
434 unsigned int cursg_ofs;
435
436 struct scatterlist sgent;
cedc9a47 437 struct scatterlist pad_sgent;
1da177e4
LT
438 void *buf_virt;
439
cedc9a47
JG
440 /* DO NOT iterate over __sg manually, use ata_for_each_sg() */
441 struct scatterlist *__sg;
1da177e4 442
a22e2eb0 443 unsigned int err_mask;
e61e0672 444 struct ata_taskfile result_tf;
1da177e4
LT
445 ata_qc_cb_t complete_fn;
446
1da177e4
LT
447 void *private_data;
448};
449
cca3974e 450struct ata_port_stats {
1da177e4
LT
451 unsigned long unhandled_irq;
452 unsigned long idle_irq;
453 unsigned long rw_reqbuf;
454};
455
0c247c55
TH
456struct ata_ering_entry {
457 int is_io;
458 unsigned int err_mask;
459 u64 timestamp;
460};
461
462struct ata_ering {
463 int cursor;
464 struct ata_ering_entry ring[ATA_ERING_SIZE];
465};
466
1da177e4 467struct ata_device {
38d87234 468 struct ata_port *ap;
72fa4b74 469 unsigned int devno; /* 0 or 1 */
1da177e4 470 unsigned long flags; /* ATA_DFLAG_xxx */
3edebac4 471 struct scsi_device *sdev; /* attached SCSI device */
72fa4b74
TH
472 /* n_sector is used as CLEAR_OFFSET, read comment above CLEAR_OFFSET */
473 u64 n_sectors; /* size of device, if ATA */
1da177e4 474 unsigned int class; /* ATA_DEV_xxx */
fe635c7e 475 u16 id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */
1da177e4
LT
476 u8 pio_mode;
477 u8 dma_mode;
478 u8 xfer_mode;
479 unsigned int xfer_shift; /* ATA_SHIFT_xxx */
480
8cbd6df1
AL
481 unsigned int multi_count; /* sectors count for
482 READ/WRITE MULTIPLE */
b00eec1d 483 unsigned int max_sectors; /* per-device max sectors */
6e7846e9 484 unsigned int cdb_len;
8bf62ece 485
acf356b1
TH
486 /* per-dev xfer mask */
487 unsigned int pio_mask;
488 unsigned int mwdma_mask;
489 unsigned int udma_mask;
490
8bf62ece
AL
491 /* for CHS addressing */
492 u16 cylinders; /* Number of cylinders */
493 u16 heads; /* Number of heads */
494 u16 sectors; /* Number of sectors per track */
0c247c55
TH
495
496 /* error history */
497 struct ata_ering ering;
93590859 498 unsigned int horkage; /* List of broken features */
1da177e4
LT
499};
500
72fa4b74
TH
501/* Offset into struct ata_device. Fields above it are maintained
502 * acress device init. Fields below are zeroed.
503 */
504#define ATA_DEVICE_CLEAR_OFFSET offsetof(struct ata_device, n_sectors)
505
f3e81b19
TH
506struct ata_eh_info {
507 struct ata_device *dev; /* offending device */
508 u32 serror; /* SError from LLDD */
509 unsigned int err_mask; /* port-wide err_mask */
510 unsigned int action; /* ATA_EH_* action mask */
47005f25 511 unsigned int dev_action[ATA_MAX_DEVICES]; /* dev EH action */
f3e81b19 512 unsigned int flags; /* ATA_EHI_* flags */
abdda733
TH
513
514 unsigned long hotplug_timestamp;
515 unsigned int probe_mask;
516
f3e81b19
TH
517 char desc[ATA_EH_DESC_LEN];
518 int desc_len;
519};
520
521struct ata_eh_context {
522 struct ata_eh_info i;
523 int tries[ATA_MAX_DEVICES];
abdda733
TH
524 unsigned int classes[ATA_MAX_DEVICES];
525 unsigned int did_probe_mask;
f3e81b19
TH
526};
527
1da177e4 528struct ata_port {
cca3974e 529 struct Scsi_Host *scsi_host; /* our co-allocated scsi host */
057ace5e 530 const struct ata_port_operations *ops;
ba6a1308 531 spinlock_t *lock;
1da177e4 532 unsigned long flags; /* ATA_FLAG_xxx */
b51e9e5d 533 unsigned int pflags; /* ATA_PFLAG_xxx */
1da177e4
LT
534 unsigned int id; /* unique id req'd by scsi midlyr */
535 unsigned int port_no; /* unique port #; from zero */
1da177e4
LT
536
537 struct ata_prd *prd; /* our SG list */
538 dma_addr_t prd_dma; /* and its DMA mapping */
539
cedc9a47
JG
540 void *pad; /* array of DMA pad buffers */
541 dma_addr_t pad_dma;
542
1da177e4
LT
543 struct ata_ioports ioaddr; /* ATA cmd/ctl/dma register blocks */
544
545 u8 ctl; /* cache of ATA control register */
546 u8 last_ctl; /* Cache last written value */
1da177e4
LT
547 unsigned int pio_mask;
548 unsigned int mwdma_mask;
549 unsigned int udma_mask;
550 unsigned int cbl; /* cable type; ATA_CBL_xxx */
5a04bf4b 551 unsigned int hw_sata_spd_limit;
1c3fae4d 552 unsigned int sata_spd_limit; /* SATA PHY speed limit */
1da177e4 553
cca3974e 554 /* record runtime error info, protected by host lock */
f3e81b19
TH
555 struct ata_eh_info eh_info;
556 /* EH context owned by EH */
557 struct ata_eh_context eh_context;
558
1da177e4
LT
559 struct ata_device device[ATA_MAX_DEVICES];
560
561 struct ata_queued_cmd qcmd[ATA_MAX_QUEUE];
6cec4a39 562 unsigned long qc_allocated;
dedaf2b0
TH
563 unsigned int qc_active;
564
1da177e4 565 unsigned int active_tag;
dedaf2b0 566 u32 sactive;
1da177e4 567
cca3974e
JG
568 struct ata_port_stats stats;
569 struct ata_host *host;
2f1f610b 570 struct device *dev;
1da177e4 571
65f27f38 572 void *port_task_data;
52bad64d
DH
573 struct delayed_work port_task;
574 struct delayed_work hotplug_task;
3b01b8af 575 struct work_struct scsi_rescan_task;
86e45b6b 576
14be71f4 577 unsigned int hsm_task_state;
1da177e4 578
bfd60579 579 u32 msg_enable;
a72ec4ce 580 struct list_head eh_done_q;
c6cf9e99 581 wait_queue_head_t eh_wait_q;
bfd60579 582
500530f6
TH
583 pm_message_t pm_mesg;
584 int *pm_result;
585
1da177e4 586 void *private_data;
fe635c7e
TH
587
588 u8 sector_buf[ATA_SECT_SIZE]; /* owned by EH */
1da177e4
LT
589};
590
591struct ata_port_operations {
592 void (*port_disable) (struct ata_port *);
593
594 void (*dev_config) (struct ata_port *, struct ata_device *);
595
596 void (*set_piomode) (struct ata_port *, struct ata_device *);
597 void (*set_dmamode) (struct ata_port *, struct ata_device *);
5444a6f4 598 unsigned long (*mode_filter) (const struct ata_port *, struct ata_device *, unsigned long);
1da177e4 599
057ace5e 600 void (*tf_load) (struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT
601 void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf);
602
057ace5e 603 void (*exec_command)(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT
604 u8 (*check_status)(struct ata_port *ap);
605 u8 (*check_altstatus)(struct ata_port *ap);
1da177e4
LT
606 void (*dev_select)(struct ata_port *ap, unsigned int device);
607
c19ba8af 608 void (*phy_reset) (struct ata_port *ap); /* obsolete */
b229a7b0 609 int (*set_mode) (struct ata_port *ap, struct ata_device **r_failed_dev);
c19ba8af 610
1da177e4
LT
611 void (*post_set_mode) (struct ata_port *ap);
612
b229a7b0 613 int (*check_atapi_dma) (struct ata_queued_cmd *qc);
1da177e4
LT
614
615 void (*bmdma_setup) (struct ata_queued_cmd *qc);
616 void (*bmdma_start) (struct ata_queued_cmd *qc);
617
a6b2c5d4
AC
618 void (*data_xfer) (struct ata_device *, unsigned char *, unsigned int, int);
619
1da177e4 620 void (*qc_prep) (struct ata_queued_cmd *qc);
9a3d9eb0 621 unsigned int (*qc_issue) (struct ata_queued_cmd *qc);
1da177e4 622
9ec957f2
TH
623 /* Error handlers. ->error_handler overrides ->eng_timeout and
624 * indicates that new-style EH is in place.
625 */
626 void (*eng_timeout) (struct ata_port *ap); /* obsolete */
627
628 void (*freeze) (struct ata_port *ap);
629 void (*thaw) (struct ata_port *ap);
630 void (*error_handler) (struct ata_port *ap);
631 void (*post_internal_cmd) (struct ata_queued_cmd *qc);
1da177e4 632
7d12e780 633 irq_handler_t irq_handler;
1da177e4
LT
634 void (*irq_clear) (struct ata_port *);
635
636 u32 (*scr_read) (struct ata_port *ap, unsigned int sc_reg);
637 void (*scr_write) (struct ata_port *ap, unsigned int sc_reg,
638 u32 val);
639
500530f6
TH
640 int (*port_suspend) (struct ata_port *ap, pm_message_t mesg);
641 int (*port_resume) (struct ata_port *ap);
642
1da177e4
LT
643 int (*port_start) (struct ata_port *ap);
644 void (*port_stop) (struct ata_port *ap);
645
cca3974e 646 void (*host_stop) (struct ata_host *host);
1da177e4 647
b73fc89f 648 void (*bmdma_stop) (struct ata_queued_cmd *qc);
1da177e4
LT
649 u8 (*bmdma_status) (struct ata_port *ap);
650};
651
652struct ata_port_info {
d0be4a7d 653 struct scsi_host_template *sht;
cca3974e 654 unsigned long flags;
1da177e4
LT
655 unsigned long pio_mask;
656 unsigned long mwdma_mask;
657 unsigned long udma_mask;
057ace5e 658 const struct ata_port_operations *port_ops;
e99f8b5e 659 void *private_data;
1da177e4
LT
660};
661
452503f9
AC
662struct ata_timing {
663 unsigned short mode; /* ATA mode */
664 unsigned short setup; /* t1 */
665 unsigned short act8b; /* t2 for 8-bit I/O */
666 unsigned short rec8b; /* t2i for 8-bit I/O */
667 unsigned short cyc8b; /* t0 for 8-bit I/O */
668 unsigned short active; /* t2 or tD */
669 unsigned short recover; /* t2i or tK */
670 unsigned short cycle; /* t0 */
671 unsigned short udma; /* t2CYCTYP/2 */
672};
673
674#define FIT(v,vmin,vmax) max_t(short,min_t(short,v,vmax),vmin)
1da177e4 675
e9c83914
TH
676extern const unsigned long sata_deb_timing_normal[];
677extern const unsigned long sata_deb_timing_hotplug[];
678extern const unsigned long sata_deb_timing_long[];
679
dd5b06c4
TH
680extern const struct ata_port_operations ata_dummy_port_ops;
681
e9c83914
TH
682static inline const unsigned long *
683sata_ehc_deb_timing(struct ata_eh_context *ehc)
684{
685 if (ehc->i.flags & ATA_EHI_HOTPLUGGED)
686 return sata_deb_timing_hotplug;
687 else
688 return sata_deb_timing_normal;
689}
d7bb4cc7 690
dd5b06c4
TH
691static inline int ata_port_is_dummy(struct ata_port *ap)
692{
693 return ap->ops == &ata_dummy_port_ops;
694}
695
1da177e4
LT
696extern void ata_port_probe(struct ata_port *);
697extern void __sata_phy_reset(struct ata_port *ap);
698extern void sata_phy_reset(struct ata_port *ap);
699extern void ata_bus_reset(struct ata_port *ap);
3c567b7d 700extern int sata_set_spd(struct ata_port *ap);
d7bb4cc7
TH
701extern int sata_phy_debounce(struct ata_port *ap, const unsigned long *param);
702extern int sata_phy_resume(struct ata_port *ap, const unsigned long *param);
f5914a46 703extern int ata_std_prereset(struct ata_port *ap);
2bf2cb26 704extern int ata_std_softreset(struct ata_port *ap, unsigned int *classes);
b6103f6d
TH
705extern int sata_port_hardreset(struct ata_port *ap,
706 const unsigned long *timing);
2bf2cb26 707extern int sata_std_hardreset(struct ata_port *ap, unsigned int *class);
c2bd5804 708extern void ata_std_postreset(struct ata_port *ap, unsigned int *classes);
1da177e4
LT
709extern void ata_port_disable(struct ata_port *);
710extern void ata_std_ports(struct ata_ioports *ioaddr);
711#ifdef CONFIG_PCI
712extern int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
713 unsigned int n_ports);
714extern void ata_pci_remove_one (struct pci_dev *pdev);
3c5100c1 715extern void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg);
553c4aa6 716extern int __must_check ata_pci_device_do_resume(struct pci_dev *pdev);
3c5100c1 717extern int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg);
9b847548 718extern int ata_pci_device_resume(struct pci_dev *pdev);
17bb34a3 719extern int ata_pci_clear_simplex(struct pci_dev *pdev);
1da177e4 720#endif /* CONFIG_PCI */
057ace5e 721extern int ata_device_add(const struct ata_probe_ent *ent);
720ba126 722extern void ata_port_detach(struct ata_port *ap);
cca3974e
JG
723extern void ata_host_init(struct ata_host *, struct device *,
724 unsigned long, const struct ata_port_operations *);
725extern void ata_host_remove(struct ata_host *host);
193515d5 726extern int ata_scsi_detect(struct scsi_host_template *sht);
1da177e4
LT
727extern int ata_scsi_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
728extern int ata_scsi_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *));
1da177e4 729extern int ata_scsi_release(struct Scsi_Host *host);
80289167 730extern void ata_sas_port_destroy(struct ata_port *);
cca3974e 731extern struct ata_port *ata_sas_port_alloc(struct ata_host *,
80289167
BK
732 struct ata_port_info *, struct Scsi_Host *);
733extern int ata_sas_port_init(struct ata_port *);
734extern int ata_sas_port_start(struct ata_port *ap);
735extern void ata_sas_port_stop(struct ata_port *ap);
736extern int ata_sas_slave_configure(struct scsi_device *, struct ata_port *);
737extern int ata_sas_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *),
738 struct ata_port *ap);
1da177e4 739extern unsigned int ata_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc);
34bf2170
TH
740extern int sata_scr_valid(struct ata_port *ap);
741extern int sata_scr_read(struct ata_port *ap, int reg, u32 *val);
742extern int sata_scr_write(struct ata_port *ap, int reg, u32 val);
743extern int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val);
744extern int ata_port_online(struct ata_port *ap);
745extern int ata_port_offline(struct ata_port *ap);
9b847548 746extern int ata_scsi_device_resume(struct scsi_device *);
3c5100c1 747extern int ata_scsi_device_suspend(struct scsi_device *, pm_message_t mesg);
cca3974e
JG
748extern int ata_host_suspend(struct ata_host *host, pm_message_t mesg);
749extern void ata_host_resume(struct ata_host *host);
67846b30 750extern int ata_ratelimit(void);
d1adc1bb
TH
751extern int ata_busy_sleep(struct ata_port *ap,
752 unsigned long timeout_pat, unsigned long timeout);
65f27f38 753extern void ata_port_queue_task(struct ata_port *ap, work_func_t fn,
86e45b6b 754 void *data, unsigned long delay);
c22daff4
TH
755extern u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
756 unsigned long interval_msec,
757 unsigned long timeout_msec);
67846b30 758
1da177e4
LT
759/*
760 * Default driver ops implementations
761 */
057ace5e 762extern void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4 763extern void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
057ace5e
JG
764extern void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp);
765extern void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf);
1da177e4
LT
766extern void ata_noop_dev_select (struct ata_port *ap, unsigned int device);
767extern void ata_std_dev_select (struct ata_port *ap, unsigned int device);
768extern u8 ata_check_status(struct ata_port *ap);
769extern u8 ata_altstatus(struct ata_port *ap);
057ace5e 770extern void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT
771extern int ata_port_start (struct ata_port *ap);
772extern void ata_port_stop (struct ata_port *ap);
cca3974e 773extern void ata_host_stop (struct ata_host *host);
7d12e780 774extern irqreturn_t ata_interrupt (int irq, void *dev_instance);
a6b2c5d4
AC
775extern void ata_mmio_data_xfer(struct ata_device *adev, unsigned char *buf,
776 unsigned int buflen, int write_data);
777extern void ata_pio_data_xfer(struct ata_device *adev, unsigned char *buf,
778 unsigned int buflen, int write_data);
75e99585
AC
779extern void ata_pio_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
780 unsigned int buflen, int write_data);
1da177e4 781extern void ata_qc_prep(struct ata_queued_cmd *qc);
e46834cd 782extern void ata_noop_qc_prep(struct ata_queued_cmd *qc);
9a3d9eb0 783extern unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc);
1da177e4
LT
784extern void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf,
785 unsigned int buflen);
786extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
787 unsigned int n_elem);
057ace5e 788extern unsigned int ata_dev_classify(const struct ata_taskfile *tf);
6a62a04d
TH
789extern void ata_id_string(const u16 *id, unsigned char *s,
790 unsigned int ofs, unsigned int len);
791extern void ata_id_c_string(const u16 *id, unsigned char *s,
792 unsigned int ofs, unsigned int len);
6919a0a6 793extern unsigned long ata_device_blacklisted(const struct ata_device *dev);
1da177e4
LT
794extern void ata_bmdma_setup (struct ata_queued_cmd *qc);
795extern void ata_bmdma_start (struct ata_queued_cmd *qc);
b73fc89f 796extern void ata_bmdma_stop(struct ata_queued_cmd *qc);
1da177e4
LT
797extern u8 ata_bmdma_status(struct ata_port *ap);
798extern void ata_bmdma_irq_clear(struct ata_port *ap);
6d97dbd7
TH
799extern void ata_bmdma_freeze(struct ata_port *ap);
800extern void ata_bmdma_thaw(struct ata_port *ap);
f5914a46 801extern void ata_bmdma_drive_eh(struct ata_port *ap, ata_prereset_fn_t prereset,
6d97dbd7
TH
802 ata_reset_fn_t softreset,
803 ata_reset_fn_t hardreset,
804 ata_postreset_fn_t postreset);
805extern void ata_bmdma_error_handler(struct ata_port *ap);
806extern void ata_bmdma_post_internal_cmd(struct ata_queued_cmd *qc);
9a1004d0
TH
807extern int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
808 u8 status, int in_wq);
f686bcb8 809extern void ata_qc_complete(struct ata_queued_cmd *qc);
dedaf2b0
TH
810extern int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
811 void (*finish_qc)(struct ata_queued_cmd *));
3373efd8 812extern void ata_scsi_simulate(struct ata_device *dev, struct scsi_cmnd *cmd,
1da177e4
LT
813 void (*done)(struct scsi_cmnd *));
814extern int ata_std_bios_param(struct scsi_device *sdev,
815 struct block_device *bdev,
816 sector_t capacity, int geom[]);
817extern int ata_scsi_slave_config(struct scsi_device *sdev);
83c47bcb 818extern void ata_scsi_slave_destroy(struct scsi_device *sdev);
a6e6ce8e
TH
819extern int ata_scsi_change_queue_depth(struct scsi_device *sdev,
820 int queue_depth);
3373efd8 821extern struct ata_device *ata_dev_pair(struct ata_device *adev);
1da177e4 822
452503f9
AC
823/*
824 * Timing helpers
825 */
1bc4ccff
AC
826
827extern unsigned int ata_pio_need_iordy(const struct ata_device *);
452503f9
AC
828extern int ata_timing_compute(struct ata_device *, unsigned short,
829 struct ata_timing *, int, int);
830extern void ata_timing_merge(const struct ata_timing *,
831 const struct ata_timing *, struct ata_timing *,
832 unsigned int);
833
834enum {
835 ATA_TIMING_SETUP = (1 << 0),
836 ATA_TIMING_ACT8B = (1 << 1),
837 ATA_TIMING_REC8B = (1 << 2),
838 ATA_TIMING_CYC8B = (1 << 3),
839 ATA_TIMING_8BIT = ATA_TIMING_ACT8B | ATA_TIMING_REC8B |
840 ATA_TIMING_CYC8B,
841 ATA_TIMING_ACTIVE = (1 << 4),
842 ATA_TIMING_RECOVER = (1 << 5),
843 ATA_TIMING_CYCLE = (1 << 6),
844 ATA_TIMING_UDMA = (1 << 7),
845 ATA_TIMING_ALL = ATA_TIMING_SETUP | ATA_TIMING_ACT8B |
846 ATA_TIMING_REC8B | ATA_TIMING_CYC8B |
847 ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER |
848 ATA_TIMING_CYCLE | ATA_TIMING_UDMA,
849};
850
1da177e4
LT
851
852#ifdef CONFIG_PCI
853struct pci_bits {
854 unsigned int reg; /* PCI config register to read */
855 unsigned int width; /* 1 (8 bit), 2 (16 bit), 4 (32 bit) */
856 unsigned long mask;
857 unsigned long val;
858};
859
cca3974e 860extern void ata_pci_host_stop (struct ata_host *host);
1da177e4 861extern struct ata_probe_ent *
47a86593 862ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int portmask);
057ace5e 863extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits);
17bb34a3 864extern unsigned long ata_pci_default_filter(const struct ata_port *, struct ata_device *, unsigned long);
1da177e4
LT
865#endif /* CONFIG_PCI */
866
ece1d636
TH
867/*
868 * EH
869 */
ece1d636 870extern void ata_eng_timeout(struct ata_port *ap);
7b70fc03
TH
871
872extern void ata_port_schedule_eh(struct ata_port *ap);
873extern int ata_port_abort(struct ata_port *ap);
e3180499
TH
874extern int ata_port_freeze(struct ata_port *ap);
875
876extern void ata_eh_freeze_port(struct ata_port *ap);
877extern void ata_eh_thaw_port(struct ata_port *ap);
7b70fc03 878
ece1d636
TH
879extern void ata_eh_qc_complete(struct ata_queued_cmd *qc);
880extern void ata_eh_qc_retry(struct ata_queued_cmd *qc);
881
f5914a46
TH
882extern void ata_do_eh(struct ata_port *ap, ata_prereset_fn_t prereset,
883 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
884 ata_postreset_fn_t postreset);
022bdb07 885
61440db6
TH
886/*
887 * printk helpers
888 */
889#define ata_port_printk(ap, lv, fmt, args...) \
890 printk(lv"ata%u: "fmt, (ap)->id , ##args)
891
892#define ata_dev_printk(dev, lv, fmt, args...) \
893 printk(lv"ata%u.%02u: "fmt, (dev)->ap->id, (dev)->devno , ##args)
1da177e4 894
f3e81b19
TH
895/*
896 * ata_eh_info helpers
897 */
898#define ata_ehi_push_desc(ehi, fmt, args...) do { \
899 (ehi)->desc_len += scnprintf((ehi)->desc + (ehi)->desc_len, \
900 ATA_EH_DESC_LEN - (ehi)->desc_len, \
901 fmt , ##args); \
902} while (0)
903
904#define ata_ehi_clear_desc(ehi) do { \
905 (ehi)->desc[0] = '\0'; \
906 (ehi)->desc_len = 0; \
907} while (0)
908
c0b6c037 909static inline void __ata_ehi_hotplugged(struct ata_eh_info *ehi)
084fe639
TH
910{
911 if (ehi->flags & ATA_EHI_HOTPLUGGED)
912 return;
913
28324304 914 ehi->flags |= ATA_EHI_HOTPLUGGED | ATA_EHI_RESUME_LINK;
084fe639
TH
915 ehi->hotplug_timestamp = jiffies;
916
084fe639
TH
917 ehi->action |= ATA_EH_SOFTRESET;
918 ehi->probe_mask |= (1 << ATA_MAX_DEVICES) - 1;
919}
920
c0b6c037
TH
921static inline void ata_ehi_hotplugged(struct ata_eh_info *ehi)
922{
923 __ata_ehi_hotplugged(ehi);
924 ehi->err_mask |= AC_ERR_ATA_BUS;
925}
926
61440db6
TH
927/*
928 * qc helpers
929 */
972c26bd
JG
930static inline int
931ata_sg_is_last(struct scatterlist *sg, struct ata_queued_cmd *qc)
932{
933 if (sg == &qc->pad_sgent)
934 return 1;
935 if (qc->pad_len)
936 return 0;
937 if (((sg - qc->__sg) + 1) == qc->n_elem)
938 return 1;
939 return 0;
940}
941
cc1887f3
TH
942static inline struct scatterlist *
943ata_qc_first_sg(struct ata_queued_cmd *qc)
944{
945 if (qc->n_elem)
946 return qc->__sg;
947 if (qc->pad_len)
948 return &qc->pad_sgent;
949 return NULL;
950}
951
cedc9a47
JG
952static inline struct scatterlist *
953ata_qc_next_sg(struct scatterlist *sg, struct ata_queued_cmd *qc)
954{
955 if (sg == &qc->pad_sgent)
956 return NULL;
957 if (++sg - qc->__sg < qc->n_elem)
958 return sg;
cc1887f3
TH
959 if (qc->pad_len)
960 return &qc->pad_sgent;
961 return NULL;
cedc9a47
JG
962}
963
964#define ata_for_each_sg(sg, qc) \
cc1887f3 965 for (sg = ata_qc_first_sg(qc); sg; sg = ata_qc_next_sg(sg, qc))
cedc9a47 966
1da177e4
LT
967static inline unsigned int ata_tag_valid(unsigned int tag)
968{
969 return (tag < ATA_MAX_QUEUE) ? 1 : 0;
970}
971
2ab7db1f
TH
972static inline unsigned int ata_tag_internal(unsigned int tag)
973{
974 return tag == ATA_MAX_QUEUE - 1;
975}
976
5806db22
TH
977/*
978 * device helpers
979 */
e1211e3f 980static inline unsigned int ata_class_enabled(unsigned int class)
597afd21
TH
981{
982 return class == ATA_DEV_ATA || class == ATA_DEV_ATAPI;
983}
984
e1211e3f 985static inline unsigned int ata_class_disabled(unsigned int class)
1da177e4 986{
e1211e3f
TH
987 return class == ATA_DEV_ATA_UNSUP || class == ATA_DEV_ATAPI_UNSUP;
988}
989
002c8054
TH
990static inline unsigned int ata_class_absent(unsigned int class)
991{
992 return !ata_class_enabled(class) && !ata_class_disabled(class);
993}
994
e1211e3f
TH
995static inline unsigned int ata_dev_enabled(const struct ata_device *dev)
996{
997 return ata_class_enabled(dev->class);
998}
999
1000static inline unsigned int ata_dev_disabled(const struct ata_device *dev)
1001{
1002 return ata_class_disabled(dev->class);
1da177e4
LT
1003}
1004
002c8054
TH
1005static inline unsigned int ata_dev_absent(const struct ata_device *dev)
1006{
1007 return ata_class_absent(dev->class);
1008}
1009
02670bf3
TH
1010static inline unsigned int ata_dev_ready(const struct ata_device *dev)
1011{
1012 return ata_dev_enabled(dev) && !(dev->flags & ATA_DFLAG_SUSPENDED);
1013}
1014
5806db22
TH
1015/*
1016 * port helpers
1017 */
1018static inline int ata_port_max_devices(const struct ata_port *ap)
1019{
1020 if (ap->flags & ATA_FLAG_SLAVE_POSS)
1021 return 2;
1022 return 1;
1023}
1024
1025
1da177e4
LT
1026static inline u8 ata_chk_status(struct ata_port *ap)
1027{
1028 return ap->ops->check_status(ap);
1029}
1030
0baab86b
EF
1031
1032/**
1033 * ata_pause - Flush writes and pause 400 nanoseconds.
1034 * @ap: Port to wait for.
1035 *
1036 * LOCKING:
1037 * Inherited from caller.
1038 */
1039
1da177e4
LT
1040static inline void ata_pause(struct ata_port *ap)
1041{
1042 ata_altstatus(ap);
1043 ndelay(400);
1044}
1045
0baab86b
EF
1046
1047/**
1048 * ata_busy_wait - Wait for a port status register
1049 * @ap: Port to wait for.
0777721c
A
1050 * @bits: bits that must be clear
1051 * @max: number of 10uS waits to perform
0baab86b
EF
1052 *
1053 * Waits up to max*10 microseconds for the selected bits in the port's
1054 * status register to be cleared.
1055 * Returns final value of status register.
1056 *
1057 * LOCKING:
1058 * Inherited from caller.
1059 */
1060
1da177e4
LT
1061static inline u8 ata_busy_wait(struct ata_port *ap, unsigned int bits,
1062 unsigned int max)
1063{
1064 u8 status;
1065
1066 do {
1067 udelay(10);
1068 status = ata_chk_status(ap);
1069 max--;
d1adc1bb 1070 } while (status != 0xff && (status & bits) && (max > 0));
1da177e4
LT
1071
1072 return status;
1073}
1074
0baab86b
EF
1075
1076/**
1077 * ata_wait_idle - Wait for a port to be idle.
1078 * @ap: Port to wait for.
1079 *
1080 * Waits up to 10ms for port's BUSY and DRQ signals to clear.
1081 * Returns final value of status register.
1082 *
1083 * LOCKING:
1084 * Inherited from caller.
1085 */
1086
1da177e4
LT
1087static inline u8 ata_wait_idle(struct ata_port *ap)
1088{
1089 u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
1090
d1adc1bb 1091 if (status != 0xff && (status & (ATA_BUSY | ATA_DRQ))) {
1da177e4 1092 unsigned long l = ap->ioaddr.status_addr;
bfd60579
RD
1093 if (ata_msg_warn(ap))
1094 printk(KERN_WARNING "ATA: abnormal status 0x%X on port 0x%lX\n",
1095 status, l);
1da177e4
LT
1096 }
1097
1098 return status;
1099}
1100
1101static inline void ata_qc_set_polling(struct ata_queued_cmd *qc)
1102{
1103 qc->tf.ctl |= ATA_NIEN;
1104}
1105
f69499f4
TH
1106static inline struct ata_queued_cmd *__ata_qc_from_tag(struct ata_port *ap,
1107 unsigned int tag)
1da177e4
LT
1108{
1109 if (likely(ata_tag_valid(tag)))
1110 return &ap->qcmd[tag];
1111 return NULL;
1112}
1113
f69499f4
TH
1114static inline struct ata_queued_cmd *ata_qc_from_tag(struct ata_port *ap,
1115 unsigned int tag)
1116{
1117 struct ata_queued_cmd *qc = __ata_qc_from_tag(ap, tag);
1118
1119 if (unlikely(!qc) || !ap->ops->error_handler)
1120 return qc;
1121
1122 if ((qc->flags & (ATA_QCFLAG_ACTIVE |
1123 ATA_QCFLAG_FAILED)) == ATA_QCFLAG_ACTIVE)
1124 return qc;
1125
1126 return NULL;
1127}
1128
3373efd8 1129static inline void ata_tf_init(struct ata_device *dev, struct ata_taskfile *tf)
1da177e4
LT
1130{
1131 memset(tf, 0, sizeof(*tf));
1132
3373efd8
TH
1133 tf->ctl = dev->ap->ctl;
1134 if (dev->devno == 0)
1da177e4
LT
1135 tf->device = ATA_DEVICE_OBS;
1136 else
1137 tf->device = ATA_DEVICE_OBS | ATA_DEV1;
1138}
1139
2c13b7ce
JG
1140static inline void ata_qc_reinit(struct ata_queued_cmd *qc)
1141{
501e0c50 1142 qc->dma_dir = DMA_NONE;
2c13b7ce
JG
1143 qc->__sg = NULL;
1144 qc->flags = 0;
726f0785 1145 qc->cursg = qc->cursg_ofs = 0;
2c13b7ce 1146 qc->nbytes = qc->curbytes = 0;
7a801184 1147 qc->n_elem = 0;
a22e2eb0 1148 qc->err_mask = 0;
d0f29485 1149 qc->pad_len = 0;
2c13b7ce 1150
3373efd8 1151 ata_tf_init(qc->dev, &qc->tf);
e61e0672
TH
1152
1153 /* init result_tf such that it indicates normal completion */
1154 qc->result_tf.command = ATA_DRDY;
1155 qc->result_tf.feature = 0;
2c13b7ce
JG
1156}
1157
0baab86b
EF
1158/**
1159 * ata_irq_ack - Acknowledge a device interrupt.
1160 * @ap: Port on which interrupts are enabled.
1161 *
1162 * Wait up to 10 ms for legacy IDE device to become idle (BUSY
1163 * or BUSY+DRQ clear). Obtain dma status and port status from
1164 * device. Clear the interrupt. Return port status.
1165 *
1166 * LOCKING:
1167 */
1168
1da177e4
LT
1169static inline u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq)
1170{
1171 unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY;
1172 u8 host_stat, post_stat, status;
1173
1174 status = ata_busy_wait(ap, bits, 1000);
1175 if (status & bits)
bfd60579
RD
1176 if (ata_msg_err(ap))
1177 printk(KERN_ERR "abnormal status 0x%X\n", status);
1da177e4
LT
1178
1179 /* get controller status; clear intr, err bits */
1180 if (ap->flags & ATA_FLAG_MMIO) {
1181 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
1182 host_stat = readb(mmio + ATA_DMA_STATUS);
1183 writeb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
1184 mmio + ATA_DMA_STATUS);
1185
1186 post_stat = readb(mmio + ATA_DMA_STATUS);
1187 } else {
1188 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
1189 outb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
1190 ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
1191
1192 post_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
1193 }
1194
bfd60579
RD
1195 if (ata_msg_intr(ap))
1196 printk(KERN_INFO "%s: irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n",
1197 __FUNCTION__,
1198 host_stat, post_stat, status);
1da177e4
LT
1199
1200 return status;
1201}
1202
057ace5e 1203static inline int ata_try_flush_cache(const struct ata_device *dev)
1da177e4
LT
1204{
1205 return ata_id_wcache_enabled(dev->id) ||
1206 ata_id_has_flush(dev->id) ||
1207 ata_id_has_flush_ext(dev->id);
1208}
1209
a7dac447
JG
1210static inline unsigned int ac_err_mask(u8 status)
1211{
3655d1d3 1212 if (status & (ATA_BUSY | ATA_DRQ))
11a56d24 1213 return AC_ERR_HSM;
a7dac447
JG
1214 if (status & (ATA_ERR | ATA_DF))
1215 return AC_ERR_DEV;
1216 return 0;
1217}
1218
1219static inline unsigned int __ac_err_mask(u8 status)
1220{
1221 unsigned int mask = ac_err_mask(status);
1222 if (mask == 0)
1223 return AC_ERR_OTHER;
1224 return mask;
1225}
1226
6037d6bb
JG
1227static inline int ata_pad_alloc(struct ata_port *ap, struct device *dev)
1228{
1229 ap->pad_dma = 0;
1230 ap->pad = dma_alloc_coherent(dev, ATA_DMA_PAD_BUF_SZ,
1231 &ap->pad_dma, GFP_KERNEL);
1232 return (ap->pad == NULL) ? -ENOMEM : 0;
1233}
1234
1235static inline void ata_pad_free(struct ata_port *ap, struct device *dev)
1236{
1237 dma_free_coherent(dev, ATA_DMA_PAD_BUF_SZ, ap->pad, ap->pad_dma);
1238}
1239
35bb94b1
JG
1240static inline struct ata_port *ata_shost_to_port(struct Scsi_Host *host)
1241{
1242 return (struct ata_port *) &host->hostdata[0];
1243}
1244
1da177e4 1245#endif /* __LINUX_LIBATA_H__ */