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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
08a543ad | 2 | /* |
a4efe303 | 3 | * irq_domain - IRQ Translation Domains |
08a543ad | 4 | * |
a4efe303 | 5 | * See Documentation/core-api/irq/irq-domain.rst for the details. |
08a543ad | 6 | */ |
7bb69bad | 7 | |
08a543ad GL |
8 | #ifndef _LINUX_IRQDOMAIN_H |
9 | #define _LINUX_IRQDOMAIN_H | |
10 | ||
7bb69bad | 11 | #include <linux/types.h> |
aeef2052 | 12 | #include <linux/irqdomain_defs.h> |
1b537708 | 13 | #include <linux/irqhandler.h> |
f110711a | 14 | #include <linux/of.h> |
f1d78358 | 15 | #include <linux/mutex.h> |
7bb69bad | 16 | #include <linux/radix-tree.h> |
08a543ad | 17 | |
08a543ad | 18 | struct device_node; |
08219fb1 | 19 | struct fwnode_handle; |
08a543ad | 20 | struct irq_domain; |
f8264e34 JL |
21 | struct irq_chip; |
22 | struct irq_data; | |
d22558dd | 23 | struct irq_desc; |
06ee6d57 | 24 | struct cpumask; |
c3e7239a | 25 | struct seq_file; |
bec04037 | 26 | struct irq_affinity_desc; |
b78780d9 | 27 | struct msi_parent_ops; |
7bb69bad | 28 | |
11e4438e MZ |
29 | #define IRQ_DOMAIN_IRQ_SPEC_PARAMS 16 |
30 | ||
31 | /** | |
32 | * struct irq_fwspec - generic IRQ specifier structure | |
33 | * | |
34 | * @fwnode: Pointer to a firmware-specific descriptor | |
35 | * @param_count: Number of device-specific parameters | |
36 | * @param: Device-specific parameters | |
37 | * | |
38 | * This structure, directly modeled after of_phandle_args, is used to | |
39 | * pass a device-specific description of an interrupt. | |
40 | */ | |
41 | struct irq_fwspec { | |
38c1e73f TG |
42 | struct fwnode_handle *fwnode; |
43 | int param_count; | |
44 | u32 param[IRQ_DOMAIN_IRQ_SPEC_PARAMS]; | |
11e4438e MZ |
45 | }; |
46 | ||
0ab8d0f6 MZ |
47 | /* Conversion function from of_phandle_args fields to fwspec */ |
48 | void of_phandle_args_to_fwspec(struct device_node *np, const u32 *args, | |
49 | unsigned int count, struct irq_fwspec *fwspec); | |
50 | ||
08a543ad GL |
51 | /** |
52 | * struct irq_domain_ops - Methods for irq_domain objects | |
38c1e73f TG |
53 | * @match: Match an interrupt controller device node to a domain, returns |
54 | * 1 on a match | |
55 | * @select: Match an interrupt controller fw specification. It is more generic | |
56 | * than @match as it receives a complete struct irq_fwspec. Therefore, | |
57 | * @select is preferred if provided. Returns 1 on a match. | |
58 | * @map: Create or update a mapping between a virtual irq number and a hw | |
59 | * irq number. This is called only once for a given mapping. | |
60 | * @unmap: Dispose of such a mapping | |
61 | * @xlate: Given a device tree node and interrupt specifier, decode | |
62 | * the hardware irq number and linux irq type value. | |
63 | * @alloc: Allocate @nr_irqs interrupts starting from @virq. | |
64 | * @free: Free @nr_irqs interrupts starting from @virq. | |
65 | * @activate: Activate one interrupt in HW (@irqd). If @reserve is set, only | |
66 | * reserve the vector. If unset, assign the vector (called from | |
67 | * request_irq()). | |
68 | * @deactivate: Disarm one interrupt (@irqd). | |
69 | * @translate: Given @fwspec, decode the hardware irq number (@out_hwirq) and | |
70 | * linux irq type value (@out_type). This is a generalised @xlate | |
71 | * (over struct irq_fwspec) and is preferred if provided. | |
72 | * @debug_show: For domains to show specific data for an interrupt in debugfs. | |
7bb69bad GL |
73 | * |
74 | * Functions below are provided by the driver and called whenever a new mapping | |
75 | * is created or an old mapping is disposed. The driver can then proceed to | |
76 | * whatever internal data structures management is required. It also needs | |
77 | * to setup the irq_desc when returning from map(). | |
08a543ad GL |
78 | */ |
79 | struct irq_domain_ops { | |
38c1e73f TG |
80 | int (*match)(struct irq_domain *d, struct device_node *node, |
81 | enum irq_domain_bus_token bus_token); | |
82 | int (*select)(struct irq_domain *d, struct irq_fwspec *fwspec, | |
83 | enum irq_domain_bus_token bus_token); | |
84 | int (*map)(struct irq_domain *d, unsigned int virq, irq_hw_number_t hw); | |
85 | void (*unmap)(struct irq_domain *d, unsigned int virq); | |
86 | int (*xlate)(struct irq_domain *d, struct device_node *node, | |
87 | const u32 *intspec, unsigned int intsize, | |
88 | unsigned long *out_hwirq, unsigned int *out_type); | |
f8264e34 JL |
89 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
90 | /* extended V2 interfaces to support hierarchy irq_domains */ | |
38c1e73f TG |
91 | int (*alloc)(struct irq_domain *d, unsigned int virq, |
92 | unsigned int nr_irqs, void *arg); | |
93 | void (*free)(struct irq_domain *d, unsigned int virq, | |
94 | unsigned int nr_irqs); | |
95 | int (*activate)(struct irq_domain *d, struct irq_data *irqd, bool reserve); | |
96 | void (*deactivate)(struct irq_domain *d, struct irq_data *irq_data); | |
97 | int (*translate)(struct irq_domain *d, struct irq_fwspec *fwspec, | |
98 | unsigned long *out_hwirq, unsigned int *out_type); | |
f8264e34 | 99 | #endif |
c3e7239a | 100 | #ifdef CONFIG_GENERIC_IRQ_DEBUGFS |
38c1e73f TG |
101 | void (*debug_show)(struct seq_file *m, struct irq_domain *d, |
102 | struct irq_data *irqd, int ind); | |
c3e7239a | 103 | #endif |
08a543ad GL |
104 | }; |
105 | ||
4946f15e | 106 | extern const struct irq_domain_ops irq_generic_chip_ops; |
088f40b7 TG |
107 | |
108 | struct irq_domain_chip_generic; | |
109 | ||
08a543ad GL |
110 | /** |
111 | * struct irq_domain - Hardware interrupt number translation object | |
f876ea3b TG |
112 | * @link: Element in global irq_domain list. |
113 | * @name: Name of interrupt domain | |
114 | * @ops: Pointer to irq_domain methods | |
115 | * @host_data: Private data pointer for use by owner. Not touched by irq_domain | |
116 | * core code. | |
117 | * @flags: Per irq_domain flags | |
118 | * @mapcount: The number of mapped interrupts | |
9dbb8e34 JH |
119 | * @mutex: Domain lock, hierarchical domains use root domain's lock |
120 | * @root: Pointer to root domain, or containing structure if non-hierarchical | |
1aa0dd94 | 121 | * |
f876ea3b TG |
122 | * Optional elements: |
123 | * @fwnode: Pointer to firmware node associated with the irq_domain. Pretty easy | |
124 | * to swap it for the of_node via the irq_domain_get_of_node accessor | |
b7b37733 JSS |
125 | * @bus_token: @fwnode's device_node might be used for several irq domains. But |
126 | * in connection with @bus_token, the pair shall be unique in a | |
127 | * system. | |
f876ea3b TG |
128 | * @gc: Pointer to a list of generic chips. There is a helper function for |
129 | * setting up one or more generic chips for interrupt controllers | |
130 | * drivers using the generic chip library which uses this pointer. | |
4443664f TG |
131 | * @dev: Pointer to the device which instantiated the irqdomain |
132 | * With per device irq domains this is not necessarily the same | |
133 | * as @pm_dev. | |
6a9fc419 | 134 | * @pm_dev: Pointer to a device that can be utilized for power management |
f876ea3b TG |
135 | * purposes related to the irq domain. |
136 | * @parent: Pointer to parent irq_domain to support hierarchy irq_domains | |
b78780d9 | 137 | * @msi_parent_ops: Pointer to MSI parent domain methods for per device domain init |
44b68de9 | 138 | * @exit: Function called when the domain is destroyed |
1aa0dd94 | 139 | * |
f876ea3b | 140 | * Revmap data, used internally by the irq domain code: |
b7b37733 JSS |
141 | * @hwirq_max: Top limit for the HW irq number. Especially to avoid |
142 | * conflicts/failures with reserved HW irqs. Can be ~0. | |
143 | * @revmap_size: Size of the linear map table @revmap | |
f876ea3b | 144 | * @revmap_tree: Radix map tree for hwirqs that don't fit in the linear map |
f876ea3b | 145 | * @revmap: Linear table of irq_data pointers |
08a543ad GL |
146 | */ |
147 | struct irq_domain { | |
f876ea3b TG |
148 | struct list_head link; |
149 | const char *name; | |
150 | const struct irq_domain_ops *ops; | |
151 | void *host_data; | |
152 | unsigned int flags; | |
153 | unsigned int mapcount; | |
9dbb8e34 JH |
154 | struct mutex mutex; |
155 | struct irq_domain *root; | |
7bb69bad | 156 | |
1aa0dd94 | 157 | /* Optional data */ |
f876ea3b TG |
158 | struct fwnode_handle *fwnode; |
159 | enum irq_domain_bus_token bus_token; | |
160 | struct irq_domain_chip_generic *gc; | |
4443664f | 161 | struct device *dev; |
6a9fc419 | 162 | struct device *pm_dev; |
f8264e34 | 163 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
f876ea3b | 164 | struct irq_domain *parent; |
f8264e34 | 165 | #endif |
b78780d9 TG |
166 | #ifdef CONFIG_GENERIC_MSI_IRQ |
167 | const struct msi_parent_ops *msi_parent_ops; | |
168 | #endif | |
44b68de9 | 169 | void (*exit)(struct irq_domain *d); |
cef5075c | 170 | |
1aa0dd94 | 171 | /* reverse map data. The linear map gets appended to the irq_domain */ |
f876ea3b TG |
172 | irq_hw_number_t hwirq_max; |
173 | unsigned int revmap_size; | |
174 | struct radix_tree_root revmap_tree; | |
6260ecd0 | 175 | struct irq_data __rcu *revmap[] __counted_by(revmap_size); |
08a543ad GL |
176 | }; |
177 | ||
f8264e34 JL |
178 | /* Irq domain flags */ |
179 | enum { | |
180 | /* Irq domain is hierarchical */ | |
181 | IRQ_DOMAIN_FLAG_HIERARCHY = (1 << 0), | |
182 | ||
0b4b172b | 183 | /* Irq domain name was allocated internally */ |
2546287c | 184 | IRQ_DOMAIN_NAME_ALLOCATED = (1 << 1), |
36d72731 | 185 | |
0abefbaa QY |
186 | /* Irq domain is an IPI domain with virq per cpu */ |
187 | IRQ_DOMAIN_FLAG_IPI_PER_CPU = (1 << 2), | |
188 | ||
189 | /* Irq domain is an IPI domain with single virq */ | |
190 | IRQ_DOMAIN_FLAG_IPI_SINGLE = (1 << 3), | |
191 | ||
631a9639 EA |
192 | /* Irq domain implements MSIs */ |
193 | IRQ_DOMAIN_FLAG_MSI = (1 << 4), | |
194 | ||
dcb83f6e JG |
195 | /* |
196 | * Irq domain implements isolated MSI, see msi_device_has_isolated_msi() | |
197 | */ | |
198 | IRQ_DOMAIN_FLAG_ISOLATED_MSI = (1 << 5), | |
631a9639 | 199 | |
4f86a06e | 200 | /* Irq domain doesn't translate anything */ |
3dad5f9a | 201 | IRQ_DOMAIN_FLAG_NO_MAP = (1 << 6), |
4f86a06e | 202 | |
b749e6d3 TG |
203 | /* Irq domain is a MSI parent domain */ |
204 | IRQ_DOMAIN_FLAG_MSI_PARENT = (1 << 8), | |
205 | ||
e71c5d0b TG |
206 | /* Irq domain is a MSI device domain */ |
207 | IRQ_DOMAIN_FLAG_MSI_DEVICE = (1 << 9), | |
208 | ||
e6f67ce3 HC |
209 | /* Irq domain must destroy generic chips when removed */ |
210 | IRQ_DOMAIN_FLAG_DESTROY_GC = (1 << 10), | |
211 | ||
b8c7bfb7 FL |
212 | /* Address and data pair is mutable when irq_set_affinity() */ |
213 | IRQ_DOMAIN_FLAG_MSI_IMMUTABLE = (1 << 11), | |
214 | ||
f8264e34 JL |
215 | /* |
216 | * Flags starting from IRQ_DOMAIN_FLAG_NONCORE are reserved | |
217 | * for implementation specific purposes and ignored by the | |
218 | * core code. | |
219 | */ | |
220 | IRQ_DOMAIN_FLAG_NONCORE = (1 << 16), | |
221 | }; | |
222 | ||
10abc7df MZ |
223 | static inline struct device_node *irq_domain_get_of_node(struct irq_domain *d) |
224 | { | |
f110711a | 225 | return to_of_node(d->fwnode); |
10abc7df MZ |
226 | } |
227 | ||
38c1e73f | 228 | static inline void irq_domain_set_pm_device(struct irq_domain *d, struct device *dev) |
1f8863bf MZ |
229 | { |
230 | if (d) | |
6a9fc419 | 231 | d->pm_dev = dev; |
1f8863bf MZ |
232 | } |
233 | ||
7bb69bad | 234 | #ifdef CONFIG_IRQ_DOMAIN |
d59f6617 | 235 | struct fwnode_handle *__irq_domain_alloc_fwnode(unsigned int type, int id, |
b977fcf4 | 236 | const char *name, phys_addr_t *pa); |
d59f6617 TG |
237 | |
238 | enum { | |
239 | IRQCHIP_FWNODE_REAL, | |
240 | IRQCHIP_FWNODE_NAMED, | |
241 | IRQCHIP_FWNODE_NAMED_ID, | |
242 | }; | |
243 | ||
38c1e73f | 244 | static inline struct fwnode_handle *irq_domain_alloc_named_fwnode(const char *name) |
d59f6617 TG |
245 | { |
246 | return __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_NAMED, 0, name, NULL); | |
247 | } | |
248 | ||
38c1e73f | 249 | static inline struct fwnode_handle *irq_domain_alloc_named_id_fwnode(const char *name, int id) |
d59f6617 TG |
250 | { |
251 | return __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_NAMED_ID, id, name, | |
252 | NULL); | |
253 | } | |
254 | ||
b977fcf4 | 255 | static inline struct fwnode_handle *irq_domain_alloc_fwnode(phys_addr_t *pa) |
d59f6617 | 256 | { |
b977fcf4 | 257 | return __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_REAL, 0, NULL, pa); |
d59f6617 TG |
258 | } |
259 | ||
b145dcc4 | 260 | void irq_domain_free_fwnode(struct fwnode_handle *fwnode); |
e6f67ce3 | 261 | |
0dac2b09 TG |
262 | DEFINE_FREE(irq_domain_free_fwnode, struct fwnode_handle *, if (_T) irq_domain_free_fwnode(_T)) |
263 | ||
e6f67ce3 HC |
264 | struct irq_domain_chip_generic_info; |
265 | ||
299d623f HC |
266 | /** |
267 | * struct irq_domain_info - Domain information structure | |
268 | * @fwnode: firmware node for the interrupt controller | |
75739854 | 269 | * @domain_flags: Additional flags to add to the domain flags |
299d623f HC |
270 | * @size: Size of linear map; 0 for radix mapping only |
271 | * @hwirq_max: Maximum number of interrupts supported by controller | |
272 | * @direct_max: Maximum value of direct maps; | |
273 | * Use ~0 for no limit; 0 for no direct mapping | |
70114e7f MV |
274 | * @hwirq_base: The first hardware interrupt number (legacy domains only) |
275 | * @virq_base: The first Linux interrupt number for legacy domains to | |
276 | * immediately associate the interrupts after domain creation | |
0b21add7 | 277 | * @bus_token: Domain bus token |
1e7c0529 MV |
278 | * @name_suffix: Optional name suffix to avoid collisions when multiple |
279 | * domains are added using same fwnode | |
299d623f HC |
280 | * @ops: Domain operation callbacks |
281 | * @host_data: Controller private data pointer | |
e6f67ce3 HC |
282 | * @dgc_info: Geneneric chip information structure pointer used to |
283 | * create generic chips for the domain if not NULL. | |
44b68de9 HC |
284 | * @init: Function called when the domain is created. |
285 | * Allow to do some additional domain initialisation. | |
286 | * @exit: Function called when the domain is destroyed. | |
287 | * Allow to do some additional cleanup operation. | |
299d623f HC |
288 | */ |
289 | struct irq_domain_info { | |
290 | struct fwnode_handle *fwnode; | |
75739854 | 291 | unsigned int domain_flags; |
299d623f HC |
292 | unsigned int size; |
293 | irq_hw_number_t hwirq_max; | |
294 | int direct_max; | |
70114e7f MV |
295 | unsigned int hwirq_base; |
296 | unsigned int virq_base; | |
0b21add7 | 297 | enum irq_domain_bus_token bus_token; |
1e7c0529 | 298 | const char *name_suffix; |
299d623f HC |
299 | const struct irq_domain_ops *ops; |
300 | void *host_data; | |
419e3778 HC |
301 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
302 | /** | |
303 | * @parent: Pointer to the parent irq domain used in a hierarchy domain | |
304 | */ | |
305 | struct irq_domain *parent; | |
306 | #endif | |
e6f67ce3 | 307 | struct irq_domain_chip_generic_info *dgc_info; |
44b68de9 HC |
308 | int (*init)(struct irq_domain *d); |
309 | void (*exit)(struct irq_domain *d); | |
299d623f HC |
310 | }; |
311 | ||
312 | struct irq_domain *irq_domain_instantiate(const struct irq_domain_info *info); | |
0c5b29a6 HC |
313 | struct irq_domain *devm_irq_domain_instantiate(struct device *dev, |
314 | const struct irq_domain_info *info); | |
299d623f | 315 | |
38c1e73f | 316 | struct irq_domain *irq_domain_create_simple(struct fwnode_handle *fwnode, unsigned int size, |
67196fea | 317 | unsigned int first_irq, |
38c1e73f TG |
318 | const struct irq_domain_ops *ops, void *host_data); |
319 | struct irq_domain *irq_domain_create_legacy(struct fwnode_handle *fwnode, unsigned int size, | |
320 | unsigned int first_irq, irq_hw_number_t first_hwirq, | |
321 | const struct irq_domain_ops *ops, void *host_data); | |
aa4a1d5b JSS |
322 | struct irq_domain *irq_find_matching_fwspec(struct irq_fwspec *fwspec, |
323 | enum irq_domain_bus_token bus_token); | |
825dfab2 | 324 | void irq_set_default_domain(struct irq_domain *domain); |
0a27ea38 | 325 | struct irq_domain *irq_get_default_domain(void); |
38c1e73f | 326 | int irq_domain_alloc_descs(int virq, unsigned int nr_irqs, irq_hw_number_t hwirq, int node, |
aa4a1d5b | 327 | const struct irq_affinity_desc *affinity); |
fa40f377 | 328 | |
db3e50f3 SA |
329 | extern const struct fwnode_operations irqchip_fwnode_ops; |
330 | ||
922ac2cf | 331 | static inline bool is_fwnode_irqchip(const struct fwnode_handle *fwnode) |
75aba7b0 | 332 | { |
db3e50f3 | 333 | return fwnode && fwnode->ops == &irqchip_fwnode_ops; |
75aba7b0 SS |
334 | } |
335 | ||
38c1e73f | 336 | void irq_domain_update_bus_token(struct irq_domain *domain, enum irq_domain_bus_token bus_token); |
61d0a000 | 337 | |
38c1e73f TG |
338 | static inline struct irq_domain *irq_find_matching_fwnode(struct fwnode_handle *fwnode, |
339 | enum irq_domain_bus_token bus_token) | |
651e8b54 MZ |
340 | { |
341 | struct irq_fwspec fwspec = { | |
342 | .fwnode = fwnode, | |
343 | }; | |
344 | ||
345 | return irq_find_matching_fwspec(&fwspec, bus_token); | |
346 | } | |
347 | ||
130b8c6c MZ |
348 | static inline struct irq_domain *irq_find_matching_host(struct device_node *node, |
349 | enum irq_domain_bus_token bus_token) | |
350 | { | |
e847a847 | 351 | return irq_find_matching_fwnode(of_fwnode_handle(node), bus_token); |
130b8c6c MZ |
352 | } |
353 | ||
ad3aedfb MZ |
354 | static inline struct irq_domain *irq_find_host(struct device_node *node) |
355 | { | |
64619343 MZ |
356 | struct irq_domain *d; |
357 | ||
358 | d = irq_find_matching_host(node, DOMAIN_BUS_WIRED); | |
359 | if (!d) | |
360 | d = irq_find_matching_host(node, DOMAIN_BUS_ANY); | |
361 | ||
362 | return d; | |
ad3aedfb MZ |
363 | } |
364 | ||
e37af801 | 365 | #ifdef CONFIG_IRQ_DOMAIN_NOMAP |
813da4f3 | 366 | static inline struct irq_domain *irq_domain_create_nomap(struct fwnode_handle *fwnode, |
38c1e73f TG |
367 | unsigned int max_irq, |
368 | const struct irq_domain_ops *ops, | |
369 | void *host_data) | |
fa40f377 | 370 | { |
66cbf17f | 371 | const struct irq_domain_info info = { |
813da4f3 | 372 | .fwnode = fwnode, |
7c53626c HC |
373 | .hwirq_max = max_irq, |
374 | .direct_max = max_irq, | |
375 | .ops = ops, | |
376 | .host_data = host_data, | |
377 | }; | |
18e743e9 | 378 | struct irq_domain *d = irq_domain_instantiate(&info); |
7c53626c | 379 | |
7c53626c | 380 | return IS_ERR(d) ? NULL : d; |
fa40f377 | 381 | } |
e37af801 | 382 | |
d2705d33 | 383 | unsigned int irq_create_direct_mapping(struct irq_domain *domain); |
e37af801 MZ |
384 | #endif |
385 | ||
2272a78b JSS |
386 | /** |
387 | * irq_domain_create_linear - Allocate and register a linear revmap irq_domain. | |
38c1e73f TG |
388 | * @fwnode: pointer to interrupt controller's FW node. |
389 | * @size: Number of interrupts in the domain. | |
390 | * @ops: map/unmap domain callbacks | |
391 | * @host_data: Controller private data pointer | |
2272a78b JSS |
392 | * |
393 | * Returns: Newly created irq_domain | |
394 | */ | |
1bf4ddc4 | 395 | static inline struct irq_domain *irq_domain_create_linear(struct fwnode_handle *fwnode, |
38c1e73f TG |
396 | unsigned int size, |
397 | const struct irq_domain_ops *ops, | |
398 | void *host_data) | |
1bf4ddc4 | 399 | { |
66cbf17f | 400 | const struct irq_domain_info info = { |
7c53626c HC |
401 | .fwnode = fwnode, |
402 | .size = size, | |
403 | .hwirq_max = size, | |
404 | .ops = ops, | |
405 | .host_data = host_data, | |
406 | }; | |
18e743e9 | 407 | struct irq_domain *d = irq_domain_instantiate(&info); |
7c53626c | 408 | |
7c53626c | 409 | return IS_ERR(d) ? NULL : d; |
1bf4ddc4 MZ |
410 | } |
411 | ||
412 | static inline struct irq_domain *irq_domain_create_tree(struct fwnode_handle *fwnode, | |
38c1e73f TG |
413 | const struct irq_domain_ops *ops, |
414 | void *host_data) | |
1bf4ddc4 | 415 | { |
66cbf17f | 416 | const struct irq_domain_info info = { |
7c53626c HC |
417 | .fwnode = fwnode, |
418 | .hwirq_max = ~0, | |
419 | .ops = ops, | |
420 | .host_data = host_data, | |
421 | }; | |
18e743e9 | 422 | struct irq_domain *d = irq_domain_instantiate(&info); |
7c53626c | 423 | |
7c53626c | 424 | return IS_ERR(d) ? NULL : d; |
cef5075c | 425 | } |
58ee99ad | 426 | |
d2705d33 | 427 | void irq_domain_remove(struct irq_domain *domain); |
58ee99ad | 428 | |
38c1e73f TG |
429 | int irq_domain_associate(struct irq_domain *domain, unsigned int irq, irq_hw_number_t hwirq); |
430 | void irq_domain_associate_many(struct irq_domain *domain, unsigned int irq_base, | |
aa4a1d5b | 431 | irq_hw_number_t hwirq_base, int count); |
98aa468e | 432 | |
38c1e73f | 433 | unsigned int irq_create_mapping_affinity(struct irq_domain *domain, irq_hw_number_t hwirq, |
aa4a1d5b JSS |
434 | const struct irq_affinity_desc *affinity); |
435 | unsigned int irq_create_fwspec_mapping(struct irq_fwspec *fwspec); | |
436 | void irq_dispose_mapping(unsigned int virq); | |
d3dcb436 | 437 | |
2272a78b JSS |
438 | /** |
439 | * irq_create_mapping - Map a hardware interrupt into linux irq space | |
38c1e73f TG |
440 | * @domain: domain owning this hardware interrupt or NULL for default domain |
441 | * @hwirq: hardware irq number in that domain space | |
2272a78b JSS |
442 | * |
443 | * Only one mapping per hardware interrupt is permitted. | |
444 | * | |
445 | * If the sense/trigger is to be specified, set_irq_type() should be called | |
446 | * on the number returned from that call. | |
447 | * | |
448 | * Returns: Linux irq number or 0 on error | |
449 | */ | |
38c1e73f | 450 | static inline unsigned int irq_create_mapping(struct irq_domain *domain, irq_hw_number_t hwirq) |
bb4c6910 | 451 | { |
d2705d33 | 452 | return irq_create_mapping_affinity(domain, hwirq, NULL); |
bb4c6910 LV |
453 | } |
454 | ||
aa4a1d5b JSS |
455 | struct irq_desc *__irq_resolve_mapping(struct irq_domain *domain, |
456 | irq_hw_number_t hwirq, | |
457 | unsigned int *irq); | |
d22558dd | 458 | |
2272a78b JSS |
459 | /** |
460 | * irq_resolve_mapping - Find a linux irq from a hw irq number. | |
38c1e73f TG |
461 | * @domain: domain owning this hardware interrupt |
462 | * @hwirq: hardware irq number in that domain space | |
2272a78b JSS |
463 | * |
464 | * Returns: Interrupt descriptor | |
465 | */ | |
d22558dd MZ |
466 | static inline struct irq_desc *irq_resolve_mapping(struct irq_domain *domain, |
467 | irq_hw_number_t hwirq) | |
468 | { | |
469 | return __irq_resolve_mapping(domain, hwirq, NULL); | |
470 | } | |
471 | ||
d3dcb436 | 472 | /** |
1da02736 | 473 | * irq_find_mapping() - Find a linux irq from a hw irq number. |
38c1e73f TG |
474 | * @domain: domain owning this hardware interrupt |
475 | * @hwirq: hardware irq number in that domain space | |
2272a78b JSS |
476 | * |
477 | * Returns: Linux irq number or 0 if not found | |
d3dcb436 | 478 | */ |
d22558dd MZ |
479 | static inline unsigned int irq_find_mapping(struct irq_domain *domain, |
480 | irq_hw_number_t hwirq) | |
481 | { | |
482 | unsigned int irq; | |
483 | ||
484 | if (__irq_resolve_mapping(domain, hwirq, &irq)) | |
485 | return irq; | |
486 | ||
487 | return 0; | |
488 | } | |
1da02736 | 489 | |
a18dc81b | 490 | extern const struct irq_domain_ops irq_domain_simple_ops; |
16b2e6e2 GL |
491 | |
492 | /* stock xlate functions */ | |
493 | int irq_domain_xlate_onecell(struct irq_domain *d, struct device_node *ctrlr, | |
38c1e73f TG |
494 | const u32 *intspec, unsigned int intsize, |
495 | irq_hw_number_t *out_hwirq, unsigned int *out_type); | |
16b2e6e2 | 496 | int irq_domain_xlate_twocell(struct irq_domain *d, struct device_node *ctrlr, |
38c1e73f TG |
497 | const u32 *intspec, unsigned int intsize, |
498 | irq_hw_number_t *out_hwirq, unsigned int *out_type); | |
16b2e6e2 | 499 | int irq_domain_xlate_onetwocell(struct irq_domain *d, struct device_node *ctrlr, |
38c1e73f TG |
500 | const u32 *intspec, unsigned int intsize, |
501 | irq_hw_number_t *out_hwirq, unsigned int *out_type); | |
0a02e1f4 YL |
502 | int irq_domain_xlate_twothreecell(struct irq_domain *d, struct device_node *ctrlr, |
503 | const u32 *intspec, unsigned int intsize, | |
504 | irq_hw_number_t *out_hwirq, unsigned int *out_type); | |
505 | ||
506 | int irq_domain_translate_onecell(struct irq_domain *d, struct irq_fwspec *fwspec, | |
507 | unsigned long *out_hwirq, unsigned int *out_type); | |
508 | int irq_domain_translate_twocell(struct irq_domain *d, struct irq_fwspec *fwspec, | |
509 | unsigned long *out_hwirq, unsigned int *out_type); | |
510 | int irq_domain_translate_twothreecell(struct irq_domain *d, struct irq_fwspec *fwspec, | |
511 | unsigned long *out_hwirq, unsigned int *out_type); | |
b01eccea | 512 | |
d17bf24e | 513 | /* IPI functions */ |
7cec18a3 MR |
514 | int irq_reserve_ipi(struct irq_domain *domain, const struct cpumask *dest); |
515 | int irq_destroy_ipi(unsigned int irq, const struct cpumask *dest); | |
d17bf24e | 516 | |
f8264e34 | 517 | /* V2 interfaces to support hierarchy IRQ domains. */ |
38c1e73f TG |
518 | struct irq_data *irq_domain_get_irq_data(struct irq_domain *domain, unsigned int virq); |
519 | void irq_domain_set_info(struct irq_domain *domain, unsigned int virq, irq_hw_number_t hwirq, | |
520 | const struct irq_chip *chip, void *chip_data, irq_flow_handler_t handler, | |
aa4a1d5b JSS |
521 | void *handler_data, const char *handler_name); |
522 | void irq_domain_reset_irq_data(struct irq_data *irq_data); | |
f8264e34 | 523 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
c7131b12 JSS |
524 | /** |
525 | * irq_domain_create_hierarchy - Add a irqdomain into the hierarchy | |
526 | * @parent: Parent irq domain to associate with the new domain | |
527 | * @flags: Irq domain flags associated to the domain | |
528 | * @size: Size of the domain. See below | |
529 | * @fwnode: Optional fwnode of the interrupt controller | |
530 | * @ops: Pointer to the interrupt domain callbacks | |
531 | * @host_data: Controller private data pointer | |
532 | * | |
533 | * If @size is 0 a tree domain is created, otherwise a linear domain. | |
534 | * | |
535 | * If successful the parent is associated to the new domain and the | |
536 | * domain flags are set. | |
2272a78b JSS |
537 | * |
538 | * Returns: A pointer to IRQ domain, or %NULL on failure. | |
c7131b12 JSS |
539 | */ |
540 | static inline struct irq_domain *irq_domain_create_hierarchy(struct irq_domain *parent, | |
38c1e73f TG |
541 | unsigned int flags, unsigned int size, |
542 | struct fwnode_handle *fwnode, | |
543 | const struct irq_domain_ops *ops, | |
544 | void *host_data) | |
c7131b12 | 545 | { |
66cbf17f | 546 | const struct irq_domain_info info = { |
c7131b12 JSS |
547 | .fwnode = fwnode, |
548 | .size = size, | |
18e743e9 | 549 | .hwirq_max = size ? : ~0U, |
c7131b12 JSS |
550 | .ops = ops, |
551 | .host_data = host_data, | |
552 | .domain_flags = flags, | |
553 | .parent = parent, | |
554 | }; | |
18e743e9 | 555 | struct irq_domain *d = irq_domain_instantiate(&info); |
c7131b12 | 556 | |
c7131b12 JSS |
557 | return IS_ERR(d) ? NULL : d; |
558 | } | |
2a5e9a07 | 559 | |
38c1e73f TG |
560 | int __irq_domain_alloc_irqs(struct irq_domain *domain, int irq_base, unsigned int nr_irqs, |
561 | int node, void *arg, bool realloc, | |
aa4a1d5b JSS |
562 | const struct irq_affinity_desc *affinity); |
563 | void irq_domain_free_irqs(unsigned int virq, unsigned int nr_irqs); | |
564 | int irq_domain_activate_irq(struct irq_data *irq_data, bool early); | |
565 | void irq_domain_deactivate_irq(struct irq_data *irq_data); | |
f8264e34 | 566 | |
2272a78b JSS |
567 | /** |
568 | * irq_domain_alloc_irqs - Allocate IRQs from domain | |
569 | * @domain: domain to allocate from | |
570 | * @nr_irqs: number of IRQs to allocate | |
571 | * @node: NUMA node id for memory allocation | |
572 | * @arg: domain specific argument | |
573 | * | |
574 | * See __irq_domain_alloc_irqs()' documentation. | |
575 | */ | |
38c1e73f TG |
576 | static inline int irq_domain_alloc_irqs(struct irq_domain *domain, unsigned int nr_irqs, |
577 | int node, void *arg) | |
f8264e34 | 578 | { |
38c1e73f | 579 | return __irq_domain_alloc_irqs(domain, -1, nr_irqs, node, arg, false, NULL); |
f8264e34 JL |
580 | } |
581 | ||
38c1e73f TG |
582 | int irq_domain_set_hwirq_and_chip(struct irq_domain *domain, unsigned int virq, |
583 | irq_hw_number_t hwirq, const struct irq_chip *chip, | |
aa4a1d5b | 584 | void *chip_data); |
38c1e73f | 585 | void irq_domain_free_irqs_common(struct irq_domain *domain, unsigned int virq, |
aa4a1d5b | 586 | unsigned int nr_irqs); |
38c1e73f | 587 | void irq_domain_free_irqs_top(struct irq_domain *domain, unsigned int virq, unsigned int nr_irqs); |
aa4a1d5b JSS |
588 | |
589 | int irq_domain_push_irq(struct irq_domain *domain, int virq, void *arg); | |
590 | int irq_domain_pop_irq(struct irq_domain *domain, int virq); | |
591 | ||
38c1e73f | 592 | int irq_domain_alloc_irqs_parent(struct irq_domain *domain, unsigned int irq_base, |
aa4a1d5b JSS |
593 | unsigned int nr_irqs, void *arg); |
594 | ||
38c1e73f | 595 | void irq_domain_free_irqs_parent(struct irq_domain *domain, unsigned int irq_base, |
aa4a1d5b JSS |
596 | unsigned int nr_irqs); |
597 | ||
38c1e73f | 598 | int irq_domain_disconnect_hierarchy(struct irq_domain *domain, unsigned int virq); |
55567976 | 599 | |
f8264e34 JL |
600 | static inline bool irq_domain_is_hierarchy(struct irq_domain *domain) |
601 | { | |
602 | return domain->flags & IRQ_DOMAIN_FLAG_HIERARCHY; | |
603 | } | |
0abefbaa QY |
604 | |
605 | static inline bool irq_domain_is_ipi(struct irq_domain *domain) | |
606 | { | |
38c1e73f | 607 | return domain->flags & (IRQ_DOMAIN_FLAG_IPI_PER_CPU | IRQ_DOMAIN_FLAG_IPI_SINGLE); |
0abefbaa QY |
608 | } |
609 | ||
610 | static inline bool irq_domain_is_ipi_per_cpu(struct irq_domain *domain) | |
611 | { | |
612 | return domain->flags & IRQ_DOMAIN_FLAG_IPI_PER_CPU; | |
613 | } | |
614 | ||
615 | static inline bool irq_domain_is_ipi_single(struct irq_domain *domain) | |
616 | { | |
617 | return domain->flags & IRQ_DOMAIN_FLAG_IPI_SINGLE; | |
618 | } | |
631a9639 EA |
619 | |
620 | static inline bool irq_domain_is_msi(struct irq_domain *domain) | |
621 | { | |
622 | return domain->flags & IRQ_DOMAIN_FLAG_MSI; | |
623 | } | |
624 | ||
b749e6d3 TG |
625 | static inline bool irq_domain_is_msi_parent(struct irq_domain *domain) |
626 | { | |
627 | return domain->flags & IRQ_DOMAIN_FLAG_MSI_PARENT; | |
628 | } | |
629 | ||
e71c5d0b TG |
630 | static inline bool irq_domain_is_msi_device(struct irq_domain *domain) |
631 | { | |
632 | return domain->flags & IRQ_DOMAIN_FLAG_MSI_DEVICE; | |
633 | } | |
634 | ||
b8c7bfb7 FL |
635 | static inline bool irq_domain_is_msi_immutable(struct irq_domain *domain) |
636 | { | |
637 | return domain->flags & IRQ_DOMAIN_FLAG_MSI_IMMUTABLE; | |
638 | } | |
f8264e34 | 639 | #else /* CONFIG_IRQ_DOMAIN_HIERARCHY */ |
38c1e73f TG |
640 | static inline int irq_domain_alloc_irqs(struct irq_domain *domain, unsigned int nr_irqs, |
641 | int node, void *arg) | |
f8264e34 JL |
642 | { |
643 | return -1; | |
644 | } | |
645 | ||
38c1e73f | 646 | static inline void irq_domain_free_irqs(unsigned int virq, unsigned int nr_irqs) { } |
1e2a7d78 | 647 | |
f8264e34 JL |
648 | static inline bool irq_domain_is_hierarchy(struct irq_domain *domain) |
649 | { | |
650 | return false; | |
651 | } | |
0abefbaa QY |
652 | |
653 | static inline bool irq_domain_is_ipi(struct irq_domain *domain) | |
654 | { | |
655 | return false; | |
656 | } | |
657 | ||
658 | static inline bool irq_domain_is_ipi_per_cpu(struct irq_domain *domain) | |
659 | { | |
660 | return false; | |
661 | } | |
662 | ||
663 | static inline bool irq_domain_is_ipi_single(struct irq_domain *domain) | |
664 | { | |
665 | return false; | |
666 | } | |
631a9639 EA |
667 | |
668 | static inline bool irq_domain_is_msi(struct irq_domain *domain) | |
669 | { | |
670 | return false; | |
671 | } | |
672 | ||
b749e6d3 TG |
673 | static inline bool irq_domain_is_msi_parent(struct irq_domain *domain) |
674 | { | |
675 | return false; | |
676 | } | |
677 | ||
e71c5d0b TG |
678 | static inline bool irq_domain_is_msi_device(struct irq_domain *domain) |
679 | { | |
680 | return false; | |
681 | } | |
682 | ||
f8264e34 JL |
683 | #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ |
684 | ||
0ee1578b | 685 | #ifdef CONFIG_GENERIC_MSI_IRQ |
38c1e73f | 686 | int msi_device_domain_alloc_wired(struct irq_domain *domain, unsigned int hwirq, unsigned int type); |
0ee1578b TG |
687 | void msi_device_domain_free_wired(struct irq_domain *domain, unsigned int virq); |
688 | #else | |
689 | static inline int msi_device_domain_alloc_wired(struct irq_domain *domain, unsigned int hwirq, | |
690 | unsigned int type) | |
691 | { | |
692 | WARN_ON_ONCE(1); | |
693 | return -EINVAL; | |
694 | } | |
695 | static inline void msi_device_domain_free_wired(struct irq_domain *domain, unsigned int virq) | |
696 | { | |
697 | WARN_ON_ONCE(1); | |
698 | } | |
699 | #endif | |
700 | ||
e847a847 JSS |
701 | /* Deprecated functions. Will be removed in the merge window */ |
702 | static inline struct fwnode_handle *of_node_to_fwnode(struct device_node *node) | |
703 | { | |
704 | return node ? &node->fwnode : NULL; | |
705 | } | |
706 | ||
42b8b16f | 707 | static inline struct irq_domain *irq_domain_add_tree(struct device_node *of_node, |
38c1e73f TG |
708 | const struct irq_domain_ops *ops, |
709 | void *host_data) | |
42b8b16f JSS |
710 | { |
711 | struct irq_domain_info info = { | |
712 | .fwnode = of_fwnode_handle(of_node), | |
713 | .hwirq_max = ~0U, | |
714 | .ops = ops, | |
715 | .host_data = host_data, | |
716 | }; | |
717 | struct irq_domain *d; | |
718 | ||
719 | d = irq_domain_instantiate(&info); | |
720 | return IS_ERR(d) ? NULL : d; | |
721 | } | |
722 | ||
723 | static inline struct irq_domain *irq_domain_add_linear(struct device_node *of_node, | |
38c1e73f TG |
724 | unsigned int size, |
725 | const struct irq_domain_ops *ops, | |
726 | void *host_data) | |
42b8b16f JSS |
727 | { |
728 | struct irq_domain_info info = { | |
729 | .fwnode = of_fwnode_handle(of_node), | |
730 | .size = size, | |
731 | .hwirq_max = size, | |
732 | .ops = ops, | |
733 | .host_data = host_data, | |
734 | }; | |
735 | struct irq_domain *d; | |
736 | ||
737 | d = irq_domain_instantiate(&info); | |
738 | return IS_ERR(d) ? NULL : d; | |
739 | } | |
740 | ||
d593f25f GL |
741 | #else /* CONFIG_IRQ_DOMAIN */ |
742 | static inline void irq_dispose_mapping(unsigned int virq) { } | |
38c1e73f TG |
743 | static inline struct irq_domain *irq_find_matching_fwnode(struct fwnode_handle *fwnode, |
744 | enum irq_domain_bus_token bus_token) | |
471036b2 SS |
745 | { |
746 | return NULL; | |
747 | } | |
d593f25f | 748 | #endif /* !CONFIG_IRQ_DOMAIN */ |
7e713301 | 749 | |
08a543ad | 750 | #endif /* _LINUX_IRQDOMAIN_H */ |