Commit | Line | Data |
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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
08a543ad GL |
2 | /* |
3 | * irq_domain - IRQ translation domains | |
4 | * | |
5 | * Translation infrastructure between hw and linux irq numbers. This is | |
6 | * helpful for interrupt controllers to implement mapping between hardware | |
7 | * irq numbers and the Linux irq number space. | |
8 | * | |
e7a46c81 MZ |
9 | * irq_domains also have hooks for translating device tree or other |
10 | * firmware interrupt representations into a hardware irq number that | |
11 | * can be mapped back to a Linux irq number without any extra platform | |
12 | * support code. | |
08a543ad | 13 | * |
7bb69bad GL |
14 | * Interrupt controller "domain" data structure. This could be defined as a |
15 | * irq domain controller. That is, it handles the mapping between hardware | |
16 | * and virtual interrupt numbers for a given interrupt domain. The domain | |
17 | * structure is generally created by the PIC code for a given PIC instance | |
18 | * (though a domain can cover more than one PIC if they have a flat number | |
19 | * model). It's the domain callbacks that are responsible for setting the | |
20 | * irq_chip on a given irq_desc after it's been mapped. | |
cc79ca69 | 21 | * |
e7a46c81 MZ |
22 | * The host code and data structures use a fwnode_handle pointer to |
23 | * identify the domain. In some cases, and in order to preserve source | |
24 | * code compatibility, this fwnode pointer is "upgraded" to a DT | |
25 | * device_node. For those firmware infrastructures that do not provide | |
26 | * a unique identifier for an interrupt controller, the irq_domain | |
27 | * code offers a fwnode allocator. | |
08a543ad | 28 | */ |
7bb69bad | 29 | |
08a543ad GL |
30 | #ifndef _LINUX_IRQDOMAIN_H |
31 | #define _LINUX_IRQDOMAIN_H | |
32 | ||
7bb69bad | 33 | #include <linux/types.h> |
1b537708 | 34 | #include <linux/irqhandler.h> |
f110711a | 35 | #include <linux/of.h> |
f1d78358 | 36 | #include <linux/mutex.h> |
7bb69bad | 37 | #include <linux/radix-tree.h> |
08a543ad | 38 | |
08a543ad | 39 | struct device_node; |
08219fb1 | 40 | struct fwnode_handle; |
08a543ad | 41 | struct irq_domain; |
f8264e34 JL |
42 | struct irq_chip; |
43 | struct irq_data; | |
06ee6d57 | 44 | struct cpumask; |
c3e7239a | 45 | struct seq_file; |
bec04037 | 46 | struct irq_affinity_desc; |
7bb69bad | 47 | |
11e4438e MZ |
48 | #define IRQ_DOMAIN_IRQ_SPEC_PARAMS 16 |
49 | ||
50 | /** | |
51 | * struct irq_fwspec - generic IRQ specifier structure | |
52 | * | |
53 | * @fwnode: Pointer to a firmware-specific descriptor | |
54 | * @param_count: Number of device-specific parameters | |
55 | * @param: Device-specific parameters | |
56 | * | |
57 | * This structure, directly modeled after of_phandle_args, is used to | |
58 | * pass a device-specific description of an interrupt. | |
59 | */ | |
60 | struct irq_fwspec { | |
61 | struct fwnode_handle *fwnode; | |
62 | int param_count; | |
63 | u32 param[IRQ_DOMAIN_IRQ_SPEC_PARAMS]; | |
64 | }; | |
65 | ||
ad3aedfb MZ |
66 | /* |
67 | * Should several domains have the same device node, but serve | |
68 | * different purposes (for example one domain is for PCI/MSI, and the | |
69 | * other for wired IRQs), they can be distinguished using a | |
70 | * bus-specific token. Most domains are expected to only carry | |
71 | * DOMAIN_BUS_ANY. | |
72 | */ | |
73 | enum irq_domain_bus_token { | |
74 | DOMAIN_BUS_ANY = 0, | |
530cbe10 | 75 | DOMAIN_BUS_WIRED, |
61ce8d8d | 76 | DOMAIN_BUS_GENERIC_MSI, |
0380839d | 77 | DOMAIN_BUS_PCI_MSI, |
c706c239 | 78 | DOMAIN_BUS_PLATFORM_MSI, |
a5716070 | 79 | DOMAIN_BUS_NEXUS, |
29d5c8db | 80 | DOMAIN_BUS_IPI, |
9b1b282c | 81 | DOMAIN_BUS_FSL_MC_MSI, |
49b32315 | 82 | DOMAIN_BUS_TI_SCI_INTA_MSI, |
d46bca2b | 83 | DOMAIN_BUS_WAKEUP, |
c6c9e283 | 84 | DOMAIN_BUS_VMD_MSI, |
ad3aedfb MZ |
85 | }; |
86 | ||
08a543ad GL |
87 | /** |
88 | * struct irq_domain_ops - Methods for irq_domain objects | |
7bb69bad GL |
89 | * @match: Match an interrupt controller device node to a host, returns |
90 | * 1 on a match | |
91 | * @map: Create or update a mapping between a virtual irq number and a hw | |
92 | * irq number. This is called only once for a given mapping. | |
93 | * @unmap: Dispose of such a mapping | |
7bb69bad GL |
94 | * @xlate: Given a device tree node and interrupt specifier, decode |
95 | * the hardware irq number and linux irq type value. | |
96 | * | |
97 | * Functions below are provided by the driver and called whenever a new mapping | |
98 | * is created or an old mapping is disposed. The driver can then proceed to | |
99 | * whatever internal data structures management is required. It also needs | |
100 | * to setup the irq_desc when returning from map(). | |
08a543ad GL |
101 | */ |
102 | struct irq_domain_ops { | |
ad3aedfb MZ |
103 | int (*match)(struct irq_domain *d, struct device_node *node, |
104 | enum irq_domain_bus_token bus_token); | |
651e8b54 MZ |
105 | int (*select)(struct irq_domain *d, struct irq_fwspec *fwspec, |
106 | enum irq_domain_bus_token bus_token); | |
7bb69bad GL |
107 | int (*map)(struct irq_domain *d, unsigned int virq, irq_hw_number_t hw); |
108 | void (*unmap)(struct irq_domain *d, unsigned int virq); | |
7bb69bad GL |
109 | int (*xlate)(struct irq_domain *d, struct device_node *node, |
110 | const u32 *intspec, unsigned int intsize, | |
111 | unsigned long *out_hwirq, unsigned int *out_type); | |
f8264e34 JL |
112 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
113 | /* extended V2 interfaces to support hierarchy irq_domains */ | |
114 | int (*alloc)(struct irq_domain *d, unsigned int virq, | |
115 | unsigned int nr_irqs, void *arg); | |
116 | void (*free)(struct irq_domain *d, unsigned int virq, | |
117 | unsigned int nr_irqs); | |
702cb0a0 | 118 | int (*activate)(struct irq_domain *d, struct irq_data *irqd, bool reserve); |
f8264e34 | 119 | void (*deactivate)(struct irq_domain *d, struct irq_data *irq_data); |
11e4438e MZ |
120 | int (*translate)(struct irq_domain *d, struct irq_fwspec *fwspec, |
121 | unsigned long *out_hwirq, unsigned int *out_type); | |
f8264e34 | 122 | #endif |
c3e7239a TG |
123 | #ifdef CONFIG_GENERIC_IRQ_DEBUGFS |
124 | void (*debug_show)(struct seq_file *m, struct irq_domain *d, | |
125 | struct irq_data *irqd, int ind); | |
126 | #endif | |
08a543ad GL |
127 | }; |
128 | ||
088f40b7 TG |
129 | extern struct irq_domain_ops irq_generic_chip_ops; |
130 | ||
131 | struct irq_domain_chip_generic; | |
132 | ||
08a543ad GL |
133 | /** |
134 | * struct irq_domain - Hardware interrupt number translation object | |
7bb69bad | 135 | * @link: Element in global irq_domain list. |
1aa0dd94 | 136 | * @name: Name of interrupt domain |
7bb69bad GL |
137 | * @ops: pointer to irq_domain methods |
138 | * @host_data: private data pointer for use by owner. Not touched by irq_domain | |
139 | * core code. | |
f8264e34 | 140 | * @flags: host per irq_domain flags |
9dc6be3d | 141 | * @mapcount: The number of mapped interrupts |
1aa0dd94 GL |
142 | * |
143 | * Optional elements | |
4b821300 DL |
144 | * @fwnode: Pointer to firmware node associated with the irq_domain. Pretty easy |
145 | * to swap it for the of_node via the irq_domain_get_of_node accessor | |
1aa0dd94 GL |
146 | * @gc: Pointer to a list of generic chips. There is a helper function for |
147 | * setting up one or more generic chips for interrupt controllers | |
148 | * drivers using the generic chip library which uses this pointer. | |
f8264e34 | 149 | * @parent: Pointer to parent irq_domain to support hierarchy irq_domains |
1aa0dd94 GL |
150 | * |
151 | * Revmap data, used internally by irq_domain | |
152 | * @revmap_direct_max_irq: The largest hwirq that can be set for controllers that | |
153 | * support direct mapping | |
1da02736 | 154 | * @revmap_size: Size of the linear map table @revmap[] |
1aa0dd94 | 155 | * @revmap_tree: Radix map tree for hwirqs that don't fit in the linear map |
1da02736 | 156 | * @revmap: Linear table of hwirq->virq reverse mappings |
08a543ad GL |
157 | */ |
158 | struct irq_domain { | |
7bb69bad | 159 | struct list_head link; |
0bb4afb4 | 160 | const char *name; |
a18dc81b | 161 | const struct irq_domain_ops *ops; |
7bb69bad | 162 | void *host_data; |
f8264e34 | 163 | unsigned int flags; |
9dc6be3d | 164 | unsigned int mapcount; |
7bb69bad | 165 | |
1aa0dd94 | 166 | /* Optional data */ |
f110711a | 167 | struct fwnode_handle *fwnode; |
ad3aedfb | 168 | enum irq_domain_bus_token bus_token; |
088f40b7 | 169 | struct irq_domain_chip_generic *gc; |
f8264e34 JL |
170 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
171 | struct irq_domain *parent; | |
172 | #endif | |
cef5075c | 173 | |
1aa0dd94 | 174 | /* reverse map data. The linear map gets appended to the irq_domain */ |
ddaf144c | 175 | irq_hw_number_t hwirq_max; |
1aa0dd94 GL |
176 | unsigned int revmap_direct_max_irq; |
177 | unsigned int revmap_size; | |
178 | struct radix_tree_root revmap_tree; | |
f1d78358 | 179 | struct mutex revmap_tree_mutex; |
1da02736 | 180 | unsigned int revmap[]; |
08a543ad GL |
181 | }; |
182 | ||
f8264e34 JL |
183 | /* Irq domain flags */ |
184 | enum { | |
185 | /* Irq domain is hierarchical */ | |
186 | IRQ_DOMAIN_FLAG_HIERARCHY = (1 << 0), | |
187 | ||
6a6544e5 | 188 | /* Irq domain name was allocated in __irq_domain_add() */ |
2546287c | 189 | IRQ_DOMAIN_NAME_ALLOCATED = (1 << 1), |
36d72731 | 190 | |
0abefbaa QY |
191 | /* Irq domain is an IPI domain with virq per cpu */ |
192 | IRQ_DOMAIN_FLAG_IPI_PER_CPU = (1 << 2), | |
193 | ||
194 | /* Irq domain is an IPI domain with single virq */ | |
195 | IRQ_DOMAIN_FLAG_IPI_SINGLE = (1 << 3), | |
196 | ||
631a9639 EA |
197 | /* Irq domain implements MSIs */ |
198 | IRQ_DOMAIN_FLAG_MSI = (1 << 4), | |
199 | ||
200 | /* Irq domain implements MSI remapping */ | |
201 | IRQ_DOMAIN_FLAG_MSI_REMAP = (1 << 5), | |
202 | ||
6f1a4891 TG |
203 | /* |
204 | * Quirk to handle MSI implementations which do not provide | |
205 | * masking. Currently known to affect x86, but partially | |
206 | * handled in core code. | |
207 | */ | |
208 | IRQ_DOMAIN_MSI_NOMASK_QUIRK = (1 << 6), | |
209 | ||
f8264e34 JL |
210 | /* |
211 | * Flags starting from IRQ_DOMAIN_FLAG_NONCORE are reserved | |
212 | * for implementation specific purposes and ignored by the | |
213 | * core code. | |
214 | */ | |
215 | IRQ_DOMAIN_FLAG_NONCORE = (1 << 16), | |
216 | }; | |
217 | ||
10abc7df MZ |
218 | static inline struct device_node *irq_domain_get_of_node(struct irq_domain *d) |
219 | { | |
f110711a | 220 | return to_of_node(d->fwnode); |
10abc7df MZ |
221 | } |
222 | ||
7bb69bad | 223 | #ifdef CONFIG_IRQ_DOMAIN |
d59f6617 | 224 | struct fwnode_handle *__irq_domain_alloc_fwnode(unsigned int type, int id, |
b977fcf4 | 225 | const char *name, phys_addr_t *pa); |
d59f6617 TG |
226 | |
227 | enum { | |
228 | IRQCHIP_FWNODE_REAL, | |
229 | IRQCHIP_FWNODE_NAMED, | |
230 | IRQCHIP_FWNODE_NAMED_ID, | |
231 | }; | |
232 | ||
233 | static inline | |
234 | struct fwnode_handle *irq_domain_alloc_named_fwnode(const char *name) | |
235 | { | |
236 | return __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_NAMED, 0, name, NULL); | |
237 | } | |
238 | ||
239 | static inline | |
240 | struct fwnode_handle *irq_domain_alloc_named_id_fwnode(const char *name, int id) | |
241 | { | |
242 | return __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_NAMED_ID, id, name, | |
243 | NULL); | |
244 | } | |
245 | ||
b977fcf4 | 246 | static inline struct fwnode_handle *irq_domain_alloc_fwnode(phys_addr_t *pa) |
d59f6617 | 247 | { |
b977fcf4 | 248 | return __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_REAL, 0, NULL, pa); |
d59f6617 TG |
249 | } |
250 | ||
b145dcc4 | 251 | void irq_domain_free_fwnode(struct fwnode_handle *fwnode); |
1bf4ddc4 | 252 | struct irq_domain *__irq_domain_add(struct fwnode_handle *fwnode, int size, |
ddaf144c | 253 | irq_hw_number_t hwirq_max, int direct_max, |
fa40f377 GL |
254 | const struct irq_domain_ops *ops, |
255 | void *host_data); | |
67196fea AS |
256 | struct irq_domain *irq_domain_create_simple(struct fwnode_handle *fwnode, |
257 | unsigned int size, | |
258 | unsigned int first_irq, | |
259 | const struct irq_domain_ops *ops, | |
260 | void *host_data); | |
a8db8cf0 | 261 | struct irq_domain *irq_domain_add_legacy(struct device_node *of_node, |
1bc04f2c GL |
262 | unsigned int size, |
263 | unsigned int first_irq, | |
264 | irq_hw_number_t first_hwirq, | |
a18dc81b | 265 | const struct irq_domain_ops *ops, |
a8db8cf0 | 266 | void *host_data); |
b6e95788 AS |
267 | struct irq_domain *irq_domain_create_legacy(struct fwnode_handle *fwnode, |
268 | unsigned int size, | |
269 | unsigned int first_irq, | |
270 | irq_hw_number_t first_hwirq, | |
271 | const struct irq_domain_ops *ops, | |
272 | void *host_data); | |
651e8b54 | 273 | extern struct irq_domain *irq_find_matching_fwspec(struct irq_fwspec *fwspec, |
130b8c6c | 274 | enum irq_domain_bus_token bus_token); |
c7b41f0a | 275 | extern bool irq_domain_check_msi_remap(void); |
fa40f377 | 276 | extern void irq_set_default_host(struct irq_domain *host); |
9f199dd3 | 277 | extern struct irq_domain *irq_get_default_host(void); |
ac0a0cd2 | 278 | extern int irq_domain_alloc_descs(int virq, unsigned int nr_irqs, |
06ee6d57 | 279 | irq_hw_number_t hwirq, int node, |
bec04037 | 280 | const struct irq_affinity_desc *affinity); |
fa40f377 | 281 | |
1bf4ddc4 MZ |
282 | static inline struct fwnode_handle *of_node_to_fwnode(struct device_node *node) |
283 | { | |
284 | return node ? &node->fwnode : NULL; | |
285 | } | |
286 | ||
db3e50f3 SA |
287 | extern const struct fwnode_operations irqchip_fwnode_ops; |
288 | ||
75aba7b0 SS |
289 | static inline bool is_fwnode_irqchip(struct fwnode_handle *fwnode) |
290 | { | |
db3e50f3 | 291 | return fwnode && fwnode->ops == &irqchip_fwnode_ops; |
75aba7b0 SS |
292 | } |
293 | ||
61d0a000 MZ |
294 | extern void irq_domain_update_bus_token(struct irq_domain *domain, |
295 | enum irq_domain_bus_token bus_token); | |
296 | ||
651e8b54 MZ |
297 | static inline |
298 | struct irq_domain *irq_find_matching_fwnode(struct fwnode_handle *fwnode, | |
299 | enum irq_domain_bus_token bus_token) | |
300 | { | |
301 | struct irq_fwspec fwspec = { | |
302 | .fwnode = fwnode, | |
303 | }; | |
304 | ||
305 | return irq_find_matching_fwspec(&fwspec, bus_token); | |
306 | } | |
307 | ||
130b8c6c MZ |
308 | static inline struct irq_domain *irq_find_matching_host(struct device_node *node, |
309 | enum irq_domain_bus_token bus_token) | |
310 | { | |
1bf4ddc4 | 311 | return irq_find_matching_fwnode(of_node_to_fwnode(node), bus_token); |
130b8c6c MZ |
312 | } |
313 | ||
ad3aedfb MZ |
314 | static inline struct irq_domain *irq_find_host(struct device_node *node) |
315 | { | |
64619343 MZ |
316 | struct irq_domain *d; |
317 | ||
318 | d = irq_find_matching_host(node, DOMAIN_BUS_WIRED); | |
319 | if (!d) | |
320 | d = irq_find_matching_host(node, DOMAIN_BUS_ANY); | |
321 | ||
322 | return d; | |
ad3aedfb MZ |
323 | } |
324 | ||
67196fea AS |
325 | static inline struct irq_domain *irq_domain_add_simple(struct device_node *of_node, |
326 | unsigned int size, | |
327 | unsigned int first_irq, | |
328 | const struct irq_domain_ops *ops, | |
329 | void *host_data) | |
330 | { | |
331 | return irq_domain_create_simple(of_node_to_fwnode(of_node), size, first_irq, ops, host_data); | |
332 | } | |
333 | ||
fa40f377 GL |
334 | /** |
335 | * irq_domain_add_linear() - Allocate and register a linear revmap irq_domain. | |
336 | * @of_node: pointer to interrupt controller's device tree node. | |
337 | * @size: Number of interrupts in the domain. | |
338 | * @ops: map/unmap domain callbacks | |
339 | * @host_data: Controller private data pointer | |
340 | */ | |
341 | static inline struct irq_domain *irq_domain_add_linear(struct device_node *of_node, | |
a8db8cf0 | 342 | unsigned int size, |
a18dc81b | 343 | const struct irq_domain_ops *ops, |
fa40f377 GL |
344 | void *host_data) |
345 | { | |
1bf4ddc4 | 346 | return __irq_domain_add(of_node_to_fwnode(of_node), size, size, 0, ops, host_data); |
fa40f377 GL |
347 | } |
348 | static inline struct irq_domain *irq_domain_add_nomap(struct device_node *of_node, | |
6fa6c8e2 | 349 | unsigned int max_irq, |
a18dc81b | 350 | const struct irq_domain_ops *ops, |
fa40f377 GL |
351 | void *host_data) |
352 | { | |
1bf4ddc4 | 353 | return __irq_domain_add(of_node_to_fwnode(of_node), 0, max_irq, max_irq, ops, host_data); |
fa40f377 | 354 | } |
cef5075c GL |
355 | static inline struct irq_domain *irq_domain_add_tree(struct device_node *of_node, |
356 | const struct irq_domain_ops *ops, | |
357 | void *host_data) | |
358 | { | |
1bf4ddc4 MZ |
359 | return __irq_domain_add(of_node_to_fwnode(of_node), 0, ~0, 0, ops, host_data); |
360 | } | |
361 | ||
362 | static inline struct irq_domain *irq_domain_create_linear(struct fwnode_handle *fwnode, | |
363 | unsigned int size, | |
364 | const struct irq_domain_ops *ops, | |
365 | void *host_data) | |
366 | { | |
367 | return __irq_domain_add(fwnode, size, size, 0, ops, host_data); | |
368 | } | |
369 | ||
370 | static inline struct irq_domain *irq_domain_create_tree(struct fwnode_handle *fwnode, | |
371 | const struct irq_domain_ops *ops, | |
372 | void *host_data) | |
373 | { | |
374 | return __irq_domain_add(fwnode, 0, ~0, 0, ops, host_data); | |
cef5075c | 375 | } |
58ee99ad PM |
376 | |
377 | extern void irq_domain_remove(struct irq_domain *host); | |
378 | ||
ddaf144c GL |
379 | extern int irq_domain_associate(struct irq_domain *domain, unsigned int irq, |
380 | irq_hw_number_t hwirq); | |
381 | extern void irq_domain_associate_many(struct irq_domain *domain, | |
382 | unsigned int irq_base, | |
383 | irq_hw_number_t hwirq_base, int count); | |
98aa468e | 384 | |
bb4c6910 LV |
385 | extern unsigned int irq_create_mapping_affinity(struct irq_domain *host, |
386 | irq_hw_number_t hwirq, | |
387 | const struct irq_affinity_desc *affinity); | |
c0131f09 | 388 | extern unsigned int irq_create_fwspec_mapping(struct irq_fwspec *fwspec); |
cc79ca69 | 389 | extern void irq_dispose_mapping(unsigned int virq); |
d3dcb436 | 390 | |
bb4c6910 LV |
391 | static inline unsigned int irq_create_mapping(struct irq_domain *host, |
392 | irq_hw_number_t hwirq) | |
393 | { | |
394 | return irq_create_mapping_affinity(host, hwirq, NULL); | |
395 | } | |
396 | ||
d3dcb436 | 397 | /** |
1da02736 | 398 | * irq_find_mapping() - Find a linux irq from a hw irq number. |
d3dcb436 GL |
399 | * @domain: domain owning this hardware interrupt |
400 | * @hwirq: hardware irq number in that domain space | |
d3dcb436 | 401 | */ |
1da02736 MZ |
402 | extern unsigned int irq_find_mapping(struct irq_domain *host, |
403 | irq_hw_number_t hwirq); | |
404 | ||
d3dcb436 GL |
405 | static inline unsigned int irq_linear_revmap(struct irq_domain *domain, |
406 | irq_hw_number_t hwirq) | |
407 | { | |
1da02736 | 408 | return irq_find_mapping(domain, hwirq); |
d3dcb436 | 409 | } |
1da02736 | 410 | |
cc79ca69 | 411 | extern unsigned int irq_create_direct_mapping(struct irq_domain *host); |
98aa468e | 412 | |
a18dc81b | 413 | extern const struct irq_domain_ops irq_domain_simple_ops; |
16b2e6e2 GL |
414 | |
415 | /* stock xlate functions */ | |
416 | int irq_domain_xlate_onecell(struct irq_domain *d, struct device_node *ctrlr, | |
417 | const u32 *intspec, unsigned int intsize, | |
418 | irq_hw_number_t *out_hwirq, unsigned int *out_type); | |
419 | int irq_domain_xlate_twocell(struct irq_domain *d, struct device_node *ctrlr, | |
420 | const u32 *intspec, unsigned int intsize, | |
421 | irq_hw_number_t *out_hwirq, unsigned int *out_type); | |
422 | int irq_domain_xlate_onetwocell(struct irq_domain *d, struct device_node *ctrlr, | |
423 | const u32 *intspec, unsigned int intsize, | |
424 | irq_hw_number_t *out_hwirq, unsigned int *out_type); | |
425 | ||
b5c231d8 BM |
426 | int irq_domain_translate_twocell(struct irq_domain *d, |
427 | struct irq_fwspec *fwspec, | |
428 | unsigned long *out_hwirq, | |
429 | unsigned int *out_type); | |
430 | ||
b01eccea YS |
431 | int irq_domain_translate_onecell(struct irq_domain *d, |
432 | struct irq_fwspec *fwspec, | |
433 | unsigned long *out_hwirq, | |
434 | unsigned int *out_type); | |
435 | ||
d17bf24e | 436 | /* IPI functions */ |
7cec18a3 MR |
437 | int irq_reserve_ipi(struct irq_domain *domain, const struct cpumask *dest); |
438 | int irq_destroy_ipi(unsigned int irq, const struct cpumask *dest); | |
d17bf24e | 439 | |
f8264e34 JL |
440 | /* V2 interfaces to support hierarchy IRQ domains. */ |
441 | extern struct irq_data *irq_domain_get_irq_data(struct irq_domain *domain, | |
442 | unsigned int virq); | |
5f22f5c6 SA |
443 | extern void irq_domain_set_info(struct irq_domain *domain, unsigned int virq, |
444 | irq_hw_number_t hwirq, struct irq_chip *chip, | |
445 | void *chip_data, irq_flow_handler_t handler, | |
446 | void *handler_data, const char *handler_name); | |
5c8f77a2 | 447 | extern void irq_domain_reset_irq_data(struct irq_data *irq_data); |
f8264e34 | 448 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
2a5e9a07 | 449 | extern struct irq_domain *irq_domain_create_hierarchy(struct irq_domain *parent, |
afb7da83 | 450 | unsigned int flags, unsigned int size, |
2a5e9a07 | 451 | struct fwnode_handle *fwnode, |
afb7da83 | 452 | const struct irq_domain_ops *ops, void *host_data); |
2a5e9a07 MZ |
453 | |
454 | static inline struct irq_domain *irq_domain_add_hierarchy(struct irq_domain *parent, | |
455 | unsigned int flags, | |
456 | unsigned int size, | |
457 | struct device_node *node, | |
458 | const struct irq_domain_ops *ops, | |
459 | void *host_data) | |
460 | { | |
461 | return irq_domain_create_hierarchy(parent, flags, size, | |
462 | of_node_to_fwnode(node), | |
463 | ops, host_data); | |
464 | } | |
465 | ||
f8264e34 JL |
466 | extern int __irq_domain_alloc_irqs(struct irq_domain *domain, int irq_base, |
467 | unsigned int nr_irqs, int node, void *arg, | |
bec04037 DL |
468 | bool realloc, |
469 | const struct irq_affinity_desc *affinity); | |
f8264e34 | 470 | extern void irq_domain_free_irqs(unsigned int virq, unsigned int nr_irqs); |
42e1cc2d | 471 | extern int irq_domain_activate_irq(struct irq_data *irq_data, bool early); |
f8264e34 JL |
472 | extern void irq_domain_deactivate_irq(struct irq_data *irq_data); |
473 | ||
474 | static inline int irq_domain_alloc_irqs(struct irq_domain *domain, | |
475 | unsigned int nr_irqs, int node, void *arg) | |
476 | { | |
06ee6d57 TG |
477 | return __irq_domain_alloc_irqs(domain, -1, nr_irqs, node, arg, false, |
478 | NULL); | |
f8264e34 JL |
479 | } |
480 | ||
6a6544e5 | 481 | extern int irq_domain_alloc_irqs_hierarchy(struct irq_domain *domain, |
c466595c MZ |
482 | unsigned int irq_base, |
483 | unsigned int nr_irqs, void *arg); | |
f8264e34 JL |
484 | extern int irq_domain_set_hwirq_and_chip(struct irq_domain *domain, |
485 | unsigned int virq, | |
486 | irq_hw_number_t hwirq, | |
487 | struct irq_chip *chip, | |
488 | void *chip_data); | |
f8264e34 JL |
489 | extern void irq_domain_free_irqs_common(struct irq_domain *domain, |
490 | unsigned int virq, | |
491 | unsigned int nr_irqs); | |
492 | extern void irq_domain_free_irqs_top(struct irq_domain *domain, | |
493 | unsigned int virq, unsigned int nr_irqs); | |
494 | ||
495c38d3 DD |
495 | extern int irq_domain_push_irq(struct irq_domain *domain, int virq, void *arg); |
496 | extern int irq_domain_pop_irq(struct irq_domain *domain, int virq); | |
497 | ||
36d72731 JL |
498 | extern int irq_domain_alloc_irqs_parent(struct irq_domain *domain, |
499 | unsigned int irq_base, | |
500 | unsigned int nr_irqs, void *arg); | |
f8264e34 | 501 | |
36d72731 JL |
502 | extern void irq_domain_free_irqs_parent(struct irq_domain *domain, |
503 | unsigned int irq_base, | |
504 | unsigned int nr_irqs); | |
f8264e34 | 505 | |
55567976 MZ |
506 | extern int irq_domain_disconnect_hierarchy(struct irq_domain *domain, |
507 | unsigned int virq); | |
508 | ||
f8264e34 JL |
509 | static inline bool irq_domain_is_hierarchy(struct irq_domain *domain) |
510 | { | |
511 | return domain->flags & IRQ_DOMAIN_FLAG_HIERARCHY; | |
512 | } | |
0abefbaa QY |
513 | |
514 | static inline bool irq_domain_is_ipi(struct irq_domain *domain) | |
515 | { | |
516 | return domain->flags & | |
517 | (IRQ_DOMAIN_FLAG_IPI_PER_CPU | IRQ_DOMAIN_FLAG_IPI_SINGLE); | |
518 | } | |
519 | ||
520 | static inline bool irq_domain_is_ipi_per_cpu(struct irq_domain *domain) | |
521 | { | |
522 | return domain->flags & IRQ_DOMAIN_FLAG_IPI_PER_CPU; | |
523 | } | |
524 | ||
525 | static inline bool irq_domain_is_ipi_single(struct irq_domain *domain) | |
526 | { | |
527 | return domain->flags & IRQ_DOMAIN_FLAG_IPI_SINGLE; | |
528 | } | |
631a9639 EA |
529 | |
530 | static inline bool irq_domain_is_msi(struct irq_domain *domain) | |
531 | { | |
532 | return domain->flags & IRQ_DOMAIN_FLAG_MSI; | |
533 | } | |
534 | ||
535 | static inline bool irq_domain_is_msi_remap(struct irq_domain *domain) | |
536 | { | |
537 | return domain->flags & IRQ_DOMAIN_FLAG_MSI_REMAP; | |
538 | } | |
539 | ||
540 | extern bool irq_domain_hierarchical_is_msi_remap(struct irq_domain *domain); | |
541 | ||
f8264e34 | 542 | #else /* CONFIG_IRQ_DOMAIN_HIERARCHY */ |
f8264e34 JL |
543 | static inline int irq_domain_alloc_irqs(struct irq_domain *domain, |
544 | unsigned int nr_irqs, int node, void *arg) | |
545 | { | |
546 | return -1; | |
547 | } | |
548 | ||
1e2a7d78 JH |
549 | static inline void irq_domain_free_irqs(unsigned int virq, |
550 | unsigned int nr_irqs) { } | |
551 | ||
f8264e34 JL |
552 | static inline bool irq_domain_is_hierarchy(struct irq_domain *domain) |
553 | { | |
554 | return false; | |
555 | } | |
0abefbaa QY |
556 | |
557 | static inline bool irq_domain_is_ipi(struct irq_domain *domain) | |
558 | { | |
559 | return false; | |
560 | } | |
561 | ||
562 | static inline bool irq_domain_is_ipi_per_cpu(struct irq_domain *domain) | |
563 | { | |
564 | return false; | |
565 | } | |
566 | ||
567 | static inline bool irq_domain_is_ipi_single(struct irq_domain *domain) | |
568 | { | |
569 | return false; | |
570 | } | |
631a9639 EA |
571 | |
572 | static inline bool irq_domain_is_msi(struct irq_domain *domain) | |
573 | { | |
574 | return false; | |
575 | } | |
576 | ||
577 | static inline bool irq_domain_is_msi_remap(struct irq_domain *domain) | |
578 | { | |
579 | return false; | |
580 | } | |
581 | ||
582 | static inline bool | |
583 | irq_domain_hierarchical_is_msi_remap(struct irq_domain *domain) | |
584 | { | |
585 | return false; | |
586 | } | |
f8264e34 JL |
587 | #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ |
588 | ||
d593f25f GL |
589 | #else /* CONFIG_IRQ_DOMAIN */ |
590 | static inline void irq_dispose_mapping(unsigned int virq) { } | |
471036b2 SS |
591 | static inline struct irq_domain *irq_find_matching_fwnode( |
592 | struct fwnode_handle *fwnode, enum irq_domain_bus_token bus_token) | |
593 | { | |
594 | return NULL; | |
595 | } | |
b3e22847 MYK |
596 | static inline bool irq_domain_check_msi_remap(void) |
597 | { | |
598 | return false; | |
599 | } | |
d593f25f | 600 | #endif /* !CONFIG_IRQ_DOMAIN */ |
7e713301 | 601 | |
08a543ad | 602 | #endif /* _LINUX_IRQDOMAIN_H */ |