Commit | Line | Data |
---|---|---|
08a543ad GL |
1 | /* |
2 | * irq_domain - IRQ translation domains | |
3 | * | |
4 | * Translation infrastructure between hw and linux irq numbers. This is | |
5 | * helpful for interrupt controllers to implement mapping between hardware | |
6 | * irq numbers and the Linux irq number space. | |
7 | * | |
e7a46c81 MZ |
8 | * irq_domains also have hooks for translating device tree or other |
9 | * firmware interrupt representations into a hardware irq number that | |
10 | * can be mapped back to a Linux irq number without any extra platform | |
11 | * support code. | |
08a543ad | 12 | * |
7bb69bad GL |
13 | * Interrupt controller "domain" data structure. This could be defined as a |
14 | * irq domain controller. That is, it handles the mapping between hardware | |
15 | * and virtual interrupt numbers for a given interrupt domain. The domain | |
16 | * structure is generally created by the PIC code for a given PIC instance | |
17 | * (though a domain can cover more than one PIC if they have a flat number | |
18 | * model). It's the domain callbacks that are responsible for setting the | |
19 | * irq_chip on a given irq_desc after it's been mapped. | |
cc79ca69 | 20 | * |
e7a46c81 MZ |
21 | * The host code and data structures use a fwnode_handle pointer to |
22 | * identify the domain. In some cases, and in order to preserve source | |
23 | * code compatibility, this fwnode pointer is "upgraded" to a DT | |
24 | * device_node. For those firmware infrastructures that do not provide | |
25 | * a unique identifier for an interrupt controller, the irq_domain | |
26 | * code offers a fwnode allocator. | |
08a543ad | 27 | */ |
7bb69bad | 28 | |
08a543ad GL |
29 | #ifndef _LINUX_IRQDOMAIN_H |
30 | #define _LINUX_IRQDOMAIN_H | |
31 | ||
7bb69bad | 32 | #include <linux/types.h> |
1b537708 | 33 | #include <linux/irqhandler.h> |
f110711a | 34 | #include <linux/of.h> |
7bb69bad | 35 | #include <linux/radix-tree.h> |
08a543ad | 36 | |
08a543ad GL |
37 | struct device_node; |
38 | struct irq_domain; | |
7bb69bad | 39 | struct of_device_id; |
f8264e34 JL |
40 | struct irq_chip; |
41 | struct irq_data; | |
06ee6d57 | 42 | struct cpumask; |
7bb69bad | 43 | |
1bc04f2c GL |
44 | /* Number of irqs reserved for a legacy isa controller */ |
45 | #define NUM_ISA_INTERRUPTS 16 | |
46 | ||
11e4438e MZ |
47 | #define IRQ_DOMAIN_IRQ_SPEC_PARAMS 16 |
48 | ||
49 | /** | |
50 | * struct irq_fwspec - generic IRQ specifier structure | |
51 | * | |
52 | * @fwnode: Pointer to a firmware-specific descriptor | |
53 | * @param_count: Number of device-specific parameters | |
54 | * @param: Device-specific parameters | |
55 | * | |
56 | * This structure, directly modeled after of_phandle_args, is used to | |
57 | * pass a device-specific description of an interrupt. | |
58 | */ | |
59 | struct irq_fwspec { | |
60 | struct fwnode_handle *fwnode; | |
61 | int param_count; | |
62 | u32 param[IRQ_DOMAIN_IRQ_SPEC_PARAMS]; | |
63 | }; | |
64 | ||
ad3aedfb MZ |
65 | /* |
66 | * Should several domains have the same device node, but serve | |
67 | * different purposes (for example one domain is for PCI/MSI, and the | |
68 | * other for wired IRQs), they can be distinguished using a | |
69 | * bus-specific token. Most domains are expected to only carry | |
70 | * DOMAIN_BUS_ANY. | |
71 | */ | |
72 | enum irq_domain_bus_token { | |
73 | DOMAIN_BUS_ANY = 0, | |
530cbe10 | 74 | DOMAIN_BUS_WIRED, |
0380839d | 75 | DOMAIN_BUS_PCI_MSI, |
c706c239 | 76 | DOMAIN_BUS_PLATFORM_MSI, |
a5716070 | 77 | DOMAIN_BUS_NEXUS, |
29d5c8db | 78 | DOMAIN_BUS_IPI, |
9b1b282c | 79 | DOMAIN_BUS_FSL_MC_MSI, |
ad3aedfb MZ |
80 | }; |
81 | ||
08a543ad GL |
82 | /** |
83 | * struct irq_domain_ops - Methods for irq_domain objects | |
7bb69bad GL |
84 | * @match: Match an interrupt controller device node to a host, returns |
85 | * 1 on a match | |
86 | * @map: Create or update a mapping between a virtual irq number and a hw | |
87 | * irq number. This is called only once for a given mapping. | |
88 | * @unmap: Dispose of such a mapping | |
7bb69bad GL |
89 | * @xlate: Given a device tree node and interrupt specifier, decode |
90 | * the hardware irq number and linux irq type value. | |
91 | * | |
92 | * Functions below are provided by the driver and called whenever a new mapping | |
93 | * is created or an old mapping is disposed. The driver can then proceed to | |
94 | * whatever internal data structures management is required. It also needs | |
95 | * to setup the irq_desc when returning from map(). | |
08a543ad GL |
96 | */ |
97 | struct irq_domain_ops { | |
ad3aedfb MZ |
98 | int (*match)(struct irq_domain *d, struct device_node *node, |
99 | enum irq_domain_bus_token bus_token); | |
651e8b54 MZ |
100 | int (*select)(struct irq_domain *d, struct irq_fwspec *fwspec, |
101 | enum irq_domain_bus_token bus_token); | |
7bb69bad GL |
102 | int (*map)(struct irq_domain *d, unsigned int virq, irq_hw_number_t hw); |
103 | void (*unmap)(struct irq_domain *d, unsigned int virq); | |
7bb69bad GL |
104 | int (*xlate)(struct irq_domain *d, struct device_node *node, |
105 | const u32 *intspec, unsigned int intsize, | |
106 | unsigned long *out_hwirq, unsigned int *out_type); | |
f8264e34 JL |
107 | |
108 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY | |
109 | /* extended V2 interfaces to support hierarchy irq_domains */ | |
110 | int (*alloc)(struct irq_domain *d, unsigned int virq, | |
111 | unsigned int nr_irqs, void *arg); | |
112 | void (*free)(struct irq_domain *d, unsigned int virq, | |
113 | unsigned int nr_irqs); | |
114 | void (*activate)(struct irq_domain *d, struct irq_data *irq_data); | |
115 | void (*deactivate)(struct irq_domain *d, struct irq_data *irq_data); | |
11e4438e MZ |
116 | int (*translate)(struct irq_domain *d, struct irq_fwspec *fwspec, |
117 | unsigned long *out_hwirq, unsigned int *out_type); | |
f8264e34 | 118 | #endif |
08a543ad GL |
119 | }; |
120 | ||
088f40b7 TG |
121 | extern struct irq_domain_ops irq_generic_chip_ops; |
122 | ||
123 | struct irq_domain_chip_generic; | |
124 | ||
08a543ad GL |
125 | /** |
126 | * struct irq_domain - Hardware interrupt number translation object | |
7bb69bad | 127 | * @link: Element in global irq_domain list. |
1aa0dd94 | 128 | * @name: Name of interrupt domain |
7bb69bad GL |
129 | * @ops: pointer to irq_domain methods |
130 | * @host_data: private data pointer for use by owner. Not touched by irq_domain | |
131 | * core code. | |
f8264e34 | 132 | * @flags: host per irq_domain flags |
9dc6be3d | 133 | * @mapcount: The number of mapped interrupts |
1aa0dd94 GL |
134 | * |
135 | * Optional elements | |
136 | * @of_node: Pointer to device tree nodes associated with the irq_domain. Used | |
137 | * when decoding device tree interrupt specifiers. | |
138 | * @gc: Pointer to a list of generic chips. There is a helper function for | |
139 | * setting up one or more generic chips for interrupt controllers | |
140 | * drivers using the generic chip library which uses this pointer. | |
f8264e34 | 141 | * @parent: Pointer to parent irq_domain to support hierarchy irq_domains |
087cdfb6 | 142 | * @debugfs_file: dentry for the domain debugfs file |
1aa0dd94 GL |
143 | * |
144 | * Revmap data, used internally by irq_domain | |
145 | * @revmap_direct_max_irq: The largest hwirq that can be set for controllers that | |
146 | * support direct mapping | |
147 | * @revmap_size: Size of the linear map table @linear_revmap[] | |
148 | * @revmap_tree: Radix map tree for hwirqs that don't fit in the linear map | |
149 | * @linear_revmap: Linear table of hwirq->virq reverse mappings | |
08a543ad GL |
150 | */ |
151 | struct irq_domain { | |
7bb69bad | 152 | struct list_head link; |
0bb4afb4 | 153 | const char *name; |
a18dc81b | 154 | const struct irq_domain_ops *ops; |
7bb69bad | 155 | void *host_data; |
f8264e34 | 156 | unsigned int flags; |
9dc6be3d | 157 | unsigned int mapcount; |
7bb69bad | 158 | |
1aa0dd94 | 159 | /* Optional data */ |
f110711a | 160 | struct fwnode_handle *fwnode; |
ad3aedfb | 161 | enum irq_domain_bus_token bus_token; |
088f40b7 | 162 | struct irq_domain_chip_generic *gc; |
f8264e34 JL |
163 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
164 | struct irq_domain *parent; | |
165 | #endif | |
087cdfb6 TG |
166 | #ifdef CONFIG_GENERIC_IRQ_DEBUGFS |
167 | struct dentry *debugfs_file; | |
168 | #endif | |
cef5075c | 169 | |
1aa0dd94 | 170 | /* reverse map data. The linear map gets appended to the irq_domain */ |
ddaf144c | 171 | irq_hw_number_t hwirq_max; |
1aa0dd94 GL |
172 | unsigned int revmap_direct_max_irq; |
173 | unsigned int revmap_size; | |
174 | struct radix_tree_root revmap_tree; | |
cef5075c | 175 | unsigned int linear_revmap[]; |
08a543ad GL |
176 | }; |
177 | ||
f8264e34 JL |
178 | /* Irq domain flags */ |
179 | enum { | |
180 | /* Irq domain is hierarchical */ | |
181 | IRQ_DOMAIN_FLAG_HIERARCHY = (1 << 0), | |
182 | ||
6a6544e5 MZ |
183 | /* Irq domain name was allocated in __irq_domain_add() */ |
184 | IRQ_DOMAIN_NAME_ALLOCATED = (1 << 6), | |
36d72731 | 185 | |
0abefbaa QY |
186 | /* Irq domain is an IPI domain with virq per cpu */ |
187 | IRQ_DOMAIN_FLAG_IPI_PER_CPU = (1 << 2), | |
188 | ||
189 | /* Irq domain is an IPI domain with single virq */ | |
190 | IRQ_DOMAIN_FLAG_IPI_SINGLE = (1 << 3), | |
191 | ||
631a9639 EA |
192 | /* Irq domain implements MSIs */ |
193 | IRQ_DOMAIN_FLAG_MSI = (1 << 4), | |
194 | ||
195 | /* Irq domain implements MSI remapping */ | |
196 | IRQ_DOMAIN_FLAG_MSI_REMAP = (1 << 5), | |
197 | ||
f8264e34 JL |
198 | /* |
199 | * Flags starting from IRQ_DOMAIN_FLAG_NONCORE are reserved | |
200 | * for implementation specific purposes and ignored by the | |
201 | * core code. | |
202 | */ | |
203 | IRQ_DOMAIN_FLAG_NONCORE = (1 << 16), | |
204 | }; | |
205 | ||
10abc7df MZ |
206 | static inline struct device_node *irq_domain_get_of_node(struct irq_domain *d) |
207 | { | |
f110711a | 208 | return to_of_node(d->fwnode); |
10abc7df MZ |
209 | } |
210 | ||
7bb69bad | 211 | #ifdef CONFIG_IRQ_DOMAIN |
d59f6617 TG |
212 | struct fwnode_handle *__irq_domain_alloc_fwnode(unsigned int type, int id, |
213 | const char *name, void *data); | |
214 | ||
215 | enum { | |
216 | IRQCHIP_FWNODE_REAL, | |
217 | IRQCHIP_FWNODE_NAMED, | |
218 | IRQCHIP_FWNODE_NAMED_ID, | |
219 | }; | |
220 | ||
221 | static inline | |
222 | struct fwnode_handle *irq_domain_alloc_named_fwnode(const char *name) | |
223 | { | |
224 | return __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_NAMED, 0, name, NULL); | |
225 | } | |
226 | ||
227 | static inline | |
228 | struct fwnode_handle *irq_domain_alloc_named_id_fwnode(const char *name, int id) | |
229 | { | |
230 | return __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_NAMED_ID, id, name, | |
231 | NULL); | |
232 | } | |
233 | ||
234 | static inline struct fwnode_handle *irq_domain_alloc_fwnode(void *data) | |
235 | { | |
236 | return __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_REAL, 0, NULL, data); | |
237 | } | |
238 | ||
b145dcc4 | 239 | void irq_domain_free_fwnode(struct fwnode_handle *fwnode); |
1bf4ddc4 | 240 | struct irq_domain *__irq_domain_add(struct fwnode_handle *fwnode, int size, |
ddaf144c | 241 | irq_hw_number_t hwirq_max, int direct_max, |
fa40f377 GL |
242 | const struct irq_domain_ops *ops, |
243 | void *host_data); | |
781d0f46 MB |
244 | struct irq_domain *irq_domain_add_simple(struct device_node *of_node, |
245 | unsigned int size, | |
246 | unsigned int first_irq, | |
247 | const struct irq_domain_ops *ops, | |
248 | void *host_data); | |
a8db8cf0 | 249 | struct irq_domain *irq_domain_add_legacy(struct device_node *of_node, |
1bc04f2c GL |
250 | unsigned int size, |
251 | unsigned int first_irq, | |
252 | irq_hw_number_t first_hwirq, | |
a18dc81b | 253 | const struct irq_domain_ops *ops, |
a8db8cf0 | 254 | void *host_data); |
651e8b54 | 255 | extern struct irq_domain *irq_find_matching_fwspec(struct irq_fwspec *fwspec, |
130b8c6c | 256 | enum irq_domain_bus_token bus_token); |
c7b41f0a | 257 | extern bool irq_domain_check_msi_remap(void); |
fa40f377 | 258 | extern void irq_set_default_host(struct irq_domain *host); |
ac0a0cd2 | 259 | extern int irq_domain_alloc_descs(int virq, unsigned int nr_irqs, |
06ee6d57 TG |
260 | irq_hw_number_t hwirq, int node, |
261 | const struct cpumask *affinity); | |
fa40f377 | 262 | |
1bf4ddc4 MZ |
263 | static inline struct fwnode_handle *of_node_to_fwnode(struct device_node *node) |
264 | { | |
265 | return node ? &node->fwnode : NULL; | |
266 | } | |
267 | ||
75aba7b0 SS |
268 | static inline bool is_fwnode_irqchip(struct fwnode_handle *fwnode) |
269 | { | |
270 | return fwnode && fwnode->type == FWNODE_IRQCHIP; | |
271 | } | |
272 | ||
61d0a000 MZ |
273 | extern void irq_domain_update_bus_token(struct irq_domain *domain, |
274 | enum irq_domain_bus_token bus_token); | |
275 | ||
651e8b54 MZ |
276 | static inline |
277 | struct irq_domain *irq_find_matching_fwnode(struct fwnode_handle *fwnode, | |
278 | enum irq_domain_bus_token bus_token) | |
279 | { | |
280 | struct irq_fwspec fwspec = { | |
281 | .fwnode = fwnode, | |
282 | }; | |
283 | ||
284 | return irq_find_matching_fwspec(&fwspec, bus_token); | |
285 | } | |
286 | ||
130b8c6c MZ |
287 | static inline struct irq_domain *irq_find_matching_host(struct device_node *node, |
288 | enum irq_domain_bus_token bus_token) | |
289 | { | |
1bf4ddc4 | 290 | return irq_find_matching_fwnode(of_node_to_fwnode(node), bus_token); |
130b8c6c MZ |
291 | } |
292 | ||
ad3aedfb MZ |
293 | static inline struct irq_domain *irq_find_host(struct device_node *node) |
294 | { | |
295 | return irq_find_matching_host(node, DOMAIN_BUS_ANY); | |
296 | } | |
297 | ||
fa40f377 GL |
298 | /** |
299 | * irq_domain_add_linear() - Allocate and register a linear revmap irq_domain. | |
300 | * @of_node: pointer to interrupt controller's device tree node. | |
301 | * @size: Number of interrupts in the domain. | |
302 | * @ops: map/unmap domain callbacks | |
303 | * @host_data: Controller private data pointer | |
304 | */ | |
305 | static inline struct irq_domain *irq_domain_add_linear(struct device_node *of_node, | |
a8db8cf0 | 306 | unsigned int size, |
a18dc81b | 307 | const struct irq_domain_ops *ops, |
fa40f377 GL |
308 | void *host_data) |
309 | { | |
1bf4ddc4 | 310 | return __irq_domain_add(of_node_to_fwnode(of_node), size, size, 0, ops, host_data); |
fa40f377 GL |
311 | } |
312 | static inline struct irq_domain *irq_domain_add_nomap(struct device_node *of_node, | |
6fa6c8e2 | 313 | unsigned int max_irq, |
a18dc81b | 314 | const struct irq_domain_ops *ops, |
fa40f377 GL |
315 | void *host_data) |
316 | { | |
1bf4ddc4 | 317 | return __irq_domain_add(of_node_to_fwnode(of_node), 0, max_irq, max_irq, ops, host_data); |
fa40f377 | 318 | } |
1bc04f2c GL |
319 | static inline struct irq_domain *irq_domain_add_legacy_isa( |
320 | struct device_node *of_node, | |
a18dc81b | 321 | const struct irq_domain_ops *ops, |
1bc04f2c GL |
322 | void *host_data) |
323 | { | |
324 | return irq_domain_add_legacy(of_node, NUM_ISA_INTERRUPTS, 0, 0, ops, | |
325 | host_data); | |
326 | } | |
cef5075c GL |
327 | static inline struct irq_domain *irq_domain_add_tree(struct device_node *of_node, |
328 | const struct irq_domain_ops *ops, | |
329 | void *host_data) | |
330 | { | |
1bf4ddc4 MZ |
331 | return __irq_domain_add(of_node_to_fwnode(of_node), 0, ~0, 0, ops, host_data); |
332 | } | |
333 | ||
334 | static inline struct irq_domain *irq_domain_create_linear(struct fwnode_handle *fwnode, | |
335 | unsigned int size, | |
336 | const struct irq_domain_ops *ops, | |
337 | void *host_data) | |
338 | { | |
339 | return __irq_domain_add(fwnode, size, size, 0, ops, host_data); | |
340 | } | |
341 | ||
342 | static inline struct irq_domain *irq_domain_create_tree(struct fwnode_handle *fwnode, | |
343 | const struct irq_domain_ops *ops, | |
344 | void *host_data) | |
345 | { | |
346 | return __irq_domain_add(fwnode, 0, ~0, 0, ops, host_data); | |
cef5075c | 347 | } |
58ee99ad PM |
348 | |
349 | extern void irq_domain_remove(struct irq_domain *host); | |
350 | ||
ddaf144c GL |
351 | extern int irq_domain_associate(struct irq_domain *domain, unsigned int irq, |
352 | irq_hw_number_t hwirq); | |
353 | extern void irq_domain_associate_many(struct irq_domain *domain, | |
354 | unsigned int irq_base, | |
355 | irq_hw_number_t hwirq_base, int count); | |
43a77591 JL |
356 | extern void irq_domain_disassociate(struct irq_domain *domain, |
357 | unsigned int irq); | |
98aa468e | 358 | |
cc79ca69 GL |
359 | extern unsigned int irq_create_mapping(struct irq_domain *host, |
360 | irq_hw_number_t hwirq); | |
c0131f09 | 361 | extern unsigned int irq_create_fwspec_mapping(struct irq_fwspec *fwspec); |
cc79ca69 | 362 | extern void irq_dispose_mapping(unsigned int virq); |
d3dcb436 GL |
363 | |
364 | /** | |
365 | * irq_linear_revmap() - Find a linux irq from a hw irq number. | |
366 | * @domain: domain owning this hardware interrupt | |
367 | * @hwirq: hardware irq number in that domain space | |
368 | * | |
369 | * This is a fast path alternative to irq_find_mapping() that can be | |
370 | * called directly by irq controller code to save a handful of | |
371 | * instructions. It is always safe to call, but won't find irqs mapped | |
372 | * using the radix tree. | |
373 | */ | |
374 | static inline unsigned int irq_linear_revmap(struct irq_domain *domain, | |
375 | irq_hw_number_t hwirq) | |
376 | { | |
377 | return hwirq < domain->revmap_size ? domain->linear_revmap[hwirq] : 0; | |
378 | } | |
cc79ca69 GL |
379 | extern unsigned int irq_find_mapping(struct irq_domain *host, |
380 | irq_hw_number_t hwirq); | |
381 | extern unsigned int irq_create_direct_mapping(struct irq_domain *host); | |
98aa468e GL |
382 | extern int irq_create_strict_mappings(struct irq_domain *domain, |
383 | unsigned int irq_base, | |
384 | irq_hw_number_t hwirq_base, int count); | |
385 | ||
386 | static inline int irq_create_identity_mapping(struct irq_domain *host, | |
387 | irq_hw_number_t hwirq) | |
388 | { | |
389 | return irq_create_strict_mappings(host, hwirq, hwirq, 1); | |
390 | } | |
391 | ||
a18dc81b | 392 | extern const struct irq_domain_ops irq_domain_simple_ops; |
16b2e6e2 GL |
393 | |
394 | /* stock xlate functions */ | |
395 | int irq_domain_xlate_onecell(struct irq_domain *d, struct device_node *ctrlr, | |
396 | const u32 *intspec, unsigned int intsize, | |
397 | irq_hw_number_t *out_hwirq, unsigned int *out_type); | |
398 | int irq_domain_xlate_twocell(struct irq_domain *d, struct device_node *ctrlr, | |
399 | const u32 *intspec, unsigned int intsize, | |
400 | irq_hw_number_t *out_hwirq, unsigned int *out_type); | |
401 | int irq_domain_xlate_onetwocell(struct irq_domain *d, struct device_node *ctrlr, | |
402 | const u32 *intspec, unsigned int intsize, | |
403 | irq_hw_number_t *out_hwirq, unsigned int *out_type); | |
404 | ||
d17bf24e | 405 | /* IPI functions */ |
7cec18a3 MR |
406 | int irq_reserve_ipi(struct irq_domain *domain, const struct cpumask *dest); |
407 | int irq_destroy_ipi(unsigned int irq, const struct cpumask *dest); | |
d17bf24e | 408 | |
f8264e34 JL |
409 | /* V2 interfaces to support hierarchy IRQ domains. */ |
410 | extern struct irq_data *irq_domain_get_irq_data(struct irq_domain *domain, | |
411 | unsigned int virq); | |
5f22f5c6 SA |
412 | extern void irq_domain_set_info(struct irq_domain *domain, unsigned int virq, |
413 | irq_hw_number_t hwirq, struct irq_chip *chip, | |
414 | void *chip_data, irq_flow_handler_t handler, | |
415 | void *handler_data, const char *handler_name); | |
f8264e34 | 416 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
2a5e9a07 | 417 | extern struct irq_domain *irq_domain_create_hierarchy(struct irq_domain *parent, |
afb7da83 | 418 | unsigned int flags, unsigned int size, |
2a5e9a07 | 419 | struct fwnode_handle *fwnode, |
afb7da83 | 420 | const struct irq_domain_ops *ops, void *host_data); |
2a5e9a07 MZ |
421 | |
422 | static inline struct irq_domain *irq_domain_add_hierarchy(struct irq_domain *parent, | |
423 | unsigned int flags, | |
424 | unsigned int size, | |
425 | struct device_node *node, | |
426 | const struct irq_domain_ops *ops, | |
427 | void *host_data) | |
428 | { | |
429 | return irq_domain_create_hierarchy(parent, flags, size, | |
430 | of_node_to_fwnode(node), | |
431 | ops, host_data); | |
432 | } | |
433 | ||
f8264e34 JL |
434 | extern int __irq_domain_alloc_irqs(struct irq_domain *domain, int irq_base, |
435 | unsigned int nr_irqs, int node, void *arg, | |
06ee6d57 | 436 | bool realloc, const struct cpumask *affinity); |
f8264e34 JL |
437 | extern void irq_domain_free_irqs(unsigned int virq, unsigned int nr_irqs); |
438 | extern void irq_domain_activate_irq(struct irq_data *irq_data); | |
439 | extern void irq_domain_deactivate_irq(struct irq_data *irq_data); | |
440 | ||
441 | static inline int irq_domain_alloc_irqs(struct irq_domain *domain, | |
442 | unsigned int nr_irqs, int node, void *arg) | |
443 | { | |
06ee6d57 TG |
444 | return __irq_domain_alloc_irqs(domain, -1, nr_irqs, node, arg, false, |
445 | NULL); | |
f8264e34 JL |
446 | } |
447 | ||
6a6544e5 | 448 | extern int irq_domain_alloc_irqs_hierarchy(struct irq_domain *domain, |
c466595c MZ |
449 | unsigned int irq_base, |
450 | unsigned int nr_irqs, void *arg); | |
f8264e34 JL |
451 | extern int irq_domain_set_hwirq_and_chip(struct irq_domain *domain, |
452 | unsigned int virq, | |
453 | irq_hw_number_t hwirq, | |
454 | struct irq_chip *chip, | |
455 | void *chip_data); | |
456 | extern void irq_domain_reset_irq_data(struct irq_data *irq_data); | |
457 | extern void irq_domain_free_irqs_common(struct irq_domain *domain, | |
458 | unsigned int virq, | |
459 | unsigned int nr_irqs); | |
460 | extern void irq_domain_free_irqs_top(struct irq_domain *domain, | |
461 | unsigned int virq, unsigned int nr_irqs); | |
462 | ||
36d72731 JL |
463 | extern int irq_domain_alloc_irqs_parent(struct irq_domain *domain, |
464 | unsigned int irq_base, | |
465 | unsigned int nr_irqs, void *arg); | |
f8264e34 | 466 | |
36d72731 JL |
467 | extern void irq_domain_free_irqs_parent(struct irq_domain *domain, |
468 | unsigned int irq_base, | |
469 | unsigned int nr_irqs); | |
f8264e34 JL |
470 | |
471 | static inline bool irq_domain_is_hierarchy(struct irq_domain *domain) | |
472 | { | |
473 | return domain->flags & IRQ_DOMAIN_FLAG_HIERARCHY; | |
474 | } | |
0abefbaa QY |
475 | |
476 | static inline bool irq_domain_is_ipi(struct irq_domain *domain) | |
477 | { | |
478 | return domain->flags & | |
479 | (IRQ_DOMAIN_FLAG_IPI_PER_CPU | IRQ_DOMAIN_FLAG_IPI_SINGLE); | |
480 | } | |
481 | ||
482 | static inline bool irq_domain_is_ipi_per_cpu(struct irq_domain *domain) | |
483 | { | |
484 | return domain->flags & IRQ_DOMAIN_FLAG_IPI_PER_CPU; | |
485 | } | |
486 | ||
487 | static inline bool irq_domain_is_ipi_single(struct irq_domain *domain) | |
488 | { | |
489 | return domain->flags & IRQ_DOMAIN_FLAG_IPI_SINGLE; | |
490 | } | |
631a9639 EA |
491 | |
492 | static inline bool irq_domain_is_msi(struct irq_domain *domain) | |
493 | { | |
494 | return domain->flags & IRQ_DOMAIN_FLAG_MSI; | |
495 | } | |
496 | ||
497 | static inline bool irq_domain_is_msi_remap(struct irq_domain *domain) | |
498 | { | |
499 | return domain->flags & IRQ_DOMAIN_FLAG_MSI_REMAP; | |
500 | } | |
501 | ||
502 | extern bool irq_domain_hierarchical_is_msi_remap(struct irq_domain *domain); | |
503 | ||
f8264e34 JL |
504 | #else /* CONFIG_IRQ_DOMAIN_HIERARCHY */ |
505 | static inline void irq_domain_activate_irq(struct irq_data *data) { } | |
506 | static inline void irq_domain_deactivate_irq(struct irq_data *data) { } | |
507 | static inline int irq_domain_alloc_irqs(struct irq_domain *domain, | |
508 | unsigned int nr_irqs, int node, void *arg) | |
509 | { | |
510 | return -1; | |
511 | } | |
512 | ||
1e2a7d78 JH |
513 | static inline void irq_domain_free_irqs(unsigned int virq, |
514 | unsigned int nr_irqs) { } | |
515 | ||
f8264e34 JL |
516 | static inline bool irq_domain_is_hierarchy(struct irq_domain *domain) |
517 | { | |
518 | return false; | |
519 | } | |
0abefbaa QY |
520 | |
521 | static inline bool irq_domain_is_ipi(struct irq_domain *domain) | |
522 | { | |
523 | return false; | |
524 | } | |
525 | ||
526 | static inline bool irq_domain_is_ipi_per_cpu(struct irq_domain *domain) | |
527 | { | |
528 | return false; | |
529 | } | |
530 | ||
531 | static inline bool irq_domain_is_ipi_single(struct irq_domain *domain) | |
532 | { | |
533 | return false; | |
534 | } | |
631a9639 EA |
535 | |
536 | static inline bool irq_domain_is_msi(struct irq_domain *domain) | |
537 | { | |
538 | return false; | |
539 | } | |
540 | ||
541 | static inline bool irq_domain_is_msi_remap(struct irq_domain *domain) | |
542 | { | |
543 | return false; | |
544 | } | |
545 | ||
546 | static inline bool | |
547 | irq_domain_hierarchical_is_msi_remap(struct irq_domain *domain) | |
548 | { | |
549 | return false; | |
550 | } | |
f8264e34 JL |
551 | #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ |
552 | ||
d593f25f GL |
553 | #else /* CONFIG_IRQ_DOMAIN */ |
554 | static inline void irq_dispose_mapping(unsigned int virq) { } | |
f8264e34 JL |
555 | static inline void irq_domain_activate_irq(struct irq_data *data) { } |
556 | static inline void irq_domain_deactivate_irq(struct irq_data *data) { } | |
471036b2 SS |
557 | static inline struct irq_domain *irq_find_matching_fwnode( |
558 | struct fwnode_handle *fwnode, enum irq_domain_bus_token bus_token) | |
559 | { | |
560 | return NULL; | |
561 | } | |
b3e22847 MYK |
562 | static inline bool irq_domain_check_msi_remap(void) |
563 | { | |
564 | return false; | |
565 | } | |
d593f25f | 566 | #endif /* !CONFIG_IRQ_DOMAIN */ |
7e713301 | 567 | |
08a543ad | 568 | #endif /* _LINUX_IRQDOMAIN_H */ |