Commit | Line | Data |
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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
08a543ad GL |
2 | /* |
3 | * irq_domain - IRQ translation domains | |
4 | * | |
5 | * Translation infrastructure between hw and linux irq numbers. This is | |
6 | * helpful for interrupt controllers to implement mapping between hardware | |
7 | * irq numbers and the Linux irq number space. | |
8 | * | |
e7a46c81 MZ |
9 | * irq_domains also have hooks for translating device tree or other |
10 | * firmware interrupt representations into a hardware irq number that | |
11 | * can be mapped back to a Linux irq number without any extra platform | |
12 | * support code. | |
08a543ad | 13 | * |
7bb69bad GL |
14 | * Interrupt controller "domain" data structure. This could be defined as a |
15 | * irq domain controller. That is, it handles the mapping between hardware | |
16 | * and virtual interrupt numbers for a given interrupt domain. The domain | |
17 | * structure is generally created by the PIC code for a given PIC instance | |
18 | * (though a domain can cover more than one PIC if they have a flat number | |
19 | * model). It's the domain callbacks that are responsible for setting the | |
20 | * irq_chip on a given irq_desc after it's been mapped. | |
cc79ca69 | 21 | * |
e7a46c81 MZ |
22 | * The host code and data structures use a fwnode_handle pointer to |
23 | * identify the domain. In some cases, and in order to preserve source | |
24 | * code compatibility, this fwnode pointer is "upgraded" to a DT | |
25 | * device_node. For those firmware infrastructures that do not provide | |
26 | * a unique identifier for an interrupt controller, the irq_domain | |
27 | * code offers a fwnode allocator. | |
08a543ad | 28 | */ |
7bb69bad | 29 | |
08a543ad GL |
30 | #ifndef _LINUX_IRQDOMAIN_H |
31 | #define _LINUX_IRQDOMAIN_H | |
32 | ||
7bb69bad | 33 | #include <linux/types.h> |
aeef2052 | 34 | #include <linux/irqdomain_defs.h> |
1b537708 | 35 | #include <linux/irqhandler.h> |
f110711a | 36 | #include <linux/of.h> |
f1d78358 | 37 | #include <linux/mutex.h> |
7bb69bad | 38 | #include <linux/radix-tree.h> |
08a543ad | 39 | |
08a543ad | 40 | struct device_node; |
08219fb1 | 41 | struct fwnode_handle; |
08a543ad | 42 | struct irq_domain; |
f8264e34 JL |
43 | struct irq_chip; |
44 | struct irq_data; | |
d22558dd | 45 | struct irq_desc; |
06ee6d57 | 46 | struct cpumask; |
c3e7239a | 47 | struct seq_file; |
bec04037 | 48 | struct irq_affinity_desc; |
b78780d9 | 49 | struct msi_parent_ops; |
7bb69bad | 50 | |
11e4438e MZ |
51 | #define IRQ_DOMAIN_IRQ_SPEC_PARAMS 16 |
52 | ||
53 | /** | |
54 | * struct irq_fwspec - generic IRQ specifier structure | |
55 | * | |
56 | * @fwnode: Pointer to a firmware-specific descriptor | |
57 | * @param_count: Number of device-specific parameters | |
58 | * @param: Device-specific parameters | |
59 | * | |
60 | * This structure, directly modeled after of_phandle_args, is used to | |
61 | * pass a device-specific description of an interrupt. | |
62 | */ | |
63 | struct irq_fwspec { | |
64 | struct fwnode_handle *fwnode; | |
65 | int param_count; | |
66 | u32 param[IRQ_DOMAIN_IRQ_SPEC_PARAMS]; | |
67 | }; | |
68 | ||
0ab8d0f6 MZ |
69 | /* Conversion function from of_phandle_args fields to fwspec */ |
70 | void of_phandle_args_to_fwspec(struct device_node *np, const u32 *args, | |
71 | unsigned int count, struct irq_fwspec *fwspec); | |
72 | ||
08a543ad GL |
73 | /** |
74 | * struct irq_domain_ops - Methods for irq_domain objects | |
7bb69bad GL |
75 | * @match: Match an interrupt controller device node to a host, returns |
76 | * 1 on a match | |
77 | * @map: Create or update a mapping between a virtual irq number and a hw | |
78 | * irq number. This is called only once for a given mapping. | |
79 | * @unmap: Dispose of such a mapping | |
7bb69bad GL |
80 | * @xlate: Given a device tree node and interrupt specifier, decode |
81 | * the hardware irq number and linux irq type value. | |
82 | * | |
83 | * Functions below are provided by the driver and called whenever a new mapping | |
84 | * is created or an old mapping is disposed. The driver can then proceed to | |
85 | * whatever internal data structures management is required. It also needs | |
86 | * to setup the irq_desc when returning from map(). | |
08a543ad GL |
87 | */ |
88 | struct irq_domain_ops { | |
ad3aedfb MZ |
89 | int (*match)(struct irq_domain *d, struct device_node *node, |
90 | enum irq_domain_bus_token bus_token); | |
651e8b54 MZ |
91 | int (*select)(struct irq_domain *d, struct irq_fwspec *fwspec, |
92 | enum irq_domain_bus_token bus_token); | |
7bb69bad GL |
93 | int (*map)(struct irq_domain *d, unsigned int virq, irq_hw_number_t hw); |
94 | void (*unmap)(struct irq_domain *d, unsigned int virq); | |
7bb69bad GL |
95 | int (*xlate)(struct irq_domain *d, struct device_node *node, |
96 | const u32 *intspec, unsigned int intsize, | |
97 | unsigned long *out_hwirq, unsigned int *out_type); | |
f8264e34 JL |
98 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
99 | /* extended V2 interfaces to support hierarchy irq_domains */ | |
100 | int (*alloc)(struct irq_domain *d, unsigned int virq, | |
101 | unsigned int nr_irqs, void *arg); | |
102 | void (*free)(struct irq_domain *d, unsigned int virq, | |
103 | unsigned int nr_irqs); | |
702cb0a0 | 104 | int (*activate)(struct irq_domain *d, struct irq_data *irqd, bool reserve); |
f8264e34 | 105 | void (*deactivate)(struct irq_domain *d, struct irq_data *irq_data); |
11e4438e MZ |
106 | int (*translate)(struct irq_domain *d, struct irq_fwspec *fwspec, |
107 | unsigned long *out_hwirq, unsigned int *out_type); | |
f8264e34 | 108 | #endif |
c3e7239a TG |
109 | #ifdef CONFIG_GENERIC_IRQ_DEBUGFS |
110 | void (*debug_show)(struct seq_file *m, struct irq_domain *d, | |
111 | struct irq_data *irqd, int ind); | |
112 | #endif | |
08a543ad GL |
113 | }; |
114 | ||
4946f15e | 115 | extern const struct irq_domain_ops irq_generic_chip_ops; |
088f40b7 TG |
116 | |
117 | struct irq_domain_chip_generic; | |
118 | ||
08a543ad GL |
119 | /** |
120 | * struct irq_domain - Hardware interrupt number translation object | |
f876ea3b TG |
121 | * @link: Element in global irq_domain list. |
122 | * @name: Name of interrupt domain | |
123 | * @ops: Pointer to irq_domain methods | |
124 | * @host_data: Private data pointer for use by owner. Not touched by irq_domain | |
125 | * core code. | |
126 | * @flags: Per irq_domain flags | |
127 | * @mapcount: The number of mapped interrupts | |
9dbb8e34 JH |
128 | * @mutex: Domain lock, hierarchical domains use root domain's lock |
129 | * @root: Pointer to root domain, or containing structure if non-hierarchical | |
1aa0dd94 | 130 | * |
f876ea3b TG |
131 | * Optional elements: |
132 | * @fwnode: Pointer to firmware node associated with the irq_domain. Pretty easy | |
133 | * to swap it for the of_node via the irq_domain_get_of_node accessor | |
134 | * @gc: Pointer to a list of generic chips. There is a helper function for | |
135 | * setting up one or more generic chips for interrupt controllers | |
136 | * drivers using the generic chip library which uses this pointer. | |
4443664f TG |
137 | * @dev: Pointer to the device which instantiated the irqdomain |
138 | * With per device irq domains this is not necessarily the same | |
139 | * as @pm_dev. | |
6a9fc419 | 140 | * @pm_dev: Pointer to a device that can be utilized for power management |
f876ea3b TG |
141 | * purposes related to the irq domain. |
142 | * @parent: Pointer to parent irq_domain to support hierarchy irq_domains | |
b78780d9 | 143 | * @msi_parent_ops: Pointer to MSI parent domain methods for per device domain init |
1aa0dd94 | 144 | * |
f876ea3b TG |
145 | * Revmap data, used internally by the irq domain code: |
146 | * @revmap_size: Size of the linear map table @revmap[] | |
147 | * @revmap_tree: Radix map tree for hwirqs that don't fit in the linear map | |
f876ea3b | 148 | * @revmap: Linear table of irq_data pointers |
08a543ad GL |
149 | */ |
150 | struct irq_domain { | |
f876ea3b TG |
151 | struct list_head link; |
152 | const char *name; | |
153 | const struct irq_domain_ops *ops; | |
154 | void *host_data; | |
155 | unsigned int flags; | |
156 | unsigned int mapcount; | |
9dbb8e34 JH |
157 | struct mutex mutex; |
158 | struct irq_domain *root; | |
7bb69bad | 159 | |
1aa0dd94 | 160 | /* Optional data */ |
f876ea3b TG |
161 | struct fwnode_handle *fwnode; |
162 | enum irq_domain_bus_token bus_token; | |
163 | struct irq_domain_chip_generic *gc; | |
4443664f | 164 | struct device *dev; |
6a9fc419 | 165 | struct device *pm_dev; |
f8264e34 | 166 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
f876ea3b | 167 | struct irq_domain *parent; |
f8264e34 | 168 | #endif |
b78780d9 TG |
169 | #ifdef CONFIG_GENERIC_MSI_IRQ |
170 | const struct msi_parent_ops *msi_parent_ops; | |
171 | #endif | |
cef5075c | 172 | |
1aa0dd94 | 173 | /* reverse map data. The linear map gets appended to the irq_domain */ |
f876ea3b TG |
174 | irq_hw_number_t hwirq_max; |
175 | unsigned int revmap_size; | |
176 | struct radix_tree_root revmap_tree; | |
6260ecd0 | 177 | struct irq_data __rcu *revmap[] __counted_by(revmap_size); |
08a543ad GL |
178 | }; |
179 | ||
f8264e34 JL |
180 | /* Irq domain flags */ |
181 | enum { | |
182 | /* Irq domain is hierarchical */ | |
183 | IRQ_DOMAIN_FLAG_HIERARCHY = (1 << 0), | |
184 | ||
6a6544e5 | 185 | /* Irq domain name was allocated in __irq_domain_add() */ |
2546287c | 186 | IRQ_DOMAIN_NAME_ALLOCATED = (1 << 1), |
36d72731 | 187 | |
0abefbaa QY |
188 | /* Irq domain is an IPI domain with virq per cpu */ |
189 | IRQ_DOMAIN_FLAG_IPI_PER_CPU = (1 << 2), | |
190 | ||
191 | /* Irq domain is an IPI domain with single virq */ | |
192 | IRQ_DOMAIN_FLAG_IPI_SINGLE = (1 << 3), | |
193 | ||
631a9639 EA |
194 | /* Irq domain implements MSIs */ |
195 | IRQ_DOMAIN_FLAG_MSI = (1 << 4), | |
196 | ||
dcb83f6e JG |
197 | /* |
198 | * Irq domain implements isolated MSI, see msi_device_has_isolated_msi() | |
199 | */ | |
200 | IRQ_DOMAIN_FLAG_ISOLATED_MSI = (1 << 5), | |
631a9639 | 201 | |
4f86a06e | 202 | /* Irq domain doesn't translate anything */ |
3dad5f9a | 203 | IRQ_DOMAIN_FLAG_NO_MAP = (1 << 6), |
4f86a06e | 204 | |
b749e6d3 TG |
205 | /* Irq domain is a MSI parent domain */ |
206 | IRQ_DOMAIN_FLAG_MSI_PARENT = (1 << 8), | |
207 | ||
e71c5d0b TG |
208 | /* Irq domain is a MSI device domain */ |
209 | IRQ_DOMAIN_FLAG_MSI_DEVICE = (1 << 9), | |
210 | ||
f8264e34 JL |
211 | /* |
212 | * Flags starting from IRQ_DOMAIN_FLAG_NONCORE are reserved | |
213 | * for implementation specific purposes and ignored by the | |
214 | * core code. | |
215 | */ | |
216 | IRQ_DOMAIN_FLAG_NONCORE = (1 << 16), | |
217 | }; | |
218 | ||
10abc7df MZ |
219 | static inline struct device_node *irq_domain_get_of_node(struct irq_domain *d) |
220 | { | |
f110711a | 221 | return to_of_node(d->fwnode); |
10abc7df MZ |
222 | } |
223 | ||
1f8863bf MZ |
224 | static inline void irq_domain_set_pm_device(struct irq_domain *d, |
225 | struct device *dev) | |
226 | { | |
227 | if (d) | |
6a9fc419 | 228 | d->pm_dev = dev; |
1f8863bf MZ |
229 | } |
230 | ||
7bb69bad | 231 | #ifdef CONFIG_IRQ_DOMAIN |
d59f6617 | 232 | struct fwnode_handle *__irq_domain_alloc_fwnode(unsigned int type, int id, |
b977fcf4 | 233 | const char *name, phys_addr_t *pa); |
d59f6617 TG |
234 | |
235 | enum { | |
236 | IRQCHIP_FWNODE_REAL, | |
237 | IRQCHIP_FWNODE_NAMED, | |
238 | IRQCHIP_FWNODE_NAMED_ID, | |
239 | }; | |
240 | ||
241 | static inline | |
242 | struct fwnode_handle *irq_domain_alloc_named_fwnode(const char *name) | |
243 | { | |
244 | return __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_NAMED, 0, name, NULL); | |
245 | } | |
246 | ||
247 | static inline | |
248 | struct fwnode_handle *irq_domain_alloc_named_id_fwnode(const char *name, int id) | |
249 | { | |
250 | return __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_NAMED_ID, id, name, | |
251 | NULL); | |
252 | } | |
253 | ||
b977fcf4 | 254 | static inline struct fwnode_handle *irq_domain_alloc_fwnode(phys_addr_t *pa) |
d59f6617 | 255 | { |
b977fcf4 | 256 | return __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_REAL, 0, NULL, pa); |
d59f6617 TG |
257 | } |
258 | ||
b145dcc4 | 259 | void irq_domain_free_fwnode(struct fwnode_handle *fwnode); |
20c36ce2 | 260 | struct irq_domain *__irq_domain_add(struct fwnode_handle *fwnode, unsigned int size, |
ddaf144c | 261 | irq_hw_number_t hwirq_max, int direct_max, |
fa40f377 GL |
262 | const struct irq_domain_ops *ops, |
263 | void *host_data); | |
67196fea AS |
264 | struct irq_domain *irq_domain_create_simple(struct fwnode_handle *fwnode, |
265 | unsigned int size, | |
266 | unsigned int first_irq, | |
267 | const struct irq_domain_ops *ops, | |
268 | void *host_data); | |
a8db8cf0 | 269 | struct irq_domain *irq_domain_add_legacy(struct device_node *of_node, |
1bc04f2c GL |
270 | unsigned int size, |
271 | unsigned int first_irq, | |
272 | irq_hw_number_t first_hwirq, | |
a18dc81b | 273 | const struct irq_domain_ops *ops, |
a8db8cf0 | 274 | void *host_data); |
b6e95788 AS |
275 | struct irq_domain *irq_domain_create_legacy(struct fwnode_handle *fwnode, |
276 | unsigned int size, | |
277 | unsigned int first_irq, | |
278 | irq_hw_number_t first_hwirq, | |
279 | const struct irq_domain_ops *ops, | |
280 | void *host_data); | |
651e8b54 | 281 | extern struct irq_domain *irq_find_matching_fwspec(struct irq_fwspec *fwspec, |
130b8c6c | 282 | enum irq_domain_bus_token bus_token); |
fa40f377 | 283 | extern void irq_set_default_host(struct irq_domain *host); |
9f199dd3 | 284 | extern struct irq_domain *irq_get_default_host(void); |
ac0a0cd2 | 285 | extern int irq_domain_alloc_descs(int virq, unsigned int nr_irqs, |
06ee6d57 | 286 | irq_hw_number_t hwirq, int node, |
bec04037 | 287 | const struct irq_affinity_desc *affinity); |
fa40f377 | 288 | |
1bf4ddc4 MZ |
289 | static inline struct fwnode_handle *of_node_to_fwnode(struct device_node *node) |
290 | { | |
291 | return node ? &node->fwnode : NULL; | |
292 | } | |
293 | ||
db3e50f3 SA |
294 | extern const struct fwnode_operations irqchip_fwnode_ops; |
295 | ||
75aba7b0 SS |
296 | static inline bool is_fwnode_irqchip(struct fwnode_handle *fwnode) |
297 | { | |
db3e50f3 | 298 | return fwnode && fwnode->ops == &irqchip_fwnode_ops; |
75aba7b0 SS |
299 | } |
300 | ||
61d0a000 MZ |
301 | extern void irq_domain_update_bus_token(struct irq_domain *domain, |
302 | enum irq_domain_bus_token bus_token); | |
303 | ||
651e8b54 MZ |
304 | static inline |
305 | struct irq_domain *irq_find_matching_fwnode(struct fwnode_handle *fwnode, | |
306 | enum irq_domain_bus_token bus_token) | |
307 | { | |
308 | struct irq_fwspec fwspec = { | |
309 | .fwnode = fwnode, | |
310 | }; | |
311 | ||
312 | return irq_find_matching_fwspec(&fwspec, bus_token); | |
313 | } | |
314 | ||
130b8c6c MZ |
315 | static inline struct irq_domain *irq_find_matching_host(struct device_node *node, |
316 | enum irq_domain_bus_token bus_token) | |
317 | { | |
1bf4ddc4 | 318 | return irq_find_matching_fwnode(of_node_to_fwnode(node), bus_token); |
130b8c6c MZ |
319 | } |
320 | ||
ad3aedfb MZ |
321 | static inline struct irq_domain *irq_find_host(struct device_node *node) |
322 | { | |
64619343 MZ |
323 | struct irq_domain *d; |
324 | ||
325 | d = irq_find_matching_host(node, DOMAIN_BUS_WIRED); | |
326 | if (!d) | |
327 | d = irq_find_matching_host(node, DOMAIN_BUS_ANY); | |
328 | ||
329 | return d; | |
ad3aedfb MZ |
330 | } |
331 | ||
67196fea AS |
332 | static inline struct irq_domain *irq_domain_add_simple(struct device_node *of_node, |
333 | unsigned int size, | |
334 | unsigned int first_irq, | |
335 | const struct irq_domain_ops *ops, | |
336 | void *host_data) | |
337 | { | |
338 | return irq_domain_create_simple(of_node_to_fwnode(of_node), size, first_irq, ops, host_data); | |
339 | } | |
340 | ||
fa40f377 GL |
341 | /** |
342 | * irq_domain_add_linear() - Allocate and register a linear revmap irq_domain. | |
343 | * @of_node: pointer to interrupt controller's device tree node. | |
344 | * @size: Number of interrupts in the domain. | |
345 | * @ops: map/unmap domain callbacks | |
346 | * @host_data: Controller private data pointer | |
347 | */ | |
348 | static inline struct irq_domain *irq_domain_add_linear(struct device_node *of_node, | |
a8db8cf0 | 349 | unsigned int size, |
a18dc81b | 350 | const struct irq_domain_ops *ops, |
fa40f377 GL |
351 | void *host_data) |
352 | { | |
1bf4ddc4 | 353 | return __irq_domain_add(of_node_to_fwnode(of_node), size, size, 0, ops, host_data); |
fa40f377 | 354 | } |
e37af801 MZ |
355 | |
356 | #ifdef CONFIG_IRQ_DOMAIN_NOMAP | |
fa40f377 | 357 | static inline struct irq_domain *irq_domain_add_nomap(struct device_node *of_node, |
6fa6c8e2 | 358 | unsigned int max_irq, |
a18dc81b | 359 | const struct irq_domain_ops *ops, |
fa40f377 GL |
360 | void *host_data) |
361 | { | |
1bf4ddc4 | 362 | return __irq_domain_add(of_node_to_fwnode(of_node), 0, max_irq, max_irq, ops, host_data); |
fa40f377 | 363 | } |
e37af801 MZ |
364 | |
365 | extern unsigned int irq_create_direct_mapping(struct irq_domain *host); | |
366 | #endif | |
367 | ||
cef5075c GL |
368 | static inline struct irq_domain *irq_domain_add_tree(struct device_node *of_node, |
369 | const struct irq_domain_ops *ops, | |
370 | void *host_data) | |
371 | { | |
1bf4ddc4 MZ |
372 | return __irq_domain_add(of_node_to_fwnode(of_node), 0, ~0, 0, ops, host_data); |
373 | } | |
374 | ||
375 | static inline struct irq_domain *irq_domain_create_linear(struct fwnode_handle *fwnode, | |
376 | unsigned int size, | |
377 | const struct irq_domain_ops *ops, | |
378 | void *host_data) | |
379 | { | |
380 | return __irq_domain_add(fwnode, size, size, 0, ops, host_data); | |
381 | } | |
382 | ||
383 | static inline struct irq_domain *irq_domain_create_tree(struct fwnode_handle *fwnode, | |
384 | const struct irq_domain_ops *ops, | |
385 | void *host_data) | |
386 | { | |
387 | return __irq_domain_add(fwnode, 0, ~0, 0, ops, host_data); | |
cef5075c | 388 | } |
58ee99ad PM |
389 | |
390 | extern void irq_domain_remove(struct irq_domain *host); | |
391 | ||
ddaf144c GL |
392 | extern int irq_domain_associate(struct irq_domain *domain, unsigned int irq, |
393 | irq_hw_number_t hwirq); | |
394 | extern void irq_domain_associate_many(struct irq_domain *domain, | |
395 | unsigned int irq_base, | |
396 | irq_hw_number_t hwirq_base, int count); | |
98aa468e | 397 | |
bb4c6910 LV |
398 | extern unsigned int irq_create_mapping_affinity(struct irq_domain *host, |
399 | irq_hw_number_t hwirq, | |
400 | const struct irq_affinity_desc *affinity); | |
c0131f09 | 401 | extern unsigned int irq_create_fwspec_mapping(struct irq_fwspec *fwspec); |
cc79ca69 | 402 | extern void irq_dispose_mapping(unsigned int virq); |
d3dcb436 | 403 | |
bb4c6910 LV |
404 | static inline unsigned int irq_create_mapping(struct irq_domain *host, |
405 | irq_hw_number_t hwirq) | |
406 | { | |
407 | return irq_create_mapping_affinity(host, hwirq, NULL); | |
408 | } | |
409 | ||
d22558dd MZ |
410 | extern struct irq_desc *__irq_resolve_mapping(struct irq_domain *domain, |
411 | irq_hw_number_t hwirq, | |
412 | unsigned int *irq); | |
413 | ||
414 | static inline struct irq_desc *irq_resolve_mapping(struct irq_domain *domain, | |
415 | irq_hw_number_t hwirq) | |
416 | { | |
417 | return __irq_resolve_mapping(domain, hwirq, NULL); | |
418 | } | |
419 | ||
d3dcb436 | 420 | /** |
1da02736 | 421 | * irq_find_mapping() - Find a linux irq from a hw irq number. |
d3dcb436 GL |
422 | * @domain: domain owning this hardware interrupt |
423 | * @hwirq: hardware irq number in that domain space | |
d3dcb436 | 424 | */ |
d22558dd MZ |
425 | static inline unsigned int irq_find_mapping(struct irq_domain *domain, |
426 | irq_hw_number_t hwirq) | |
427 | { | |
428 | unsigned int irq; | |
429 | ||
430 | if (__irq_resolve_mapping(domain, hwirq, &irq)) | |
431 | return irq; | |
432 | ||
433 | return 0; | |
434 | } | |
1da02736 | 435 | |
d3dcb436 GL |
436 | static inline unsigned int irq_linear_revmap(struct irq_domain *domain, |
437 | irq_hw_number_t hwirq) | |
438 | { | |
1da02736 | 439 | return irq_find_mapping(domain, hwirq); |
d3dcb436 | 440 | } |
1da02736 | 441 | |
a18dc81b | 442 | extern const struct irq_domain_ops irq_domain_simple_ops; |
16b2e6e2 GL |
443 | |
444 | /* stock xlate functions */ | |
445 | int irq_domain_xlate_onecell(struct irq_domain *d, struct device_node *ctrlr, | |
446 | const u32 *intspec, unsigned int intsize, | |
447 | irq_hw_number_t *out_hwirq, unsigned int *out_type); | |
448 | int irq_domain_xlate_twocell(struct irq_domain *d, struct device_node *ctrlr, | |
449 | const u32 *intspec, unsigned int intsize, | |
450 | irq_hw_number_t *out_hwirq, unsigned int *out_type); | |
451 | int irq_domain_xlate_onetwocell(struct irq_domain *d, struct device_node *ctrlr, | |
452 | const u32 *intspec, unsigned int intsize, | |
453 | irq_hw_number_t *out_hwirq, unsigned int *out_type); | |
454 | ||
b5c231d8 BM |
455 | int irq_domain_translate_twocell(struct irq_domain *d, |
456 | struct irq_fwspec *fwspec, | |
457 | unsigned long *out_hwirq, | |
458 | unsigned int *out_type); | |
459 | ||
b01eccea YS |
460 | int irq_domain_translate_onecell(struct irq_domain *d, |
461 | struct irq_fwspec *fwspec, | |
462 | unsigned long *out_hwirq, | |
463 | unsigned int *out_type); | |
464 | ||
d17bf24e | 465 | /* IPI functions */ |
7cec18a3 MR |
466 | int irq_reserve_ipi(struct irq_domain *domain, const struct cpumask *dest); |
467 | int irq_destroy_ipi(unsigned int irq, const struct cpumask *dest); | |
d17bf24e | 468 | |
f8264e34 JL |
469 | /* V2 interfaces to support hierarchy IRQ domains. */ |
470 | extern struct irq_data *irq_domain_get_irq_data(struct irq_domain *domain, | |
471 | unsigned int virq); | |
5f22f5c6 | 472 | extern void irq_domain_set_info(struct irq_domain *domain, unsigned int virq, |
45ec846c MZ |
473 | irq_hw_number_t hwirq, |
474 | const struct irq_chip *chip, | |
5f22f5c6 SA |
475 | void *chip_data, irq_flow_handler_t handler, |
476 | void *handler_data, const char *handler_name); | |
5c8f77a2 | 477 | extern void irq_domain_reset_irq_data(struct irq_data *irq_data); |
f8264e34 | 478 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
2a5e9a07 | 479 | extern struct irq_domain *irq_domain_create_hierarchy(struct irq_domain *parent, |
afb7da83 | 480 | unsigned int flags, unsigned int size, |
2a5e9a07 | 481 | struct fwnode_handle *fwnode, |
afb7da83 | 482 | const struct irq_domain_ops *ops, void *host_data); |
2a5e9a07 MZ |
483 | |
484 | static inline struct irq_domain *irq_domain_add_hierarchy(struct irq_domain *parent, | |
485 | unsigned int flags, | |
486 | unsigned int size, | |
487 | struct device_node *node, | |
488 | const struct irq_domain_ops *ops, | |
489 | void *host_data) | |
490 | { | |
491 | return irq_domain_create_hierarchy(parent, flags, size, | |
492 | of_node_to_fwnode(node), | |
493 | ops, host_data); | |
494 | } | |
495 | ||
f8264e34 JL |
496 | extern int __irq_domain_alloc_irqs(struct irq_domain *domain, int irq_base, |
497 | unsigned int nr_irqs, int node, void *arg, | |
bec04037 DL |
498 | bool realloc, |
499 | const struct irq_affinity_desc *affinity); | |
f8264e34 | 500 | extern void irq_domain_free_irqs(unsigned int virq, unsigned int nr_irqs); |
42e1cc2d | 501 | extern int irq_domain_activate_irq(struct irq_data *irq_data, bool early); |
f8264e34 JL |
502 | extern void irq_domain_deactivate_irq(struct irq_data *irq_data); |
503 | ||
504 | static inline int irq_domain_alloc_irqs(struct irq_domain *domain, | |
505 | unsigned int nr_irqs, int node, void *arg) | |
506 | { | |
06ee6d57 TG |
507 | return __irq_domain_alloc_irqs(domain, -1, nr_irqs, node, arg, false, |
508 | NULL); | |
f8264e34 JL |
509 | } |
510 | ||
6a6544e5 | 511 | extern int irq_domain_alloc_irqs_hierarchy(struct irq_domain *domain, |
c466595c MZ |
512 | unsigned int irq_base, |
513 | unsigned int nr_irqs, void *arg); | |
f8264e34 JL |
514 | extern int irq_domain_set_hwirq_and_chip(struct irq_domain *domain, |
515 | unsigned int virq, | |
516 | irq_hw_number_t hwirq, | |
45ec846c | 517 | const struct irq_chip *chip, |
f8264e34 | 518 | void *chip_data); |
f8264e34 JL |
519 | extern void irq_domain_free_irqs_common(struct irq_domain *domain, |
520 | unsigned int virq, | |
521 | unsigned int nr_irqs); | |
522 | extern void irq_domain_free_irqs_top(struct irq_domain *domain, | |
523 | unsigned int virq, unsigned int nr_irqs); | |
524 | ||
495c38d3 DD |
525 | extern int irq_domain_push_irq(struct irq_domain *domain, int virq, void *arg); |
526 | extern int irq_domain_pop_irq(struct irq_domain *domain, int virq); | |
527 | ||
36d72731 JL |
528 | extern int irq_domain_alloc_irqs_parent(struct irq_domain *domain, |
529 | unsigned int irq_base, | |
530 | unsigned int nr_irqs, void *arg); | |
f8264e34 | 531 | |
36d72731 JL |
532 | extern void irq_domain_free_irqs_parent(struct irq_domain *domain, |
533 | unsigned int irq_base, | |
534 | unsigned int nr_irqs); | |
f8264e34 | 535 | |
55567976 MZ |
536 | extern int irq_domain_disconnect_hierarchy(struct irq_domain *domain, |
537 | unsigned int virq); | |
538 | ||
f8264e34 JL |
539 | static inline bool irq_domain_is_hierarchy(struct irq_domain *domain) |
540 | { | |
541 | return domain->flags & IRQ_DOMAIN_FLAG_HIERARCHY; | |
542 | } | |
0abefbaa QY |
543 | |
544 | static inline bool irq_domain_is_ipi(struct irq_domain *domain) | |
545 | { | |
546 | return domain->flags & | |
547 | (IRQ_DOMAIN_FLAG_IPI_PER_CPU | IRQ_DOMAIN_FLAG_IPI_SINGLE); | |
548 | } | |
549 | ||
550 | static inline bool irq_domain_is_ipi_per_cpu(struct irq_domain *domain) | |
551 | { | |
552 | return domain->flags & IRQ_DOMAIN_FLAG_IPI_PER_CPU; | |
553 | } | |
554 | ||
555 | static inline bool irq_domain_is_ipi_single(struct irq_domain *domain) | |
556 | { | |
557 | return domain->flags & IRQ_DOMAIN_FLAG_IPI_SINGLE; | |
558 | } | |
631a9639 EA |
559 | |
560 | static inline bool irq_domain_is_msi(struct irq_domain *domain) | |
561 | { | |
562 | return domain->flags & IRQ_DOMAIN_FLAG_MSI; | |
563 | } | |
564 | ||
b749e6d3 TG |
565 | static inline bool irq_domain_is_msi_parent(struct irq_domain *domain) |
566 | { | |
567 | return domain->flags & IRQ_DOMAIN_FLAG_MSI_PARENT; | |
568 | } | |
569 | ||
e71c5d0b TG |
570 | static inline bool irq_domain_is_msi_device(struct irq_domain *domain) |
571 | { | |
572 | return domain->flags & IRQ_DOMAIN_FLAG_MSI_DEVICE; | |
573 | } | |
574 | ||
f8264e34 | 575 | #else /* CONFIG_IRQ_DOMAIN_HIERARCHY */ |
f8264e34 JL |
576 | static inline int irq_domain_alloc_irqs(struct irq_domain *domain, |
577 | unsigned int nr_irqs, int node, void *arg) | |
578 | { | |
579 | return -1; | |
580 | } | |
581 | ||
1e2a7d78 JH |
582 | static inline void irq_domain_free_irqs(unsigned int virq, |
583 | unsigned int nr_irqs) { } | |
584 | ||
f8264e34 JL |
585 | static inline bool irq_domain_is_hierarchy(struct irq_domain *domain) |
586 | { | |
587 | return false; | |
588 | } | |
0abefbaa QY |
589 | |
590 | static inline bool irq_domain_is_ipi(struct irq_domain *domain) | |
591 | { | |
592 | return false; | |
593 | } | |
594 | ||
595 | static inline bool irq_domain_is_ipi_per_cpu(struct irq_domain *domain) | |
596 | { | |
597 | return false; | |
598 | } | |
599 | ||
600 | static inline bool irq_domain_is_ipi_single(struct irq_domain *domain) | |
601 | { | |
602 | return false; | |
603 | } | |
631a9639 EA |
604 | |
605 | static inline bool irq_domain_is_msi(struct irq_domain *domain) | |
606 | { | |
607 | return false; | |
608 | } | |
609 | ||
b749e6d3 TG |
610 | static inline bool irq_domain_is_msi_parent(struct irq_domain *domain) |
611 | { | |
612 | return false; | |
613 | } | |
614 | ||
e71c5d0b TG |
615 | static inline bool irq_domain_is_msi_device(struct irq_domain *domain) |
616 | { | |
617 | return false; | |
618 | } | |
619 | ||
f8264e34 JL |
620 | #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ |
621 | ||
0ee1578b TG |
622 | #ifdef CONFIG_GENERIC_MSI_IRQ |
623 | int msi_device_domain_alloc_wired(struct irq_domain *domain, unsigned int hwirq, | |
624 | unsigned int type); | |
625 | void msi_device_domain_free_wired(struct irq_domain *domain, unsigned int virq); | |
626 | #else | |
627 | static inline int msi_device_domain_alloc_wired(struct irq_domain *domain, unsigned int hwirq, | |
628 | unsigned int type) | |
629 | { | |
630 | WARN_ON_ONCE(1); | |
631 | return -EINVAL; | |
632 | } | |
633 | static inline void msi_device_domain_free_wired(struct irq_domain *domain, unsigned int virq) | |
634 | { | |
635 | WARN_ON_ONCE(1); | |
636 | } | |
637 | #endif | |
638 | ||
d593f25f GL |
639 | #else /* CONFIG_IRQ_DOMAIN */ |
640 | static inline void irq_dispose_mapping(unsigned int virq) { } | |
471036b2 SS |
641 | static inline struct irq_domain *irq_find_matching_fwnode( |
642 | struct fwnode_handle *fwnode, enum irq_domain_bus_token bus_token) | |
643 | { | |
644 | return NULL; | |
645 | } | |
d593f25f | 646 | #endif /* !CONFIG_IRQ_DOMAIN */ |
7e713301 | 647 | |
08a543ad | 648 | #endif /* _LINUX_IRQDOMAIN_H */ |