Commit | Line | Data |
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06fcb0c6 IM |
1 | #ifndef _LINUX_IRQ_H |
2 | #define _LINUX_IRQ_H | |
1da177e4 LT |
3 | |
4 | /* | |
5 | * Please do not include this file in generic code. There is currently | |
6 | * no requirement for any architecture to implement anything held | |
7 | * within this file. | |
8 | * | |
9 | * Thanks. --rmk | |
10 | */ | |
11 | ||
23f9b317 | 12 | #include <linux/smp.h> |
1da177e4 | 13 | |
06fcb0c6 | 14 | #ifndef CONFIG_S390 |
1da177e4 LT |
15 | |
16 | #include <linux/linkage.h> | |
17 | #include <linux/cache.h> | |
18 | #include <linux/spinlock.h> | |
19 | #include <linux/cpumask.h> | |
908dcecd | 20 | #include <linux/irqreturn.h> |
1da177e4 LT |
21 | |
22 | #include <asm/irq.h> | |
23 | #include <asm/ptrace.h> | |
7d12e780 | 24 | #include <asm/irq_regs.h> |
1da177e4 | 25 | |
57a58a94 DH |
26 | struct irq_desc; |
27 | typedef void fastcall (*irq_flow_handler_t)(unsigned int irq, | |
7d12e780 | 28 | struct irq_desc *desc); |
57a58a94 DH |
29 | |
30 | ||
1da177e4 LT |
31 | /* |
32 | * IRQ line status. | |
6e213616 TG |
33 | * |
34 | * Bits 0-16 are reserved for the IRQF_* bits in linux/interrupt.h | |
35 | * | |
36 | * IRQ types | |
1da177e4 | 37 | */ |
6e213616 TG |
38 | #define IRQ_TYPE_NONE 0x00000000 /* Default, unspecified type */ |
39 | #define IRQ_TYPE_EDGE_RISING 0x00000001 /* Edge rising type */ | |
40 | #define IRQ_TYPE_EDGE_FALLING 0x00000002 /* Edge falling type */ | |
41 | #define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING) | |
42 | #define IRQ_TYPE_LEVEL_HIGH 0x00000004 /* Level high type */ | |
43 | #define IRQ_TYPE_LEVEL_LOW 0x00000008 /* Level low type */ | |
44 | #define IRQ_TYPE_SENSE_MASK 0x0000000f /* Mask of the above */ | |
45 | #define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */ | |
46 | ||
47 | /* Internal flags */ | |
48 | #define IRQ_INPROGRESS 0x00010000 /* IRQ handler active - do not enter! */ | |
49 | #define IRQ_DISABLED 0x00020000 /* IRQ disabled - do not enter! */ | |
50 | #define IRQ_PENDING 0x00040000 /* IRQ pending - replay on enable */ | |
51 | #define IRQ_REPLAY 0x00080000 /* IRQ has been replayed but not acked yet */ | |
52 | #define IRQ_AUTODETECT 0x00100000 /* IRQ is being autodetected */ | |
53 | #define IRQ_WAITING 0x00200000 /* IRQ not yet seen - for autodetection */ | |
54 | #define IRQ_LEVEL 0x00400000 /* IRQ level triggered */ | |
55 | #define IRQ_MASKED 0x00800000 /* IRQ masked - shouldn't be seen again */ | |
b8bdb460 | 56 | #define IRQ_PER_CPU 0x01000000 /* IRQ is per CPU */ |
0d7012a9 | 57 | #ifdef CONFIG_IRQ_PER_CPU |
f26fdd59 KW |
58 | # define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU) |
59 | #else | |
60 | # define CHECK_IRQ_PER_CPU(var) 0 | |
61 | #endif | |
1da177e4 | 62 | |
6e213616 TG |
63 | #define IRQ_NOPROBE 0x02000000 /* IRQ is not valid for probing */ |
64 | #define IRQ_NOREQUEST 0x04000000 /* IRQ cannot be requested */ | |
65 | #define IRQ_NOAUTOEN 0x08000000 /* IRQ will not be enabled on request irq */ | |
66 | #define IRQ_DELAYED_DISABLE 0x10000000 /* IRQ disable (masking) happens delayed. */ | |
15a647eb | 67 | #define IRQ_WAKEUP 0x20000000 /* IRQ triggers system wakeup */ |
a24ceab4 | 68 | #define IRQ_MOVE_PENDING 0x40000000 /* need to re-target IRQ destination */ |
6a6de9ef TG |
69 | |
70 | struct proc_dir_entry; | |
71 | ||
8fee5c36 | 72 | /** |
6a6de9ef | 73 | * struct irq_chip - hardware interrupt chip descriptor |
8fee5c36 IM |
74 | * |
75 | * @name: name for /proc/interrupts | |
76 | * @startup: start up the interrupt (defaults to ->enable if NULL) | |
77 | * @shutdown: shut down the interrupt (defaults to ->disable if NULL) | |
78 | * @enable: enable the interrupt (defaults to chip->unmask if NULL) | |
79 | * @disable: disable the interrupt (defaults to chip->mask if NULL) | |
8fee5c36 IM |
80 | * @ack: start of a new interrupt |
81 | * @mask: mask an interrupt source | |
82 | * @mask_ack: ack and mask an interrupt source | |
83 | * @unmask: unmask an interrupt source | |
47c2a3aa IM |
84 | * @eoi: end of interrupt - chip level |
85 | * @end: end of interrupt - flow level | |
8fee5c36 IM |
86 | * @set_affinity: set the CPU affinity on SMP machines |
87 | * @retrigger: resend an IRQ to the CPU | |
88 | * @set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ | |
89 | * @set_wake: enable/disable power-management wake-on of an IRQ | |
90 | * | |
91 | * @release: release function solely used by UML | |
6a6de9ef | 92 | * @typename: obsoleted by name, kept as migration helper |
1da177e4 | 93 | */ |
6a6de9ef TG |
94 | struct irq_chip { |
95 | const char *name; | |
71d218b7 IM |
96 | unsigned int (*startup)(unsigned int irq); |
97 | void (*shutdown)(unsigned int irq); | |
98 | void (*enable)(unsigned int irq); | |
99 | void (*disable)(unsigned int irq); | |
6a6de9ef | 100 | |
71d218b7 | 101 | void (*ack)(unsigned int irq); |
6a6de9ef TG |
102 | void (*mask)(unsigned int irq); |
103 | void (*mask_ack)(unsigned int irq); | |
104 | void (*unmask)(unsigned int irq); | |
47c2a3aa | 105 | void (*eoi)(unsigned int irq); |
6a6de9ef | 106 | |
71d218b7 IM |
107 | void (*end)(unsigned int irq); |
108 | void (*set_affinity)(unsigned int irq, cpumask_t dest); | |
c0ad90a3 | 109 | int (*retrigger)(unsigned int irq); |
6a6de9ef TG |
110 | int (*set_type)(unsigned int irq, unsigned int flow_type); |
111 | int (*set_wake)(unsigned int irq, unsigned int on); | |
c0ad90a3 | 112 | |
b77d6adc PBG |
113 | /* Currently used only by UML, might disappear one day.*/ |
114 | #ifdef CONFIG_IRQ_RELEASE_METHOD | |
71d218b7 | 115 | void (*release)(unsigned int irq, void *dev_id); |
b77d6adc | 116 | #endif |
6a6de9ef TG |
117 | /* |
118 | * For compatibility, ->typename is copied into ->name. | |
119 | * Will disappear. | |
120 | */ | |
121 | const char *typename; | |
1da177e4 LT |
122 | }; |
123 | ||
8fee5c36 IM |
124 | /** |
125 | * struct irq_desc - interrupt descriptor | |
126 | * | |
6a6de9ef TG |
127 | * @handle_irq: highlevel irq-events handler [if NULL, __do_IRQ()] |
128 | * @chip: low level interrupt hardware access | |
129 | * @handler_data: per-IRQ data for the irq_chip methods | |
130 | * @chip_data: platform-specific per-chip private data for the chip | |
131 | * methods, to allow shared chip implementations | |
8fee5c36 IM |
132 | * @action: the irq action chain |
133 | * @status: status information | |
134 | * @depth: disable-depth, for nested irq_disable() calls | |
15a647eb | 135 | * @wake_depth: enable depth, for multiple set_irq_wake() callers |
8fee5c36 IM |
136 | * @irq_count: stats field to detect stalled irqs |
137 | * @irqs_unhandled: stats field for spurious unhandled interrupts | |
138 | * @lock: locking for SMP | |
139 | * @affinity: IRQ affinity on SMP | |
6a6de9ef | 140 | * @cpu: cpu index useful for balancing |
8fee5c36 | 141 | * @pending_mask: pending rebalanced interrupts |
8fee5c36 IM |
142 | * @dir: /proc/irq/ procfs entry |
143 | * @affinity_entry: /proc/irq/smp_affinity procfs entry on SMP | |
1da177e4 LT |
144 | * |
145 | * Pad this out to 32 bytes for cache and indexing reasons. | |
146 | */ | |
34ffdb72 | 147 | struct irq_desc { |
57a58a94 | 148 | irq_flow_handler_t handle_irq; |
6a6de9ef TG |
149 | struct irq_chip *chip; |
150 | void *handler_data; | |
71d218b7 IM |
151 | void *chip_data; |
152 | struct irqaction *action; /* IRQ action list */ | |
153 | unsigned int status; /* IRQ status */ | |
6a6de9ef | 154 | |
71d218b7 | 155 | unsigned int depth; /* nested irq disables */ |
15a647eb | 156 | unsigned int wake_depth; /* nested wake enables */ |
71d218b7 IM |
157 | unsigned int irq_count; /* For detecting broken IRQs */ |
158 | unsigned int irqs_unhandled; | |
159 | spinlock_t lock; | |
a53da52f | 160 | #ifdef CONFIG_SMP |
71d218b7 | 161 | cpumask_t affinity; |
6a6de9ef | 162 | unsigned int cpu; |
a53da52f | 163 | #endif |
06fcb0c6 | 164 | #if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE) |
cd916d31 | 165 | cpumask_t pending_mask; |
54d5d424 | 166 | #endif |
4a733ee1 IM |
167 | #ifdef CONFIG_PROC_FS |
168 | struct proc_dir_entry *dir; | |
169 | #endif | |
34ffdb72 | 170 | } ____cacheline_aligned; |
1da177e4 | 171 | |
34ffdb72 | 172 | extern struct irq_desc irq_desc[NR_IRQS]; |
1da177e4 | 173 | |
34ffdb72 IM |
174 | /* |
175 | * Migration helpers for obsolete names, they will go away: | |
176 | */ | |
6a6de9ef TG |
177 | #define hw_interrupt_type irq_chip |
178 | typedef struct irq_chip hw_irq_controller; | |
179 | #define no_irq_type no_irq_chip | |
34ffdb72 IM |
180 | typedef struct irq_desc irq_desc_t; |
181 | ||
182 | /* | |
183 | * Pick up the arch-dependent methods: | |
184 | */ | |
185 | #include <asm/hw_irq.h> | |
1da177e4 | 186 | |
06fcb0c6 | 187 | extern int setup_irq(unsigned int irq, struct irqaction *new); |
1da177e4 LT |
188 | |
189 | #ifdef CONFIG_GENERIC_HARDIRQS | |
06fcb0c6 | 190 | |
d061daa0 TG |
191 | #ifndef handle_dynamic_tick |
192 | # define handle_dynamic_tick(a) do { } while (0) | |
193 | #endif | |
194 | ||
54d5d424 AR |
195 | #ifdef CONFIG_SMP |
196 | static inline void set_native_irq_info(int irq, cpumask_t mask) | |
197 | { | |
a53da52f | 198 | irq_desc[irq].affinity = mask; |
54d5d424 AR |
199 | } |
200 | #else | |
201 | static inline void set_native_irq_info(int irq, cpumask_t mask) | |
202 | { | |
203 | } | |
204 | #endif | |
205 | ||
206 | #ifdef CONFIG_SMP | |
207 | ||
06fcb0c6 | 208 | #if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE) |
54d5d424 | 209 | |
c777ac55 AM |
210 | void set_pending_irq(unsigned int irq, cpumask_t mask); |
211 | void move_native_irq(int irq); | |
e7b946e9 | 212 | void move_masked_irq(int irq); |
54d5d424 | 213 | |
06fcb0c6 IM |
214 | #else /* CONFIG_GENERIC_PENDING_IRQ || CONFIG_IRQBALANCE */ |
215 | ||
216 | static inline void move_irq(int irq) | |
217 | { | |
218 | } | |
219 | ||
220 | static inline void move_native_irq(int irq) | |
221 | { | |
222 | } | |
223 | ||
e7b946e9 EB |
224 | static inline void move_masked_irq(int irq) |
225 | { | |
226 | } | |
227 | ||
06fcb0c6 IM |
228 | static inline void set_pending_irq(unsigned int irq, cpumask_t mask) |
229 | { | |
230 | } | |
54d5d424 | 231 | |
06fcb0c6 | 232 | #endif /* CONFIG_GENERIC_PENDING_IRQ */ |
54d5d424 | 233 | |
06fcb0c6 | 234 | #else /* CONFIG_SMP */ |
54d5d424 | 235 | |
54d5d424 | 236 | #define move_native_irq(x) |
e7b946e9 | 237 | #define move_masked_irq(x) |
54d5d424 | 238 | |
06fcb0c6 | 239 | #endif /* CONFIG_SMP */ |
54d5d424 | 240 | |
1b61b910 ZY |
241 | #ifdef CONFIG_IRQBALANCE |
242 | extern void set_balance_irq_affinity(unsigned int irq, cpumask_t mask); | |
243 | #else | |
244 | static inline void set_balance_irq_affinity(unsigned int irq, cpumask_t mask) | |
245 | { | |
246 | } | |
247 | #endif | |
248 | ||
71d218b7 IM |
249 | #ifdef CONFIG_AUTO_IRQ_AFFINITY |
250 | extern int select_smp_affinity(unsigned int irq); | |
251 | #else | |
252 | static inline int select_smp_affinity(unsigned int irq) | |
253 | { | |
254 | return 1; | |
255 | } | |
256 | #endif | |
257 | ||
1da177e4 | 258 | extern int no_irq_affinity; |
1da177e4 | 259 | |
6a6de9ef | 260 | /* Handle irq action chains: */ |
7d12e780 | 261 | extern int handle_IRQ_event(unsigned int irq, struct irqaction *action); |
6a6de9ef TG |
262 | |
263 | /* | |
264 | * Built-in IRQ handlers for various IRQ types, | |
265 | * callable via desc->chip->handle_irq() | |
266 | */ | |
7d12e780 DH |
267 | extern void fastcall handle_level_irq(unsigned int irq, struct irq_desc *desc); |
268 | extern void fastcall handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc); | |
269 | extern void fastcall handle_edge_irq(unsigned int irq, struct irq_desc *desc); | |
270 | extern void fastcall handle_simple_irq(unsigned int irq, struct irq_desc *desc); | |
271 | extern void fastcall handle_percpu_irq(unsigned int irq, struct irq_desc *desc); | |
272 | extern void fastcall handle_bad_irq(unsigned int irq, struct irq_desc *desc); | |
6a6de9ef TG |
273 | |
274 | /* | |
275 | * Get a descriptive string for the highlevel handler, for | |
276 | * /proc/interrupts output: | |
277 | */ | |
57a58a94 | 278 | extern const char *handle_irq_name(irq_flow_handler_t handle); |
6a6de9ef | 279 | |
2e60bbb6 | 280 | /* |
6a6de9ef TG |
281 | * Monolithic do_IRQ implementation. |
282 | * (is an explicit fastcall, because i386 4KSTACKS calls it from assembly) | |
2e60bbb6 | 283 | */ |
af8c65b5 | 284 | #ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ |
7d12e780 | 285 | extern fastcall unsigned int __do_IRQ(unsigned int irq); |
af8c65b5 | 286 | #endif |
2e60bbb6 | 287 | |
dae86204 IM |
288 | /* |
289 | * Architectures call this to let the generic IRQ layer | |
290 | * handle an interrupt. If the descriptor is attached to an | |
291 | * irqchip-style controller then we call the ->handle_irq() handler, | |
292 | * and it calls __do_IRQ() if it's attached to an irqtype-style controller. | |
293 | */ | |
7d12e780 | 294 | static inline void generic_handle_irq(unsigned int irq) |
dae86204 IM |
295 | { |
296 | struct irq_desc *desc = irq_desc + irq; | |
297 | ||
af8c65b5 | 298 | #ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ |
7d12e780 | 299 | desc->handle_irq(irq, desc); |
af8c65b5 | 300 | #else |
dae86204 | 301 | if (likely(desc->handle_irq)) |
7d12e780 | 302 | desc->handle_irq(irq, desc); |
dae86204 | 303 | else |
7d12e780 | 304 | __do_IRQ(irq); |
af8c65b5 | 305 | #endif |
dae86204 IM |
306 | } |
307 | ||
6a6de9ef | 308 | /* Handling of unhandled and spurious interrupts: */ |
34ffdb72 | 309 | extern void note_interrupt(unsigned int irq, struct irq_desc *desc, |
7d12e780 | 310 | int action_ret); |
1da177e4 | 311 | |
a4633adc TG |
312 | /* Resending of interrupts :*/ |
313 | void check_irq_resend(struct irq_desc *desc, unsigned int irq); | |
314 | ||
6a6de9ef | 315 | /* Initialize /proc/irq/ */ |
1da177e4 | 316 | extern void init_irq_proc(void); |
eee45269 | 317 | |
6a6de9ef TG |
318 | /* Enable/disable irq debugging output: */ |
319 | extern int noirqdebug_setup(char *str); | |
320 | ||
321 | /* Checks whether the interrupt can be requested by request_irq(): */ | |
322 | extern int can_request_irq(unsigned int irq, unsigned long irqflags); | |
323 | ||
f8b5473f | 324 | /* Dummy irq-chip implementations: */ |
6a6de9ef | 325 | extern struct irq_chip no_irq_chip; |
f8b5473f | 326 | extern struct irq_chip dummy_irq_chip; |
6a6de9ef TG |
327 | |
328 | extern void | |
329 | set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip, | |
57a58a94 | 330 | irq_flow_handler_t handle); |
6a6de9ef | 331 | extern void |
57a58a94 | 332 | __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained); |
1da177e4 | 333 | |
6a6de9ef TG |
334 | /* |
335 | * Set a highlevel flow handler for a given IRQ: | |
336 | */ | |
337 | static inline void | |
57a58a94 | 338 | set_irq_handler(unsigned int irq, irq_flow_handler_t handle) |
6a6de9ef TG |
339 | { |
340 | __set_irq_handler(irq, handle, 0); | |
341 | } | |
342 | ||
343 | /* | |
344 | * Set a highlevel chained flow handler for a given IRQ. | |
345 | * (a chained handler is automatically enabled and set to | |
346 | * IRQ_NOREQUEST and IRQ_NOPROBE) | |
347 | */ | |
348 | static inline void | |
349 | set_irq_chained_handler(unsigned int irq, | |
57a58a94 | 350 | irq_flow_handler_t handle) |
6a6de9ef TG |
351 | { |
352 | __set_irq_handler(irq, handle, 1); | |
353 | } | |
354 | ||
3a16d713 EB |
355 | /* Handle dynamic irq creation and destruction */ |
356 | extern int create_irq(void); | |
357 | extern void destroy_irq(unsigned int irq); | |
358 | ||
1f80025e EB |
359 | /* Test to see if a driver has successfully requested an irq */ |
360 | static inline int irq_has_action(unsigned int irq) | |
361 | { | |
362 | struct irq_desc *desc = irq_desc + irq; | |
363 | return desc->action != NULL; | |
364 | } | |
365 | ||
3a16d713 EB |
366 | /* Dynamic irq helper functions */ |
367 | extern void dynamic_irq_init(unsigned int irq); | |
368 | extern void dynamic_irq_cleanup(unsigned int irq); | |
dd87eb3a | 369 | |
3a16d713 | 370 | /* Set/get chip/data for an IRQ: */ |
dd87eb3a TG |
371 | extern int set_irq_chip(unsigned int irq, struct irq_chip *chip); |
372 | extern int set_irq_data(unsigned int irq, void *data); | |
373 | extern int set_irq_chip_data(unsigned int irq, void *data); | |
374 | extern int set_irq_type(unsigned int irq, unsigned int type); | |
375 | ||
376 | #define get_irq_chip(irq) (irq_desc[irq].chip) | |
377 | #define get_irq_chip_data(irq) (irq_desc[irq].chip_data) | |
378 | #define get_irq_data(irq) (irq_desc[irq].handler_data) | |
379 | ||
6a6de9ef | 380 | #endif /* CONFIG_GENERIC_HARDIRQS */ |
1da177e4 | 381 | |
06fcb0c6 | 382 | #endif /* !CONFIG_S390 */ |
1da177e4 | 383 | |
06fcb0c6 | 384 | #endif /* _LINUX_IRQ_H */ |