iommu: Remember when default domain type was set on kernel command line
[linux-block.git] / include / linux / iommu.h
CommitLineData
45051539 1/* SPDX-License-Identifier: GPL-2.0-only */
4a77a6cf
JR
2/*
3 * Copyright (C) 2007-2008 Advanced Micro Devices, Inc.
4 * Author: Joerg Roedel <joerg.roedel@amd.com>
4a77a6cf
JR
5 */
6
7#ifndef __LINUX_IOMMU_H
8#define __LINUX_IOMMU_H
9
e8245c1b
JR
10#include <linux/scatterlist.h>
11#include <linux/device.h>
12#include <linux/types.h>
74315ccc 13#include <linux/errno.h>
9a08d376 14#include <linux/err.h>
d0f60a44 15#include <linux/of.h>
4e32348b 16#include <uapi/linux/iommu.h>
74315ccc 17
ca13bb3d
WD
18#define IOMMU_READ (1 << 0)
19#define IOMMU_WRITE (1 << 1)
20#define IOMMU_CACHE (1 << 2) /* DMA cache coherency */
a720b41c 21#define IOMMU_NOEXEC (1 << 3)
31e6850e 22#define IOMMU_MMIO (1 << 4) /* e.g. things like MSI doorbells */
579b2a65 23/*
adf5e516
RM
24 * Where the bus hardware includes a privilege level as part of its access type
25 * markings, and certain devices are capable of issuing transactions marked as
26 * either 'supervisor' or 'user', the IOMMU_PRIV flag requests that the other
27 * given permission flags only apply to accesses at the higher privilege level,
28 * and that unprivileged transactions should have as little access as possible.
29 * This would usually imply the same permissions as kernel mappings on the CPU,
30 * if the IOMMU page table format is equivalent.
579b2a65
MH
31 */
32#define IOMMU_PRIV (1 << 5)
90ec7a76
VG
33/*
34 * Non-coherent masters on few Qualcomm SoCs can use this page protection flag
35 * to set correct cacheability attributes to use an outer level of cache -
36 * last level cache, aka system cache.
37 */
38#define IOMMU_QCOM_SYS_CACHE (1 << 6)
4a77a6cf 39
905d66c1 40struct iommu_ops;
d72e31c9 41struct iommu_group;
ff21776d 42struct bus_type;
4a77a6cf 43struct device;
4f3f8d9d 44struct iommu_domain;
ba1eabfa 45struct notifier_block;
26b25a2b 46struct iommu_sva;
4e32348b 47struct iommu_fault_event;
4f3f8d9d
OBC
48
49/* iommu fault flags */
50#define IOMMU_FAULT_READ 0x0
51#define IOMMU_FAULT_WRITE 0x1
52
53typedef int (*iommu_fault_handler_t)(struct iommu_domain *,
77ca2332 54 struct device *, unsigned long, int, void *);
26b25a2b
JPB
55typedef int (*iommu_mm_exit_handler_t)(struct device *dev, struct iommu_sva *,
56 void *);
4e32348b 57typedef int (*iommu_dev_fault_handler_t)(struct iommu_fault *, void *);
4a77a6cf 58
0ff64f80
JR
59struct iommu_domain_geometry {
60 dma_addr_t aperture_start; /* First address that can be mapped */
61 dma_addr_t aperture_end; /* Last address that can be mapped */
62 bool force_aperture; /* DMA only allowed in mappable range? */
63};
64
8539c7c1
JR
65/* Domain feature flags */
66#define __IOMMU_DOMAIN_PAGING (1U << 0) /* Support for iommu_map/unmap */
67#define __IOMMU_DOMAIN_DMA_API (1U << 1) /* Domain for use in DMA-API
68 implementation */
69#define __IOMMU_DOMAIN_PT (1U << 2) /* Domain is identity mapped */
70
71/*
72 * This are the possible domain-types
73 *
74 * IOMMU_DOMAIN_BLOCKED - All DMA is blocked, can be used to isolate
75 * devices
76 * IOMMU_DOMAIN_IDENTITY - DMA addresses are system physical addresses
77 * IOMMU_DOMAIN_UNMANAGED - DMA mappings managed by IOMMU-API user, used
78 * for VMs
79 * IOMMU_DOMAIN_DMA - Internally used for DMA-API implementations.
80 * This flag allows IOMMU drivers to implement
81 * certain optimizations for these domains
82 */
83#define IOMMU_DOMAIN_BLOCKED (0U)
84#define IOMMU_DOMAIN_IDENTITY (__IOMMU_DOMAIN_PT)
85#define IOMMU_DOMAIN_UNMANAGED (__IOMMU_DOMAIN_PAGING)
86#define IOMMU_DOMAIN_DMA (__IOMMU_DOMAIN_PAGING | \
87 __IOMMU_DOMAIN_DMA_API)
88
4a77a6cf 89struct iommu_domain {
8539c7c1 90 unsigned type;
b22f6434 91 const struct iommu_ops *ops;
d16e0faa 92 unsigned long pgsize_bitmap; /* Bitmap of page sizes in use */
4f3f8d9d 93 iommu_fault_handler_t handler;
77ca2332 94 void *handler_token;
0ff64f80 95 struct iommu_domain_geometry geometry;
0db2e5d1 96 void *iova_cookie;
4a77a6cf
JR
97};
98
1aed0748
JR
99enum iommu_cap {
100 IOMMU_CAP_CACHE_COHERENCY, /* IOMMU can enforce cache coherent DMA
101 transactions */
102 IOMMU_CAP_INTR_REMAP, /* IOMMU supports interrupt isolation */
c4986649 103 IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */
1aed0748 104};
dbb9fd86 105
7cabf491
VS
106/*
107 * Following constraints are specifc to FSL_PAMUV1:
108 * -aperture must be power of 2, and naturally aligned
109 * -number of windows must be power of 2, and address space size
110 * of each window is determined by aperture size / # of windows
111 * -the actual size of the mapped region of a window must be power
112 * of 2 starting with 4KB and physical address must be naturally
113 * aligned.
114 * DOMAIN_ATTR_FSL_PAMUV1 corresponds to the above mentioned contraints.
115 * The caller can invoke iommu_domain_get_attr to check if the underlying
116 * iommu implementation supports these constraints.
117 */
118
0cd76dd1 119enum iommu_attr {
0ff64f80 120 DOMAIN_ATTR_GEOMETRY,
d2e12160 121 DOMAIN_ATTR_PAGING,
69356712 122 DOMAIN_ATTR_WINDOWS,
7cabf491
VS
123 DOMAIN_ATTR_FSL_PAMU_STASH,
124 DOMAIN_ATTR_FSL_PAMU_ENABLE,
125 DOMAIN_ATTR_FSL_PAMUV1,
c02607aa 126 DOMAIN_ATTR_NESTING, /* two stages of translation */
2da274cd 127 DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE,
a8b8a88a 128 DOMAIN_ATTR_MAX,
0cd76dd1
JR
129};
130
d30ddcaa 131/* These are the possible reserved region types */
9d3a4de4
RM
132enum iommu_resv_type {
133 /* Memory regions which must be mapped 1:1 at all times */
134 IOMMU_RESV_DIRECT,
adfd3738
EA
135 /*
136 * Memory regions which are advertised to be 1:1 but are
137 * commonly considered relaxable in some conditions,
138 * for instance in device assignment use case (USB, Graphics)
139 */
140 IOMMU_RESV_DIRECT_RELAXABLE,
9d3a4de4
RM
141 /* Arbitrary "never map this or give it to a device" address ranges */
142 IOMMU_RESV_RESERVED,
143 /* Hardware MSI region (untranslated) */
144 IOMMU_RESV_MSI,
145 /* Software-managed MSI translation window */
146 IOMMU_RESV_SW_MSI,
147};
d30ddcaa 148
a1015c2b 149/**
e5b5234a 150 * struct iommu_resv_region - descriptor for a reserved memory region
a1015c2b
JR
151 * @list: Linked list pointers
152 * @start: System physical start address of the region
153 * @length: Length of the region in bytes
154 * @prot: IOMMU Protection flags (READ/WRITE/...)
d30ddcaa 155 * @type: Type of the reserved region
a1015c2b 156 */
e5b5234a 157struct iommu_resv_region {
a1015c2b
JR
158 struct list_head list;
159 phys_addr_t start;
160 size_t length;
161 int prot;
9d3a4de4 162 enum iommu_resv_type type;
a1015c2b
JR
163};
164
a3a19592
LB
165/* Per device IOMMU features */
166enum iommu_dev_features {
167 IOMMU_DEV_FEAT_AUX, /* Aux-domain feature */
26b25a2b
JPB
168 IOMMU_DEV_FEAT_SVA, /* Shared Virtual Addresses */
169};
170
171#define IOMMU_PASID_INVALID (-1U)
172
173/**
174 * struct iommu_sva_ops - device driver callbacks for an SVA context
175 *
176 * @mm_exit: called when the mm is about to be torn down by exit_mmap. After
177 * @mm_exit returns, the device must not issue any more transaction
178 * with the PASID given as argument.
179 *
180 * The @mm_exit handler is allowed to sleep. Be careful about the
181 * locks taken in @mm_exit, because they might lead to deadlocks if
182 * they are also held when dropping references to the mm. Consider the
183 * following call chain:
184 * mutex_lock(A); mmput(mm) -> exit_mm() -> @mm_exit() -> mutex_lock(A)
185 * Using mmput_async() prevents this scenario.
186 *
187 */
188struct iommu_sva_ops {
189 iommu_mm_exit_handler_t mm_exit;
a3a19592
LB
190};
191
39d4ebb9
JR
192#ifdef CONFIG_IOMMU_API
193
a7d20dc1
WD
194/**
195 * struct iommu_iotlb_gather - Range information for a pending IOTLB flush
196 *
197 * @start: IOVA representing the start of the range to be flushed
198 * @end: IOVA representing the end of the range to be flushed (exclusive)
199 * @pgsize: The interval at which to perform the flush
200 *
201 * This structure is intended to be updated by multiple calls to the
202 * ->unmap() function in struct iommu_ops before eventually being passed
203 * into ->iotlb_sync().
204 */
205struct iommu_iotlb_gather {
206 unsigned long start;
207 unsigned long end;
208 size_t pgsize;
209};
210
7d3002cc
OBC
211/**
212 * struct iommu_ops - iommu ops and capabilities
0d9bacb6
MD
213 * @capable: check capability
214 * @domain_alloc: allocate iommu domain
215 * @domain_free: free iommu domain
7d3002cc
OBC
216 * @attach_dev: attach device to an iommu domain
217 * @detach_dev: detach device from an iommu domain
218 * @map: map a physically contiguous memory region to an iommu domain
219 * @unmap: unmap a physically contiguous memory region from an iommu domain
db04d4a3 220 * @flush_iotlb_all: Synchronously flush all hardware TLBs for this domain
2405bc16 221 * @iotlb_sync_map: Sync mappings created recently using @map to the hardware
51eb7809 222 * @iotlb_sync: Flush all queued ranges from the hardware TLBs and empty flush
add02cfd 223 * queue
7d3002cc 224 * @iova_to_phys: translate iova to physical address
d72e31c9
AW
225 * @add_device: add device to iommu grouping
226 * @remove_device: remove device from iommu grouping
0d9bacb6 227 * @device_group: find iommu group for a particular device
0cd76dd1
JR
228 * @domain_get_attr: Query domain attributes
229 * @domain_set_attr: Change domain attributes
e5b5234a
EA
230 * @get_resv_regions: Request list of reserved regions for a device
231 * @put_resv_regions: Free list of reserved regions for a device
232 * @apply_resv_region: Temporary helper call-back for iova reserved ranges
0d9bacb6
MD
233 * @domain_window_enable: Configure and enable a particular window for a domain
234 * @domain_window_disable: Disable a particular window for a domain
d0f60a44 235 * @of_xlate: add OF master IDs to iommu grouping
a7055d57
GU
236 * @is_attach_deferred: Check if domain attach should be deferred from iommu
237 * driver init to device driver init (default no)
a3a19592
LB
238 * @dev_has/enable/disable_feat: per device entries to check/enable/disable
239 * iommu specific features.
240 * @dev_feat_enabled: check enabled feature
241 * @aux_attach/detach_dev: aux-domain specific attach/detach entries.
242 * @aux_get_pasid: get the pasid given an aux-domain
26b25a2b
JPB
243 * @sva_bind: Bind process address space to device
244 * @sva_unbind: Unbind process address space from device
245 * @sva_get_pasid: Get PASID associated to a SVA handle
bf3255b3 246 * @page_response: handle page request response
d16e0faa 247 * @pgsize_bitmap: bitmap of all possible supported page sizes
7d3002cc 248 */
4a77a6cf 249struct iommu_ops {
3c0e0ca0 250 bool (*capable)(enum iommu_cap);
938c4709
JR
251
252 /* Domain allocation and freeing by the iommu driver */
8539c7c1 253 struct iommu_domain *(*domain_alloc)(unsigned iommu_domain_type);
938c4709
JR
254 void (*domain_free)(struct iommu_domain *);
255
4a77a6cf
JR
256 int (*attach_dev)(struct iommu_domain *domain, struct device *dev);
257 void (*detach_dev)(struct iommu_domain *domain, struct device *dev);
67651786 258 int (*map)(struct iommu_domain *domain, unsigned long iova,
5009065d
OBC
259 phys_addr_t paddr, size_t size, int prot);
260 size_t (*unmap)(struct iommu_domain *domain, unsigned long iova,
56f8af5e 261 size_t size, struct iommu_iotlb_gather *iotlb_gather);
add02cfd 262 void (*flush_iotlb_all)(struct iommu_domain *domain);
1d7ae53b 263 void (*iotlb_sync_map)(struct iommu_domain *domain);
56f8af5e
WD
264 void (*iotlb_sync)(struct iommu_domain *domain,
265 struct iommu_iotlb_gather *iotlb_gather);
bb5547ac 266 phys_addr_t (*iova_to_phys)(struct iommu_domain *domain, dma_addr_t iova);
d72e31c9
AW
267 int (*add_device)(struct device *dev);
268 void (*remove_device)(struct device *dev);
46c6b2bc 269 struct iommu_group *(*device_group)(struct device *dev);
0cd76dd1
JR
270 int (*domain_get_attr)(struct iommu_domain *domain,
271 enum iommu_attr attr, void *data);
272 int (*domain_set_attr)(struct iommu_domain *domain,
273 enum iommu_attr attr, void *data);
d7787d57 274
e5b5234a
EA
275 /* Request/Free a list of reserved regions for a device */
276 void (*get_resv_regions)(struct device *dev, struct list_head *list);
277 void (*put_resv_regions)(struct device *dev, struct list_head *list);
278 void (*apply_resv_region)(struct device *dev,
279 struct iommu_domain *domain,
280 struct iommu_resv_region *region);
a1015c2b 281
d7787d57
JR
282 /* Window handling functions */
283 int (*domain_window_enable)(struct iommu_domain *domain, u32 wnd_nr,
80f97f0f 284 phys_addr_t paddr, u64 size, int prot);
d7787d57
JR
285 void (*domain_window_disable)(struct iommu_domain *domain, u32 wnd_nr);
286
d0f60a44 287 int (*of_xlate)(struct device *dev, struct of_phandle_args *args);
e01d1913 288 bool (*is_attach_deferred)(struct iommu_domain *domain, struct device *dev);
d0f60a44 289
a3a19592
LB
290 /* Per device IOMMU features */
291 bool (*dev_has_feat)(struct device *dev, enum iommu_dev_features f);
292 bool (*dev_feat_enabled)(struct device *dev, enum iommu_dev_features f);
293 int (*dev_enable_feat)(struct device *dev, enum iommu_dev_features f);
294 int (*dev_disable_feat)(struct device *dev, enum iommu_dev_features f);
295
296 /* Aux-domain specific attach/detach entries */
297 int (*aux_attach_dev)(struct iommu_domain *domain, struct device *dev);
298 void (*aux_detach_dev)(struct iommu_domain *domain, struct device *dev);
299 int (*aux_get_pasid)(struct iommu_domain *domain, struct device *dev);
300
26b25a2b
JPB
301 struct iommu_sva *(*sva_bind)(struct device *dev, struct mm_struct *mm,
302 void *drvdata);
303 void (*sva_unbind)(struct iommu_sva *handle);
304 int (*sva_get_pasid)(struct iommu_sva *handle);
305
bf3255b3
JPB
306 int (*page_response)(struct device *dev,
307 struct iommu_fault_event *evt,
308 struct iommu_page_response *msg);
309
7d3002cc 310 unsigned long pgsize_bitmap;
4a77a6cf
JR
311};
312
b0119e87
JR
313/**
314 * struct iommu_device - IOMMU core representation of one IOMMU hardware
315 * instance
316 * @list: Used by the iommu-core to keep a list of registered iommus
317 * @ops: iommu-ops for talking to this iommu
39ab9555 318 * @dev: struct device for sysfs handling
b0119e87
JR
319 */
320struct iommu_device {
321 struct list_head list;
322 const struct iommu_ops *ops;
c73e1ac8 323 struct fwnode_handle *fwnode;
2926a2aa 324 struct device *dev;
b0119e87
JR
325};
326
4e32348b
JP
327/**
328 * struct iommu_fault_event - Generic fault event
329 *
330 * Can represent recoverable faults such as a page requests or
331 * unrecoverable faults such as DMA or IRQ remapping faults.
332 *
333 * @fault: fault descriptor
bf3255b3 334 * @list: pending fault event list, used for tracking responses
4e32348b
JP
335 */
336struct iommu_fault_event {
337 struct iommu_fault fault;
bf3255b3 338 struct list_head list;
4e32348b
JP
339};
340
341/**
342 * struct iommu_fault_param - per-device IOMMU fault data
343 * @handler: Callback function to handle IOMMU faults at device level
344 * @data: handler private data
bf3255b3
JPB
345 * @faults: holds the pending faults which needs response
346 * @lock: protect pending faults list
4e32348b
JP
347 */
348struct iommu_fault_param {
349 iommu_dev_fault_handler_t handler;
350 void *data;
bf3255b3
JPB
351 struct list_head faults;
352 struct mutex lock;
4e32348b
JP
353};
354
355/**
356 * struct iommu_param - collection of per-device IOMMU data
357 *
358 * @fault_param: IOMMU detected device fault reporting data
359 *
360 * TODO: migrate other per device data pointers under iommu_dev_data, e.g.
361 * struct iommu_group *iommu_group;
362 * struct iommu_fwspec *iommu_fwspec;
363 */
364struct iommu_param {
0c830e6b 365 struct mutex lock;
4e32348b
JP
366 struct iommu_fault_param *fault_param;
367};
368
b0119e87
JR
369int iommu_device_register(struct iommu_device *iommu);
370void iommu_device_unregister(struct iommu_device *iommu);
39ab9555
JR
371int iommu_device_sysfs_add(struct iommu_device *iommu,
372 struct device *parent,
373 const struct attribute_group **groups,
374 const char *fmt, ...) __printf(4, 5);
375void iommu_device_sysfs_remove(struct iommu_device *iommu);
e3d10af1
JR
376int iommu_device_link(struct iommu_device *iommu, struct device *link);
377void iommu_device_unlink(struct iommu_device *iommu, struct device *link);
b0119e87
JR
378
379static inline void iommu_device_set_ops(struct iommu_device *iommu,
380 const struct iommu_ops *ops)
381{
382 iommu->ops = ops;
383}
384
c73e1ac8
JR
385static inline void iommu_device_set_fwnode(struct iommu_device *iommu,
386 struct fwnode_handle *fwnode)
387{
388 iommu->fwnode = fwnode;
389}
390
2926a2aa
JR
391static inline struct iommu_device *dev_to_iommu_device(struct device *dev)
392{
393 return (struct iommu_device *)dev_get_drvdata(dev);
394}
395
a7d20dc1
WD
396static inline void iommu_iotlb_gather_init(struct iommu_iotlb_gather *gather)
397{
398 *gather = (struct iommu_iotlb_gather) {
399 .start = ULONG_MAX,
400 };
401}
402
d72e31c9
AW
403#define IOMMU_GROUP_NOTIFY_ADD_DEVICE 1 /* Device added */
404#define IOMMU_GROUP_NOTIFY_DEL_DEVICE 2 /* Pre Device removed */
405#define IOMMU_GROUP_NOTIFY_BIND_DRIVER 3 /* Pre Driver bind */
406#define IOMMU_GROUP_NOTIFY_BOUND_DRIVER 4 /* Post Driver bind */
407#define IOMMU_GROUP_NOTIFY_UNBIND_DRIVER 5 /* Pre Driver unbind */
408#define IOMMU_GROUP_NOTIFY_UNBOUND_DRIVER 6 /* Post Driver unbind */
409
b22f6434 410extern int bus_set_iommu(struct bus_type *bus, const struct iommu_ops *ops);
a1b60c1c 411extern bool iommu_present(struct bus_type *bus);
3c0e0ca0 412extern bool iommu_capable(struct bus_type *bus, enum iommu_cap cap);
905d66c1 413extern struct iommu_domain *iommu_domain_alloc(struct bus_type *bus);
aa16bea9 414extern struct iommu_group *iommu_group_get_by_id(int id);
4a77a6cf
JR
415extern void iommu_domain_free(struct iommu_domain *domain);
416extern int iommu_attach_device(struct iommu_domain *domain,
417 struct device *dev);
418extern void iommu_detach_device(struct iommu_domain *domain,
419 struct device *dev);
2c1296d9 420extern struct iommu_domain *iommu_get_domain_for_dev(struct device *dev);
6af588fe 421extern struct iommu_domain *iommu_get_dma_domain(struct device *dev);
cefc53c7 422extern int iommu_map(struct iommu_domain *domain, unsigned long iova,
7d3002cc
OBC
423 phys_addr_t paddr, size_t size, int prot);
424extern size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova,
add02cfd
JR
425 size_t size);
426extern size_t iommu_unmap_fast(struct iommu_domain *domain,
a7d20dc1
WD
427 unsigned long iova, size_t size,
428 struct iommu_iotlb_gather *iotlb_gather);
d88e61fa
CH
429extern size_t iommu_map_sg(struct iommu_domain *domain, unsigned long iova,
430 struct scatterlist *sg,unsigned int nents, int prot);
bb5547ac 431extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova);
4f3f8d9d 432extern void iommu_set_fault_handler(struct iommu_domain *domain,
77ca2332 433 iommu_fault_handler_t handler, void *token);
d72e31c9 434
e5b5234a
EA
435extern void iommu_get_resv_regions(struct device *dev, struct list_head *list);
436extern void iommu_put_resv_regions(struct device *dev, struct list_head *list);
d290f1e7 437extern int iommu_request_dm_for_dev(struct device *dev);
7423e017 438extern int iommu_request_dma_domain_for_dev(struct device *dev);
2b20cbba 439extern struct iommu_resv_region *
9d3a4de4
RM
440iommu_alloc_resv_region(phys_addr_t start, size_t length, int prot,
441 enum iommu_resv_type type);
6c65fb31
EA
442extern int iommu_get_group_resv_regions(struct iommu_group *group,
443 struct list_head *head);
a1015c2b 444
d72e31c9
AW
445extern int iommu_attach_group(struct iommu_domain *domain,
446 struct iommu_group *group);
447extern void iommu_detach_group(struct iommu_domain *domain,
448 struct iommu_group *group);
449extern struct iommu_group *iommu_group_alloc(void);
450extern void *iommu_group_get_iommudata(struct iommu_group *group);
451extern void iommu_group_set_iommudata(struct iommu_group *group,
452 void *iommu_data,
453 void (*release)(void *iommu_data));
454extern int iommu_group_set_name(struct iommu_group *group, const char *name);
455extern int iommu_group_add_device(struct iommu_group *group,
456 struct device *dev);
457extern void iommu_group_remove_device(struct device *dev);
458extern int iommu_group_for_each_dev(struct iommu_group *group, void *data,
459 int (*fn)(struct device *, void *));
460extern struct iommu_group *iommu_group_get(struct device *dev);
13f59a78 461extern struct iommu_group *iommu_group_ref_get(struct iommu_group *group);
d72e31c9
AW
462extern void iommu_group_put(struct iommu_group *group);
463extern int iommu_group_register_notifier(struct iommu_group *group,
464 struct notifier_block *nb);
465extern int iommu_group_unregister_notifier(struct iommu_group *group,
466 struct notifier_block *nb);
0c830e6b
JP
467extern int iommu_register_device_fault_handler(struct device *dev,
468 iommu_dev_fault_handler_t handler,
469 void *data);
470
471extern int iommu_unregister_device_fault_handler(struct device *dev);
472
473extern int iommu_report_device_fault(struct device *dev,
474 struct iommu_fault_event *evt);
bf3255b3
JPB
475extern int iommu_page_response(struct device *dev,
476 struct iommu_page_response *msg);
0c830e6b 477
d72e31c9 478extern int iommu_group_id(struct iommu_group *group);
104a1c13 479extern struct iommu_group *iommu_group_get_for_dev(struct device *dev);
6827ca83 480extern struct iommu_domain *iommu_group_default_domain(struct iommu_group *);
4f3f8d9d 481
0cd76dd1
JR
482extern int iommu_domain_get_attr(struct iommu_domain *domain, enum iommu_attr,
483 void *data);
484extern int iommu_domain_set_attr(struct iommu_domain *domain, enum iommu_attr,
485 void *data);
4f3f8d9d 486
d7787d57
JR
487/* Window handling function prototypes */
488extern int iommu_domain_window_enable(struct iommu_domain *domain, u32 wnd_nr,
80f97f0f
VS
489 phys_addr_t offset, u64 size,
490 int prot);
d7787d57 491extern void iommu_domain_window_disable(struct iommu_domain *domain, u32 wnd_nr);
207c6e36
JR
492
493extern int report_iommu_fault(struct iommu_domain *domain, struct device *dev,
494 unsigned long iova, int flags);
4a77a6cf 495
add02cfd
JR
496static inline void iommu_flush_tlb_all(struct iommu_domain *domain)
497{
498 if (domain->ops->flush_iotlb_all)
499 domain->ops->flush_iotlb_all(domain);
500}
501
a7d20dc1
WD
502static inline void iommu_tlb_sync(struct iommu_domain *domain,
503 struct iommu_iotlb_gather *iotlb_gather)
add02cfd
JR
504{
505 if (domain->ops->iotlb_sync)
56f8af5e 506 domain->ops->iotlb_sync(domain, iotlb_gather);
a7d20dc1
WD
507
508 iommu_iotlb_gather_init(iotlb_gather);
add02cfd
JR
509}
510
4fcf8544
WD
511static inline void iommu_iotlb_gather_add_page(struct iommu_domain *domain,
512 struct iommu_iotlb_gather *gather,
513 unsigned long iova, size_t size)
514{
515 unsigned long start = iova, end = start + size;
516
517 /*
518 * If the new page is disjoint from the current range or is mapped at
519 * a different granularity, then sync the TLB so that the gather
520 * structure can be rewritten.
521 */
522 if (gather->pgsize != size ||
523 end < gather->start || start > gather->end) {
524 if (gather->pgsize)
525 iommu_tlb_sync(domain, gather);
526 gather->pgsize = size;
527 }
528
529 if (gather->end < end)
530 gather->end = end;
531
532 if (gather->start > start)
533 gather->start = start;
534}
535
5e62292b
JR
536/* PCI device grouping function */
537extern struct iommu_group *pci_device_group(struct device *dev);
6eab556a
JR
538/* Generic device grouping function */
539extern struct iommu_group *generic_device_group(struct device *dev);
eab03e2a
NG
540/* FSL-MC device grouping function */
541struct iommu_group *fsl_mc_device_group(struct device *dev);
5e62292b 542
57f98d2f
RM
543/**
544 * struct iommu_fwspec - per-device IOMMU instance data
545 * @ops: ops for this device's IOMMU
546 * @iommu_fwnode: firmware handle for this device's IOMMU
547 * @iommu_priv: IOMMU driver private data for this device
548 * @num_ids: number of associated device IDs
549 * @ids: IDs which this device may present to the IOMMU
550 */
551struct iommu_fwspec {
552 const struct iommu_ops *ops;
553 struct fwnode_handle *iommu_fwnode;
554 void *iommu_priv;
5702ee24 555 u32 flags;
57f98d2f
RM
556 unsigned int num_ids;
557 u32 ids[1];
558};
559
5702ee24
JPB
560/* ATS is supported */
561#define IOMMU_FWSPEC_PCI_RC_ATS (1 << 0)
562
26b25a2b
JPB
563/**
564 * struct iommu_sva - handle to a device-mm bond
565 */
566struct iommu_sva {
567 struct device *dev;
568 const struct iommu_sva_ops *ops;
569};
570
57f98d2f
RM
571int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode,
572 const struct iommu_ops *ops);
573void iommu_fwspec_free(struct device *dev);
574int iommu_fwspec_add_ids(struct device *dev, u32 *ids, int num_ids);
534766df 575const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode);
57f98d2f 576
b4ef725e
JR
577static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev)
578{
579 return dev->iommu_fwspec;
580}
581
582static inline void dev_iommu_fwspec_set(struct device *dev,
583 struct iommu_fwspec *fwspec)
584{
585 dev->iommu_fwspec = fwspec;
586}
587
cc5aed44
JR
588int iommu_probe_device(struct device *dev);
589void iommu_release_device(struct device *dev);
590
a3a19592
LB
591bool iommu_dev_has_feature(struct device *dev, enum iommu_dev_features f);
592int iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features f);
593int iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features f);
594bool iommu_dev_feature_enabled(struct device *dev, enum iommu_dev_features f);
595int iommu_aux_attach_device(struct iommu_domain *domain, struct device *dev);
596void iommu_aux_detach_device(struct iommu_domain *domain, struct device *dev);
597int iommu_aux_get_pasid(struct iommu_domain *domain, struct device *dev);
598
26b25a2b
JPB
599struct iommu_sva *iommu_sva_bind_device(struct device *dev,
600 struct mm_struct *mm,
601 void *drvdata);
602void iommu_sva_unbind_device(struct iommu_sva *handle);
603int iommu_sva_set_ops(struct iommu_sva *handle,
604 const struct iommu_sva_ops *ops);
605int iommu_sva_get_pasid(struct iommu_sva *handle);
606
4a77a6cf
JR
607#else /* CONFIG_IOMMU_API */
608
39d4ebb9 609struct iommu_ops {};
d72e31c9 610struct iommu_group {};
57f98d2f 611struct iommu_fwspec {};
b0119e87 612struct iommu_device {};
4e32348b 613struct iommu_fault_param {};
a7d20dc1 614struct iommu_iotlb_gather {};
4a77a6cf 615
a1b60c1c 616static inline bool iommu_present(struct bus_type *bus)
4a77a6cf
JR
617{
618 return false;
619}
620
3c0e0ca0
JR
621static inline bool iommu_capable(struct bus_type *bus, enum iommu_cap cap)
622{
623 return false;
624}
625
905d66c1 626static inline struct iommu_domain *iommu_domain_alloc(struct bus_type *bus)
4a77a6cf
JR
627{
628 return NULL;
629}
630
b62dfd29
AK
631static inline struct iommu_group *iommu_group_get_by_id(int id)
632{
633 return NULL;
634}
635
4a77a6cf
JR
636static inline void iommu_domain_free(struct iommu_domain *domain)
637{
638}
639
640static inline int iommu_attach_device(struct iommu_domain *domain,
641 struct device *dev)
642{
643 return -ENODEV;
644}
645
646static inline void iommu_detach_device(struct iommu_domain *domain,
647 struct device *dev)
648{
649}
650
2c1296d9
JR
651static inline struct iommu_domain *iommu_get_domain_for_dev(struct device *dev)
652{
653 return NULL;
654}
655
cefc53c7 656static inline int iommu_map(struct iommu_domain *domain, unsigned long iova,
ebae3e83 657 phys_addr_t paddr, size_t size, int prot)
cefc53c7
JR
658{
659 return -ENODEV;
660}
661
c5611a87
SS
662static inline size_t iommu_unmap(struct iommu_domain *domain,
663 unsigned long iova, size_t size)
cefc53c7 664{
c5611a87 665 return 0;
cefc53c7
JR
666}
667
c5611a87 668static inline size_t iommu_unmap_fast(struct iommu_domain *domain,
a7d20dc1
WD
669 unsigned long iova, int gfp_order,
670 struct iommu_iotlb_gather *iotlb_gather)
cefc53c7 671{
c5611a87 672 return 0;
cefc53c7
JR
673}
674
315786eb
OH
675static inline size_t iommu_map_sg(struct iommu_domain *domain,
676 unsigned long iova, struct scatterlist *sg,
677 unsigned int nents, int prot)
678{
c5611a87 679 return 0;
315786eb
OH
680}
681
add02cfd
JR
682static inline void iommu_flush_tlb_all(struct iommu_domain *domain)
683{
684}
685
a7d20dc1
WD
686static inline void iommu_tlb_sync(struct iommu_domain *domain,
687 struct iommu_iotlb_gather *iotlb_gather)
add02cfd
JR
688{
689}
690
d7787d57
JR
691static inline int iommu_domain_window_enable(struct iommu_domain *domain,
692 u32 wnd_nr, phys_addr_t paddr,
80f97f0f 693 u64 size, int prot)
d7787d57
JR
694{
695 return -ENODEV;
696}
697
698static inline void iommu_domain_window_disable(struct iommu_domain *domain,
699 u32 wnd_nr)
700{
701}
702
bb5547ac 703static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova)
4a77a6cf
JR
704{
705 return 0;
706}
707
4f3f8d9d 708static inline void iommu_set_fault_handler(struct iommu_domain *domain,
77ca2332 709 iommu_fault_handler_t handler, void *token)
4f3f8d9d
OBC
710{
711}
712
e5b5234a 713static inline void iommu_get_resv_regions(struct device *dev,
a1015c2b
JR
714 struct list_head *list)
715{
716}
717
e5b5234a 718static inline void iommu_put_resv_regions(struct device *dev,
a1015c2b
JR
719 struct list_head *list)
720{
721}
722
6c65fb31
EA
723static inline int iommu_get_group_resv_regions(struct iommu_group *group,
724 struct list_head *head)
725{
726 return -ENODEV;
727}
728
d290f1e7
JR
729static inline int iommu_request_dm_for_dev(struct device *dev)
730{
731 return -ENODEV;
732}
733
7423e017
LB
734static inline int iommu_request_dma_domain_for_dev(struct device *dev)
735{
736 return -ENODEV;
737}
738
bef83de5
AW
739static inline int iommu_attach_group(struct iommu_domain *domain,
740 struct iommu_group *group)
d72e31c9
AW
741{
742 return -ENODEV;
743}
744
bef83de5
AW
745static inline void iommu_detach_group(struct iommu_domain *domain,
746 struct iommu_group *group)
d72e31c9
AW
747{
748}
749
bef83de5 750static inline struct iommu_group *iommu_group_alloc(void)
d72e31c9
AW
751{
752 return ERR_PTR(-ENODEV);
753}
754
bef83de5 755static inline void *iommu_group_get_iommudata(struct iommu_group *group)
d72e31c9
AW
756{
757 return NULL;
758}
759
bef83de5
AW
760static inline void iommu_group_set_iommudata(struct iommu_group *group,
761 void *iommu_data,
762 void (*release)(void *iommu_data))
d72e31c9
AW
763{
764}
765
bef83de5
AW
766static inline int iommu_group_set_name(struct iommu_group *group,
767 const char *name)
d72e31c9
AW
768{
769 return -ENODEV;
770}
771
bef83de5
AW
772static inline int iommu_group_add_device(struct iommu_group *group,
773 struct device *dev)
d72e31c9
AW
774{
775 return -ENODEV;
776}
777
bef83de5 778static inline void iommu_group_remove_device(struct device *dev)
d72e31c9
AW
779{
780}
781
bef83de5
AW
782static inline int iommu_group_for_each_dev(struct iommu_group *group,
783 void *data,
784 int (*fn)(struct device *, void *))
d72e31c9
AW
785{
786 return -ENODEV;
787}
788
bef83de5 789static inline struct iommu_group *iommu_group_get(struct device *dev)
d72e31c9
AW
790{
791 return NULL;
792}
793
bef83de5 794static inline void iommu_group_put(struct iommu_group *group)
d72e31c9
AW
795{
796}
797
bef83de5
AW
798static inline int iommu_group_register_notifier(struct iommu_group *group,
799 struct notifier_block *nb)
1460432c
AW
800{
801 return -ENODEV;
802}
803
bef83de5
AW
804static inline int iommu_group_unregister_notifier(struct iommu_group *group,
805 struct notifier_block *nb)
d72e31c9
AW
806{
807 return 0;
808}
809
0c830e6b
JP
810static inline
811int iommu_register_device_fault_handler(struct device *dev,
812 iommu_dev_fault_handler_t handler,
813 void *data)
814{
815 return -ENODEV;
816}
817
818static inline int iommu_unregister_device_fault_handler(struct device *dev)
819{
820 return 0;
821}
822
823static inline
824int iommu_report_device_fault(struct device *dev, struct iommu_fault_event *evt)
825{
826 return -ENODEV;
827}
828
bf3255b3
JPB
829static inline int iommu_page_response(struct device *dev,
830 struct iommu_page_response *msg)
831{
832 return -ENODEV;
833}
834
bef83de5 835static inline int iommu_group_id(struct iommu_group *group)
d72e31c9
AW
836{
837 return -ENODEV;
838}
1460432c 839
0cd76dd1
JR
840static inline int iommu_domain_get_attr(struct iommu_domain *domain,
841 enum iommu_attr attr, void *data)
842{
843 return -EINVAL;
844}
845
846static inline int iommu_domain_set_attr(struct iommu_domain *domain,
847 enum iommu_attr attr, void *data)
848{
849 return -EINVAL;
850}
851
39ab9555 852static inline int iommu_device_register(struct iommu_device *iommu)
c61959ec 853{
39ab9555 854 return -ENODEV;
c61959ec
AW
855}
856
39ab9555
JR
857static inline void iommu_device_set_ops(struct iommu_device *iommu,
858 const struct iommu_ops *ops)
c61959ec 859{
c61959ec
AW
860}
861
c73e1ac8
JR
862static inline void iommu_device_set_fwnode(struct iommu_device *iommu,
863 struct fwnode_handle *fwnode)
c61959ec 864{
c61959ec
AW
865}
866
2926a2aa
JR
867static inline struct iommu_device *dev_to_iommu_device(struct device *dev)
868{
869 return NULL;
870}
871
a7d20dc1
WD
872static inline void iommu_iotlb_gather_init(struct iommu_iotlb_gather *gather)
873{
874}
875
4fcf8544
WD
876static inline void iommu_iotlb_gather_add_page(struct iommu_domain *domain,
877 struct iommu_iotlb_gather *gather,
878 unsigned long iova, size_t size)
879{
880}
881
39ab9555 882static inline void iommu_device_unregister(struct iommu_device *iommu)
c61959ec 883{
c61959ec
AW
884}
885
39ab9555
JR
886static inline int iommu_device_sysfs_add(struct iommu_device *iommu,
887 struct device *parent,
888 const struct attribute_group **groups,
889 const char *fmt, ...)
b0119e87 890{
39ab9555 891 return -ENODEV;
b0119e87
JR
892}
893
39ab9555 894static inline void iommu_device_sysfs_remove(struct iommu_device *iommu)
c61959ec
AW
895{
896}
897
e09f8ea5 898static inline int iommu_device_link(struct device *dev, struct device *link)
c61959ec
AW
899{
900 return -EINVAL;
901}
902
e09f8ea5 903static inline void iommu_device_unlink(struct device *dev, struct device *link)
c61959ec
AW
904{
905}
906
57f98d2f
RM
907static inline int iommu_fwspec_init(struct device *dev,
908 struct fwnode_handle *iommu_fwnode,
909 const struct iommu_ops *ops)
910{
911 return -ENODEV;
912}
913
914static inline void iommu_fwspec_free(struct device *dev)
915{
916}
917
918static inline int iommu_fwspec_add_ids(struct device *dev, u32 *ids,
919 int num_ids)
920{
921 return -ENODEV;
922}
923
e4f10ffe 924static inline
534766df 925const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode)
e4f10ffe
LP
926{
927 return NULL;
928}
929
a3a19592
LB
930static inline bool
931iommu_dev_has_feature(struct device *dev, enum iommu_dev_features feat)
932{
933 return false;
934}
935
936static inline bool
937iommu_dev_feature_enabled(struct device *dev, enum iommu_dev_features feat)
938{
939 return false;
940}
941
942static inline int
943iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features feat)
944{
945 return -ENODEV;
946}
947
948static inline int
949iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features feat)
950{
951 return -ENODEV;
952}
953
954static inline int
955iommu_aux_attach_device(struct iommu_domain *domain, struct device *dev)
956{
957 return -ENODEV;
958}
959
960static inline void
961iommu_aux_detach_device(struct iommu_domain *domain, struct device *dev)
962{
963}
964
965static inline int
966iommu_aux_get_pasid(struct iommu_domain *domain, struct device *dev)
967{
968 return -ENODEV;
969}
970
26b25a2b
JPB
971static inline struct iommu_sva *
972iommu_sva_bind_device(struct device *dev, struct mm_struct *mm, void *drvdata)
973{
974 return NULL;
975}
976
977static inline void iommu_sva_unbind_device(struct iommu_sva *handle)
978{
979}
980
981static inline int iommu_sva_set_ops(struct iommu_sva *handle,
982 const struct iommu_sva_ops *ops)
983{
984 return -EINVAL;
985}
986
987static inline int iommu_sva_get_pasid(struct iommu_sva *handle)
988{
989 return IOMMU_PASID_INVALID;
990}
991
4a77a6cf
JR
992#endif /* CONFIG_IOMMU_API */
993
bad614b2
GH
994#ifdef CONFIG_IOMMU_DEBUGFS
995extern struct dentry *iommu_debugfs_dir;
996void iommu_debugfs_setup(void);
997#else
998static inline void iommu_debugfs_setup(void) {}
999#endif
1000
4a77a6cf 1001#endif /* __LINUX_IOMMU_H */