Commit | Line | Data |
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4a77a6cf JR |
1 | /* |
2 | * Copyright (C) 2007-2008 Advanced Micro Devices, Inc. | |
3 | * Author: Joerg Roedel <joerg.roedel@amd.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of the GNU General Public License version 2 as published | |
7 | * by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
17 | */ | |
18 | ||
19 | #ifndef __LINUX_IOMMU_H | |
20 | #define __LINUX_IOMMU_H | |
21 | ||
74315ccc | 22 | #include <linux/errno.h> |
9a08d376 | 23 | #include <linux/err.h> |
d0f60a44 | 24 | #include <linux/of.h> |
76582d0a | 25 | #include <linux/types.h> |
315786eb | 26 | #include <linux/scatterlist.h> |
56fa4849 | 27 | #include <trace/events/iommu.h> |
74315ccc | 28 | |
ca13bb3d WD |
29 | #define IOMMU_READ (1 << 0) |
30 | #define IOMMU_WRITE (1 << 1) | |
31 | #define IOMMU_CACHE (1 << 2) /* DMA cache coherency */ | |
a720b41c | 32 | #define IOMMU_NOEXEC (1 << 3) |
4a77a6cf | 33 | |
905d66c1 | 34 | struct iommu_ops; |
d72e31c9 | 35 | struct iommu_group; |
ff21776d | 36 | struct bus_type; |
4a77a6cf | 37 | struct device; |
4f3f8d9d | 38 | struct iommu_domain; |
ba1eabfa | 39 | struct notifier_block; |
4f3f8d9d OBC |
40 | |
41 | /* iommu fault flags */ | |
42 | #define IOMMU_FAULT_READ 0x0 | |
43 | #define IOMMU_FAULT_WRITE 0x1 | |
44 | ||
45 | typedef int (*iommu_fault_handler_t)(struct iommu_domain *, | |
77ca2332 | 46 | struct device *, unsigned long, int, void *); |
4a77a6cf | 47 | |
0ff64f80 JR |
48 | struct iommu_domain_geometry { |
49 | dma_addr_t aperture_start; /* First address that can be mapped */ | |
50 | dma_addr_t aperture_end; /* Last address that can be mapped */ | |
51 | bool force_aperture; /* DMA only allowed in mappable range? */ | |
52 | }; | |
53 | ||
8539c7c1 JR |
54 | /* Domain feature flags */ |
55 | #define __IOMMU_DOMAIN_PAGING (1U << 0) /* Support for iommu_map/unmap */ | |
56 | #define __IOMMU_DOMAIN_DMA_API (1U << 1) /* Domain for use in DMA-API | |
57 | implementation */ | |
58 | #define __IOMMU_DOMAIN_PT (1U << 2) /* Domain is identity mapped */ | |
59 | ||
60 | /* | |
61 | * This are the possible domain-types | |
62 | * | |
63 | * IOMMU_DOMAIN_BLOCKED - All DMA is blocked, can be used to isolate | |
64 | * devices | |
65 | * IOMMU_DOMAIN_IDENTITY - DMA addresses are system physical addresses | |
66 | * IOMMU_DOMAIN_UNMANAGED - DMA mappings managed by IOMMU-API user, used | |
67 | * for VMs | |
68 | * IOMMU_DOMAIN_DMA - Internally used for DMA-API implementations. | |
69 | * This flag allows IOMMU drivers to implement | |
70 | * certain optimizations for these domains | |
71 | */ | |
72 | #define IOMMU_DOMAIN_BLOCKED (0U) | |
73 | #define IOMMU_DOMAIN_IDENTITY (__IOMMU_DOMAIN_PT) | |
74 | #define IOMMU_DOMAIN_UNMANAGED (__IOMMU_DOMAIN_PAGING) | |
75 | #define IOMMU_DOMAIN_DMA (__IOMMU_DOMAIN_PAGING | \ | |
76 | __IOMMU_DOMAIN_DMA_API) | |
77 | ||
4a77a6cf | 78 | struct iommu_domain { |
8539c7c1 | 79 | unsigned type; |
b22f6434 | 80 | const struct iommu_ops *ops; |
4f3f8d9d | 81 | iommu_fault_handler_t handler; |
77ca2332 | 82 | void *handler_token; |
0ff64f80 | 83 | struct iommu_domain_geometry geometry; |
4a77a6cf JR |
84 | }; |
85 | ||
1aed0748 JR |
86 | enum iommu_cap { |
87 | IOMMU_CAP_CACHE_COHERENCY, /* IOMMU can enforce cache coherent DMA | |
88 | transactions */ | |
89 | IOMMU_CAP_INTR_REMAP, /* IOMMU supports interrupt isolation */ | |
c4986649 | 90 | IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */ |
1aed0748 | 91 | }; |
dbb9fd86 | 92 | |
7cabf491 VS |
93 | /* |
94 | * Following constraints are specifc to FSL_PAMUV1: | |
95 | * -aperture must be power of 2, and naturally aligned | |
96 | * -number of windows must be power of 2, and address space size | |
97 | * of each window is determined by aperture size / # of windows | |
98 | * -the actual size of the mapped region of a window must be power | |
99 | * of 2 starting with 4KB and physical address must be naturally | |
100 | * aligned. | |
101 | * DOMAIN_ATTR_FSL_PAMUV1 corresponds to the above mentioned contraints. | |
102 | * The caller can invoke iommu_domain_get_attr to check if the underlying | |
103 | * iommu implementation supports these constraints. | |
104 | */ | |
105 | ||
0cd76dd1 | 106 | enum iommu_attr { |
0ff64f80 | 107 | DOMAIN_ATTR_GEOMETRY, |
d2e12160 | 108 | DOMAIN_ATTR_PAGING, |
69356712 | 109 | DOMAIN_ATTR_WINDOWS, |
7cabf491 VS |
110 | DOMAIN_ATTR_FSL_PAMU_STASH, |
111 | DOMAIN_ATTR_FSL_PAMU_ENABLE, | |
112 | DOMAIN_ATTR_FSL_PAMUV1, | |
c02607aa | 113 | DOMAIN_ATTR_NESTING, /* two stages of translation */ |
a8b8a88a | 114 | DOMAIN_ATTR_MAX, |
0cd76dd1 JR |
115 | }; |
116 | ||
39d4ebb9 JR |
117 | #ifdef CONFIG_IOMMU_API |
118 | ||
7d3002cc OBC |
119 | /** |
120 | * struct iommu_ops - iommu ops and capabilities | |
121 | * @domain_init: init iommu domain | |
122 | * @domain_destroy: destroy iommu domain | |
123 | * @attach_dev: attach device to an iommu domain | |
124 | * @detach_dev: detach device from an iommu domain | |
125 | * @map: map a physically contiguous memory region to an iommu domain | |
126 | * @unmap: unmap a physically contiguous memory region from an iommu domain | |
315786eb OH |
127 | * @map_sg: map a scatter-gather list of physically contiguous memory chunks |
128 | * to an iommu domain | |
7d3002cc | 129 | * @iova_to_phys: translate iova to physical address |
d72e31c9 AW |
130 | * @add_device: add device to iommu grouping |
131 | * @remove_device: remove device from iommu grouping | |
0cd76dd1 JR |
132 | * @domain_get_attr: Query domain attributes |
133 | * @domain_set_attr: Change domain attributes | |
d0f60a44 | 134 | * @of_xlate: add OF master IDs to iommu grouping |
7d3002cc | 135 | * @pgsize_bitmap: bitmap of supported page sizes |
1cd076bf | 136 | * @priv: per-instance data private to the iommu driver |
7d3002cc | 137 | */ |
4a77a6cf | 138 | struct iommu_ops { |
3c0e0ca0 | 139 | bool (*capable)(enum iommu_cap); |
938c4709 JR |
140 | |
141 | /* Domain allocation and freeing by the iommu driver */ | |
8539c7c1 | 142 | struct iommu_domain *(*domain_alloc)(unsigned iommu_domain_type); |
938c4709 JR |
143 | void (*domain_free)(struct iommu_domain *); |
144 | ||
4a77a6cf JR |
145 | int (*attach_dev)(struct iommu_domain *domain, struct device *dev); |
146 | void (*detach_dev)(struct iommu_domain *domain, struct device *dev); | |
67651786 | 147 | int (*map)(struct iommu_domain *domain, unsigned long iova, |
5009065d OBC |
148 | phys_addr_t paddr, size_t size, int prot); |
149 | size_t (*unmap)(struct iommu_domain *domain, unsigned long iova, | |
150 | size_t size); | |
315786eb OH |
151 | size_t (*map_sg)(struct iommu_domain *domain, unsigned long iova, |
152 | struct scatterlist *sg, unsigned int nents, int prot); | |
bb5547ac | 153 | phys_addr_t (*iova_to_phys)(struct iommu_domain *domain, dma_addr_t iova); |
d72e31c9 AW |
154 | int (*add_device)(struct device *dev); |
155 | void (*remove_device)(struct device *dev); | |
1460432c | 156 | int (*device_group)(struct device *dev, unsigned int *groupid); |
0cd76dd1 JR |
157 | int (*domain_get_attr)(struct iommu_domain *domain, |
158 | enum iommu_attr attr, void *data); | |
159 | int (*domain_set_attr)(struct iommu_domain *domain, | |
160 | enum iommu_attr attr, void *data); | |
d7787d57 JR |
161 | |
162 | /* Window handling functions */ | |
163 | int (*domain_window_enable)(struct iommu_domain *domain, u32 wnd_nr, | |
80f97f0f | 164 | phys_addr_t paddr, u64 size, int prot); |
d7787d57 | 165 | void (*domain_window_disable)(struct iommu_domain *domain, u32 wnd_nr); |
69356712 JR |
166 | /* Set the numer of window per domain */ |
167 | int (*domain_set_windows)(struct iommu_domain *domain, u32 w_count); | |
168 | /* Get the numer of window per domain */ | |
169 | u32 (*domain_get_windows)(struct iommu_domain *domain); | |
d7787d57 | 170 | |
d0f60a44 WD |
171 | #ifdef CONFIG_OF_IOMMU |
172 | int (*of_xlate)(struct device *dev, struct of_phandle_args *args); | |
173 | #endif | |
174 | ||
7d3002cc | 175 | unsigned long pgsize_bitmap; |
1cd076bf | 176 | void *priv; |
4a77a6cf JR |
177 | }; |
178 | ||
d72e31c9 AW |
179 | #define IOMMU_GROUP_NOTIFY_ADD_DEVICE 1 /* Device added */ |
180 | #define IOMMU_GROUP_NOTIFY_DEL_DEVICE 2 /* Pre Device removed */ | |
181 | #define IOMMU_GROUP_NOTIFY_BIND_DRIVER 3 /* Pre Driver bind */ | |
182 | #define IOMMU_GROUP_NOTIFY_BOUND_DRIVER 4 /* Post Driver bind */ | |
183 | #define IOMMU_GROUP_NOTIFY_UNBIND_DRIVER 5 /* Pre Driver unbind */ | |
184 | #define IOMMU_GROUP_NOTIFY_UNBOUND_DRIVER 6 /* Post Driver unbind */ | |
185 | ||
b22f6434 | 186 | extern int bus_set_iommu(struct bus_type *bus, const struct iommu_ops *ops); |
a1b60c1c | 187 | extern bool iommu_present(struct bus_type *bus); |
3c0e0ca0 | 188 | extern bool iommu_capable(struct bus_type *bus, enum iommu_cap cap); |
905d66c1 | 189 | extern struct iommu_domain *iommu_domain_alloc(struct bus_type *bus); |
aa16bea9 | 190 | extern struct iommu_group *iommu_group_get_by_id(int id); |
4a77a6cf JR |
191 | extern void iommu_domain_free(struct iommu_domain *domain); |
192 | extern int iommu_attach_device(struct iommu_domain *domain, | |
193 | struct device *dev); | |
194 | extern void iommu_detach_device(struct iommu_domain *domain, | |
195 | struct device *dev); | |
cefc53c7 | 196 | extern int iommu_map(struct iommu_domain *domain, unsigned long iova, |
7d3002cc OBC |
197 | phys_addr_t paddr, size_t size, int prot); |
198 | extern size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova, | |
199 | size_t size); | |
315786eb OH |
200 | extern size_t default_iommu_map_sg(struct iommu_domain *domain, unsigned long iova, |
201 | struct scatterlist *sg,unsigned int nents, | |
202 | int prot); | |
bb5547ac | 203 | extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova); |
4f3f8d9d | 204 | extern void iommu_set_fault_handler(struct iommu_domain *domain, |
77ca2332 | 205 | iommu_fault_handler_t handler, void *token); |
d72e31c9 AW |
206 | |
207 | extern int iommu_attach_group(struct iommu_domain *domain, | |
208 | struct iommu_group *group); | |
209 | extern void iommu_detach_group(struct iommu_domain *domain, | |
210 | struct iommu_group *group); | |
211 | extern struct iommu_group *iommu_group_alloc(void); | |
212 | extern void *iommu_group_get_iommudata(struct iommu_group *group); | |
213 | extern void iommu_group_set_iommudata(struct iommu_group *group, | |
214 | void *iommu_data, | |
215 | void (*release)(void *iommu_data)); | |
216 | extern int iommu_group_set_name(struct iommu_group *group, const char *name); | |
217 | extern int iommu_group_add_device(struct iommu_group *group, | |
218 | struct device *dev); | |
219 | extern void iommu_group_remove_device(struct device *dev); | |
220 | extern int iommu_group_for_each_dev(struct iommu_group *group, void *data, | |
221 | int (*fn)(struct device *, void *)); | |
222 | extern struct iommu_group *iommu_group_get(struct device *dev); | |
223 | extern void iommu_group_put(struct iommu_group *group); | |
224 | extern int iommu_group_register_notifier(struct iommu_group *group, | |
225 | struct notifier_block *nb); | |
226 | extern int iommu_group_unregister_notifier(struct iommu_group *group, | |
227 | struct notifier_block *nb); | |
228 | extern int iommu_group_id(struct iommu_group *group); | |
104a1c13 | 229 | extern struct iommu_group *iommu_group_get_for_dev(struct device *dev); |
4f3f8d9d | 230 | |
0cd76dd1 JR |
231 | extern int iommu_domain_get_attr(struct iommu_domain *domain, enum iommu_attr, |
232 | void *data); | |
233 | extern int iommu_domain_set_attr(struct iommu_domain *domain, enum iommu_attr, | |
234 | void *data); | |
c61959ec AW |
235 | struct device *iommu_device_create(struct device *parent, void *drvdata, |
236 | const struct attribute_group **groups, | |
237 | const char *fmt, ...); | |
238 | void iommu_device_destroy(struct device *dev); | |
239 | int iommu_device_link(struct device *dev, struct device *link); | |
240 | void iommu_device_unlink(struct device *dev, struct device *link); | |
4f3f8d9d | 241 | |
d7787d57 JR |
242 | /* Window handling function prototypes */ |
243 | extern int iommu_domain_window_enable(struct iommu_domain *domain, u32 wnd_nr, | |
80f97f0f VS |
244 | phys_addr_t offset, u64 size, |
245 | int prot); | |
d7787d57 | 246 | extern void iommu_domain_window_disable(struct iommu_domain *domain, u32 wnd_nr); |
4f3f8d9d OBC |
247 | /** |
248 | * report_iommu_fault() - report about an IOMMU fault to the IOMMU framework | |
249 | * @domain: the iommu domain where the fault has happened | |
250 | * @dev: the device where the fault has happened | |
251 | * @iova: the faulting address | |
252 | * @flags: mmu fault flags (e.g. IOMMU_FAULT_READ/IOMMU_FAULT_WRITE/...) | |
253 | * | |
254 | * This function should be called by the low-level IOMMU implementations | |
255 | * whenever IOMMU faults happen, to allow high-level users, that are | |
256 | * interested in such events, to know about them. | |
257 | * | |
258 | * This event may be useful for several possible use cases: | |
259 | * - mere logging of the event | |
260 | * - dynamic TLB/PTE loading | |
261 | * - if restarting of the faulting device is required | |
262 | * | |
263 | * Returns 0 on success and an appropriate error code otherwise (if dynamic | |
264 | * PTE/TLB loading will one day be supported, implementations will be able | |
265 | * to tell whether it succeeded or not according to this return value). | |
0ed6d2d2 OBC |
266 | * |
267 | * Specifically, -ENOSYS is returned if a fault handler isn't installed | |
268 | * (though fault handlers can also return -ENOSYS, in case they want to | |
269 | * elicit the default behavior of the IOMMU drivers). | |
4f3f8d9d OBC |
270 | */ |
271 | static inline int report_iommu_fault(struct iommu_domain *domain, | |
272 | struct device *dev, unsigned long iova, int flags) | |
273 | { | |
0ed6d2d2 | 274 | int ret = -ENOSYS; |
4a77a6cf | 275 | |
4f3f8d9d OBC |
276 | /* |
277 | * if upper layers showed interest and installed a fault handler, | |
278 | * invoke it. | |
279 | */ | |
280 | if (domain->handler) | |
77ca2332 OBC |
281 | ret = domain->handler(domain, dev, iova, flags, |
282 | domain->handler_token); | |
4a77a6cf | 283 | |
56fa4849 | 284 | trace_io_page_fault(dev, iova, flags); |
4f3f8d9d | 285 | return ret; |
4a77a6cf JR |
286 | } |
287 | ||
315786eb OH |
288 | static inline size_t iommu_map_sg(struct iommu_domain *domain, |
289 | unsigned long iova, struct scatterlist *sg, | |
290 | unsigned int nents, int prot) | |
291 | { | |
292 | return domain->ops->map_sg(domain, iova, sg, nents, prot); | |
293 | } | |
294 | ||
4a77a6cf JR |
295 | #else /* CONFIG_IOMMU_API */ |
296 | ||
39d4ebb9 | 297 | struct iommu_ops {}; |
d72e31c9 | 298 | struct iommu_group {}; |
4a77a6cf | 299 | |
a1b60c1c | 300 | static inline bool iommu_present(struct bus_type *bus) |
4a77a6cf JR |
301 | { |
302 | return false; | |
303 | } | |
304 | ||
3c0e0ca0 JR |
305 | static inline bool iommu_capable(struct bus_type *bus, enum iommu_cap cap) |
306 | { | |
307 | return false; | |
308 | } | |
309 | ||
905d66c1 | 310 | static inline struct iommu_domain *iommu_domain_alloc(struct bus_type *bus) |
4a77a6cf JR |
311 | { |
312 | return NULL; | |
313 | } | |
314 | ||
b62dfd29 AK |
315 | static inline struct iommu_group *iommu_group_get_by_id(int id) |
316 | { | |
317 | return NULL; | |
318 | } | |
319 | ||
4a77a6cf JR |
320 | static inline void iommu_domain_free(struct iommu_domain *domain) |
321 | { | |
322 | } | |
323 | ||
324 | static inline int iommu_attach_device(struct iommu_domain *domain, | |
325 | struct device *dev) | |
326 | { | |
327 | return -ENODEV; | |
328 | } | |
329 | ||
330 | static inline void iommu_detach_device(struct iommu_domain *domain, | |
331 | struct device *dev) | |
332 | { | |
333 | } | |
334 | ||
cefc53c7 JR |
335 | static inline int iommu_map(struct iommu_domain *domain, unsigned long iova, |
336 | phys_addr_t paddr, int gfp_order, int prot) | |
337 | { | |
338 | return -ENODEV; | |
339 | } | |
340 | ||
341 | static inline int iommu_unmap(struct iommu_domain *domain, unsigned long iova, | |
342 | int gfp_order) | |
343 | { | |
344 | return -ENODEV; | |
345 | } | |
346 | ||
315786eb OH |
347 | static inline size_t iommu_map_sg(struct iommu_domain *domain, |
348 | unsigned long iova, struct scatterlist *sg, | |
349 | unsigned int nents, int prot) | |
350 | { | |
351 | return -ENODEV; | |
352 | } | |
353 | ||
d7787d57 JR |
354 | static inline int iommu_domain_window_enable(struct iommu_domain *domain, |
355 | u32 wnd_nr, phys_addr_t paddr, | |
80f97f0f | 356 | u64 size, int prot) |
d7787d57 JR |
357 | { |
358 | return -ENODEV; | |
359 | } | |
360 | ||
361 | static inline void iommu_domain_window_disable(struct iommu_domain *domain, | |
362 | u32 wnd_nr) | |
363 | { | |
364 | } | |
365 | ||
bb5547ac | 366 | static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova) |
4a77a6cf JR |
367 | { |
368 | return 0; | |
369 | } | |
370 | ||
4f3f8d9d | 371 | static inline void iommu_set_fault_handler(struct iommu_domain *domain, |
77ca2332 | 372 | iommu_fault_handler_t handler, void *token) |
4f3f8d9d OBC |
373 | { |
374 | } | |
375 | ||
bef83de5 AW |
376 | static inline int iommu_attach_group(struct iommu_domain *domain, |
377 | struct iommu_group *group) | |
d72e31c9 AW |
378 | { |
379 | return -ENODEV; | |
380 | } | |
381 | ||
bef83de5 AW |
382 | static inline void iommu_detach_group(struct iommu_domain *domain, |
383 | struct iommu_group *group) | |
d72e31c9 AW |
384 | { |
385 | } | |
386 | ||
bef83de5 | 387 | static inline struct iommu_group *iommu_group_alloc(void) |
d72e31c9 AW |
388 | { |
389 | return ERR_PTR(-ENODEV); | |
390 | } | |
391 | ||
bef83de5 | 392 | static inline void *iommu_group_get_iommudata(struct iommu_group *group) |
d72e31c9 AW |
393 | { |
394 | return NULL; | |
395 | } | |
396 | ||
bef83de5 AW |
397 | static inline void iommu_group_set_iommudata(struct iommu_group *group, |
398 | void *iommu_data, | |
399 | void (*release)(void *iommu_data)) | |
d72e31c9 AW |
400 | { |
401 | } | |
402 | ||
bef83de5 AW |
403 | static inline int iommu_group_set_name(struct iommu_group *group, |
404 | const char *name) | |
d72e31c9 AW |
405 | { |
406 | return -ENODEV; | |
407 | } | |
408 | ||
bef83de5 AW |
409 | static inline int iommu_group_add_device(struct iommu_group *group, |
410 | struct device *dev) | |
d72e31c9 AW |
411 | { |
412 | return -ENODEV; | |
413 | } | |
414 | ||
bef83de5 | 415 | static inline void iommu_group_remove_device(struct device *dev) |
d72e31c9 AW |
416 | { |
417 | } | |
418 | ||
bef83de5 AW |
419 | static inline int iommu_group_for_each_dev(struct iommu_group *group, |
420 | void *data, | |
421 | int (*fn)(struct device *, void *)) | |
d72e31c9 AW |
422 | { |
423 | return -ENODEV; | |
424 | } | |
425 | ||
bef83de5 | 426 | static inline struct iommu_group *iommu_group_get(struct device *dev) |
d72e31c9 AW |
427 | { |
428 | return NULL; | |
429 | } | |
430 | ||
bef83de5 | 431 | static inline void iommu_group_put(struct iommu_group *group) |
d72e31c9 AW |
432 | { |
433 | } | |
434 | ||
bef83de5 AW |
435 | static inline int iommu_group_register_notifier(struct iommu_group *group, |
436 | struct notifier_block *nb) | |
1460432c AW |
437 | { |
438 | return -ENODEV; | |
439 | } | |
440 | ||
bef83de5 AW |
441 | static inline int iommu_group_unregister_notifier(struct iommu_group *group, |
442 | struct notifier_block *nb) | |
d72e31c9 AW |
443 | { |
444 | return 0; | |
445 | } | |
446 | ||
bef83de5 | 447 | static inline int iommu_group_id(struct iommu_group *group) |
d72e31c9 AW |
448 | { |
449 | return -ENODEV; | |
450 | } | |
1460432c | 451 | |
0cd76dd1 JR |
452 | static inline int iommu_domain_get_attr(struct iommu_domain *domain, |
453 | enum iommu_attr attr, void *data) | |
454 | { | |
455 | return -EINVAL; | |
456 | } | |
457 | ||
458 | static inline int iommu_domain_set_attr(struct iommu_domain *domain, | |
459 | enum iommu_attr attr, void *data) | |
460 | { | |
461 | return -EINVAL; | |
462 | } | |
463 | ||
e09f8ea5 AW |
464 | static inline struct device *iommu_device_create(struct device *parent, |
465 | void *drvdata, | |
466 | const struct attribute_group **groups, | |
467 | const char *fmt, ...) | |
c61959ec AW |
468 | { |
469 | return ERR_PTR(-ENODEV); | |
470 | } | |
471 | ||
e09f8ea5 | 472 | static inline void iommu_device_destroy(struct device *dev) |
c61959ec AW |
473 | { |
474 | } | |
475 | ||
e09f8ea5 | 476 | static inline int iommu_device_link(struct device *dev, struct device *link) |
c61959ec AW |
477 | { |
478 | return -EINVAL; | |
479 | } | |
480 | ||
e09f8ea5 | 481 | static inline void iommu_device_unlink(struct device *dev, struct device *link) |
c61959ec AW |
482 | { |
483 | } | |
484 | ||
4a77a6cf JR |
485 | #endif /* CONFIG_IOMMU_API */ |
486 | ||
487 | #endif /* __LINUX_IOMMU_H */ |