Commit | Line | Data |
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4a77a6cf JR |
1 | /* |
2 | * Copyright (C) 2007-2008 Advanced Micro Devices, Inc. | |
3 | * Author: Joerg Roedel <joerg.roedel@amd.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of the GNU General Public License version 2 as published | |
7 | * by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
17 | */ | |
18 | ||
19 | #ifndef __LINUX_IOMMU_H | |
20 | #define __LINUX_IOMMU_H | |
21 | ||
74315ccc | 22 | #include <linux/errno.h> |
9a08d376 | 23 | #include <linux/err.h> |
d0f60a44 | 24 | #include <linux/of.h> |
76582d0a | 25 | #include <linux/types.h> |
315786eb | 26 | #include <linux/scatterlist.h> |
56fa4849 | 27 | #include <trace/events/iommu.h> |
74315ccc | 28 | |
ca13bb3d WD |
29 | #define IOMMU_READ (1 << 0) |
30 | #define IOMMU_WRITE (1 << 1) | |
31 | #define IOMMU_CACHE (1 << 2) /* DMA cache coherency */ | |
a720b41c | 32 | #define IOMMU_NOEXEC (1 << 3) |
31e6850e | 33 | #define IOMMU_MMIO (1 << 4) /* e.g. things like MSI doorbells */ |
579b2a65 MH |
34 | /* |
35 | * This is to make the IOMMU API setup privileged | |
36 | * mapppings accessible by the master only at higher | |
37 | * privileged execution level and inaccessible at | |
38 | * less privileged levels. | |
39 | */ | |
40 | #define IOMMU_PRIV (1 << 5) | |
4a77a6cf | 41 | |
905d66c1 | 42 | struct iommu_ops; |
d72e31c9 | 43 | struct iommu_group; |
ff21776d | 44 | struct bus_type; |
4a77a6cf | 45 | struct device; |
4f3f8d9d | 46 | struct iommu_domain; |
ba1eabfa | 47 | struct notifier_block; |
4f3f8d9d OBC |
48 | |
49 | /* iommu fault flags */ | |
50 | #define IOMMU_FAULT_READ 0x0 | |
51 | #define IOMMU_FAULT_WRITE 0x1 | |
52 | ||
53 | typedef int (*iommu_fault_handler_t)(struct iommu_domain *, | |
77ca2332 | 54 | struct device *, unsigned long, int, void *); |
4a77a6cf | 55 | |
0ff64f80 JR |
56 | struct iommu_domain_geometry { |
57 | dma_addr_t aperture_start; /* First address that can be mapped */ | |
58 | dma_addr_t aperture_end; /* Last address that can be mapped */ | |
59 | bool force_aperture; /* DMA only allowed in mappable range? */ | |
60 | }; | |
61 | ||
8539c7c1 JR |
62 | /* Domain feature flags */ |
63 | #define __IOMMU_DOMAIN_PAGING (1U << 0) /* Support for iommu_map/unmap */ | |
64 | #define __IOMMU_DOMAIN_DMA_API (1U << 1) /* Domain for use in DMA-API | |
65 | implementation */ | |
66 | #define __IOMMU_DOMAIN_PT (1U << 2) /* Domain is identity mapped */ | |
67 | ||
68 | /* | |
69 | * This are the possible domain-types | |
70 | * | |
71 | * IOMMU_DOMAIN_BLOCKED - All DMA is blocked, can be used to isolate | |
72 | * devices | |
73 | * IOMMU_DOMAIN_IDENTITY - DMA addresses are system physical addresses | |
74 | * IOMMU_DOMAIN_UNMANAGED - DMA mappings managed by IOMMU-API user, used | |
75 | * for VMs | |
76 | * IOMMU_DOMAIN_DMA - Internally used for DMA-API implementations. | |
77 | * This flag allows IOMMU drivers to implement | |
78 | * certain optimizations for these domains | |
79 | */ | |
80 | #define IOMMU_DOMAIN_BLOCKED (0U) | |
81 | #define IOMMU_DOMAIN_IDENTITY (__IOMMU_DOMAIN_PT) | |
82 | #define IOMMU_DOMAIN_UNMANAGED (__IOMMU_DOMAIN_PAGING) | |
83 | #define IOMMU_DOMAIN_DMA (__IOMMU_DOMAIN_PAGING | \ | |
84 | __IOMMU_DOMAIN_DMA_API) | |
85 | ||
4a77a6cf | 86 | struct iommu_domain { |
8539c7c1 | 87 | unsigned type; |
b22f6434 | 88 | const struct iommu_ops *ops; |
d16e0faa | 89 | unsigned long pgsize_bitmap; /* Bitmap of page sizes in use */ |
4f3f8d9d | 90 | iommu_fault_handler_t handler; |
77ca2332 | 91 | void *handler_token; |
0ff64f80 | 92 | struct iommu_domain_geometry geometry; |
0db2e5d1 | 93 | void *iova_cookie; |
4a77a6cf JR |
94 | }; |
95 | ||
1aed0748 JR |
96 | enum iommu_cap { |
97 | IOMMU_CAP_CACHE_COHERENCY, /* IOMMU can enforce cache coherent DMA | |
98 | transactions */ | |
99 | IOMMU_CAP_INTR_REMAP, /* IOMMU supports interrupt isolation */ | |
c4986649 | 100 | IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */ |
1aed0748 | 101 | }; |
dbb9fd86 | 102 | |
7cabf491 VS |
103 | /* |
104 | * Following constraints are specifc to FSL_PAMUV1: | |
105 | * -aperture must be power of 2, and naturally aligned | |
106 | * -number of windows must be power of 2, and address space size | |
107 | * of each window is determined by aperture size / # of windows | |
108 | * -the actual size of the mapped region of a window must be power | |
109 | * of 2 starting with 4KB and physical address must be naturally | |
110 | * aligned. | |
111 | * DOMAIN_ATTR_FSL_PAMUV1 corresponds to the above mentioned contraints. | |
112 | * The caller can invoke iommu_domain_get_attr to check if the underlying | |
113 | * iommu implementation supports these constraints. | |
114 | */ | |
115 | ||
0cd76dd1 | 116 | enum iommu_attr { |
0ff64f80 | 117 | DOMAIN_ATTR_GEOMETRY, |
d2e12160 | 118 | DOMAIN_ATTR_PAGING, |
69356712 | 119 | DOMAIN_ATTR_WINDOWS, |
7cabf491 VS |
120 | DOMAIN_ATTR_FSL_PAMU_STASH, |
121 | DOMAIN_ATTR_FSL_PAMU_ENABLE, | |
122 | DOMAIN_ATTR_FSL_PAMUV1, | |
c02607aa | 123 | DOMAIN_ATTR_NESTING, /* two stages of translation */ |
a8b8a88a | 124 | DOMAIN_ATTR_MAX, |
0cd76dd1 JR |
125 | }; |
126 | ||
d30ddcaa EA |
127 | /* These are the possible reserved region types */ |
128 | #define IOMMU_RESV_DIRECT (1 << 0) | |
129 | #define IOMMU_RESV_RESERVED (1 << 1) | |
130 | #define IOMMU_RESV_MSI (1 << 2) | |
131 | ||
a1015c2b | 132 | /** |
e5b5234a | 133 | * struct iommu_resv_region - descriptor for a reserved memory region |
a1015c2b JR |
134 | * @list: Linked list pointers |
135 | * @start: System physical start address of the region | |
136 | * @length: Length of the region in bytes | |
137 | * @prot: IOMMU Protection flags (READ/WRITE/...) | |
d30ddcaa | 138 | * @type: Type of the reserved region |
a1015c2b | 139 | */ |
e5b5234a | 140 | struct iommu_resv_region { |
a1015c2b JR |
141 | struct list_head list; |
142 | phys_addr_t start; | |
143 | size_t length; | |
144 | int prot; | |
d30ddcaa | 145 | int type; |
a1015c2b JR |
146 | }; |
147 | ||
39d4ebb9 JR |
148 | #ifdef CONFIG_IOMMU_API |
149 | ||
7d3002cc OBC |
150 | /** |
151 | * struct iommu_ops - iommu ops and capabilities | |
0d9bacb6 MD |
152 | * @capable: check capability |
153 | * @domain_alloc: allocate iommu domain | |
154 | * @domain_free: free iommu domain | |
7d3002cc OBC |
155 | * @attach_dev: attach device to an iommu domain |
156 | * @detach_dev: detach device from an iommu domain | |
157 | * @map: map a physically contiguous memory region to an iommu domain | |
158 | * @unmap: unmap a physically contiguous memory region from an iommu domain | |
315786eb OH |
159 | * @map_sg: map a scatter-gather list of physically contiguous memory chunks |
160 | * to an iommu domain | |
7d3002cc | 161 | * @iova_to_phys: translate iova to physical address |
d72e31c9 AW |
162 | * @add_device: add device to iommu grouping |
163 | * @remove_device: remove device from iommu grouping | |
0d9bacb6 | 164 | * @device_group: find iommu group for a particular device |
0cd76dd1 JR |
165 | * @domain_get_attr: Query domain attributes |
166 | * @domain_set_attr: Change domain attributes | |
e5b5234a EA |
167 | * @get_resv_regions: Request list of reserved regions for a device |
168 | * @put_resv_regions: Free list of reserved regions for a device | |
169 | * @apply_resv_region: Temporary helper call-back for iova reserved ranges | |
0d9bacb6 MD |
170 | * @domain_window_enable: Configure and enable a particular window for a domain |
171 | * @domain_window_disable: Disable a particular window for a domain | |
172 | * @domain_set_windows: Set the number of windows for a domain | |
173 | * @domain_get_windows: Return the number of windows for a domain | |
d0f60a44 | 174 | * @of_xlate: add OF master IDs to iommu grouping |
d16e0faa | 175 | * @pgsize_bitmap: bitmap of all possible supported page sizes |
7d3002cc | 176 | */ |
4a77a6cf | 177 | struct iommu_ops { |
3c0e0ca0 | 178 | bool (*capable)(enum iommu_cap); |
938c4709 JR |
179 | |
180 | /* Domain allocation and freeing by the iommu driver */ | |
8539c7c1 | 181 | struct iommu_domain *(*domain_alloc)(unsigned iommu_domain_type); |
938c4709 JR |
182 | void (*domain_free)(struct iommu_domain *); |
183 | ||
4a77a6cf JR |
184 | int (*attach_dev)(struct iommu_domain *domain, struct device *dev); |
185 | void (*detach_dev)(struct iommu_domain *domain, struct device *dev); | |
67651786 | 186 | int (*map)(struct iommu_domain *domain, unsigned long iova, |
5009065d OBC |
187 | phys_addr_t paddr, size_t size, int prot); |
188 | size_t (*unmap)(struct iommu_domain *domain, unsigned long iova, | |
189 | size_t size); | |
315786eb OH |
190 | size_t (*map_sg)(struct iommu_domain *domain, unsigned long iova, |
191 | struct scatterlist *sg, unsigned int nents, int prot); | |
bb5547ac | 192 | phys_addr_t (*iova_to_phys)(struct iommu_domain *domain, dma_addr_t iova); |
d72e31c9 AW |
193 | int (*add_device)(struct device *dev); |
194 | void (*remove_device)(struct device *dev); | |
46c6b2bc | 195 | struct iommu_group *(*device_group)(struct device *dev); |
0cd76dd1 JR |
196 | int (*domain_get_attr)(struct iommu_domain *domain, |
197 | enum iommu_attr attr, void *data); | |
198 | int (*domain_set_attr)(struct iommu_domain *domain, | |
199 | enum iommu_attr attr, void *data); | |
d7787d57 | 200 | |
e5b5234a EA |
201 | /* Request/Free a list of reserved regions for a device */ |
202 | void (*get_resv_regions)(struct device *dev, struct list_head *list); | |
203 | void (*put_resv_regions)(struct device *dev, struct list_head *list); | |
204 | void (*apply_resv_region)(struct device *dev, | |
205 | struct iommu_domain *domain, | |
206 | struct iommu_resv_region *region); | |
a1015c2b | 207 | |
d7787d57 JR |
208 | /* Window handling functions */ |
209 | int (*domain_window_enable)(struct iommu_domain *domain, u32 wnd_nr, | |
80f97f0f | 210 | phys_addr_t paddr, u64 size, int prot); |
d7787d57 | 211 | void (*domain_window_disable)(struct iommu_domain *domain, u32 wnd_nr); |
0d9bacb6 | 212 | /* Set the number of windows per domain */ |
69356712 | 213 | int (*domain_set_windows)(struct iommu_domain *domain, u32 w_count); |
0d9bacb6 | 214 | /* Get the number of windows per domain */ |
69356712 | 215 | u32 (*domain_get_windows)(struct iommu_domain *domain); |
d7787d57 | 216 | |
d0f60a44 | 217 | int (*of_xlate)(struct device *dev, struct of_phandle_args *args); |
d0f60a44 | 218 | |
7d3002cc | 219 | unsigned long pgsize_bitmap; |
4a77a6cf JR |
220 | }; |
221 | ||
b0119e87 JR |
222 | /** |
223 | * struct iommu_device - IOMMU core representation of one IOMMU hardware | |
224 | * instance | |
225 | * @list: Used by the iommu-core to keep a list of registered iommus | |
226 | * @ops: iommu-ops for talking to this iommu | |
39ab9555 | 227 | * @dev: struct device for sysfs handling |
b0119e87 JR |
228 | */ |
229 | struct iommu_device { | |
230 | struct list_head list; | |
231 | const struct iommu_ops *ops; | |
c73e1ac8 | 232 | struct fwnode_handle *fwnode; |
39ab9555 | 233 | struct device dev; |
b0119e87 JR |
234 | }; |
235 | ||
236 | int iommu_device_register(struct iommu_device *iommu); | |
237 | void iommu_device_unregister(struct iommu_device *iommu); | |
39ab9555 JR |
238 | int iommu_device_sysfs_add(struct iommu_device *iommu, |
239 | struct device *parent, | |
240 | const struct attribute_group **groups, | |
241 | const char *fmt, ...) __printf(4, 5); | |
242 | void iommu_device_sysfs_remove(struct iommu_device *iommu); | |
e3d10af1 JR |
243 | int iommu_device_link(struct iommu_device *iommu, struct device *link); |
244 | void iommu_device_unlink(struct iommu_device *iommu, struct device *link); | |
b0119e87 JR |
245 | |
246 | static inline void iommu_device_set_ops(struct iommu_device *iommu, | |
247 | const struct iommu_ops *ops) | |
248 | { | |
249 | iommu->ops = ops; | |
250 | } | |
251 | ||
c73e1ac8 JR |
252 | static inline void iommu_device_set_fwnode(struct iommu_device *iommu, |
253 | struct fwnode_handle *fwnode) | |
254 | { | |
255 | iommu->fwnode = fwnode; | |
256 | } | |
257 | ||
d72e31c9 AW |
258 | #define IOMMU_GROUP_NOTIFY_ADD_DEVICE 1 /* Device added */ |
259 | #define IOMMU_GROUP_NOTIFY_DEL_DEVICE 2 /* Pre Device removed */ | |
260 | #define IOMMU_GROUP_NOTIFY_BIND_DRIVER 3 /* Pre Driver bind */ | |
261 | #define IOMMU_GROUP_NOTIFY_BOUND_DRIVER 4 /* Post Driver bind */ | |
262 | #define IOMMU_GROUP_NOTIFY_UNBIND_DRIVER 5 /* Pre Driver unbind */ | |
263 | #define IOMMU_GROUP_NOTIFY_UNBOUND_DRIVER 6 /* Post Driver unbind */ | |
264 | ||
b22f6434 | 265 | extern int bus_set_iommu(struct bus_type *bus, const struct iommu_ops *ops); |
a1b60c1c | 266 | extern bool iommu_present(struct bus_type *bus); |
3c0e0ca0 | 267 | extern bool iommu_capable(struct bus_type *bus, enum iommu_cap cap); |
905d66c1 | 268 | extern struct iommu_domain *iommu_domain_alloc(struct bus_type *bus); |
aa16bea9 | 269 | extern struct iommu_group *iommu_group_get_by_id(int id); |
4a77a6cf JR |
270 | extern void iommu_domain_free(struct iommu_domain *domain); |
271 | extern int iommu_attach_device(struct iommu_domain *domain, | |
272 | struct device *dev); | |
273 | extern void iommu_detach_device(struct iommu_domain *domain, | |
274 | struct device *dev); | |
2c1296d9 | 275 | extern struct iommu_domain *iommu_get_domain_for_dev(struct device *dev); |
cefc53c7 | 276 | extern int iommu_map(struct iommu_domain *domain, unsigned long iova, |
7d3002cc OBC |
277 | phys_addr_t paddr, size_t size, int prot); |
278 | extern size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova, | |
279 | size_t size); | |
315786eb OH |
280 | extern size_t default_iommu_map_sg(struct iommu_domain *domain, unsigned long iova, |
281 | struct scatterlist *sg,unsigned int nents, | |
282 | int prot); | |
bb5547ac | 283 | extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova); |
4f3f8d9d | 284 | extern void iommu_set_fault_handler(struct iommu_domain *domain, |
77ca2332 | 285 | iommu_fault_handler_t handler, void *token); |
d72e31c9 | 286 | |
e5b5234a EA |
287 | extern void iommu_get_resv_regions(struct device *dev, struct list_head *list); |
288 | extern void iommu_put_resv_regions(struct device *dev, struct list_head *list); | |
d290f1e7 | 289 | extern int iommu_request_dm_for_dev(struct device *dev); |
2b20cbba EA |
290 | extern struct iommu_resv_region * |
291 | iommu_alloc_resv_region(phys_addr_t start, size_t length, int prot, int type); | |
6c65fb31 EA |
292 | extern int iommu_get_group_resv_regions(struct iommu_group *group, |
293 | struct list_head *head); | |
a1015c2b | 294 | |
d72e31c9 AW |
295 | extern int iommu_attach_group(struct iommu_domain *domain, |
296 | struct iommu_group *group); | |
297 | extern void iommu_detach_group(struct iommu_domain *domain, | |
298 | struct iommu_group *group); | |
299 | extern struct iommu_group *iommu_group_alloc(void); | |
300 | extern void *iommu_group_get_iommudata(struct iommu_group *group); | |
301 | extern void iommu_group_set_iommudata(struct iommu_group *group, | |
302 | void *iommu_data, | |
303 | void (*release)(void *iommu_data)); | |
304 | extern int iommu_group_set_name(struct iommu_group *group, const char *name); | |
305 | extern int iommu_group_add_device(struct iommu_group *group, | |
306 | struct device *dev); | |
307 | extern void iommu_group_remove_device(struct device *dev); | |
308 | extern int iommu_group_for_each_dev(struct iommu_group *group, void *data, | |
309 | int (*fn)(struct device *, void *)); | |
310 | extern struct iommu_group *iommu_group_get(struct device *dev); | |
13f59a78 | 311 | extern struct iommu_group *iommu_group_ref_get(struct iommu_group *group); |
d72e31c9 AW |
312 | extern void iommu_group_put(struct iommu_group *group); |
313 | extern int iommu_group_register_notifier(struct iommu_group *group, | |
314 | struct notifier_block *nb); | |
315 | extern int iommu_group_unregister_notifier(struct iommu_group *group, | |
316 | struct notifier_block *nb); | |
317 | extern int iommu_group_id(struct iommu_group *group); | |
104a1c13 | 318 | extern struct iommu_group *iommu_group_get_for_dev(struct device *dev); |
6827ca83 | 319 | extern struct iommu_domain *iommu_group_default_domain(struct iommu_group *); |
4f3f8d9d | 320 | |
0cd76dd1 JR |
321 | extern int iommu_domain_get_attr(struct iommu_domain *domain, enum iommu_attr, |
322 | void *data); | |
323 | extern int iommu_domain_set_attr(struct iommu_domain *domain, enum iommu_attr, | |
324 | void *data); | |
4f3f8d9d | 325 | |
d7787d57 JR |
326 | /* Window handling function prototypes */ |
327 | extern int iommu_domain_window_enable(struct iommu_domain *domain, u32 wnd_nr, | |
80f97f0f VS |
328 | phys_addr_t offset, u64 size, |
329 | int prot); | |
d7787d57 | 330 | extern void iommu_domain_window_disable(struct iommu_domain *domain, u32 wnd_nr); |
4f3f8d9d OBC |
331 | /** |
332 | * report_iommu_fault() - report about an IOMMU fault to the IOMMU framework | |
333 | * @domain: the iommu domain where the fault has happened | |
334 | * @dev: the device where the fault has happened | |
335 | * @iova: the faulting address | |
336 | * @flags: mmu fault flags (e.g. IOMMU_FAULT_READ/IOMMU_FAULT_WRITE/...) | |
337 | * | |
338 | * This function should be called by the low-level IOMMU implementations | |
339 | * whenever IOMMU faults happen, to allow high-level users, that are | |
340 | * interested in such events, to know about them. | |
341 | * | |
342 | * This event may be useful for several possible use cases: | |
343 | * - mere logging of the event | |
344 | * - dynamic TLB/PTE loading | |
345 | * - if restarting of the faulting device is required | |
346 | * | |
347 | * Returns 0 on success and an appropriate error code otherwise (if dynamic | |
348 | * PTE/TLB loading will one day be supported, implementations will be able | |
349 | * to tell whether it succeeded or not according to this return value). | |
0ed6d2d2 OBC |
350 | * |
351 | * Specifically, -ENOSYS is returned if a fault handler isn't installed | |
352 | * (though fault handlers can also return -ENOSYS, in case they want to | |
353 | * elicit the default behavior of the IOMMU drivers). | |
4f3f8d9d OBC |
354 | */ |
355 | static inline int report_iommu_fault(struct iommu_domain *domain, | |
356 | struct device *dev, unsigned long iova, int flags) | |
357 | { | |
0ed6d2d2 | 358 | int ret = -ENOSYS; |
4a77a6cf | 359 | |
4f3f8d9d OBC |
360 | /* |
361 | * if upper layers showed interest and installed a fault handler, | |
362 | * invoke it. | |
363 | */ | |
364 | if (domain->handler) | |
77ca2332 OBC |
365 | ret = domain->handler(domain, dev, iova, flags, |
366 | domain->handler_token); | |
4a77a6cf | 367 | |
56fa4849 | 368 | trace_io_page_fault(dev, iova, flags); |
4f3f8d9d | 369 | return ret; |
4a77a6cf JR |
370 | } |
371 | ||
315786eb OH |
372 | static inline size_t iommu_map_sg(struct iommu_domain *domain, |
373 | unsigned long iova, struct scatterlist *sg, | |
374 | unsigned int nents, int prot) | |
375 | { | |
376 | return domain->ops->map_sg(domain, iova, sg, nents, prot); | |
377 | } | |
378 | ||
5e62292b JR |
379 | /* PCI device grouping function */ |
380 | extern struct iommu_group *pci_device_group(struct device *dev); | |
6eab556a JR |
381 | /* Generic device grouping function */ |
382 | extern struct iommu_group *generic_device_group(struct device *dev); | |
5e62292b | 383 | |
57f98d2f RM |
384 | /** |
385 | * struct iommu_fwspec - per-device IOMMU instance data | |
386 | * @ops: ops for this device's IOMMU | |
387 | * @iommu_fwnode: firmware handle for this device's IOMMU | |
388 | * @iommu_priv: IOMMU driver private data for this device | |
389 | * @num_ids: number of associated device IDs | |
390 | * @ids: IDs which this device may present to the IOMMU | |
391 | */ | |
392 | struct iommu_fwspec { | |
393 | const struct iommu_ops *ops; | |
394 | struct fwnode_handle *iommu_fwnode; | |
395 | void *iommu_priv; | |
396 | unsigned int num_ids; | |
397 | u32 ids[1]; | |
398 | }; | |
399 | ||
400 | int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode, | |
401 | const struct iommu_ops *ops); | |
402 | void iommu_fwspec_free(struct device *dev); | |
403 | int iommu_fwspec_add_ids(struct device *dev, u32 *ids, int num_ids); | |
534766df | 404 | const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode); |
57f98d2f | 405 | |
4a77a6cf JR |
406 | #else /* CONFIG_IOMMU_API */ |
407 | ||
39d4ebb9 | 408 | struct iommu_ops {}; |
d72e31c9 | 409 | struct iommu_group {}; |
57f98d2f | 410 | struct iommu_fwspec {}; |
b0119e87 | 411 | struct iommu_device {}; |
4a77a6cf | 412 | |
a1b60c1c | 413 | static inline bool iommu_present(struct bus_type *bus) |
4a77a6cf JR |
414 | { |
415 | return false; | |
416 | } | |
417 | ||
3c0e0ca0 JR |
418 | static inline bool iommu_capable(struct bus_type *bus, enum iommu_cap cap) |
419 | { | |
420 | return false; | |
421 | } | |
422 | ||
905d66c1 | 423 | static inline struct iommu_domain *iommu_domain_alloc(struct bus_type *bus) |
4a77a6cf JR |
424 | { |
425 | return NULL; | |
426 | } | |
427 | ||
b62dfd29 AK |
428 | static inline struct iommu_group *iommu_group_get_by_id(int id) |
429 | { | |
430 | return NULL; | |
431 | } | |
432 | ||
4a77a6cf JR |
433 | static inline void iommu_domain_free(struct iommu_domain *domain) |
434 | { | |
435 | } | |
436 | ||
437 | static inline int iommu_attach_device(struct iommu_domain *domain, | |
438 | struct device *dev) | |
439 | { | |
440 | return -ENODEV; | |
441 | } | |
442 | ||
443 | static inline void iommu_detach_device(struct iommu_domain *domain, | |
444 | struct device *dev) | |
445 | { | |
446 | } | |
447 | ||
2c1296d9 JR |
448 | static inline struct iommu_domain *iommu_get_domain_for_dev(struct device *dev) |
449 | { | |
450 | return NULL; | |
451 | } | |
452 | ||
cefc53c7 JR |
453 | static inline int iommu_map(struct iommu_domain *domain, unsigned long iova, |
454 | phys_addr_t paddr, int gfp_order, int prot) | |
455 | { | |
456 | return -ENODEV; | |
457 | } | |
458 | ||
459 | static inline int iommu_unmap(struct iommu_domain *domain, unsigned long iova, | |
460 | int gfp_order) | |
461 | { | |
462 | return -ENODEV; | |
463 | } | |
464 | ||
315786eb OH |
465 | static inline size_t iommu_map_sg(struct iommu_domain *domain, |
466 | unsigned long iova, struct scatterlist *sg, | |
467 | unsigned int nents, int prot) | |
468 | { | |
469 | return -ENODEV; | |
470 | } | |
471 | ||
d7787d57 JR |
472 | static inline int iommu_domain_window_enable(struct iommu_domain *domain, |
473 | u32 wnd_nr, phys_addr_t paddr, | |
80f97f0f | 474 | u64 size, int prot) |
d7787d57 JR |
475 | { |
476 | return -ENODEV; | |
477 | } | |
478 | ||
479 | static inline void iommu_domain_window_disable(struct iommu_domain *domain, | |
480 | u32 wnd_nr) | |
481 | { | |
482 | } | |
483 | ||
bb5547ac | 484 | static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova) |
4a77a6cf JR |
485 | { |
486 | return 0; | |
487 | } | |
488 | ||
4f3f8d9d | 489 | static inline void iommu_set_fault_handler(struct iommu_domain *domain, |
77ca2332 | 490 | iommu_fault_handler_t handler, void *token) |
4f3f8d9d OBC |
491 | { |
492 | } | |
493 | ||
e5b5234a | 494 | static inline void iommu_get_resv_regions(struct device *dev, |
a1015c2b JR |
495 | struct list_head *list) |
496 | { | |
497 | } | |
498 | ||
e5b5234a | 499 | static inline void iommu_put_resv_regions(struct device *dev, |
a1015c2b JR |
500 | struct list_head *list) |
501 | { | |
502 | } | |
503 | ||
6c65fb31 EA |
504 | static inline int iommu_get_group_resv_regions(struct iommu_group *group, |
505 | struct list_head *head) | |
506 | { | |
507 | return -ENODEV; | |
508 | } | |
509 | ||
d290f1e7 JR |
510 | static inline int iommu_request_dm_for_dev(struct device *dev) |
511 | { | |
512 | return -ENODEV; | |
513 | } | |
514 | ||
bef83de5 AW |
515 | static inline int iommu_attach_group(struct iommu_domain *domain, |
516 | struct iommu_group *group) | |
d72e31c9 AW |
517 | { |
518 | return -ENODEV; | |
519 | } | |
520 | ||
bef83de5 AW |
521 | static inline void iommu_detach_group(struct iommu_domain *domain, |
522 | struct iommu_group *group) | |
d72e31c9 AW |
523 | { |
524 | } | |
525 | ||
bef83de5 | 526 | static inline struct iommu_group *iommu_group_alloc(void) |
d72e31c9 AW |
527 | { |
528 | return ERR_PTR(-ENODEV); | |
529 | } | |
530 | ||
bef83de5 | 531 | static inline void *iommu_group_get_iommudata(struct iommu_group *group) |
d72e31c9 AW |
532 | { |
533 | return NULL; | |
534 | } | |
535 | ||
bef83de5 AW |
536 | static inline void iommu_group_set_iommudata(struct iommu_group *group, |
537 | void *iommu_data, | |
538 | void (*release)(void *iommu_data)) | |
d72e31c9 AW |
539 | { |
540 | } | |
541 | ||
bef83de5 AW |
542 | static inline int iommu_group_set_name(struct iommu_group *group, |
543 | const char *name) | |
d72e31c9 AW |
544 | { |
545 | return -ENODEV; | |
546 | } | |
547 | ||
bef83de5 AW |
548 | static inline int iommu_group_add_device(struct iommu_group *group, |
549 | struct device *dev) | |
d72e31c9 AW |
550 | { |
551 | return -ENODEV; | |
552 | } | |
553 | ||
bef83de5 | 554 | static inline void iommu_group_remove_device(struct device *dev) |
d72e31c9 AW |
555 | { |
556 | } | |
557 | ||
bef83de5 AW |
558 | static inline int iommu_group_for_each_dev(struct iommu_group *group, |
559 | void *data, | |
560 | int (*fn)(struct device *, void *)) | |
d72e31c9 AW |
561 | { |
562 | return -ENODEV; | |
563 | } | |
564 | ||
bef83de5 | 565 | static inline struct iommu_group *iommu_group_get(struct device *dev) |
d72e31c9 AW |
566 | { |
567 | return NULL; | |
568 | } | |
569 | ||
bef83de5 | 570 | static inline void iommu_group_put(struct iommu_group *group) |
d72e31c9 AW |
571 | { |
572 | } | |
573 | ||
bef83de5 AW |
574 | static inline int iommu_group_register_notifier(struct iommu_group *group, |
575 | struct notifier_block *nb) | |
1460432c AW |
576 | { |
577 | return -ENODEV; | |
578 | } | |
579 | ||
bef83de5 AW |
580 | static inline int iommu_group_unregister_notifier(struct iommu_group *group, |
581 | struct notifier_block *nb) | |
d72e31c9 AW |
582 | { |
583 | return 0; | |
584 | } | |
585 | ||
bef83de5 | 586 | static inline int iommu_group_id(struct iommu_group *group) |
d72e31c9 AW |
587 | { |
588 | return -ENODEV; | |
589 | } | |
1460432c | 590 | |
0cd76dd1 JR |
591 | static inline int iommu_domain_get_attr(struct iommu_domain *domain, |
592 | enum iommu_attr attr, void *data) | |
593 | { | |
594 | return -EINVAL; | |
595 | } | |
596 | ||
597 | static inline int iommu_domain_set_attr(struct iommu_domain *domain, | |
598 | enum iommu_attr attr, void *data) | |
599 | { | |
600 | return -EINVAL; | |
601 | } | |
602 | ||
39ab9555 | 603 | static inline int iommu_device_register(struct iommu_device *iommu) |
c61959ec | 604 | { |
39ab9555 | 605 | return -ENODEV; |
c61959ec AW |
606 | } |
607 | ||
39ab9555 JR |
608 | static inline void iommu_device_set_ops(struct iommu_device *iommu, |
609 | const struct iommu_ops *ops) | |
c61959ec | 610 | { |
c61959ec AW |
611 | } |
612 | ||
c73e1ac8 JR |
613 | static inline void iommu_device_set_fwnode(struct iommu_device *iommu, |
614 | struct fwnode_handle *fwnode) | |
c61959ec | 615 | { |
c61959ec AW |
616 | } |
617 | ||
39ab9555 | 618 | static inline void iommu_device_unregister(struct iommu_device *iommu) |
c61959ec | 619 | { |
c61959ec AW |
620 | } |
621 | ||
39ab9555 JR |
622 | static inline int iommu_device_sysfs_add(struct iommu_device *iommu, |
623 | struct device *parent, | |
624 | const struct attribute_group **groups, | |
625 | const char *fmt, ...) | |
b0119e87 | 626 | { |
39ab9555 | 627 | return -ENODEV; |
b0119e87 JR |
628 | } |
629 | ||
39ab9555 | 630 | static inline void iommu_device_sysfs_remove(struct iommu_device *iommu) |
c61959ec AW |
631 | { |
632 | } | |
633 | ||
e09f8ea5 | 634 | static inline int iommu_device_link(struct device *dev, struct device *link) |
c61959ec AW |
635 | { |
636 | return -EINVAL; | |
637 | } | |
638 | ||
e09f8ea5 | 639 | static inline void iommu_device_unlink(struct device *dev, struct device *link) |
c61959ec AW |
640 | { |
641 | } | |
642 | ||
57f98d2f RM |
643 | static inline int iommu_fwspec_init(struct device *dev, |
644 | struct fwnode_handle *iommu_fwnode, | |
645 | const struct iommu_ops *ops) | |
646 | { | |
647 | return -ENODEV; | |
648 | } | |
649 | ||
650 | static inline void iommu_fwspec_free(struct device *dev) | |
651 | { | |
652 | } | |
653 | ||
654 | static inline int iommu_fwspec_add_ids(struct device *dev, u32 *ids, | |
655 | int num_ids) | |
656 | { | |
657 | return -ENODEV; | |
658 | } | |
659 | ||
e4f10ffe | 660 | static inline |
534766df | 661 | const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode) |
e4f10ffe LP |
662 | { |
663 | return NULL; | |
664 | } | |
665 | ||
4a77a6cf JR |
666 | #endif /* CONFIG_IOMMU_API */ |
667 | ||
668 | #endif /* __LINUX_IOMMU_H */ |