dma-direct: return appropriate error code from dma_direct_map_sg()
[linux-block.git] / include / linux / iommu.h
CommitLineData
45051539 1/* SPDX-License-Identifier: GPL-2.0-only */
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2/*
3 * Copyright (C) 2007-2008 Advanced Micro Devices, Inc.
4 * Author: Joerg Roedel <joerg.roedel@amd.com>
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5 */
6
7#ifndef __LINUX_IOMMU_H
8#define __LINUX_IOMMU_H
9
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10#include <linux/scatterlist.h>
11#include <linux/device.h>
12#include <linux/types.h>
74315ccc 13#include <linux/errno.h>
9a08d376 14#include <linux/err.h>
d0f60a44 15#include <linux/of.h>
808be0aa 16#include <linux/ioasid.h>
4e32348b 17#include <uapi/linux/iommu.h>
74315ccc 18
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19#define IOMMU_READ (1 << 0)
20#define IOMMU_WRITE (1 << 1)
21#define IOMMU_CACHE (1 << 2) /* DMA cache coherency */
a720b41c 22#define IOMMU_NOEXEC (1 << 3)
31e6850e 23#define IOMMU_MMIO (1 << 4) /* e.g. things like MSI doorbells */
579b2a65 24/*
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25 * Where the bus hardware includes a privilege level as part of its access type
26 * markings, and certain devices are capable of issuing transactions marked as
27 * either 'supervisor' or 'user', the IOMMU_PRIV flag requests that the other
28 * given permission flags only apply to accesses at the higher privilege level,
29 * and that unprivileged transactions should have as little access as possible.
30 * This would usually imply the same permissions as kernel mappings on the CPU,
31 * if the IOMMU page table format is equivalent.
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32 */
33#define IOMMU_PRIV (1 << 5)
4a77a6cf 34
905d66c1 35struct iommu_ops;
d72e31c9 36struct iommu_group;
ff21776d 37struct bus_type;
4a77a6cf 38struct device;
4f3f8d9d 39struct iommu_domain;
ba1eabfa 40struct notifier_block;
26b25a2b 41struct iommu_sva;
4e32348b 42struct iommu_fault_event;
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43
44/* iommu fault flags */
45#define IOMMU_FAULT_READ 0x0
46#define IOMMU_FAULT_WRITE 0x1
47
48typedef int (*iommu_fault_handler_t)(struct iommu_domain *,
77ca2332 49 struct device *, unsigned long, int, void *);
4e32348b 50typedef int (*iommu_dev_fault_handler_t)(struct iommu_fault *, void *);
4a77a6cf 51
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52struct iommu_domain_geometry {
53 dma_addr_t aperture_start; /* First address that can be mapped */
54 dma_addr_t aperture_end; /* Last address that can be mapped */
55 bool force_aperture; /* DMA only allowed in mappable range? */
56};
57
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58/* Domain feature flags */
59#define __IOMMU_DOMAIN_PAGING (1U << 0) /* Support for iommu_map/unmap */
60#define __IOMMU_DOMAIN_DMA_API (1U << 1) /* Domain for use in DMA-API
61 implementation */
62#define __IOMMU_DOMAIN_PT (1U << 2) /* Domain is identity mapped */
63
64/*
65 * This are the possible domain-types
66 *
67 * IOMMU_DOMAIN_BLOCKED - All DMA is blocked, can be used to isolate
68 * devices
69 * IOMMU_DOMAIN_IDENTITY - DMA addresses are system physical addresses
70 * IOMMU_DOMAIN_UNMANAGED - DMA mappings managed by IOMMU-API user, used
71 * for VMs
72 * IOMMU_DOMAIN_DMA - Internally used for DMA-API implementations.
73 * This flag allows IOMMU drivers to implement
74 * certain optimizations for these domains
75 */
76#define IOMMU_DOMAIN_BLOCKED (0U)
77#define IOMMU_DOMAIN_IDENTITY (__IOMMU_DOMAIN_PT)
78#define IOMMU_DOMAIN_UNMANAGED (__IOMMU_DOMAIN_PAGING)
79#define IOMMU_DOMAIN_DMA (__IOMMU_DOMAIN_PAGING | \
80 __IOMMU_DOMAIN_DMA_API)
81
4a77a6cf 82struct iommu_domain {
8539c7c1 83 unsigned type;
b22f6434 84 const struct iommu_ops *ops;
d16e0faa 85 unsigned long pgsize_bitmap; /* Bitmap of page sizes in use */
4f3f8d9d 86 iommu_fault_handler_t handler;
77ca2332 87 void *handler_token;
0ff64f80 88 struct iommu_domain_geometry geometry;
0db2e5d1 89 void *iova_cookie;
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90};
91
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92enum iommu_cap {
93 IOMMU_CAP_CACHE_COHERENCY, /* IOMMU can enforce cache coherent DMA
94 transactions */
95 IOMMU_CAP_INTR_REMAP, /* IOMMU supports interrupt isolation */
c4986649 96 IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */
1aed0748 97};
dbb9fd86 98
d30ddcaa 99/* These are the possible reserved region types */
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100enum iommu_resv_type {
101 /* Memory regions which must be mapped 1:1 at all times */
102 IOMMU_RESV_DIRECT,
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103 /*
104 * Memory regions which are advertised to be 1:1 but are
105 * commonly considered relaxable in some conditions,
106 * for instance in device assignment use case (USB, Graphics)
107 */
108 IOMMU_RESV_DIRECT_RELAXABLE,
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109 /* Arbitrary "never map this or give it to a device" address ranges */
110 IOMMU_RESV_RESERVED,
111 /* Hardware MSI region (untranslated) */
112 IOMMU_RESV_MSI,
113 /* Software-managed MSI translation window */
114 IOMMU_RESV_SW_MSI,
115};
d30ddcaa 116
a1015c2b 117/**
e5b5234a 118 * struct iommu_resv_region - descriptor for a reserved memory region
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119 * @list: Linked list pointers
120 * @start: System physical start address of the region
121 * @length: Length of the region in bytes
122 * @prot: IOMMU Protection flags (READ/WRITE/...)
d30ddcaa 123 * @type: Type of the reserved region
a1015c2b 124 */
e5b5234a 125struct iommu_resv_region {
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126 struct list_head list;
127 phys_addr_t start;
128 size_t length;
129 int prot;
9d3a4de4 130 enum iommu_resv_type type;
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131};
132
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133/**
134 * enum iommu_dev_features - Per device IOMMU features
135 * @IOMMU_DEV_FEAT_AUX: Auxiliary domain feature
136 * @IOMMU_DEV_FEAT_SVA: Shared Virtual Addresses
137 * @IOMMU_DEV_FEAT_IOPF: I/O Page Faults such as PRI or Stall. Generally
138 * enabling %IOMMU_DEV_FEAT_SVA requires
139 * %IOMMU_DEV_FEAT_IOPF, but some devices manage I/O Page
140 * Faults themselves instead of relying on the IOMMU. When
141 * supported, this feature must be enabled before and
142 * disabled after %IOMMU_DEV_FEAT_SVA.
143 *
144 * Device drivers query whether a feature is supported using
145 * iommu_dev_has_feature(), and enable it using iommu_dev_enable_feature().
146 */
a3a19592 147enum iommu_dev_features {
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148 IOMMU_DEV_FEAT_AUX,
149 IOMMU_DEV_FEAT_SVA,
150 IOMMU_DEV_FEAT_IOPF,
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151};
152
153#define IOMMU_PASID_INVALID (-1U)
154
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155#ifdef CONFIG_IOMMU_API
156
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157/**
158 * struct iommu_iotlb_gather - Range information for a pending IOTLB flush
159 *
160 * @start: IOVA representing the start of the range to be flushed
862c3715 161 * @end: IOVA representing the end of the range to be flushed (inclusive)
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162 * @pgsize: The interval at which to perform the flush
163 *
164 * This structure is intended to be updated by multiple calls to the
165 * ->unmap() function in struct iommu_ops before eventually being passed
166 * into ->iotlb_sync().
167 */
168struct iommu_iotlb_gather {
169 unsigned long start;
170 unsigned long end;
171 size_t pgsize;
2a2b8eaa 172 struct page *freelist;
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173};
174
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175/**
176 * struct iommu_ops - iommu ops and capabilities
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177 * @capable: check capability
178 * @domain_alloc: allocate iommu domain
179 * @domain_free: free iommu domain
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180 * @attach_dev: attach device to an iommu domain
181 * @detach_dev: detach device from an iommu domain
182 * @map: map a physically contiguous memory region to an iommu domain
183 * @unmap: unmap a physically contiguous memory region from an iommu domain
db04d4a3 184 * @flush_iotlb_all: Synchronously flush all hardware TLBs for this domain
2405bc16 185 * @iotlb_sync_map: Sync mappings created recently using @map to the hardware
51eb7809 186 * @iotlb_sync: Flush all queued ranges from the hardware TLBs and empty flush
add02cfd 187 * queue
7d3002cc 188 * @iova_to_phys: translate iova to physical address
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189 * @probe_device: Add device to iommu driver handling
190 * @release_device: Remove device from iommu driver handling
191 * @probe_finalize: Do final setup work after the device is added to an IOMMU
192 * group and attached to the groups domain
0d9bacb6 193 * @device_group: find iommu group for a particular device
7e147547 194 * @enable_nesting: Enable nesting
4fc52b81 195 * @set_pgtable_quirks: Set io page table quirks (IO_PGTABLE_QUIRK_*)
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196 * @get_resv_regions: Request list of reserved regions for a device
197 * @put_resv_regions: Free list of reserved regions for a device
198 * @apply_resv_region: Temporary helper call-back for iova reserved ranges
d0f60a44 199 * @of_xlate: add OF master IDs to iommu grouping
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200 * @is_attach_deferred: Check if domain attach should be deferred from iommu
201 * driver init to device driver init (default no)
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202 * @dev_has/enable/disable_feat: per device entries to check/enable/disable
203 * iommu specific features.
204 * @dev_feat_enabled: check enabled feature
205 * @aux_attach/detach_dev: aux-domain specific attach/detach entries.
206 * @aux_get_pasid: get the pasid given an aux-domain
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207 * @sva_bind: Bind process address space to device
208 * @sva_unbind: Unbind process address space from device
209 * @sva_get_pasid: Get PASID associated to a SVA handle
bf3255b3 210 * @page_response: handle page request response
4c7c171f 211 * @cache_invalidate: invalidate translation caches
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212 * @sva_bind_gpasid: bind guest pasid and mm
213 * @sva_unbind_gpasid: unbind guest pasid and mm
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214 * @def_domain_type: device default domain type, return value:
215 * - IOMMU_DOMAIN_IDENTITY: must use an identity domain
216 * - IOMMU_DOMAIN_DMA: must use a dma domain
217 * - 0: use the default setting
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218 * @pgsize_bitmap: bitmap of all possible supported page sizes
219 * @owner: Driver module providing these ops
7d3002cc 220 */
4a77a6cf 221struct iommu_ops {
3c0e0ca0 222 bool (*capable)(enum iommu_cap);
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223
224 /* Domain allocation and freeing by the iommu driver */
8539c7c1 225 struct iommu_domain *(*domain_alloc)(unsigned iommu_domain_type);
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226 void (*domain_free)(struct iommu_domain *);
227
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228 int (*attach_dev)(struct iommu_domain *domain, struct device *dev);
229 void (*detach_dev)(struct iommu_domain *domain, struct device *dev);
67651786 230 int (*map)(struct iommu_domain *domain, unsigned long iova,
781ca2de 231 phys_addr_t paddr, size_t size, int prot, gfp_t gfp);
5009065d 232 size_t (*unmap)(struct iommu_domain *domain, unsigned long iova,
56f8af5e 233 size_t size, struct iommu_iotlb_gather *iotlb_gather);
add02cfd 234 void (*flush_iotlb_all)(struct iommu_domain *domain);
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235 void (*iotlb_sync_map)(struct iommu_domain *domain, unsigned long iova,
236 size_t size);
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237 void (*iotlb_sync)(struct iommu_domain *domain,
238 struct iommu_iotlb_gather *iotlb_gather);
bb5547ac 239 phys_addr_t (*iova_to_phys)(struct iommu_domain *domain, dma_addr_t iova);
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240 struct iommu_device *(*probe_device)(struct device *dev);
241 void (*release_device)(struct device *dev);
242 void (*probe_finalize)(struct device *dev);
46c6b2bc 243 struct iommu_group *(*device_group)(struct device *dev);
7e147547 244 int (*enable_nesting)(struct iommu_domain *domain);
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245 int (*set_pgtable_quirks)(struct iommu_domain *domain,
246 unsigned long quirks);
d7787d57 247
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248 /* Request/Free a list of reserved regions for a device */
249 void (*get_resv_regions)(struct device *dev, struct list_head *list);
250 void (*put_resv_regions)(struct device *dev, struct list_head *list);
251 void (*apply_resv_region)(struct device *dev,
252 struct iommu_domain *domain,
253 struct iommu_resv_region *region);
a1015c2b 254
d0f60a44 255 int (*of_xlate)(struct device *dev, struct of_phandle_args *args);
e01d1913 256 bool (*is_attach_deferred)(struct iommu_domain *domain, struct device *dev);
d0f60a44 257
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258 /* Per device IOMMU features */
259 bool (*dev_has_feat)(struct device *dev, enum iommu_dev_features f);
260 bool (*dev_feat_enabled)(struct device *dev, enum iommu_dev_features f);
261 int (*dev_enable_feat)(struct device *dev, enum iommu_dev_features f);
262 int (*dev_disable_feat)(struct device *dev, enum iommu_dev_features f);
263
264 /* Aux-domain specific attach/detach entries */
265 int (*aux_attach_dev)(struct iommu_domain *domain, struct device *dev);
266 void (*aux_detach_dev)(struct iommu_domain *domain, struct device *dev);
267 int (*aux_get_pasid)(struct iommu_domain *domain, struct device *dev);
268
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269 struct iommu_sva *(*sva_bind)(struct device *dev, struct mm_struct *mm,
270 void *drvdata);
271 void (*sva_unbind)(struct iommu_sva *handle);
c7b6bac9 272 u32 (*sva_get_pasid)(struct iommu_sva *handle);
26b25a2b 273
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274 int (*page_response)(struct device *dev,
275 struct iommu_fault_event *evt,
276 struct iommu_page_response *msg);
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277 int (*cache_invalidate)(struct iommu_domain *domain, struct device *dev,
278 struct iommu_cache_invalidate_info *inv_info);
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279 int (*sva_bind_gpasid)(struct iommu_domain *domain,
280 struct device *dev, struct iommu_gpasid_bind_data *data);
281
c7b6bac9 282 int (*sva_unbind_gpasid)(struct device *dev, u32 pasid);
bf3255b3 283
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284 int (*def_domain_type)(struct device *dev);
285
7d3002cc 286 unsigned long pgsize_bitmap;
25f003de 287 struct module *owner;
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288};
289
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290/**
291 * struct iommu_device - IOMMU core representation of one IOMMU hardware
292 * instance
293 * @list: Used by the iommu-core to keep a list of registered iommus
294 * @ops: iommu-ops for talking to this iommu
39ab9555 295 * @dev: struct device for sysfs handling
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296 */
297struct iommu_device {
298 struct list_head list;
299 const struct iommu_ops *ops;
c73e1ac8 300 struct fwnode_handle *fwnode;
2926a2aa 301 struct device *dev;
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302};
303
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304/**
305 * struct iommu_fault_event - Generic fault event
306 *
307 * Can represent recoverable faults such as a page requests or
308 * unrecoverable faults such as DMA or IRQ remapping faults.
309 *
310 * @fault: fault descriptor
bf3255b3 311 * @list: pending fault event list, used for tracking responses
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312 */
313struct iommu_fault_event {
314 struct iommu_fault fault;
bf3255b3 315 struct list_head list;
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316};
317
318/**
319 * struct iommu_fault_param - per-device IOMMU fault data
320 * @handler: Callback function to handle IOMMU faults at device level
321 * @data: handler private data
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322 * @faults: holds the pending faults which needs response
323 * @lock: protect pending faults list
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324 */
325struct iommu_fault_param {
326 iommu_dev_fault_handler_t handler;
327 void *data;
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328 struct list_head faults;
329 struct mutex lock;
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330};
331
332/**
045a7042 333 * struct dev_iommu - Collection of per-device IOMMU data
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334 *
335 * @fault_param: IOMMU detected device fault reporting data
fc36479d 336 * @iopf_param: I/O Page Fault queue and data
72acd9df 337 * @fwspec: IOMMU fwspec data
a6a4c7e2 338 * @iommu_dev: IOMMU device this device is linked to
986d5ecc 339 * @priv: IOMMU Driver private data
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340 *
341 * TODO: migrate other per device data pointers under iommu_dev_data, e.g.
342 * struct iommu_group *iommu_group;
4e32348b 343 */
045a7042 344struct dev_iommu {
0c830e6b 345 struct mutex lock;
72acd9df 346 struct iommu_fault_param *fault_param;
fc36479d 347 struct iopf_device_param *iopf_param;
72acd9df 348 struct iommu_fwspec *fwspec;
a6a4c7e2 349 struct iommu_device *iommu_dev;
986d5ecc 350 void *priv;
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351};
352
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353int iommu_device_register(struct iommu_device *iommu,
354 const struct iommu_ops *ops,
355 struct device *hwdev);
b0119e87 356void iommu_device_unregister(struct iommu_device *iommu);
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357int iommu_device_sysfs_add(struct iommu_device *iommu,
358 struct device *parent,
359 const struct attribute_group **groups,
360 const char *fmt, ...) __printf(4, 5);
361void iommu_device_sysfs_remove(struct iommu_device *iommu);
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362int iommu_device_link(struct iommu_device *iommu, struct device *link);
363void iommu_device_unlink(struct iommu_device *iommu, struct device *link);
3ab65729 364int iommu_deferred_attach(struct device *dev, struct iommu_domain *domain);
b0119e87 365
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366static inline struct iommu_device *dev_to_iommu_device(struct device *dev)
367{
368 return (struct iommu_device *)dev_get_drvdata(dev);
369}
370
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371static inline void iommu_iotlb_gather_init(struct iommu_iotlb_gather *gather)
372{
373 *gather = (struct iommu_iotlb_gather) {
374 .start = ULONG_MAX,
375 };
376}
377
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378#define IOMMU_GROUP_NOTIFY_ADD_DEVICE 1 /* Device added */
379#define IOMMU_GROUP_NOTIFY_DEL_DEVICE 2 /* Pre Device removed */
380#define IOMMU_GROUP_NOTIFY_BIND_DRIVER 3 /* Pre Driver bind */
381#define IOMMU_GROUP_NOTIFY_BOUND_DRIVER 4 /* Post Driver bind */
382#define IOMMU_GROUP_NOTIFY_UNBIND_DRIVER 5 /* Pre Driver unbind */
383#define IOMMU_GROUP_NOTIFY_UNBOUND_DRIVER 6 /* Post Driver unbind */
384
b22f6434 385extern int bus_set_iommu(struct bus_type *bus, const struct iommu_ops *ops);
5012c396 386extern int bus_iommu_probe(struct bus_type *bus);
a1b60c1c 387extern bool iommu_present(struct bus_type *bus);
3c0e0ca0 388extern bool iommu_capable(struct bus_type *bus, enum iommu_cap cap);
905d66c1 389extern struct iommu_domain *iommu_domain_alloc(struct bus_type *bus);
aa16bea9 390extern struct iommu_group *iommu_group_get_by_id(int id);
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391extern void iommu_domain_free(struct iommu_domain *domain);
392extern int iommu_attach_device(struct iommu_domain *domain,
393 struct device *dev);
394extern void iommu_detach_device(struct iommu_domain *domain,
395 struct device *dev);
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396extern int iommu_uapi_cache_invalidate(struct iommu_domain *domain,
397 struct device *dev,
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398 void __user *uinfo);
399
23cc3493 400extern int iommu_uapi_sva_bind_gpasid(struct iommu_domain *domain,
d9057381 401 struct device *dev, void __user *udata);
23cc3493 402extern int iommu_uapi_sva_unbind_gpasid(struct iommu_domain *domain,
d9057381 403 struct device *dev, void __user *udata);
808be0aa 404extern int iommu_sva_unbind_gpasid(struct iommu_domain *domain,
d9057381 405 struct device *dev, ioasid_t pasid);
2c1296d9 406extern struct iommu_domain *iommu_get_domain_for_dev(struct device *dev);
6af588fe 407extern struct iommu_domain *iommu_get_dma_domain(struct device *dev);
cefc53c7 408extern int iommu_map(struct iommu_domain *domain, unsigned long iova,
7d3002cc 409 phys_addr_t paddr, size_t size, int prot);
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410extern int iommu_map_atomic(struct iommu_domain *domain, unsigned long iova,
411 phys_addr_t paddr, size_t size, int prot);
7d3002cc 412extern size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova,
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413 size_t size);
414extern size_t iommu_unmap_fast(struct iommu_domain *domain,
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415 unsigned long iova, size_t size,
416 struct iommu_iotlb_gather *iotlb_gather);
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417extern size_t iommu_map_sg(struct iommu_domain *domain, unsigned long iova,
418 struct scatterlist *sg,unsigned int nents, int prot);
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419extern size_t iommu_map_sg_atomic(struct iommu_domain *domain,
420 unsigned long iova, struct scatterlist *sg,
421 unsigned int nents, int prot);
bb5547ac 422extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova);
4f3f8d9d 423extern void iommu_set_fault_handler(struct iommu_domain *domain,
77ca2332 424 iommu_fault_handler_t handler, void *token);
d72e31c9 425
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426extern void iommu_get_resv_regions(struct device *dev, struct list_head *list);
427extern void iommu_put_resv_regions(struct device *dev, struct list_head *list);
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428extern void generic_iommu_put_resv_regions(struct device *dev,
429 struct list_head *list);
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JR
430extern void iommu_set_default_passthrough(bool cmd_line);
431extern void iommu_set_default_translated(bool cmd_line);
432extern bool iommu_default_passthrough(void);
2b20cbba 433extern struct iommu_resv_region *
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434iommu_alloc_resv_region(phys_addr_t start, size_t length, int prot,
435 enum iommu_resv_type type);
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436extern int iommu_get_group_resv_regions(struct iommu_group *group,
437 struct list_head *head);
a1015c2b 438
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AW
439extern int iommu_attach_group(struct iommu_domain *domain,
440 struct iommu_group *group);
441extern void iommu_detach_group(struct iommu_domain *domain,
442 struct iommu_group *group);
443extern struct iommu_group *iommu_group_alloc(void);
444extern void *iommu_group_get_iommudata(struct iommu_group *group);
445extern void iommu_group_set_iommudata(struct iommu_group *group,
446 void *iommu_data,
447 void (*release)(void *iommu_data));
448extern int iommu_group_set_name(struct iommu_group *group, const char *name);
449extern int iommu_group_add_device(struct iommu_group *group,
450 struct device *dev);
451extern void iommu_group_remove_device(struct device *dev);
452extern int iommu_group_for_each_dev(struct iommu_group *group, void *data,
453 int (*fn)(struct device *, void *));
454extern struct iommu_group *iommu_group_get(struct device *dev);
13f59a78 455extern struct iommu_group *iommu_group_ref_get(struct iommu_group *group);
d72e31c9
AW
456extern void iommu_group_put(struct iommu_group *group);
457extern int iommu_group_register_notifier(struct iommu_group *group,
458 struct notifier_block *nb);
459extern int iommu_group_unregister_notifier(struct iommu_group *group,
460 struct notifier_block *nb);
0c830e6b
JP
461extern int iommu_register_device_fault_handler(struct device *dev,
462 iommu_dev_fault_handler_t handler,
463 void *data);
464
465extern int iommu_unregister_device_fault_handler(struct device *dev);
466
467extern int iommu_report_device_fault(struct device *dev,
468 struct iommu_fault_event *evt);
bf3255b3
JPB
469extern int iommu_page_response(struct device *dev,
470 struct iommu_page_response *msg);
0c830e6b 471
d72e31c9 472extern int iommu_group_id(struct iommu_group *group);
6827ca83 473extern struct iommu_domain *iommu_group_default_domain(struct iommu_group *);
4f3f8d9d 474
7e147547 475int iommu_enable_nesting(struct iommu_domain *domain);
4fc52b81
CH
476int iommu_set_pgtable_quirks(struct iommu_domain *domain,
477 unsigned long quirks);
4f3f8d9d 478
a250c23f
RM
479void iommu_set_dma_strict(bool val);
480bool iommu_get_dma_strict(struct iommu_domain *domain);
207c6e36
JR
481
482extern int report_iommu_fault(struct iommu_domain *domain, struct device *dev,
483 unsigned long iova, int flags);
4a77a6cf 484
aae4c8e2 485static inline void iommu_flush_iotlb_all(struct iommu_domain *domain)
add02cfd
JR
486{
487 if (domain->ops->flush_iotlb_all)
488 domain->ops->flush_iotlb_all(domain);
489}
490
aae4c8e2 491static inline void iommu_iotlb_sync(struct iommu_domain *domain,
a7d20dc1 492 struct iommu_iotlb_gather *iotlb_gather)
add02cfd
JR
493{
494 if (domain->ops->iotlb_sync)
56f8af5e 495 domain->ops->iotlb_sync(domain, iotlb_gather);
a7d20dc1
WD
496
497 iommu_iotlb_gather_init(iotlb_gather);
add02cfd
JR
498}
499
4fcf8544
WD
500static inline void iommu_iotlb_gather_add_page(struct iommu_domain *domain,
501 struct iommu_iotlb_gather *gather,
502 unsigned long iova, size_t size)
503{
862c3715 504 unsigned long start = iova, end = start + size - 1;
4fcf8544
WD
505
506 /*
507 * If the new page is disjoint from the current range or is mapped at
508 * a different granularity, then sync the TLB so that the gather
509 * structure can be rewritten.
510 */
511 if (gather->pgsize != size ||
3431c3f6 512 end + 1 < gather->start || start > gather->end + 1) {
4fcf8544 513 if (gather->pgsize)
aae4c8e2 514 iommu_iotlb_sync(domain, gather);
4fcf8544
WD
515 gather->pgsize = size;
516 }
517
518 if (gather->end < end)
519 gather->end = end;
520
521 if (gather->start > start)
522 gather->start = start;
523}
524
5e62292b
JR
525/* PCI device grouping function */
526extern struct iommu_group *pci_device_group(struct device *dev);
6eab556a
JR
527/* Generic device grouping function */
528extern struct iommu_group *generic_device_group(struct device *dev);
eab03e2a
NG
529/* FSL-MC device grouping function */
530struct iommu_group *fsl_mc_device_group(struct device *dev);
5e62292b 531
57f98d2f
RM
532/**
533 * struct iommu_fwspec - per-device IOMMU instance data
534 * @ops: ops for this device's IOMMU
535 * @iommu_fwnode: firmware handle for this device's IOMMU
0d35309a 536 * @flags: IOMMU_FWSPEC_* flags
57f98d2f
RM
537 * @num_ids: number of associated device IDs
538 * @ids: IDs which this device may present to the IOMMU
539 */
540struct iommu_fwspec {
541 const struct iommu_ops *ops;
542 struct fwnode_handle *iommu_fwnode;
5702ee24 543 u32 flags;
57f98d2f 544 unsigned int num_ids;
098accf2 545 u32 ids[];
57f98d2f
RM
546};
547
5702ee24
JPB
548/* ATS is supported */
549#define IOMMU_FWSPEC_PCI_RC_ATS (1 << 0)
550
26b25a2b
JPB
551/**
552 * struct iommu_sva - handle to a device-mm bond
553 */
554struct iommu_sva {
555 struct device *dev;
26b25a2b
JPB
556};
557
57f98d2f
RM
558int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode,
559 const struct iommu_ops *ops);
560void iommu_fwspec_free(struct device *dev);
561int iommu_fwspec_add_ids(struct device *dev, u32 *ids, int num_ids);
534766df 562const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode);
57f98d2f 563
b4ef725e
JR
564static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev)
565{
72acd9df
JR
566 if (dev->iommu)
567 return dev->iommu->fwspec;
568 else
569 return NULL;
b4ef725e
JR
570}
571
572static inline void dev_iommu_fwspec_set(struct device *dev,
573 struct iommu_fwspec *fwspec)
574{
72acd9df 575 dev->iommu->fwspec = fwspec;
b4ef725e
JR
576}
577
f9867f41
JR
578static inline void *dev_iommu_priv_get(struct device *dev)
579{
4c9fb5d9
JR
580 if (dev->iommu)
581 return dev->iommu->priv;
582 else
583 return NULL;
f9867f41
JR
584}
585
586static inline void dev_iommu_priv_set(struct device *dev, void *priv)
587{
986d5ecc 588 dev->iommu->priv = priv;
f9867f41
JR
589}
590
cc5aed44
JR
591int iommu_probe_device(struct device *dev);
592void iommu_release_device(struct device *dev);
593
a3a19592
LB
594int iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features f);
595int iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features f);
596bool iommu_dev_feature_enabled(struct device *dev, enum iommu_dev_features f);
597int iommu_aux_attach_device(struct iommu_domain *domain, struct device *dev);
598void iommu_aux_detach_device(struct iommu_domain *domain, struct device *dev);
599int iommu_aux_get_pasid(struct iommu_domain *domain, struct device *dev);
600
26b25a2b
JPB
601struct iommu_sva *iommu_sva_bind_device(struct device *dev,
602 struct mm_struct *mm,
603 void *drvdata);
604void iommu_sva_unbind_device(struct iommu_sva *handle);
c7b6bac9 605u32 iommu_sva_get_pasid(struct iommu_sva *handle);
26b25a2b 606
4a77a6cf
JR
607#else /* CONFIG_IOMMU_API */
608
39d4ebb9 609struct iommu_ops {};
d72e31c9 610struct iommu_group {};
57f98d2f 611struct iommu_fwspec {};
b0119e87 612struct iommu_device {};
4e32348b 613struct iommu_fault_param {};
a7d20dc1 614struct iommu_iotlb_gather {};
4a77a6cf 615
a1b60c1c 616static inline bool iommu_present(struct bus_type *bus)
4a77a6cf
JR
617{
618 return false;
619}
620
3c0e0ca0
JR
621static inline bool iommu_capable(struct bus_type *bus, enum iommu_cap cap)
622{
623 return false;
624}
625
905d66c1 626static inline struct iommu_domain *iommu_domain_alloc(struct bus_type *bus)
4a77a6cf
JR
627{
628 return NULL;
629}
630
b62dfd29
AK
631static inline struct iommu_group *iommu_group_get_by_id(int id)
632{
633 return NULL;
634}
635
4a77a6cf
JR
636static inline void iommu_domain_free(struct iommu_domain *domain)
637{
638}
639
640static inline int iommu_attach_device(struct iommu_domain *domain,
641 struct device *dev)
642{
643 return -ENODEV;
644}
645
646static inline void iommu_detach_device(struct iommu_domain *domain,
647 struct device *dev)
648{
649}
650
2c1296d9
JR
651static inline struct iommu_domain *iommu_get_domain_for_dev(struct device *dev)
652{
653 return NULL;
654}
655
cefc53c7 656static inline int iommu_map(struct iommu_domain *domain, unsigned long iova,
ebae3e83 657 phys_addr_t paddr, size_t size, int prot)
cefc53c7
JR
658{
659 return -ENODEV;
660}
661
781ca2de
TM
662static inline int iommu_map_atomic(struct iommu_domain *domain,
663 unsigned long iova, phys_addr_t paddr,
664 size_t size, int prot)
665{
666 return -ENODEV;
667}
668
c5611a87
SS
669static inline size_t iommu_unmap(struct iommu_domain *domain,
670 unsigned long iova, size_t size)
cefc53c7 671{
c5611a87 672 return 0;
cefc53c7
JR
673}
674
c5611a87 675static inline size_t iommu_unmap_fast(struct iommu_domain *domain,
a7d20dc1
WD
676 unsigned long iova, int gfp_order,
677 struct iommu_iotlb_gather *iotlb_gather)
cefc53c7 678{
c5611a87 679 return 0;
cefc53c7
JR
680}
681
315786eb
OH
682static inline size_t iommu_map_sg(struct iommu_domain *domain,
683 unsigned long iova, struct scatterlist *sg,
684 unsigned int nents, int prot)
685{
c5611a87 686 return 0;
315786eb
OH
687}
688
781ca2de
TM
689static inline size_t iommu_map_sg_atomic(struct iommu_domain *domain,
690 unsigned long iova, struct scatterlist *sg,
691 unsigned int nents, int prot)
692{
693 return 0;
694}
695
aae4c8e2 696static inline void iommu_flush_iotlb_all(struct iommu_domain *domain)
add02cfd
JR
697{
698}
699
aae4c8e2 700static inline void iommu_iotlb_sync(struct iommu_domain *domain,
a7d20dc1 701 struct iommu_iotlb_gather *iotlb_gather)
add02cfd
JR
702{
703}
704
bb5547ac 705static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova)
4a77a6cf
JR
706{
707 return 0;
708}
709
4f3f8d9d 710static inline void iommu_set_fault_handler(struct iommu_domain *domain,
77ca2332 711 iommu_fault_handler_t handler, void *token)
4f3f8d9d
OBC
712{
713}
714
e5b5234a 715static inline void iommu_get_resv_regions(struct device *dev,
a1015c2b
JR
716 struct list_head *list)
717{
718}
719
e5b5234a 720static inline void iommu_put_resv_regions(struct device *dev,
a1015c2b
JR
721 struct list_head *list)
722{
723}
724
6c65fb31
EA
725static inline int iommu_get_group_resv_regions(struct iommu_group *group,
726 struct list_head *head)
727{
728 return -ENODEV;
729}
730
8a69961c
JR
731static inline void iommu_set_default_passthrough(bool cmd_line)
732{
733}
734
735static inline void iommu_set_default_translated(bool cmd_line)
736{
737}
738
739static inline bool iommu_default_passthrough(void)
740{
741 return true;
742}
743
bef83de5
AW
744static inline int iommu_attach_group(struct iommu_domain *domain,
745 struct iommu_group *group)
d72e31c9
AW
746{
747 return -ENODEV;
748}
749
bef83de5
AW
750static inline void iommu_detach_group(struct iommu_domain *domain,
751 struct iommu_group *group)
d72e31c9
AW
752{
753}
754
bef83de5 755static inline struct iommu_group *iommu_group_alloc(void)
d72e31c9
AW
756{
757 return ERR_PTR(-ENODEV);
758}
759
bef83de5 760static inline void *iommu_group_get_iommudata(struct iommu_group *group)
d72e31c9
AW
761{
762 return NULL;
763}
764
bef83de5
AW
765static inline void iommu_group_set_iommudata(struct iommu_group *group,
766 void *iommu_data,
767 void (*release)(void *iommu_data))
d72e31c9
AW
768{
769}
770
bef83de5
AW
771static inline int iommu_group_set_name(struct iommu_group *group,
772 const char *name)
d72e31c9
AW
773{
774 return -ENODEV;
775}
776
bef83de5
AW
777static inline int iommu_group_add_device(struct iommu_group *group,
778 struct device *dev)
d72e31c9
AW
779{
780 return -ENODEV;
781}
782
bef83de5 783static inline void iommu_group_remove_device(struct device *dev)
d72e31c9
AW
784{
785}
786
bef83de5
AW
787static inline int iommu_group_for_each_dev(struct iommu_group *group,
788 void *data,
789 int (*fn)(struct device *, void *))
d72e31c9
AW
790{
791 return -ENODEV;
792}
793
bef83de5 794static inline struct iommu_group *iommu_group_get(struct device *dev)
d72e31c9
AW
795{
796 return NULL;
797}
798
bef83de5 799static inline void iommu_group_put(struct iommu_group *group)
d72e31c9
AW
800{
801}
802
bef83de5
AW
803static inline int iommu_group_register_notifier(struct iommu_group *group,
804 struct notifier_block *nb)
1460432c
AW
805{
806 return -ENODEV;
807}
808
bef83de5
AW
809static inline int iommu_group_unregister_notifier(struct iommu_group *group,
810 struct notifier_block *nb)
d72e31c9
AW
811{
812 return 0;
813}
814
0c830e6b
JP
815static inline
816int iommu_register_device_fault_handler(struct device *dev,
817 iommu_dev_fault_handler_t handler,
818 void *data)
819{
820 return -ENODEV;
821}
822
823static inline int iommu_unregister_device_fault_handler(struct device *dev)
824{
825 return 0;
826}
827
828static inline
829int iommu_report_device_fault(struct device *dev, struct iommu_fault_event *evt)
830{
831 return -ENODEV;
832}
833
bf3255b3
JPB
834static inline int iommu_page_response(struct device *dev,
835 struct iommu_page_response *msg)
836{
837 return -ENODEV;
838}
839
bef83de5 840static inline int iommu_group_id(struct iommu_group *group)
d72e31c9
AW
841{
842 return -ENODEV;
843}
1460432c 844
4fc52b81
CH
845static inline int iommu_set_pgtable_quirks(struct iommu_domain *domain,
846 unsigned long quirks)
0cd76dd1 847{
4fc52b81 848 return 0;
0cd76dd1
JR
849}
850
2d471b20
RM
851static inline int iommu_device_register(struct iommu_device *iommu,
852 const struct iommu_ops *ops,
853 struct device *hwdev)
c61959ec 854{
39ab9555 855 return -ENODEV;
c61959ec
AW
856}
857
2926a2aa
JR
858static inline struct iommu_device *dev_to_iommu_device(struct device *dev)
859{
860 return NULL;
861}
862
a7d20dc1
WD
863static inline void iommu_iotlb_gather_init(struct iommu_iotlb_gather *gather)
864{
865}
866
4fcf8544
WD
867static inline void iommu_iotlb_gather_add_page(struct iommu_domain *domain,
868 struct iommu_iotlb_gather *gather,
869 unsigned long iova, size_t size)
870{
871}
872
39ab9555 873static inline void iommu_device_unregister(struct iommu_device *iommu)
c61959ec 874{
c61959ec
AW
875}
876
39ab9555
JR
877static inline int iommu_device_sysfs_add(struct iommu_device *iommu,
878 struct device *parent,
879 const struct attribute_group **groups,
880 const char *fmt, ...)
b0119e87 881{
39ab9555 882 return -ENODEV;
b0119e87
JR
883}
884
39ab9555 885static inline void iommu_device_sysfs_remove(struct iommu_device *iommu)
c61959ec
AW
886{
887}
888
e09f8ea5 889static inline int iommu_device_link(struct device *dev, struct device *link)
c61959ec
AW
890{
891 return -EINVAL;
892}
893
e09f8ea5 894static inline void iommu_device_unlink(struct device *dev, struct device *link)
c61959ec
AW
895{
896}
897
57f98d2f
RM
898static inline int iommu_fwspec_init(struct device *dev,
899 struct fwnode_handle *iommu_fwnode,
900 const struct iommu_ops *ops)
901{
902 return -ENODEV;
903}
904
905static inline void iommu_fwspec_free(struct device *dev)
906{
907}
908
909static inline int iommu_fwspec_add_ids(struct device *dev, u32 *ids,
910 int num_ids)
911{
912 return -ENODEV;
913}
914
e4f10ffe 915static inline
534766df 916const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode)
e4f10ffe
LP
917{
918 return NULL;
919}
920
a3a19592
LB
921static inline bool
922iommu_dev_feature_enabled(struct device *dev, enum iommu_dev_features feat)
923{
924 return false;
925}
926
927static inline int
928iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features feat)
929{
930 return -ENODEV;
931}
932
933static inline int
934iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features feat)
935{
936 return -ENODEV;
937}
938
939static inline int
940iommu_aux_attach_device(struct iommu_domain *domain, struct device *dev)
941{
942 return -ENODEV;
943}
944
945static inline void
946iommu_aux_detach_device(struct iommu_domain *domain, struct device *dev)
947{
948}
949
950static inline int
951iommu_aux_get_pasid(struct iommu_domain *domain, struct device *dev)
952{
953 return -ENODEV;
954}
955
26b25a2b
JPB
956static inline struct iommu_sva *
957iommu_sva_bind_device(struct device *dev, struct mm_struct *mm, void *drvdata)
958{
959 return NULL;
960}
961
962static inline void iommu_sva_unbind_device(struct iommu_sva *handle)
963{
964}
965
c7b6bac9 966static inline u32 iommu_sva_get_pasid(struct iommu_sva *handle)
26b25a2b
JPB
967{
968 return IOMMU_PASID_INVALID;
969}
970
4c7c171f 971static inline int
d9057381
JP
972iommu_uapi_cache_invalidate(struct iommu_domain *domain,
973 struct device *dev,
974 struct iommu_cache_invalidate_info *inv_info)
4c7c171f
YL
975{
976 return -ENODEV;
977}
23cc3493
JP
978
979static inline int iommu_uapi_sva_bind_gpasid(struct iommu_domain *domain,
d9057381 980 struct device *dev, void __user *udata)
808be0aa
JP
981{
982 return -ENODEV;
983}
984
23cc3493 985static inline int iommu_uapi_sva_unbind_gpasid(struct iommu_domain *domain,
d9057381 986 struct device *dev, void __user *udata)
808be0aa
JP
987{
988 return -ENODEV;
989}
990
991static inline int iommu_sva_unbind_gpasid(struct iommu_domain *domain,
d9057381
JP
992 struct device *dev,
993 ioasid_t pasid)
808be0aa
JP
994{
995 return -ENODEV;
996}
4c7c171f 997
0008d0c3
JR
998static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev)
999{
1000 return NULL;
1001}
4a77a6cf
JR
1002#endif /* CONFIG_IOMMU_API */
1003
ca37faf3
MS
1004/**
1005 * iommu_map_sgtable - Map the given buffer to the IOMMU domain
1006 * @domain: The IOMMU domain to perform the mapping
1007 * @iova: The start address to map the buffer
1008 * @sgt: The sg_table object describing the buffer
1009 * @prot: IOMMU protection bits
1010 *
1011 * Creates a mapping at @iova for the buffer described by a scatterlist
1012 * stored in the given sg_table object in the provided IOMMU domain.
1013 */
1014static inline size_t iommu_map_sgtable(struct iommu_domain *domain,
1015 unsigned long iova, struct sg_table *sgt, int prot)
1016{
1017 return iommu_map_sg(domain, iova, sgt->sgl, sgt->orig_nents, prot);
1018}
1019
bad614b2
GH
1020#ifdef CONFIG_IOMMU_DEBUGFS
1021extern struct dentry *iommu_debugfs_dir;
1022void iommu_debugfs_setup(void);
1023#else
1024static inline void iommu_debugfs_setup(void) {}
1025#endif
1026
4a77a6cf 1027#endif /* __LINUX_IOMMU_H */