iommu/virtio: Use accessor functions for iommu private data
[linux-block.git] / include / linux / iommu.h
CommitLineData
45051539 1/* SPDX-License-Identifier: GPL-2.0-only */
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2/*
3 * Copyright (C) 2007-2008 Advanced Micro Devices, Inc.
4 * Author: Joerg Roedel <joerg.roedel@amd.com>
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5 */
6
7#ifndef __LINUX_IOMMU_H
8#define __LINUX_IOMMU_H
9
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10#include <linux/scatterlist.h>
11#include <linux/device.h>
12#include <linux/types.h>
74315ccc 13#include <linux/errno.h>
9a08d376 14#include <linux/err.h>
d0f60a44 15#include <linux/of.h>
808be0aa 16#include <linux/ioasid.h>
4e32348b 17#include <uapi/linux/iommu.h>
74315ccc 18
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19#define IOMMU_READ (1 << 0)
20#define IOMMU_WRITE (1 << 1)
21#define IOMMU_CACHE (1 << 2) /* DMA cache coherency */
a720b41c 22#define IOMMU_NOEXEC (1 << 3)
31e6850e 23#define IOMMU_MMIO (1 << 4) /* e.g. things like MSI doorbells */
579b2a65 24/*
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25 * Where the bus hardware includes a privilege level as part of its access type
26 * markings, and certain devices are capable of issuing transactions marked as
27 * either 'supervisor' or 'user', the IOMMU_PRIV flag requests that the other
28 * given permission flags only apply to accesses at the higher privilege level,
29 * and that unprivileged transactions should have as little access as possible.
30 * This would usually imply the same permissions as kernel mappings on the CPU,
31 * if the IOMMU page table format is equivalent.
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32 */
33#define IOMMU_PRIV (1 << 5)
90ec7a76 34/*
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35 * Non-coherent masters can use this page protection flag to set cacheable
36 * memory attributes for only a transparent outer level of cache, also known as
37 * the last-level or system cache.
90ec7a76 38 */
dd5ddd3c 39#define IOMMU_SYS_CACHE_ONLY (1 << 6)
4a77a6cf 40
905d66c1 41struct iommu_ops;
d72e31c9 42struct iommu_group;
ff21776d 43struct bus_type;
4a77a6cf 44struct device;
4f3f8d9d 45struct iommu_domain;
ba1eabfa 46struct notifier_block;
26b25a2b 47struct iommu_sva;
4e32348b 48struct iommu_fault_event;
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49
50/* iommu fault flags */
51#define IOMMU_FAULT_READ 0x0
52#define IOMMU_FAULT_WRITE 0x1
53
54typedef int (*iommu_fault_handler_t)(struct iommu_domain *,
77ca2332 55 struct device *, unsigned long, int, void *);
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56typedef int (*iommu_mm_exit_handler_t)(struct device *dev, struct iommu_sva *,
57 void *);
4e32348b 58typedef int (*iommu_dev_fault_handler_t)(struct iommu_fault *, void *);
4a77a6cf 59
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60struct iommu_domain_geometry {
61 dma_addr_t aperture_start; /* First address that can be mapped */
62 dma_addr_t aperture_end; /* Last address that can be mapped */
63 bool force_aperture; /* DMA only allowed in mappable range? */
64};
65
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66/* Domain feature flags */
67#define __IOMMU_DOMAIN_PAGING (1U << 0) /* Support for iommu_map/unmap */
68#define __IOMMU_DOMAIN_DMA_API (1U << 1) /* Domain for use in DMA-API
69 implementation */
70#define __IOMMU_DOMAIN_PT (1U << 2) /* Domain is identity mapped */
71
72/*
73 * This are the possible domain-types
74 *
75 * IOMMU_DOMAIN_BLOCKED - All DMA is blocked, can be used to isolate
76 * devices
77 * IOMMU_DOMAIN_IDENTITY - DMA addresses are system physical addresses
78 * IOMMU_DOMAIN_UNMANAGED - DMA mappings managed by IOMMU-API user, used
79 * for VMs
80 * IOMMU_DOMAIN_DMA - Internally used for DMA-API implementations.
81 * This flag allows IOMMU drivers to implement
82 * certain optimizations for these domains
83 */
84#define IOMMU_DOMAIN_BLOCKED (0U)
85#define IOMMU_DOMAIN_IDENTITY (__IOMMU_DOMAIN_PT)
86#define IOMMU_DOMAIN_UNMANAGED (__IOMMU_DOMAIN_PAGING)
87#define IOMMU_DOMAIN_DMA (__IOMMU_DOMAIN_PAGING | \
88 __IOMMU_DOMAIN_DMA_API)
89
4a77a6cf 90struct iommu_domain {
8539c7c1 91 unsigned type;
b22f6434 92 const struct iommu_ops *ops;
d16e0faa 93 unsigned long pgsize_bitmap; /* Bitmap of page sizes in use */
4f3f8d9d 94 iommu_fault_handler_t handler;
77ca2332 95 void *handler_token;
0ff64f80 96 struct iommu_domain_geometry geometry;
0db2e5d1 97 void *iova_cookie;
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98};
99
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100enum iommu_cap {
101 IOMMU_CAP_CACHE_COHERENCY, /* IOMMU can enforce cache coherent DMA
102 transactions */
103 IOMMU_CAP_INTR_REMAP, /* IOMMU supports interrupt isolation */
c4986649 104 IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */
1aed0748 105};
dbb9fd86 106
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107/*
108 * Following constraints are specifc to FSL_PAMUV1:
109 * -aperture must be power of 2, and naturally aligned
110 * -number of windows must be power of 2, and address space size
111 * of each window is determined by aperture size / # of windows
112 * -the actual size of the mapped region of a window must be power
113 * of 2 starting with 4KB and physical address must be naturally
114 * aligned.
115 * DOMAIN_ATTR_FSL_PAMUV1 corresponds to the above mentioned contraints.
116 * The caller can invoke iommu_domain_get_attr to check if the underlying
117 * iommu implementation supports these constraints.
118 */
119
0cd76dd1 120enum iommu_attr {
0ff64f80 121 DOMAIN_ATTR_GEOMETRY,
d2e12160 122 DOMAIN_ATTR_PAGING,
69356712 123 DOMAIN_ATTR_WINDOWS,
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124 DOMAIN_ATTR_FSL_PAMU_STASH,
125 DOMAIN_ATTR_FSL_PAMU_ENABLE,
126 DOMAIN_ATTR_FSL_PAMUV1,
c02607aa 127 DOMAIN_ATTR_NESTING, /* two stages of translation */
2da274cd 128 DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE,
a8b8a88a 129 DOMAIN_ATTR_MAX,
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130};
131
d30ddcaa 132/* These are the possible reserved region types */
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133enum iommu_resv_type {
134 /* Memory regions which must be mapped 1:1 at all times */
135 IOMMU_RESV_DIRECT,
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136 /*
137 * Memory regions which are advertised to be 1:1 but are
138 * commonly considered relaxable in some conditions,
139 * for instance in device assignment use case (USB, Graphics)
140 */
141 IOMMU_RESV_DIRECT_RELAXABLE,
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142 /* Arbitrary "never map this or give it to a device" address ranges */
143 IOMMU_RESV_RESERVED,
144 /* Hardware MSI region (untranslated) */
145 IOMMU_RESV_MSI,
146 /* Software-managed MSI translation window */
147 IOMMU_RESV_SW_MSI,
148};
d30ddcaa 149
a1015c2b 150/**
e5b5234a 151 * struct iommu_resv_region - descriptor for a reserved memory region
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152 * @list: Linked list pointers
153 * @start: System physical start address of the region
154 * @length: Length of the region in bytes
155 * @prot: IOMMU Protection flags (READ/WRITE/...)
d30ddcaa 156 * @type: Type of the reserved region
a1015c2b 157 */
e5b5234a 158struct iommu_resv_region {
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159 struct list_head list;
160 phys_addr_t start;
161 size_t length;
162 int prot;
9d3a4de4 163 enum iommu_resv_type type;
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164};
165
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166/* Per device IOMMU features */
167enum iommu_dev_features {
168 IOMMU_DEV_FEAT_AUX, /* Aux-domain feature */
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169 IOMMU_DEV_FEAT_SVA, /* Shared Virtual Addresses */
170};
171
172#define IOMMU_PASID_INVALID (-1U)
173
174/**
175 * struct iommu_sva_ops - device driver callbacks for an SVA context
176 *
177 * @mm_exit: called when the mm is about to be torn down by exit_mmap. After
178 * @mm_exit returns, the device must not issue any more transaction
179 * with the PASID given as argument.
180 *
181 * The @mm_exit handler is allowed to sleep. Be careful about the
182 * locks taken in @mm_exit, because they might lead to deadlocks if
183 * they are also held when dropping references to the mm. Consider the
184 * following call chain:
185 * mutex_lock(A); mmput(mm) -> exit_mm() -> @mm_exit() -> mutex_lock(A)
186 * Using mmput_async() prevents this scenario.
187 *
188 */
189struct iommu_sva_ops {
190 iommu_mm_exit_handler_t mm_exit;
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191};
192
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193#ifdef CONFIG_IOMMU_API
194
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195/**
196 * struct iommu_iotlb_gather - Range information for a pending IOTLB flush
197 *
198 * @start: IOVA representing the start of the range to be flushed
199 * @end: IOVA representing the end of the range to be flushed (exclusive)
200 * @pgsize: The interval at which to perform the flush
201 *
202 * This structure is intended to be updated by multiple calls to the
203 * ->unmap() function in struct iommu_ops before eventually being passed
204 * into ->iotlb_sync().
205 */
206struct iommu_iotlb_gather {
207 unsigned long start;
208 unsigned long end;
209 size_t pgsize;
210};
211
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212/**
213 * struct iommu_ops - iommu ops and capabilities
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214 * @capable: check capability
215 * @domain_alloc: allocate iommu domain
216 * @domain_free: free iommu domain
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217 * @attach_dev: attach device to an iommu domain
218 * @detach_dev: detach device from an iommu domain
219 * @map: map a physically contiguous memory region to an iommu domain
220 * @unmap: unmap a physically contiguous memory region from an iommu domain
db04d4a3 221 * @flush_iotlb_all: Synchronously flush all hardware TLBs for this domain
2405bc16 222 * @iotlb_sync_map: Sync mappings created recently using @map to the hardware
51eb7809 223 * @iotlb_sync: Flush all queued ranges from the hardware TLBs and empty flush
add02cfd 224 * queue
7d3002cc 225 * @iova_to_phys: translate iova to physical address
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226 * @add_device: add device to iommu grouping
227 * @remove_device: remove device from iommu grouping
0d9bacb6 228 * @device_group: find iommu group for a particular device
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229 * @domain_get_attr: Query domain attributes
230 * @domain_set_attr: Change domain attributes
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231 * @get_resv_regions: Request list of reserved regions for a device
232 * @put_resv_regions: Free list of reserved regions for a device
233 * @apply_resv_region: Temporary helper call-back for iova reserved ranges
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234 * @domain_window_enable: Configure and enable a particular window for a domain
235 * @domain_window_disable: Disable a particular window for a domain
d0f60a44 236 * @of_xlate: add OF master IDs to iommu grouping
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237 * @is_attach_deferred: Check if domain attach should be deferred from iommu
238 * driver init to device driver init (default no)
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239 * @dev_has/enable/disable_feat: per device entries to check/enable/disable
240 * iommu specific features.
241 * @dev_feat_enabled: check enabled feature
242 * @aux_attach/detach_dev: aux-domain specific attach/detach entries.
243 * @aux_get_pasid: get the pasid given an aux-domain
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244 * @sva_bind: Bind process address space to device
245 * @sva_unbind: Unbind process address space from device
246 * @sva_get_pasid: Get PASID associated to a SVA handle
bf3255b3 247 * @page_response: handle page request response
4c7c171f 248 * @cache_invalidate: invalidate translation caches
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249 * @sva_bind_gpasid: bind guest pasid and mm
250 * @sva_unbind_gpasid: unbind guest pasid and mm
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251 * @pgsize_bitmap: bitmap of all possible supported page sizes
252 * @owner: Driver module providing these ops
7d3002cc 253 */
4a77a6cf 254struct iommu_ops {
3c0e0ca0 255 bool (*capable)(enum iommu_cap);
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256
257 /* Domain allocation and freeing by the iommu driver */
8539c7c1 258 struct iommu_domain *(*domain_alloc)(unsigned iommu_domain_type);
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259 void (*domain_free)(struct iommu_domain *);
260
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261 int (*attach_dev)(struct iommu_domain *domain, struct device *dev);
262 void (*detach_dev)(struct iommu_domain *domain, struct device *dev);
67651786 263 int (*map)(struct iommu_domain *domain, unsigned long iova,
781ca2de 264 phys_addr_t paddr, size_t size, int prot, gfp_t gfp);
5009065d 265 size_t (*unmap)(struct iommu_domain *domain, unsigned long iova,
56f8af5e 266 size_t size, struct iommu_iotlb_gather *iotlb_gather);
add02cfd 267 void (*flush_iotlb_all)(struct iommu_domain *domain);
1d7ae53b 268 void (*iotlb_sync_map)(struct iommu_domain *domain);
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269 void (*iotlb_sync)(struct iommu_domain *domain,
270 struct iommu_iotlb_gather *iotlb_gather);
bb5547ac 271 phys_addr_t (*iova_to_phys)(struct iommu_domain *domain, dma_addr_t iova);
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272 int (*add_device)(struct device *dev);
273 void (*remove_device)(struct device *dev);
46c6b2bc 274 struct iommu_group *(*device_group)(struct device *dev);
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275 int (*domain_get_attr)(struct iommu_domain *domain,
276 enum iommu_attr attr, void *data);
277 int (*domain_set_attr)(struct iommu_domain *domain,
278 enum iommu_attr attr, void *data);
d7787d57 279
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280 /* Request/Free a list of reserved regions for a device */
281 void (*get_resv_regions)(struct device *dev, struct list_head *list);
282 void (*put_resv_regions)(struct device *dev, struct list_head *list);
283 void (*apply_resv_region)(struct device *dev,
284 struct iommu_domain *domain,
285 struct iommu_resv_region *region);
a1015c2b 286
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287 /* Window handling functions */
288 int (*domain_window_enable)(struct iommu_domain *domain, u32 wnd_nr,
80f97f0f 289 phys_addr_t paddr, u64 size, int prot);
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290 void (*domain_window_disable)(struct iommu_domain *domain, u32 wnd_nr);
291
d0f60a44 292 int (*of_xlate)(struct device *dev, struct of_phandle_args *args);
e01d1913 293 bool (*is_attach_deferred)(struct iommu_domain *domain, struct device *dev);
d0f60a44 294
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295 /* Per device IOMMU features */
296 bool (*dev_has_feat)(struct device *dev, enum iommu_dev_features f);
297 bool (*dev_feat_enabled)(struct device *dev, enum iommu_dev_features f);
298 int (*dev_enable_feat)(struct device *dev, enum iommu_dev_features f);
299 int (*dev_disable_feat)(struct device *dev, enum iommu_dev_features f);
300
301 /* Aux-domain specific attach/detach entries */
302 int (*aux_attach_dev)(struct iommu_domain *domain, struct device *dev);
303 void (*aux_detach_dev)(struct iommu_domain *domain, struct device *dev);
304 int (*aux_get_pasid)(struct iommu_domain *domain, struct device *dev);
305
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306 struct iommu_sva *(*sva_bind)(struct device *dev, struct mm_struct *mm,
307 void *drvdata);
308 void (*sva_unbind)(struct iommu_sva *handle);
309 int (*sva_get_pasid)(struct iommu_sva *handle);
310
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311 int (*page_response)(struct device *dev,
312 struct iommu_fault_event *evt,
313 struct iommu_page_response *msg);
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314 int (*cache_invalidate)(struct iommu_domain *domain, struct device *dev,
315 struct iommu_cache_invalidate_info *inv_info);
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316 int (*sva_bind_gpasid)(struct iommu_domain *domain,
317 struct device *dev, struct iommu_gpasid_bind_data *data);
318
319 int (*sva_unbind_gpasid)(struct device *dev, int pasid);
bf3255b3 320
7d3002cc 321 unsigned long pgsize_bitmap;
25f003de 322 struct module *owner;
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323};
324
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325/**
326 * struct iommu_device - IOMMU core representation of one IOMMU hardware
327 * instance
328 * @list: Used by the iommu-core to keep a list of registered iommus
329 * @ops: iommu-ops for talking to this iommu
39ab9555 330 * @dev: struct device for sysfs handling
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331 */
332struct iommu_device {
333 struct list_head list;
334 const struct iommu_ops *ops;
c73e1ac8 335 struct fwnode_handle *fwnode;
2926a2aa 336 struct device *dev;
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337};
338
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339/**
340 * struct iommu_fault_event - Generic fault event
341 *
342 * Can represent recoverable faults such as a page requests or
343 * unrecoverable faults such as DMA or IRQ remapping faults.
344 *
345 * @fault: fault descriptor
bf3255b3 346 * @list: pending fault event list, used for tracking responses
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347 */
348struct iommu_fault_event {
349 struct iommu_fault fault;
bf3255b3 350 struct list_head list;
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351};
352
353/**
354 * struct iommu_fault_param - per-device IOMMU fault data
355 * @handler: Callback function to handle IOMMU faults at device level
356 * @data: handler private data
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357 * @faults: holds the pending faults which needs response
358 * @lock: protect pending faults list
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359 */
360struct iommu_fault_param {
361 iommu_dev_fault_handler_t handler;
362 void *data;
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363 struct list_head faults;
364 struct mutex lock;
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365};
366
367/**
045a7042 368 * struct dev_iommu - Collection of per-device IOMMU data
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369 *
370 * @fault_param: IOMMU detected device fault reporting data
72acd9df 371 * @fwspec: IOMMU fwspec data
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372 *
373 * TODO: migrate other per device data pointers under iommu_dev_data, e.g.
374 * struct iommu_group *iommu_group;
4e32348b 375 */
045a7042 376struct dev_iommu {
0c830e6b 377 struct mutex lock;
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378 struct iommu_fault_param *fault_param;
379 struct iommu_fwspec *fwspec;
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380};
381
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382int iommu_device_register(struct iommu_device *iommu);
383void iommu_device_unregister(struct iommu_device *iommu);
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384int iommu_device_sysfs_add(struct iommu_device *iommu,
385 struct device *parent,
386 const struct attribute_group **groups,
387 const char *fmt, ...) __printf(4, 5);
388void iommu_device_sysfs_remove(struct iommu_device *iommu);
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389int iommu_device_link(struct iommu_device *iommu, struct device *link);
390void iommu_device_unlink(struct iommu_device *iommu, struct device *link);
b0119e87 391
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392static inline void __iommu_device_set_ops(struct iommu_device *iommu,
393 const struct iommu_ops *ops)
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394{
395 iommu->ops = ops;
396}
397
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398#define iommu_device_set_ops(iommu, ops) \
399do { \
400 struct iommu_ops *__ops = (struct iommu_ops *)(ops); \
401 __ops->owner = THIS_MODULE; \
402 __iommu_device_set_ops(iommu, __ops); \
403} while (0)
404
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405static inline void iommu_device_set_fwnode(struct iommu_device *iommu,
406 struct fwnode_handle *fwnode)
407{
408 iommu->fwnode = fwnode;
409}
410
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411static inline struct iommu_device *dev_to_iommu_device(struct device *dev)
412{
413 return (struct iommu_device *)dev_get_drvdata(dev);
414}
415
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416static inline void iommu_iotlb_gather_init(struct iommu_iotlb_gather *gather)
417{
418 *gather = (struct iommu_iotlb_gather) {
419 .start = ULONG_MAX,
420 };
421}
422
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423#define IOMMU_GROUP_NOTIFY_ADD_DEVICE 1 /* Device added */
424#define IOMMU_GROUP_NOTIFY_DEL_DEVICE 2 /* Pre Device removed */
425#define IOMMU_GROUP_NOTIFY_BIND_DRIVER 3 /* Pre Driver bind */
426#define IOMMU_GROUP_NOTIFY_BOUND_DRIVER 4 /* Post Driver bind */
427#define IOMMU_GROUP_NOTIFY_UNBIND_DRIVER 5 /* Pre Driver unbind */
428#define IOMMU_GROUP_NOTIFY_UNBOUND_DRIVER 6 /* Post Driver unbind */
429
b22f6434 430extern int bus_set_iommu(struct bus_type *bus, const struct iommu_ops *ops);
a1b60c1c 431extern bool iommu_present(struct bus_type *bus);
3c0e0ca0 432extern bool iommu_capable(struct bus_type *bus, enum iommu_cap cap);
905d66c1 433extern struct iommu_domain *iommu_domain_alloc(struct bus_type *bus);
aa16bea9 434extern struct iommu_group *iommu_group_get_by_id(int id);
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435extern void iommu_domain_free(struct iommu_domain *domain);
436extern int iommu_attach_device(struct iommu_domain *domain,
437 struct device *dev);
438extern void iommu_detach_device(struct iommu_domain *domain,
439 struct device *dev);
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440extern int iommu_cache_invalidate(struct iommu_domain *domain,
441 struct device *dev,
442 struct iommu_cache_invalidate_info *inv_info);
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443extern int iommu_sva_bind_gpasid(struct iommu_domain *domain,
444 struct device *dev, struct iommu_gpasid_bind_data *data);
445extern int iommu_sva_unbind_gpasid(struct iommu_domain *domain,
446 struct device *dev, ioasid_t pasid);
2c1296d9 447extern struct iommu_domain *iommu_get_domain_for_dev(struct device *dev);
6af588fe 448extern struct iommu_domain *iommu_get_dma_domain(struct device *dev);
cefc53c7 449extern int iommu_map(struct iommu_domain *domain, unsigned long iova,
7d3002cc 450 phys_addr_t paddr, size_t size, int prot);
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451extern int iommu_map_atomic(struct iommu_domain *domain, unsigned long iova,
452 phys_addr_t paddr, size_t size, int prot);
7d3002cc 453extern size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova,
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454 size_t size);
455extern size_t iommu_unmap_fast(struct iommu_domain *domain,
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456 unsigned long iova, size_t size,
457 struct iommu_iotlb_gather *iotlb_gather);
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458extern size_t iommu_map_sg(struct iommu_domain *domain, unsigned long iova,
459 struct scatterlist *sg,unsigned int nents, int prot);
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460extern size_t iommu_map_sg_atomic(struct iommu_domain *domain,
461 unsigned long iova, struct scatterlist *sg,
462 unsigned int nents, int prot);
bb5547ac 463extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova);
4f3f8d9d 464extern void iommu_set_fault_handler(struct iommu_domain *domain,
77ca2332 465 iommu_fault_handler_t handler, void *token);
d72e31c9 466
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EA
467extern void iommu_get_resv_regions(struct device *dev, struct list_head *list);
468extern void iommu_put_resv_regions(struct device *dev, struct list_head *list);
f9f6971e
TR
469extern void generic_iommu_put_resv_regions(struct device *dev,
470 struct list_head *list);
d290f1e7 471extern int iommu_request_dm_for_dev(struct device *dev);
7423e017 472extern int iommu_request_dma_domain_for_dev(struct device *dev);
8a69961c
JR
473extern void iommu_set_default_passthrough(bool cmd_line);
474extern void iommu_set_default_translated(bool cmd_line);
475extern bool iommu_default_passthrough(void);
2b20cbba 476extern struct iommu_resv_region *
9d3a4de4
RM
477iommu_alloc_resv_region(phys_addr_t start, size_t length, int prot,
478 enum iommu_resv_type type);
6c65fb31
EA
479extern int iommu_get_group_resv_regions(struct iommu_group *group,
480 struct list_head *head);
a1015c2b 481
d72e31c9
AW
482extern int iommu_attach_group(struct iommu_domain *domain,
483 struct iommu_group *group);
484extern void iommu_detach_group(struct iommu_domain *domain,
485 struct iommu_group *group);
486extern struct iommu_group *iommu_group_alloc(void);
487extern void *iommu_group_get_iommudata(struct iommu_group *group);
488extern void iommu_group_set_iommudata(struct iommu_group *group,
489 void *iommu_data,
490 void (*release)(void *iommu_data));
491extern int iommu_group_set_name(struct iommu_group *group, const char *name);
492extern int iommu_group_add_device(struct iommu_group *group,
493 struct device *dev);
494extern void iommu_group_remove_device(struct device *dev);
495extern int iommu_group_for_each_dev(struct iommu_group *group, void *data,
496 int (*fn)(struct device *, void *));
497extern struct iommu_group *iommu_group_get(struct device *dev);
13f59a78 498extern struct iommu_group *iommu_group_ref_get(struct iommu_group *group);
d72e31c9
AW
499extern void iommu_group_put(struct iommu_group *group);
500extern int iommu_group_register_notifier(struct iommu_group *group,
501 struct notifier_block *nb);
502extern int iommu_group_unregister_notifier(struct iommu_group *group,
503 struct notifier_block *nb);
0c830e6b
JP
504extern int iommu_register_device_fault_handler(struct device *dev,
505 iommu_dev_fault_handler_t handler,
506 void *data);
507
508extern int iommu_unregister_device_fault_handler(struct device *dev);
509
510extern int iommu_report_device_fault(struct device *dev,
511 struct iommu_fault_event *evt);
bf3255b3
JPB
512extern int iommu_page_response(struct device *dev,
513 struct iommu_page_response *msg);
0c830e6b 514
d72e31c9 515extern int iommu_group_id(struct iommu_group *group);
104a1c13 516extern struct iommu_group *iommu_group_get_for_dev(struct device *dev);
6827ca83 517extern struct iommu_domain *iommu_group_default_domain(struct iommu_group *);
4f3f8d9d 518
0cd76dd1
JR
519extern int iommu_domain_get_attr(struct iommu_domain *domain, enum iommu_attr,
520 void *data);
521extern int iommu_domain_set_attr(struct iommu_domain *domain, enum iommu_attr,
522 void *data);
4f3f8d9d 523
d7787d57
JR
524/* Window handling function prototypes */
525extern int iommu_domain_window_enable(struct iommu_domain *domain, u32 wnd_nr,
80f97f0f
VS
526 phys_addr_t offset, u64 size,
527 int prot);
d7787d57 528extern void iommu_domain_window_disable(struct iommu_domain *domain, u32 wnd_nr);
207c6e36
JR
529
530extern int report_iommu_fault(struct iommu_domain *domain, struct device *dev,
531 unsigned long iova, int flags);
4a77a6cf 532
add02cfd
JR
533static inline void iommu_flush_tlb_all(struct iommu_domain *domain)
534{
535 if (domain->ops->flush_iotlb_all)
536 domain->ops->flush_iotlb_all(domain);
537}
538
a7d20dc1
WD
539static inline void iommu_tlb_sync(struct iommu_domain *domain,
540 struct iommu_iotlb_gather *iotlb_gather)
add02cfd
JR
541{
542 if (domain->ops->iotlb_sync)
56f8af5e 543 domain->ops->iotlb_sync(domain, iotlb_gather);
a7d20dc1
WD
544
545 iommu_iotlb_gather_init(iotlb_gather);
add02cfd
JR
546}
547
4fcf8544
WD
548static inline void iommu_iotlb_gather_add_page(struct iommu_domain *domain,
549 struct iommu_iotlb_gather *gather,
550 unsigned long iova, size_t size)
551{
552 unsigned long start = iova, end = start + size;
553
554 /*
555 * If the new page is disjoint from the current range or is mapped at
556 * a different granularity, then sync the TLB so that the gather
557 * structure can be rewritten.
558 */
559 if (gather->pgsize != size ||
560 end < gather->start || start > gather->end) {
561 if (gather->pgsize)
562 iommu_tlb_sync(domain, gather);
563 gather->pgsize = size;
564 }
565
566 if (gather->end < end)
567 gather->end = end;
568
569 if (gather->start > start)
570 gather->start = start;
571}
572
5e62292b
JR
573/* PCI device grouping function */
574extern struct iommu_group *pci_device_group(struct device *dev);
6eab556a
JR
575/* Generic device grouping function */
576extern struct iommu_group *generic_device_group(struct device *dev);
eab03e2a
NG
577/* FSL-MC device grouping function */
578struct iommu_group *fsl_mc_device_group(struct device *dev);
5e62292b 579
57f98d2f
RM
580/**
581 * struct iommu_fwspec - per-device IOMMU instance data
582 * @ops: ops for this device's IOMMU
583 * @iommu_fwnode: firmware handle for this device's IOMMU
584 * @iommu_priv: IOMMU driver private data for this device
89535821 585 * @num_pasid_bits: number of PASID bits supported by this device
57f98d2f
RM
586 * @num_ids: number of associated device IDs
587 * @ids: IDs which this device may present to the IOMMU
588 */
589struct iommu_fwspec {
590 const struct iommu_ops *ops;
591 struct fwnode_handle *iommu_fwnode;
592 void *iommu_priv;
5702ee24 593 u32 flags;
89535821 594 u32 num_pasid_bits;
57f98d2f 595 unsigned int num_ids;
098accf2 596 u32 ids[];
57f98d2f
RM
597};
598
5702ee24
JPB
599/* ATS is supported */
600#define IOMMU_FWSPEC_PCI_RC_ATS (1 << 0)
601
26b25a2b
JPB
602/**
603 * struct iommu_sva - handle to a device-mm bond
604 */
605struct iommu_sva {
606 struct device *dev;
607 const struct iommu_sva_ops *ops;
608};
609
57f98d2f
RM
610int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode,
611 const struct iommu_ops *ops);
612void iommu_fwspec_free(struct device *dev);
613int iommu_fwspec_add_ids(struct device *dev, u32 *ids, int num_ids);
534766df 614const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode);
57f98d2f 615
b4ef725e
JR
616static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev)
617{
72acd9df
JR
618 if (dev->iommu)
619 return dev->iommu->fwspec;
620 else
621 return NULL;
b4ef725e
JR
622}
623
624static inline void dev_iommu_fwspec_set(struct device *dev,
625 struct iommu_fwspec *fwspec)
626{
72acd9df 627 dev->iommu->fwspec = fwspec;
b4ef725e
JR
628}
629
f9867f41
JR
630static inline void *dev_iommu_priv_get(struct device *dev)
631{
632 return dev->iommu->fwspec->iommu_priv;
633}
634
635static inline void dev_iommu_priv_set(struct device *dev, void *priv)
636{
637 dev->iommu->fwspec->iommu_priv = priv;
638}
639
cc5aed44
JR
640int iommu_probe_device(struct device *dev);
641void iommu_release_device(struct device *dev);
642
a3a19592
LB
643bool iommu_dev_has_feature(struct device *dev, enum iommu_dev_features f);
644int iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features f);
645int iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features f);
646bool iommu_dev_feature_enabled(struct device *dev, enum iommu_dev_features f);
647int iommu_aux_attach_device(struct iommu_domain *domain, struct device *dev);
648void iommu_aux_detach_device(struct iommu_domain *domain, struct device *dev);
649int iommu_aux_get_pasid(struct iommu_domain *domain, struct device *dev);
650
26b25a2b
JPB
651struct iommu_sva *iommu_sva_bind_device(struct device *dev,
652 struct mm_struct *mm,
653 void *drvdata);
654void iommu_sva_unbind_device(struct iommu_sva *handle);
655int iommu_sva_set_ops(struct iommu_sva *handle,
656 const struct iommu_sva_ops *ops);
657int iommu_sva_get_pasid(struct iommu_sva *handle);
658
4a77a6cf
JR
659#else /* CONFIG_IOMMU_API */
660
39d4ebb9 661struct iommu_ops {};
d72e31c9 662struct iommu_group {};
57f98d2f 663struct iommu_fwspec {};
b0119e87 664struct iommu_device {};
4e32348b 665struct iommu_fault_param {};
a7d20dc1 666struct iommu_iotlb_gather {};
4a77a6cf 667
a1b60c1c 668static inline bool iommu_present(struct bus_type *bus)
4a77a6cf
JR
669{
670 return false;
671}
672
3c0e0ca0
JR
673static inline bool iommu_capable(struct bus_type *bus, enum iommu_cap cap)
674{
675 return false;
676}
677
905d66c1 678static inline struct iommu_domain *iommu_domain_alloc(struct bus_type *bus)
4a77a6cf
JR
679{
680 return NULL;
681}
682
b62dfd29
AK
683static inline struct iommu_group *iommu_group_get_by_id(int id)
684{
685 return NULL;
686}
687
4a77a6cf
JR
688static inline void iommu_domain_free(struct iommu_domain *domain)
689{
690}
691
692static inline int iommu_attach_device(struct iommu_domain *domain,
693 struct device *dev)
694{
695 return -ENODEV;
696}
697
698static inline void iommu_detach_device(struct iommu_domain *domain,
699 struct device *dev)
700{
701}
702
2c1296d9
JR
703static inline struct iommu_domain *iommu_get_domain_for_dev(struct device *dev)
704{
705 return NULL;
706}
707
cefc53c7 708static inline int iommu_map(struct iommu_domain *domain, unsigned long iova,
ebae3e83 709 phys_addr_t paddr, size_t size, int prot)
cefc53c7
JR
710{
711 return -ENODEV;
712}
713
781ca2de
TM
714static inline int iommu_map_atomic(struct iommu_domain *domain,
715 unsigned long iova, phys_addr_t paddr,
716 size_t size, int prot)
717{
718 return -ENODEV;
719}
720
c5611a87
SS
721static inline size_t iommu_unmap(struct iommu_domain *domain,
722 unsigned long iova, size_t size)
cefc53c7 723{
c5611a87 724 return 0;
cefc53c7
JR
725}
726
c5611a87 727static inline size_t iommu_unmap_fast(struct iommu_domain *domain,
a7d20dc1
WD
728 unsigned long iova, int gfp_order,
729 struct iommu_iotlb_gather *iotlb_gather)
cefc53c7 730{
c5611a87 731 return 0;
cefc53c7
JR
732}
733
315786eb
OH
734static inline size_t iommu_map_sg(struct iommu_domain *domain,
735 unsigned long iova, struct scatterlist *sg,
736 unsigned int nents, int prot)
737{
c5611a87 738 return 0;
315786eb
OH
739}
740
781ca2de
TM
741static inline size_t iommu_map_sg_atomic(struct iommu_domain *domain,
742 unsigned long iova, struct scatterlist *sg,
743 unsigned int nents, int prot)
744{
745 return 0;
746}
747
add02cfd
JR
748static inline void iommu_flush_tlb_all(struct iommu_domain *domain)
749{
750}
751
a7d20dc1
WD
752static inline void iommu_tlb_sync(struct iommu_domain *domain,
753 struct iommu_iotlb_gather *iotlb_gather)
add02cfd
JR
754{
755}
756
d7787d57
JR
757static inline int iommu_domain_window_enable(struct iommu_domain *domain,
758 u32 wnd_nr, phys_addr_t paddr,
80f97f0f 759 u64 size, int prot)
d7787d57
JR
760{
761 return -ENODEV;
762}
763
764static inline void iommu_domain_window_disable(struct iommu_domain *domain,
765 u32 wnd_nr)
766{
767}
768
bb5547ac 769static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova)
4a77a6cf
JR
770{
771 return 0;
772}
773
4f3f8d9d 774static inline void iommu_set_fault_handler(struct iommu_domain *domain,
77ca2332 775 iommu_fault_handler_t handler, void *token)
4f3f8d9d
OBC
776{
777}
778
e5b5234a 779static inline void iommu_get_resv_regions(struct device *dev,
a1015c2b
JR
780 struct list_head *list)
781{
782}
783
e5b5234a 784static inline void iommu_put_resv_regions(struct device *dev,
a1015c2b
JR
785 struct list_head *list)
786{
787}
788
6c65fb31
EA
789static inline int iommu_get_group_resv_regions(struct iommu_group *group,
790 struct list_head *head)
791{
792 return -ENODEV;
793}
794
d290f1e7
JR
795static inline int iommu_request_dm_for_dev(struct device *dev)
796{
797 return -ENODEV;
798}
799
7423e017
LB
800static inline int iommu_request_dma_domain_for_dev(struct device *dev)
801{
802 return -ENODEV;
803}
804
8a69961c
JR
805static inline void iommu_set_default_passthrough(bool cmd_line)
806{
807}
808
809static inline void iommu_set_default_translated(bool cmd_line)
810{
811}
812
813static inline bool iommu_default_passthrough(void)
814{
815 return true;
816}
817
bef83de5
AW
818static inline int iommu_attach_group(struct iommu_domain *domain,
819 struct iommu_group *group)
d72e31c9
AW
820{
821 return -ENODEV;
822}
823
bef83de5
AW
824static inline void iommu_detach_group(struct iommu_domain *domain,
825 struct iommu_group *group)
d72e31c9
AW
826{
827}
828
bef83de5 829static inline struct iommu_group *iommu_group_alloc(void)
d72e31c9
AW
830{
831 return ERR_PTR(-ENODEV);
832}
833
bef83de5 834static inline void *iommu_group_get_iommudata(struct iommu_group *group)
d72e31c9
AW
835{
836 return NULL;
837}
838
bef83de5
AW
839static inline void iommu_group_set_iommudata(struct iommu_group *group,
840 void *iommu_data,
841 void (*release)(void *iommu_data))
d72e31c9
AW
842{
843}
844
bef83de5
AW
845static inline int iommu_group_set_name(struct iommu_group *group,
846 const char *name)
d72e31c9
AW
847{
848 return -ENODEV;
849}
850
bef83de5
AW
851static inline int iommu_group_add_device(struct iommu_group *group,
852 struct device *dev)
d72e31c9
AW
853{
854 return -ENODEV;
855}
856
bef83de5 857static inline void iommu_group_remove_device(struct device *dev)
d72e31c9
AW
858{
859}
860
bef83de5
AW
861static inline int iommu_group_for_each_dev(struct iommu_group *group,
862 void *data,
863 int (*fn)(struct device *, void *))
d72e31c9
AW
864{
865 return -ENODEV;
866}
867
bef83de5 868static inline struct iommu_group *iommu_group_get(struct device *dev)
d72e31c9
AW
869{
870 return NULL;
871}
872
bef83de5 873static inline void iommu_group_put(struct iommu_group *group)
d72e31c9
AW
874{
875}
876
bef83de5
AW
877static inline int iommu_group_register_notifier(struct iommu_group *group,
878 struct notifier_block *nb)
1460432c
AW
879{
880 return -ENODEV;
881}
882
bef83de5
AW
883static inline int iommu_group_unregister_notifier(struct iommu_group *group,
884 struct notifier_block *nb)
d72e31c9
AW
885{
886 return 0;
887}
888
0c830e6b
JP
889static inline
890int iommu_register_device_fault_handler(struct device *dev,
891 iommu_dev_fault_handler_t handler,
892 void *data)
893{
894 return -ENODEV;
895}
896
897static inline int iommu_unregister_device_fault_handler(struct device *dev)
898{
899 return 0;
900}
901
902static inline
903int iommu_report_device_fault(struct device *dev, struct iommu_fault_event *evt)
904{
905 return -ENODEV;
906}
907
bf3255b3
JPB
908static inline int iommu_page_response(struct device *dev,
909 struct iommu_page_response *msg)
910{
911 return -ENODEV;
912}
913
bef83de5 914static inline int iommu_group_id(struct iommu_group *group)
d72e31c9
AW
915{
916 return -ENODEV;
917}
1460432c 918
0cd76dd1
JR
919static inline int iommu_domain_get_attr(struct iommu_domain *domain,
920 enum iommu_attr attr, void *data)
921{
922 return -EINVAL;
923}
924
925static inline int iommu_domain_set_attr(struct iommu_domain *domain,
926 enum iommu_attr attr, void *data)
927{
928 return -EINVAL;
929}
930
39ab9555 931static inline int iommu_device_register(struct iommu_device *iommu)
c61959ec 932{
39ab9555 933 return -ENODEV;
c61959ec
AW
934}
935
39ab9555
JR
936static inline void iommu_device_set_ops(struct iommu_device *iommu,
937 const struct iommu_ops *ops)
c61959ec 938{
c61959ec
AW
939}
940
c73e1ac8
JR
941static inline void iommu_device_set_fwnode(struct iommu_device *iommu,
942 struct fwnode_handle *fwnode)
c61959ec 943{
c61959ec
AW
944}
945
2926a2aa
JR
946static inline struct iommu_device *dev_to_iommu_device(struct device *dev)
947{
948 return NULL;
949}
950
a7d20dc1
WD
951static inline void iommu_iotlb_gather_init(struct iommu_iotlb_gather *gather)
952{
953}
954
4fcf8544
WD
955static inline void iommu_iotlb_gather_add_page(struct iommu_domain *domain,
956 struct iommu_iotlb_gather *gather,
957 unsigned long iova, size_t size)
958{
959}
960
39ab9555 961static inline void iommu_device_unregister(struct iommu_device *iommu)
c61959ec 962{
c61959ec
AW
963}
964
39ab9555
JR
965static inline int iommu_device_sysfs_add(struct iommu_device *iommu,
966 struct device *parent,
967 const struct attribute_group **groups,
968 const char *fmt, ...)
b0119e87 969{
39ab9555 970 return -ENODEV;
b0119e87
JR
971}
972
39ab9555 973static inline void iommu_device_sysfs_remove(struct iommu_device *iommu)
c61959ec
AW
974{
975}
976
e09f8ea5 977static inline int iommu_device_link(struct device *dev, struct device *link)
c61959ec
AW
978{
979 return -EINVAL;
980}
981
e09f8ea5 982static inline void iommu_device_unlink(struct device *dev, struct device *link)
c61959ec
AW
983{
984}
985
57f98d2f
RM
986static inline int iommu_fwspec_init(struct device *dev,
987 struct fwnode_handle *iommu_fwnode,
988 const struct iommu_ops *ops)
989{
990 return -ENODEV;
991}
992
993static inline void iommu_fwspec_free(struct device *dev)
994{
995}
996
997static inline int iommu_fwspec_add_ids(struct device *dev, u32 *ids,
998 int num_ids)
999{
1000 return -ENODEV;
1001}
1002
e4f10ffe 1003static inline
534766df 1004const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode)
e4f10ffe
LP
1005{
1006 return NULL;
1007}
1008
a3a19592
LB
1009static inline bool
1010iommu_dev_has_feature(struct device *dev, enum iommu_dev_features feat)
1011{
1012 return false;
1013}
1014
1015static inline bool
1016iommu_dev_feature_enabled(struct device *dev, enum iommu_dev_features feat)
1017{
1018 return false;
1019}
1020
1021static inline int
1022iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features feat)
1023{
1024 return -ENODEV;
1025}
1026
1027static inline int
1028iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features feat)
1029{
1030 return -ENODEV;
1031}
1032
1033static inline int
1034iommu_aux_attach_device(struct iommu_domain *domain, struct device *dev)
1035{
1036 return -ENODEV;
1037}
1038
1039static inline void
1040iommu_aux_detach_device(struct iommu_domain *domain, struct device *dev)
1041{
1042}
1043
1044static inline int
1045iommu_aux_get_pasid(struct iommu_domain *domain, struct device *dev)
1046{
1047 return -ENODEV;
1048}
1049
26b25a2b
JPB
1050static inline struct iommu_sva *
1051iommu_sva_bind_device(struct device *dev, struct mm_struct *mm, void *drvdata)
1052{
1053 return NULL;
1054}
1055
1056static inline void iommu_sva_unbind_device(struct iommu_sva *handle)
1057{
1058}
1059
1060static inline int iommu_sva_set_ops(struct iommu_sva *handle,
1061 const struct iommu_sva_ops *ops)
1062{
1063 return -EINVAL;
1064}
1065
1066static inline int iommu_sva_get_pasid(struct iommu_sva *handle)
1067{
1068 return IOMMU_PASID_INVALID;
1069}
1070
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1071static inline int
1072iommu_cache_invalidate(struct iommu_domain *domain,
1073 struct device *dev,
1074 struct iommu_cache_invalidate_info *inv_info)
1075{
1076 return -ENODEV;
1077}
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1078static inline int iommu_sva_bind_gpasid(struct iommu_domain *domain,
1079 struct device *dev, struct iommu_gpasid_bind_data *data)
1080{
1081 return -ENODEV;
1082}
1083
1084static inline int iommu_sva_unbind_gpasid(struct iommu_domain *domain,
1085 struct device *dev, int pasid)
1086{
1087 return -ENODEV;
1088}
4c7c171f 1089
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1090static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev)
1091{
1092 return NULL;
1093}
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1094#endif /* CONFIG_IOMMU_API */
1095
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1096#ifdef CONFIG_IOMMU_DEBUGFS
1097extern struct dentry *iommu_debugfs_dir;
1098void iommu_debugfs_setup(void);
1099#else
1100static inline void iommu_debugfs_setup(void) {}
1101#endif
1102
4a77a6cf 1103#endif /* __LINUX_IOMMU_H */