ACPI/IORT: Provide a generic helper to retrieve reserve regions
[linux-block.git] / include / linux / iommu.h
CommitLineData
45051539 1/* SPDX-License-Identifier: GPL-2.0-only */
4a77a6cf
JR
2/*
3 * Copyright (C) 2007-2008 Advanced Micro Devices, Inc.
4 * Author: Joerg Roedel <joerg.roedel@amd.com>
4a77a6cf
JR
5 */
6
7#ifndef __LINUX_IOMMU_H
8#define __LINUX_IOMMU_H
9
e8245c1b
JR
10#include <linux/scatterlist.h>
11#include <linux/device.h>
12#include <linux/types.h>
74315ccc 13#include <linux/errno.h>
9a08d376 14#include <linux/err.h>
d0f60a44 15#include <linux/of.h>
808be0aa 16#include <linux/ioasid.h>
4e32348b 17#include <uapi/linux/iommu.h>
74315ccc 18
ca13bb3d
WD
19#define IOMMU_READ (1 << 0)
20#define IOMMU_WRITE (1 << 1)
21#define IOMMU_CACHE (1 << 2) /* DMA cache coherency */
a720b41c 22#define IOMMU_NOEXEC (1 << 3)
31e6850e 23#define IOMMU_MMIO (1 << 4) /* e.g. things like MSI doorbells */
579b2a65 24/*
adf5e516
RM
25 * Where the bus hardware includes a privilege level as part of its access type
26 * markings, and certain devices are capable of issuing transactions marked as
27 * either 'supervisor' or 'user', the IOMMU_PRIV flag requests that the other
28 * given permission flags only apply to accesses at the higher privilege level,
29 * and that unprivileged transactions should have as little access as possible.
30 * This would usually imply the same permissions as kernel mappings on the CPU,
31 * if the IOMMU page table format is equivalent.
579b2a65
MH
32 */
33#define IOMMU_PRIV (1 << 5)
4a77a6cf 34
905d66c1 35struct iommu_ops;
d72e31c9 36struct iommu_group;
ff21776d 37struct bus_type;
4a77a6cf 38struct device;
4f3f8d9d 39struct iommu_domain;
9a630a4b 40struct iommu_domain_ops;
ba1eabfa 41struct notifier_block;
26b25a2b 42struct iommu_sva;
4e32348b 43struct iommu_fault_event;
46983fcd 44struct iommu_dma_cookie;
4f3f8d9d
OBC
45
46/* iommu fault flags */
47#define IOMMU_FAULT_READ 0x0
48#define IOMMU_FAULT_WRITE 0x1
49
50typedef int (*iommu_fault_handler_t)(struct iommu_domain *,
77ca2332 51 struct device *, unsigned long, int, void *);
4e32348b 52typedef int (*iommu_dev_fault_handler_t)(struct iommu_fault *, void *);
4a77a6cf 53
0ff64f80
JR
54struct iommu_domain_geometry {
55 dma_addr_t aperture_start; /* First address that can be mapped */
56 dma_addr_t aperture_end; /* Last address that can be mapped */
57 bool force_aperture; /* DMA only allowed in mappable range? */
58};
59
8539c7c1
JR
60/* Domain feature flags */
61#define __IOMMU_DOMAIN_PAGING (1U << 0) /* Support for iommu_map/unmap */
62#define __IOMMU_DOMAIN_DMA_API (1U << 1) /* Domain for use in DMA-API
63 implementation */
64#define __IOMMU_DOMAIN_PT (1U << 2) /* Domain is identity mapped */
bf3aed46 65#define __IOMMU_DOMAIN_DMA_FQ (1U << 3) /* DMA-API uses flush queue */
8539c7c1
JR
66
67/*
68 * This are the possible domain-types
69 *
70 * IOMMU_DOMAIN_BLOCKED - All DMA is blocked, can be used to isolate
71 * devices
72 * IOMMU_DOMAIN_IDENTITY - DMA addresses are system physical addresses
73 * IOMMU_DOMAIN_UNMANAGED - DMA mappings managed by IOMMU-API user, used
74 * for VMs
75 * IOMMU_DOMAIN_DMA - Internally used for DMA-API implementations.
76 * This flag allows IOMMU drivers to implement
77 * certain optimizations for these domains
bf3aed46
RM
78 * IOMMU_DOMAIN_DMA_FQ - As above, but definitely using batched TLB
79 * invalidation.
8539c7c1
JR
80 */
81#define IOMMU_DOMAIN_BLOCKED (0U)
82#define IOMMU_DOMAIN_IDENTITY (__IOMMU_DOMAIN_PT)
83#define IOMMU_DOMAIN_UNMANAGED (__IOMMU_DOMAIN_PAGING)
84#define IOMMU_DOMAIN_DMA (__IOMMU_DOMAIN_PAGING | \
85 __IOMMU_DOMAIN_DMA_API)
bf3aed46
RM
86#define IOMMU_DOMAIN_DMA_FQ (__IOMMU_DOMAIN_PAGING | \
87 __IOMMU_DOMAIN_DMA_API | \
88 __IOMMU_DOMAIN_DMA_FQ)
8539c7c1 89
4a77a6cf 90struct iommu_domain {
8539c7c1 91 unsigned type;
9a630a4b 92 const struct iommu_domain_ops *ops;
d16e0faa 93 unsigned long pgsize_bitmap; /* Bitmap of page sizes in use */
4f3f8d9d 94 iommu_fault_handler_t handler;
77ca2332 95 void *handler_token;
0ff64f80 96 struct iommu_domain_geometry geometry;
46983fcd 97 struct iommu_dma_cookie *iova_cookie;
4a77a6cf
JR
98};
99
bf3aed46
RM
100static inline bool iommu_is_dma_domain(struct iommu_domain *domain)
101{
102 return domain->type & __IOMMU_DOMAIN_DMA_API;
103}
104
1aed0748 105enum iommu_cap {
f78dc1da 106 IOMMU_CAP_CACHE_COHERENCY, /* IOMMU_CACHE is supported */
1aed0748 107 IOMMU_CAP_INTR_REMAP, /* IOMMU supports interrupt isolation */
c4986649 108 IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */
d0be55fb
RM
109 IOMMU_CAP_PRE_BOOT_PROTECTION, /* Firmware says it used the IOMMU for
110 DMA protection and we should too */
1aed0748 111};
dbb9fd86 112
d30ddcaa 113/* These are the possible reserved region types */
9d3a4de4
RM
114enum iommu_resv_type {
115 /* Memory regions which must be mapped 1:1 at all times */
116 IOMMU_RESV_DIRECT,
adfd3738
EA
117 /*
118 * Memory regions which are advertised to be 1:1 but are
119 * commonly considered relaxable in some conditions,
120 * for instance in device assignment use case (USB, Graphics)
121 */
122 IOMMU_RESV_DIRECT_RELAXABLE,
9d3a4de4
RM
123 /* Arbitrary "never map this or give it to a device" address ranges */
124 IOMMU_RESV_RESERVED,
125 /* Hardware MSI region (untranslated) */
126 IOMMU_RESV_MSI,
127 /* Software-managed MSI translation window */
128 IOMMU_RESV_SW_MSI,
129};
d30ddcaa 130
a1015c2b 131/**
e5b5234a 132 * struct iommu_resv_region - descriptor for a reserved memory region
a1015c2b
JR
133 * @list: Linked list pointers
134 * @start: System physical start address of the region
135 * @length: Length of the region in bytes
136 * @prot: IOMMU Protection flags (READ/WRITE/...)
d30ddcaa 137 * @type: Type of the reserved region
3b7e2482 138 * @free: Callback to free associated memory allocations
a1015c2b 139 */
e5b5234a 140struct iommu_resv_region {
a1015c2b
JR
141 struct list_head list;
142 phys_addr_t start;
143 size_t length;
144 int prot;
9d3a4de4 145 enum iommu_resv_type type;
3b7e2482 146 void (*free)(struct device *dev, struct iommu_resv_region *region);
a1015c2b
JR
147};
148
34b48c70
JPB
149/**
150 * enum iommu_dev_features - Per device IOMMU features
34b48c70
JPB
151 * @IOMMU_DEV_FEAT_SVA: Shared Virtual Addresses
152 * @IOMMU_DEV_FEAT_IOPF: I/O Page Faults such as PRI or Stall. Generally
153 * enabling %IOMMU_DEV_FEAT_SVA requires
154 * %IOMMU_DEV_FEAT_IOPF, but some devices manage I/O Page
155 * Faults themselves instead of relying on the IOMMU. When
156 * supported, this feature must be enabled before and
157 * disabled after %IOMMU_DEV_FEAT_SVA.
158 *
159 * Device drivers query whether a feature is supported using
160 * iommu_dev_has_feature(), and enable it using iommu_dev_enable_feature().
161 */
a3a19592 162enum iommu_dev_features {
34b48c70
JPB
163 IOMMU_DEV_FEAT_SVA,
164 IOMMU_DEV_FEAT_IOPF,
26b25a2b
JPB
165};
166
167#define IOMMU_PASID_INVALID (-1U)
168
39d4ebb9
JR
169#ifdef CONFIG_IOMMU_API
170
a7d20dc1
WD
171/**
172 * struct iommu_iotlb_gather - Range information for a pending IOTLB flush
173 *
174 * @start: IOVA representing the start of the range to be flushed
862c3715 175 * @end: IOVA representing the end of the range to be flushed (inclusive)
a7d20dc1 176 * @pgsize: The interval at which to perform the flush
7a7c5bad
RM
177 * @freelist: Removed pages to free after sync
178 * @queued: Indicates that the flush will be queued
a7d20dc1
WD
179 *
180 * This structure is intended to be updated by multiple calls to the
181 * ->unmap() function in struct iommu_ops before eventually being passed
7a7c5bad
RM
182 * into ->iotlb_sync(). Drivers can add pages to @freelist to be freed after
183 * ->iotlb_sync() or ->iotlb_flush_all() have cleared all cached references to
184 * them. @queued is set to indicate when ->iotlb_flush_all() will be called
185 * later instead of ->iotlb_sync(), so drivers may optimise accordingly.
a7d20dc1
WD
186 */
187struct iommu_iotlb_gather {
188 unsigned long start;
189 unsigned long end;
190 size_t pgsize;
87f60cc6 191 struct list_head freelist;
7a7c5bad 192 bool queued;
a7d20dc1
WD
193};
194
7d3002cc
OBC
195/**
196 * struct iommu_ops - iommu ops and capabilities
0d9bacb6
MD
197 * @capable: check capability
198 * @domain_alloc: allocate iommu domain
a6a4c7e2
JR
199 * @probe_device: Add device to iommu driver handling
200 * @release_device: Remove device from iommu driver handling
201 * @probe_finalize: Do final setup work after the device is added to an IOMMU
202 * group and attached to the groups domain
0d9bacb6 203 * @device_group: find iommu group for a particular device
e5b5234a
EA
204 * @get_resv_regions: Request list of reserved regions for a device
205 * @put_resv_regions: Free list of reserved regions for a device
d0f60a44 206 * @of_xlate: add OF master IDs to iommu grouping
a7055d57
GU
207 * @is_attach_deferred: Check if domain attach should be deferred from iommu
208 * driver init to device driver init (default no)
a3a19592
LB
209 * @dev_has/enable/disable_feat: per device entries to check/enable/disable
210 * iommu specific features.
211 * @dev_feat_enabled: check enabled feature
26b25a2b
JPB
212 * @sva_bind: Bind process address space to device
213 * @sva_unbind: Unbind process address space from device
214 * @sva_get_pasid: Get PASID associated to a SVA handle
bf3255b3 215 * @page_response: handle page request response
4cbf3851
SPP
216 * @def_domain_type: device default domain type, return value:
217 * - IOMMU_DOMAIN_IDENTITY: must use an identity domain
218 * - IOMMU_DOMAIN_DMA: must use a dma domain
219 * - 0: use the default setting
9a630a4b 220 * @default_domain_ops: the default ops for domains
25f003de
WD
221 * @pgsize_bitmap: bitmap of all possible supported page sizes
222 * @owner: Driver module providing these ops
7d3002cc 223 */
4a77a6cf 224struct iommu_ops {
3c0e0ca0 225 bool (*capable)(enum iommu_cap);
938c4709
JR
226
227 /* Domain allocation and freeing by the iommu driver */
8539c7c1 228 struct iommu_domain *(*domain_alloc)(unsigned iommu_domain_type);
938c4709 229
a6a4c7e2
JR
230 struct iommu_device *(*probe_device)(struct device *dev);
231 void (*release_device)(struct device *dev);
232 void (*probe_finalize)(struct device *dev);
46c6b2bc 233 struct iommu_group *(*device_group)(struct device *dev);
d7787d57 234
e5b5234a
EA
235 /* Request/Free a list of reserved regions for a device */
236 void (*get_resv_regions)(struct device *dev, struct list_head *list);
237 void (*put_resv_regions)(struct device *dev, struct list_head *list);
a1015c2b 238
d0f60a44 239 int (*of_xlate)(struct device *dev, struct of_phandle_args *args);
41bb23e7 240 bool (*is_attach_deferred)(struct device *dev);
d0f60a44 241
a3a19592
LB
242 /* Per device IOMMU features */
243 bool (*dev_has_feat)(struct device *dev, enum iommu_dev_features f);
244 bool (*dev_feat_enabled)(struct device *dev, enum iommu_dev_features f);
245 int (*dev_enable_feat)(struct device *dev, enum iommu_dev_features f);
246 int (*dev_disable_feat)(struct device *dev, enum iommu_dev_features f);
247
26b25a2b
JPB
248 struct iommu_sva *(*sva_bind)(struct device *dev, struct mm_struct *mm,
249 void *drvdata);
250 void (*sva_unbind)(struct iommu_sva *handle);
c7b6bac9 251 u32 (*sva_get_pasid)(struct iommu_sva *handle);
26b25a2b 252
bf3255b3
JPB
253 int (*page_response)(struct device *dev,
254 struct iommu_fault_event *evt,
255 struct iommu_page_response *msg);
256
4cbf3851
SPP
257 int (*def_domain_type)(struct device *dev);
258
9a630a4b 259 const struct iommu_domain_ops *default_domain_ops;
7d3002cc 260 unsigned long pgsize_bitmap;
25f003de 261 struct module *owner;
4a77a6cf
JR
262};
263
9a630a4b
LB
264/**
265 * struct iommu_domain_ops - domain specific operations
266 * @attach_dev: attach an iommu domain to a device
267 * @detach_dev: detach an iommu domain from a device
268 * @map: map a physically contiguous memory region to an iommu domain
269 * @map_pages: map a physically contiguous set of pages of the same size to
270 * an iommu domain.
271 * @unmap: unmap a physically contiguous memory region from an iommu domain
272 * @unmap_pages: unmap a number of pages of the same size from an iommu domain
273 * @flush_iotlb_all: Synchronously flush all hardware TLBs for this domain
274 * @iotlb_sync_map: Sync mappings created recently using @map to the hardware
275 * @iotlb_sync: Flush all queued ranges from the hardware TLBs and empty flush
276 * queue
277 * @iova_to_phys: translate iova to physical address
6043257b
JG
278 * @enforce_cache_coherency: Prevent any kind of DMA from bypassing IOMMU_CACHE,
279 * including no-snoop TLPs on PCIe or other platform
280 * specific mechanisms.
9a630a4b
LB
281 * @enable_nesting: Enable nesting
282 * @set_pgtable_quirks: Set io page table quirks (IO_PGTABLE_QUIRK_*)
283 * @free: Release the domain after use.
284 */
285struct iommu_domain_ops {
286 int (*attach_dev)(struct iommu_domain *domain, struct device *dev);
287 void (*detach_dev)(struct iommu_domain *domain, struct device *dev);
288
289 int (*map)(struct iommu_domain *domain, unsigned long iova,
290 phys_addr_t paddr, size_t size, int prot, gfp_t gfp);
291 int (*map_pages)(struct iommu_domain *domain, unsigned long iova,
292 phys_addr_t paddr, size_t pgsize, size_t pgcount,
293 int prot, gfp_t gfp, size_t *mapped);
294 size_t (*unmap)(struct iommu_domain *domain, unsigned long iova,
295 size_t size, struct iommu_iotlb_gather *iotlb_gather);
296 size_t (*unmap_pages)(struct iommu_domain *domain, unsigned long iova,
297 size_t pgsize, size_t pgcount,
298 struct iommu_iotlb_gather *iotlb_gather);
299
300 void (*flush_iotlb_all)(struct iommu_domain *domain);
301 void (*iotlb_sync_map)(struct iommu_domain *domain, unsigned long iova,
302 size_t size);
303 void (*iotlb_sync)(struct iommu_domain *domain,
304 struct iommu_iotlb_gather *iotlb_gather);
305
306 phys_addr_t (*iova_to_phys)(struct iommu_domain *domain,
307 dma_addr_t iova);
308
6043257b 309 bool (*enforce_cache_coherency)(struct iommu_domain *domain);
9a630a4b
LB
310 int (*enable_nesting)(struct iommu_domain *domain);
311 int (*set_pgtable_quirks)(struct iommu_domain *domain,
312 unsigned long quirks);
313
314 void (*free)(struct iommu_domain *domain);
315};
316
b0119e87
JR
317/**
318 * struct iommu_device - IOMMU core representation of one IOMMU hardware
319 * instance
320 * @list: Used by the iommu-core to keep a list of registered iommus
321 * @ops: iommu-ops for talking to this iommu
39ab9555 322 * @dev: struct device for sysfs handling
b0119e87
JR
323 */
324struct iommu_device {
325 struct list_head list;
326 const struct iommu_ops *ops;
c73e1ac8 327 struct fwnode_handle *fwnode;
2926a2aa 328 struct device *dev;
b0119e87
JR
329};
330
4e32348b
JP
331/**
332 * struct iommu_fault_event - Generic fault event
333 *
334 * Can represent recoverable faults such as a page requests or
335 * unrecoverable faults such as DMA or IRQ remapping faults.
336 *
337 * @fault: fault descriptor
bf3255b3 338 * @list: pending fault event list, used for tracking responses
4e32348b
JP
339 */
340struct iommu_fault_event {
341 struct iommu_fault fault;
bf3255b3 342 struct list_head list;
4e32348b
JP
343};
344
345/**
346 * struct iommu_fault_param - per-device IOMMU fault data
347 * @handler: Callback function to handle IOMMU faults at device level
348 * @data: handler private data
bf3255b3
JPB
349 * @faults: holds the pending faults which needs response
350 * @lock: protect pending faults list
4e32348b
JP
351 */
352struct iommu_fault_param {
353 iommu_dev_fault_handler_t handler;
354 void *data;
bf3255b3
JPB
355 struct list_head faults;
356 struct mutex lock;
4e32348b
JP
357};
358
359/**
045a7042 360 * struct dev_iommu - Collection of per-device IOMMU data
4e32348b
JP
361 *
362 * @fault_param: IOMMU detected device fault reporting data
fc36479d 363 * @iopf_param: I/O Page Fault queue and data
72acd9df 364 * @fwspec: IOMMU fwspec data
a6a4c7e2 365 * @iommu_dev: IOMMU device this device is linked to
986d5ecc 366 * @priv: IOMMU Driver private data
4e32348b
JP
367 *
368 * TODO: migrate other per device data pointers under iommu_dev_data, e.g.
369 * struct iommu_group *iommu_group;
4e32348b 370 */
045a7042 371struct dev_iommu {
0c830e6b 372 struct mutex lock;
72acd9df 373 struct iommu_fault_param *fault_param;
fc36479d 374 struct iopf_device_param *iopf_param;
72acd9df 375 struct iommu_fwspec *fwspec;
a6a4c7e2 376 struct iommu_device *iommu_dev;
986d5ecc 377 void *priv;
4e32348b
JP
378};
379
2d471b20
RM
380int iommu_device_register(struct iommu_device *iommu,
381 const struct iommu_ops *ops,
382 struct device *hwdev);
b0119e87 383void iommu_device_unregister(struct iommu_device *iommu);
39ab9555
JR
384int iommu_device_sysfs_add(struct iommu_device *iommu,
385 struct device *parent,
386 const struct attribute_group **groups,
387 const char *fmt, ...) __printf(4, 5);
388void iommu_device_sysfs_remove(struct iommu_device *iommu);
e3d10af1
JR
389int iommu_device_link(struct iommu_device *iommu, struct device *link);
390void iommu_device_unlink(struct iommu_device *iommu, struct device *link);
3ab65729 391int iommu_deferred_attach(struct device *dev, struct iommu_domain *domain);
b0119e87 392
2926a2aa
JR
393static inline struct iommu_device *dev_to_iommu_device(struct device *dev)
394{
395 return (struct iommu_device *)dev_get_drvdata(dev);
396}
397
a7d20dc1
WD
398static inline void iommu_iotlb_gather_init(struct iommu_iotlb_gather *gather)
399{
400 *gather = (struct iommu_iotlb_gather) {
401 .start = ULONG_MAX,
87f60cc6 402 .freelist = LIST_HEAD_INIT(gather->freelist),
a7d20dc1
WD
403 };
404}
405
3f6634d9
LB
406static inline const struct iommu_ops *dev_iommu_ops(struct device *dev)
407{
408 /*
409 * Assume that valid ops must be installed if iommu_probe_device()
410 * has succeeded. The device ops are essentially for internal use
411 * within the IOMMU subsystem itself, so we should be able to trust
412 * ourselves not to misuse the helper.
413 */
414 return dev->iommu->iommu_dev->ops;
415}
416
b22f6434 417extern int bus_set_iommu(struct bus_type *bus, const struct iommu_ops *ops);
5012c396 418extern int bus_iommu_probe(struct bus_type *bus);
a1b60c1c 419extern bool iommu_present(struct bus_type *bus);
ed36d04e 420extern bool device_iommu_capable(struct device *dev, enum iommu_cap cap);
3c0e0ca0 421extern bool iommu_capable(struct bus_type *bus, enum iommu_cap cap);
905d66c1 422extern struct iommu_domain *iommu_domain_alloc(struct bus_type *bus);
aa16bea9 423extern struct iommu_group *iommu_group_get_by_id(int id);
4a77a6cf
JR
424extern void iommu_domain_free(struct iommu_domain *domain);
425extern int iommu_attach_device(struct iommu_domain *domain,
426 struct device *dev);
427extern void iommu_detach_device(struct iommu_domain *domain,
428 struct device *dev);
808be0aa 429extern int iommu_sva_unbind_gpasid(struct iommu_domain *domain,
d9057381 430 struct device *dev, ioasid_t pasid);
2c1296d9 431extern struct iommu_domain *iommu_get_domain_for_dev(struct device *dev);
6af588fe 432extern struct iommu_domain *iommu_get_dma_domain(struct device *dev);
cefc53c7 433extern int iommu_map(struct iommu_domain *domain, unsigned long iova,
7d3002cc 434 phys_addr_t paddr, size_t size, int prot);
781ca2de
TM
435extern int iommu_map_atomic(struct iommu_domain *domain, unsigned long iova,
436 phys_addr_t paddr, size_t size, int prot);
7d3002cc 437extern size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova,
add02cfd
JR
438 size_t size);
439extern size_t iommu_unmap_fast(struct iommu_domain *domain,
a7d20dc1
WD
440 unsigned long iova, size_t size,
441 struct iommu_iotlb_gather *iotlb_gather);
ad8f36e4
LG
442extern ssize_t iommu_map_sg(struct iommu_domain *domain, unsigned long iova,
443 struct scatterlist *sg, unsigned int nents, int prot);
444extern ssize_t iommu_map_sg_atomic(struct iommu_domain *domain,
445 unsigned long iova, struct scatterlist *sg,
446 unsigned int nents, int prot);
bb5547ac 447extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova);
4f3f8d9d 448extern void iommu_set_fault_handler(struct iommu_domain *domain,
77ca2332 449 iommu_fault_handler_t handler, void *token);
d72e31c9 450
e5b5234a
EA
451extern void iommu_get_resv_regions(struct device *dev, struct list_head *list);
452extern void iommu_put_resv_regions(struct device *dev, struct list_head *list);
f9f6971e
TR
453extern void generic_iommu_put_resv_regions(struct device *dev,
454 struct list_head *list);
8a69961c
JR
455extern void iommu_set_default_passthrough(bool cmd_line);
456extern void iommu_set_default_translated(bool cmd_line);
457extern bool iommu_default_passthrough(void);
2b20cbba 458extern struct iommu_resv_region *
9d3a4de4
RM
459iommu_alloc_resv_region(phys_addr_t start, size_t length, int prot,
460 enum iommu_resv_type type);
6c65fb31
EA
461extern int iommu_get_group_resv_regions(struct iommu_group *group,
462 struct list_head *head);
a1015c2b 463
d72e31c9
AW
464extern int iommu_attach_group(struct iommu_domain *domain,
465 struct iommu_group *group);
466extern void iommu_detach_group(struct iommu_domain *domain,
467 struct iommu_group *group);
468extern struct iommu_group *iommu_group_alloc(void);
469extern void *iommu_group_get_iommudata(struct iommu_group *group);
470extern void iommu_group_set_iommudata(struct iommu_group *group,
471 void *iommu_data,
472 void (*release)(void *iommu_data));
473extern int iommu_group_set_name(struct iommu_group *group, const char *name);
474extern int iommu_group_add_device(struct iommu_group *group,
475 struct device *dev);
476extern void iommu_group_remove_device(struct device *dev);
477extern int iommu_group_for_each_dev(struct iommu_group *group, void *data,
478 int (*fn)(struct device *, void *));
479extern struct iommu_group *iommu_group_get(struct device *dev);
13f59a78 480extern struct iommu_group *iommu_group_ref_get(struct iommu_group *group);
d72e31c9 481extern void iommu_group_put(struct iommu_group *group);
0c830e6b
JP
482extern int iommu_register_device_fault_handler(struct device *dev,
483 iommu_dev_fault_handler_t handler,
484 void *data);
485
486extern int iommu_unregister_device_fault_handler(struct device *dev);
487
488extern int iommu_report_device_fault(struct device *dev,
489 struct iommu_fault_event *evt);
bf3255b3
JPB
490extern int iommu_page_response(struct device *dev,
491 struct iommu_page_response *msg);
0c830e6b 492
d72e31c9 493extern int iommu_group_id(struct iommu_group *group);
6827ca83 494extern struct iommu_domain *iommu_group_default_domain(struct iommu_group *);
4f3f8d9d 495
7e147547 496int iommu_enable_nesting(struct iommu_domain *domain);
4fc52b81
CH
497int iommu_set_pgtable_quirks(struct iommu_domain *domain,
498 unsigned long quirks);
4f3f8d9d 499
308723e3 500void iommu_set_dma_strict(void);
207c6e36
JR
501
502extern int report_iommu_fault(struct iommu_domain *domain, struct device *dev,
503 unsigned long iova, int flags);
4a77a6cf 504
aae4c8e2 505static inline void iommu_flush_iotlb_all(struct iommu_domain *domain)
add02cfd
JR
506{
507 if (domain->ops->flush_iotlb_all)
508 domain->ops->flush_iotlb_all(domain);
509}
510
aae4c8e2 511static inline void iommu_iotlb_sync(struct iommu_domain *domain,
a7d20dc1 512 struct iommu_iotlb_gather *iotlb_gather)
add02cfd
JR
513{
514 if (domain->ops->iotlb_sync)
56f8af5e 515 domain->ops->iotlb_sync(domain, iotlb_gather);
a7d20dc1
WD
516
517 iommu_iotlb_gather_init(iotlb_gather);
add02cfd
JR
518}
519
febb82c2
NA
520/**
521 * iommu_iotlb_gather_is_disjoint - Checks whether a new range is disjoint
522 *
523 * @gather: TLB gather data
524 * @iova: start of page to invalidate
525 * @size: size of page to invalidate
526 *
527 * Helper for IOMMU drivers to check whether a new range and the gathered range
528 * are disjoint. For many IOMMUs, flushing the IOMMU in this case is better
529 * than merging the two, which might lead to unnecessary invalidations.
530 */
531static inline
532bool iommu_iotlb_gather_is_disjoint(struct iommu_iotlb_gather *gather,
533 unsigned long iova, size_t size)
534{
535 unsigned long start = iova, end = start + size - 1;
536
537 return gather->end != 0 &&
538 (end + 1 < gather->start || start > gather->end + 1);
539}
540
541
3136895c
RM
542/**
543 * iommu_iotlb_gather_add_range - Gather for address-based TLB invalidation
544 * @gather: TLB gather data
545 * @iova: start of page to invalidate
546 * @size: size of page to invalidate
547 *
548 * Helper for IOMMU drivers to build arbitrarily-sized invalidation commands
549 * where only the address range matters, and simply minimising intermediate
550 * syncs is preferred.
551 */
552static inline void iommu_iotlb_gather_add_range(struct iommu_iotlb_gather *gather,
553 unsigned long iova, size_t size)
554{
555 unsigned long end = iova + size - 1;
556
557 if (gather->start > iova)
558 gather->start = iova;
559 if (gather->end < end)
560 gather->end = end;
561}
562
563/**
564 * iommu_iotlb_gather_add_page - Gather for page-based TLB invalidation
565 * @domain: IOMMU domain to be invalidated
566 * @gather: TLB gather data
567 * @iova: start of page to invalidate
568 * @size: size of page to invalidate
569 *
570 * Helper for IOMMU drivers to build invalidation commands based on individual
571 * pages, or with page size/table level hints which cannot be gathered if they
572 * differ.
573 */
4fcf8544
WD
574static inline void iommu_iotlb_gather_add_page(struct iommu_domain *domain,
575 struct iommu_iotlb_gather *gather,
576 unsigned long iova, size_t size)
577{
4fcf8544
WD
578 /*
579 * If the new page is disjoint from the current range or is mapped at
580 * a different granularity, then sync the TLB so that the gather
581 * structure can be rewritten.
582 */
febb82c2
NA
583 if ((gather->pgsize && gather->pgsize != size) ||
584 iommu_iotlb_gather_is_disjoint(gather, iova, size))
585 iommu_iotlb_sync(domain, gather);
4fcf8544 586
febb82c2 587 gather->pgsize = size;
3136895c 588 iommu_iotlb_gather_add_range(gather, iova, size);
4fcf8544 589}
4fcf8544 590
f7403abf
RM
591static inline bool iommu_iotlb_gather_queued(struct iommu_iotlb_gather *gather)
592{
593 return gather && gather->queued;
4fcf8544
WD
594}
595
5e62292b
JR
596/* PCI device grouping function */
597extern struct iommu_group *pci_device_group(struct device *dev);
6eab556a
JR
598/* Generic device grouping function */
599extern struct iommu_group *generic_device_group(struct device *dev);
eab03e2a
NG
600/* FSL-MC device grouping function */
601struct iommu_group *fsl_mc_device_group(struct device *dev);
5e62292b 602
57f98d2f
RM
603/**
604 * struct iommu_fwspec - per-device IOMMU instance data
605 * @ops: ops for this device's IOMMU
606 * @iommu_fwnode: firmware handle for this device's IOMMU
0d35309a 607 * @flags: IOMMU_FWSPEC_* flags
57f98d2f
RM
608 * @num_ids: number of associated device IDs
609 * @ids: IDs which this device may present to the IOMMU
610 */
611struct iommu_fwspec {
612 const struct iommu_ops *ops;
613 struct fwnode_handle *iommu_fwnode;
5702ee24 614 u32 flags;
57f98d2f 615 unsigned int num_ids;
098accf2 616 u32 ids[];
57f98d2f
RM
617};
618
5702ee24
JPB
619/* ATS is supported */
620#define IOMMU_FWSPEC_PCI_RC_ATS (1 << 0)
621
26b25a2b
JPB
622/**
623 * struct iommu_sva - handle to a device-mm bond
624 */
625struct iommu_sva {
626 struct device *dev;
26b25a2b
JPB
627};
628
57f98d2f
RM
629int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode,
630 const struct iommu_ops *ops);
631void iommu_fwspec_free(struct device *dev);
632int iommu_fwspec_add_ids(struct device *dev, u32 *ids, int num_ids);
534766df 633const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode);
57f98d2f 634
b4ef725e
JR
635static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev)
636{
72acd9df
JR
637 if (dev->iommu)
638 return dev->iommu->fwspec;
639 else
640 return NULL;
b4ef725e
JR
641}
642
643static inline void dev_iommu_fwspec_set(struct device *dev,
644 struct iommu_fwspec *fwspec)
645{
72acd9df 646 dev->iommu->fwspec = fwspec;
b4ef725e
JR
647}
648
f9867f41
JR
649static inline void *dev_iommu_priv_get(struct device *dev)
650{
4c9fb5d9
JR
651 if (dev->iommu)
652 return dev->iommu->priv;
653 else
654 return NULL;
f9867f41
JR
655}
656
657static inline void dev_iommu_priv_set(struct device *dev, void *priv)
658{
986d5ecc 659 dev->iommu->priv = priv;
f9867f41
JR
660}
661
cc5aed44
JR
662int iommu_probe_device(struct device *dev);
663void iommu_release_device(struct device *dev);
664
a3a19592
LB
665int iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features f);
666int iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features f);
667bool iommu_dev_feature_enabled(struct device *dev, enum iommu_dev_features f);
a3a19592 668
26b25a2b
JPB
669struct iommu_sva *iommu_sva_bind_device(struct device *dev,
670 struct mm_struct *mm,
671 void *drvdata);
672void iommu_sva_unbind_device(struct iommu_sva *handle);
c7b6bac9 673u32 iommu_sva_get_pasid(struct iommu_sva *handle);
26b25a2b 674
1ea2a07a
LB
675int iommu_device_use_default_domain(struct device *dev);
676void iommu_device_unuse_default_domain(struct device *dev);
677
678int iommu_group_claim_dma_owner(struct iommu_group *group, void *owner);
679void iommu_group_release_dma_owner(struct iommu_group *group);
680bool iommu_group_dma_owner_claimed(struct iommu_group *group);
681
4a77a6cf
JR
682#else /* CONFIG_IOMMU_API */
683
39d4ebb9 684struct iommu_ops {};
d72e31c9 685struct iommu_group {};
57f98d2f 686struct iommu_fwspec {};
b0119e87 687struct iommu_device {};
4e32348b 688struct iommu_fault_param {};
a7d20dc1 689struct iommu_iotlb_gather {};
4a77a6cf 690
a1b60c1c 691static inline bool iommu_present(struct bus_type *bus)
4a77a6cf
JR
692{
693 return false;
694}
695
ed36d04e
RM
696static inline bool device_iommu_capable(struct device *dev, enum iommu_cap cap)
697{
698 return false;
699}
700
3c0e0ca0
JR
701static inline bool iommu_capable(struct bus_type *bus, enum iommu_cap cap)
702{
703 return false;
704}
705
905d66c1 706static inline struct iommu_domain *iommu_domain_alloc(struct bus_type *bus)
4a77a6cf
JR
707{
708 return NULL;
709}
710
b62dfd29
AK
711static inline struct iommu_group *iommu_group_get_by_id(int id)
712{
713 return NULL;
714}
715
4a77a6cf
JR
716static inline void iommu_domain_free(struct iommu_domain *domain)
717{
718}
719
720static inline int iommu_attach_device(struct iommu_domain *domain,
721 struct device *dev)
722{
723 return -ENODEV;
724}
725
726static inline void iommu_detach_device(struct iommu_domain *domain,
727 struct device *dev)
728{
729}
730
2c1296d9
JR
731static inline struct iommu_domain *iommu_get_domain_for_dev(struct device *dev)
732{
733 return NULL;
734}
735
cefc53c7 736static inline int iommu_map(struct iommu_domain *domain, unsigned long iova,
ebae3e83 737 phys_addr_t paddr, size_t size, int prot)
cefc53c7
JR
738{
739 return -ENODEV;
740}
741
781ca2de
TM
742static inline int iommu_map_atomic(struct iommu_domain *domain,
743 unsigned long iova, phys_addr_t paddr,
744 size_t size, int prot)
745{
746 return -ENODEV;
747}
748
c5611a87
SS
749static inline size_t iommu_unmap(struct iommu_domain *domain,
750 unsigned long iova, size_t size)
cefc53c7 751{
c5611a87 752 return 0;
cefc53c7
JR
753}
754
c5611a87 755static inline size_t iommu_unmap_fast(struct iommu_domain *domain,
a7d20dc1
WD
756 unsigned long iova, int gfp_order,
757 struct iommu_iotlb_gather *iotlb_gather)
cefc53c7 758{
c5611a87 759 return 0;
cefc53c7
JR
760}
761
ad8f36e4
LG
762static inline ssize_t iommu_map_sg(struct iommu_domain *domain,
763 unsigned long iova, struct scatterlist *sg,
764 unsigned int nents, int prot)
315786eb 765{
ad8f36e4 766 return -ENODEV;
315786eb
OH
767}
768
ad8f36e4 769static inline ssize_t iommu_map_sg_atomic(struct iommu_domain *domain,
781ca2de
TM
770 unsigned long iova, struct scatterlist *sg,
771 unsigned int nents, int prot)
772{
ad8f36e4 773 return -ENODEV;
781ca2de
TM
774}
775
aae4c8e2 776static inline void iommu_flush_iotlb_all(struct iommu_domain *domain)
add02cfd
JR
777{
778}
779
aae4c8e2 780static inline void iommu_iotlb_sync(struct iommu_domain *domain,
a7d20dc1 781 struct iommu_iotlb_gather *iotlb_gather)
add02cfd
JR
782{
783}
784
bb5547ac 785static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova)
4a77a6cf
JR
786{
787 return 0;
788}
789
4f3f8d9d 790static inline void iommu_set_fault_handler(struct iommu_domain *domain,
77ca2332 791 iommu_fault_handler_t handler, void *token)
4f3f8d9d
OBC
792{
793}
794
e5b5234a 795static inline void iommu_get_resv_regions(struct device *dev,
a1015c2b
JR
796 struct list_head *list)
797{
798}
799
e5b5234a 800static inline void iommu_put_resv_regions(struct device *dev,
a1015c2b
JR
801 struct list_head *list)
802{
803}
804
6c65fb31
EA
805static inline int iommu_get_group_resv_regions(struct iommu_group *group,
806 struct list_head *head)
807{
808 return -ENODEV;
809}
810
8a69961c
JR
811static inline void iommu_set_default_passthrough(bool cmd_line)
812{
813}
814
815static inline void iommu_set_default_translated(bool cmd_line)
816{
817}
818
819static inline bool iommu_default_passthrough(void)
820{
821 return true;
822}
823
bef83de5
AW
824static inline int iommu_attach_group(struct iommu_domain *domain,
825 struct iommu_group *group)
d72e31c9
AW
826{
827 return -ENODEV;
828}
829
bef83de5
AW
830static inline void iommu_detach_group(struct iommu_domain *domain,
831 struct iommu_group *group)
d72e31c9
AW
832{
833}
834
bef83de5 835static inline struct iommu_group *iommu_group_alloc(void)
d72e31c9
AW
836{
837 return ERR_PTR(-ENODEV);
838}
839
bef83de5 840static inline void *iommu_group_get_iommudata(struct iommu_group *group)
d72e31c9
AW
841{
842 return NULL;
843}
844
bef83de5
AW
845static inline void iommu_group_set_iommudata(struct iommu_group *group,
846 void *iommu_data,
847 void (*release)(void *iommu_data))
d72e31c9
AW
848{
849}
850
bef83de5
AW
851static inline int iommu_group_set_name(struct iommu_group *group,
852 const char *name)
d72e31c9
AW
853{
854 return -ENODEV;
855}
856
bef83de5
AW
857static inline int iommu_group_add_device(struct iommu_group *group,
858 struct device *dev)
d72e31c9
AW
859{
860 return -ENODEV;
861}
862
bef83de5 863static inline void iommu_group_remove_device(struct device *dev)
d72e31c9
AW
864{
865}
866
bef83de5
AW
867static inline int iommu_group_for_each_dev(struct iommu_group *group,
868 void *data,
869 int (*fn)(struct device *, void *))
d72e31c9
AW
870{
871 return -ENODEV;
872}
873
bef83de5 874static inline struct iommu_group *iommu_group_get(struct device *dev)
d72e31c9
AW
875{
876 return NULL;
877}
878
bef83de5 879static inline void iommu_group_put(struct iommu_group *group)
d72e31c9
AW
880{
881}
882
0c830e6b
JP
883static inline
884int iommu_register_device_fault_handler(struct device *dev,
885 iommu_dev_fault_handler_t handler,
886 void *data)
887{
888 return -ENODEV;
889}
890
891static inline int iommu_unregister_device_fault_handler(struct device *dev)
892{
893 return 0;
894}
895
896static inline
897int iommu_report_device_fault(struct device *dev, struct iommu_fault_event *evt)
898{
899 return -ENODEV;
900}
901
bf3255b3
JPB
902static inline int iommu_page_response(struct device *dev,
903 struct iommu_page_response *msg)
904{
905 return -ENODEV;
906}
907
bef83de5 908static inline int iommu_group_id(struct iommu_group *group)
d72e31c9
AW
909{
910 return -ENODEV;
911}
1460432c 912
4fc52b81
CH
913static inline int iommu_set_pgtable_quirks(struct iommu_domain *domain,
914 unsigned long quirks)
0cd76dd1 915{
4fc52b81 916 return 0;
0cd76dd1
JR
917}
918
2d471b20
RM
919static inline int iommu_device_register(struct iommu_device *iommu,
920 const struct iommu_ops *ops,
921 struct device *hwdev)
c61959ec 922{
39ab9555 923 return -ENODEV;
c61959ec
AW
924}
925
2926a2aa
JR
926static inline struct iommu_device *dev_to_iommu_device(struct device *dev)
927{
928 return NULL;
929}
930
a7d20dc1
WD
931static inline void iommu_iotlb_gather_init(struct iommu_iotlb_gather *gather)
932{
933}
934
4fcf8544
WD
935static inline void iommu_iotlb_gather_add_page(struct iommu_domain *domain,
936 struct iommu_iotlb_gather *gather,
937 unsigned long iova, size_t size)
938{
939}
940
f7403abf
RM
941static inline bool iommu_iotlb_gather_queued(struct iommu_iotlb_gather *gather)
942{
943 return false;
944}
945
39ab9555 946static inline void iommu_device_unregister(struct iommu_device *iommu)
c61959ec 947{
c61959ec
AW
948}
949
39ab9555
JR
950static inline int iommu_device_sysfs_add(struct iommu_device *iommu,
951 struct device *parent,
952 const struct attribute_group **groups,
953 const char *fmt, ...)
b0119e87 954{
39ab9555 955 return -ENODEV;
b0119e87
JR
956}
957
39ab9555 958static inline void iommu_device_sysfs_remove(struct iommu_device *iommu)
c61959ec
AW
959{
960}
961
e09f8ea5 962static inline int iommu_device_link(struct device *dev, struct device *link)
c61959ec
AW
963{
964 return -EINVAL;
965}
966
e09f8ea5 967static inline void iommu_device_unlink(struct device *dev, struct device *link)
c61959ec
AW
968{
969}
970
57f98d2f
RM
971static inline int iommu_fwspec_init(struct device *dev,
972 struct fwnode_handle *iommu_fwnode,
973 const struct iommu_ops *ops)
974{
975 return -ENODEV;
976}
977
978static inline void iommu_fwspec_free(struct device *dev)
979{
980}
981
982static inline int iommu_fwspec_add_ids(struct device *dev, u32 *ids,
983 int num_ids)
984{
985 return -ENODEV;
986}
987
e4f10ffe 988static inline
534766df 989const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode)
e4f10ffe
LP
990{
991 return NULL;
992}
993
a3a19592
LB
994static inline bool
995iommu_dev_feature_enabled(struct device *dev, enum iommu_dev_features feat)
996{
997 return false;
998}
999
1000static inline int
1001iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features feat)
1002{
1003 return -ENODEV;
1004}
1005
1006static inline int
1007iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features feat)
1008{
1009 return -ENODEV;
1010}
1011
26b25a2b
JPB
1012static inline struct iommu_sva *
1013iommu_sva_bind_device(struct device *dev, struct mm_struct *mm, void *drvdata)
1014{
1015 return NULL;
1016}
1017
1018static inline void iommu_sva_unbind_device(struct iommu_sva *handle)
1019{
1020}
1021
c7b6bac9 1022static inline u32 iommu_sva_get_pasid(struct iommu_sva *handle)
26b25a2b
JPB
1023{
1024 return IOMMU_PASID_INVALID;
1025}
1026
0008d0c3
JR
1027static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev)
1028{
1029 return NULL;
1030}
1ea2a07a
LB
1031
1032static inline int iommu_device_use_default_domain(struct device *dev)
1033{
1034 return 0;
1035}
1036
1037static inline void iommu_device_unuse_default_domain(struct device *dev)
1038{
1039}
1040
1041static inline int
1042iommu_group_claim_dma_owner(struct iommu_group *group, void *owner)
1043{
1044 return -ENODEV;
1045}
1046
1047static inline void iommu_group_release_dma_owner(struct iommu_group *group)
1048{
1049}
1050
1051static inline bool iommu_group_dma_owner_claimed(struct iommu_group *group)
1052{
1053 return false;
1054}
4a77a6cf
JR
1055#endif /* CONFIG_IOMMU_API */
1056
ca37faf3
MS
1057/**
1058 * iommu_map_sgtable - Map the given buffer to the IOMMU domain
1059 * @domain: The IOMMU domain to perform the mapping
1060 * @iova: The start address to map the buffer
1061 * @sgt: The sg_table object describing the buffer
1062 * @prot: IOMMU protection bits
1063 *
1064 * Creates a mapping at @iova for the buffer described by a scatterlist
1065 * stored in the given sg_table object in the provided IOMMU domain.
1066 */
1067static inline size_t iommu_map_sgtable(struct iommu_domain *domain,
1068 unsigned long iova, struct sg_table *sgt, int prot)
1069{
1070 return iommu_map_sg(domain, iova, sgt->sgl, sgt->orig_nents, prot);
1071}
1072
bad614b2
GH
1073#ifdef CONFIG_IOMMU_DEBUGFS
1074extern struct dentry *iommu_debugfs_dir;
1075void iommu_debugfs_setup(void);
1076#else
1077static inline void iommu_debugfs_setup(void) {}
1078#endif
1079
4a77a6cf 1080#endif /* __LINUX_IOMMU_H */