Commit | Line | Data |
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4a77a6cf JR |
1 | /* |
2 | * Copyright (C) 2007-2008 Advanced Micro Devices, Inc. | |
3 | * Author: Joerg Roedel <joerg.roedel@amd.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of the GNU General Public License version 2 as published | |
7 | * by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
17 | */ | |
18 | ||
19 | #ifndef __LINUX_IOMMU_H | |
20 | #define __LINUX_IOMMU_H | |
21 | ||
74315ccc | 22 | #include <linux/errno.h> |
9a08d376 | 23 | #include <linux/err.h> |
d0f60a44 | 24 | #include <linux/of.h> |
76582d0a | 25 | #include <linux/types.h> |
315786eb | 26 | #include <linux/scatterlist.h> |
56fa4849 | 27 | #include <trace/events/iommu.h> |
74315ccc | 28 | |
ca13bb3d WD |
29 | #define IOMMU_READ (1 << 0) |
30 | #define IOMMU_WRITE (1 << 1) | |
31 | #define IOMMU_CACHE (1 << 2) /* DMA cache coherency */ | |
a720b41c | 32 | #define IOMMU_NOEXEC (1 << 3) |
4a77a6cf | 33 | |
905d66c1 | 34 | struct iommu_ops; |
d72e31c9 | 35 | struct iommu_group; |
ff21776d | 36 | struct bus_type; |
4a77a6cf | 37 | struct device; |
4f3f8d9d | 38 | struct iommu_domain; |
ba1eabfa | 39 | struct notifier_block; |
4f3f8d9d OBC |
40 | |
41 | /* iommu fault flags */ | |
42 | #define IOMMU_FAULT_READ 0x0 | |
43 | #define IOMMU_FAULT_WRITE 0x1 | |
44 | ||
45 | typedef int (*iommu_fault_handler_t)(struct iommu_domain *, | |
77ca2332 | 46 | struct device *, unsigned long, int, void *); |
4a77a6cf | 47 | |
0ff64f80 JR |
48 | struct iommu_domain_geometry { |
49 | dma_addr_t aperture_start; /* First address that can be mapped */ | |
50 | dma_addr_t aperture_end; /* Last address that can be mapped */ | |
51 | bool force_aperture; /* DMA only allowed in mappable range? */ | |
52 | }; | |
53 | ||
8539c7c1 JR |
54 | /* Domain feature flags */ |
55 | #define __IOMMU_DOMAIN_PAGING (1U << 0) /* Support for iommu_map/unmap */ | |
56 | #define __IOMMU_DOMAIN_DMA_API (1U << 1) /* Domain for use in DMA-API | |
57 | implementation */ | |
58 | #define __IOMMU_DOMAIN_PT (1U << 2) /* Domain is identity mapped */ | |
59 | ||
60 | /* | |
61 | * This are the possible domain-types | |
62 | * | |
63 | * IOMMU_DOMAIN_BLOCKED - All DMA is blocked, can be used to isolate | |
64 | * devices | |
65 | * IOMMU_DOMAIN_IDENTITY - DMA addresses are system physical addresses | |
66 | * IOMMU_DOMAIN_UNMANAGED - DMA mappings managed by IOMMU-API user, used | |
67 | * for VMs | |
68 | * IOMMU_DOMAIN_DMA - Internally used for DMA-API implementations. | |
69 | * This flag allows IOMMU drivers to implement | |
70 | * certain optimizations for these domains | |
71 | */ | |
72 | #define IOMMU_DOMAIN_BLOCKED (0U) | |
73 | #define IOMMU_DOMAIN_IDENTITY (__IOMMU_DOMAIN_PT) | |
74 | #define IOMMU_DOMAIN_UNMANAGED (__IOMMU_DOMAIN_PAGING) | |
75 | #define IOMMU_DOMAIN_DMA (__IOMMU_DOMAIN_PAGING | \ | |
76 | __IOMMU_DOMAIN_DMA_API) | |
77 | ||
4a77a6cf | 78 | struct iommu_domain { |
8539c7c1 | 79 | unsigned type; |
b22f6434 | 80 | const struct iommu_ops *ops; |
4f3f8d9d | 81 | iommu_fault_handler_t handler; |
77ca2332 | 82 | void *handler_token; |
0ff64f80 | 83 | struct iommu_domain_geometry geometry; |
0db2e5d1 | 84 | void *iova_cookie; |
4a77a6cf JR |
85 | }; |
86 | ||
1aed0748 JR |
87 | enum iommu_cap { |
88 | IOMMU_CAP_CACHE_COHERENCY, /* IOMMU can enforce cache coherent DMA | |
89 | transactions */ | |
90 | IOMMU_CAP_INTR_REMAP, /* IOMMU supports interrupt isolation */ | |
c4986649 | 91 | IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */ |
1aed0748 | 92 | }; |
dbb9fd86 | 93 | |
7cabf491 VS |
94 | /* |
95 | * Following constraints are specifc to FSL_PAMUV1: | |
96 | * -aperture must be power of 2, and naturally aligned | |
97 | * -number of windows must be power of 2, and address space size | |
98 | * of each window is determined by aperture size / # of windows | |
99 | * -the actual size of the mapped region of a window must be power | |
100 | * of 2 starting with 4KB and physical address must be naturally | |
101 | * aligned. | |
102 | * DOMAIN_ATTR_FSL_PAMUV1 corresponds to the above mentioned contraints. | |
103 | * The caller can invoke iommu_domain_get_attr to check if the underlying | |
104 | * iommu implementation supports these constraints. | |
105 | */ | |
106 | ||
0cd76dd1 | 107 | enum iommu_attr { |
0ff64f80 | 108 | DOMAIN_ATTR_GEOMETRY, |
d2e12160 | 109 | DOMAIN_ATTR_PAGING, |
69356712 | 110 | DOMAIN_ATTR_WINDOWS, |
7cabf491 VS |
111 | DOMAIN_ATTR_FSL_PAMU_STASH, |
112 | DOMAIN_ATTR_FSL_PAMU_ENABLE, | |
113 | DOMAIN_ATTR_FSL_PAMUV1, | |
c02607aa | 114 | DOMAIN_ATTR_NESTING, /* two stages of translation */ |
a8b8a88a | 115 | DOMAIN_ATTR_MAX, |
0cd76dd1 JR |
116 | }; |
117 | ||
a1015c2b JR |
118 | /** |
119 | * struct iommu_dm_region - descriptor for a direct mapped memory region | |
120 | * @list: Linked list pointers | |
121 | * @start: System physical start address of the region | |
122 | * @length: Length of the region in bytes | |
123 | * @prot: IOMMU Protection flags (READ/WRITE/...) | |
124 | */ | |
125 | struct iommu_dm_region { | |
126 | struct list_head list; | |
127 | phys_addr_t start; | |
128 | size_t length; | |
129 | int prot; | |
130 | }; | |
131 | ||
39d4ebb9 JR |
132 | #ifdef CONFIG_IOMMU_API |
133 | ||
7d3002cc OBC |
134 | /** |
135 | * struct iommu_ops - iommu ops and capabilities | |
0d9bacb6 MD |
136 | * @capable: check capability |
137 | * @domain_alloc: allocate iommu domain | |
138 | * @domain_free: free iommu domain | |
7d3002cc OBC |
139 | * @attach_dev: attach device to an iommu domain |
140 | * @detach_dev: detach device from an iommu domain | |
141 | * @map: map a physically contiguous memory region to an iommu domain | |
142 | * @unmap: unmap a physically contiguous memory region from an iommu domain | |
315786eb OH |
143 | * @map_sg: map a scatter-gather list of physically contiguous memory chunks |
144 | * to an iommu domain | |
7d3002cc | 145 | * @iova_to_phys: translate iova to physical address |
d72e31c9 AW |
146 | * @add_device: add device to iommu grouping |
147 | * @remove_device: remove device from iommu grouping | |
0d9bacb6 | 148 | * @device_group: find iommu group for a particular device |
0cd76dd1 JR |
149 | * @domain_get_attr: Query domain attributes |
150 | * @domain_set_attr: Change domain attributes | |
0d9bacb6 MD |
151 | * @get_dm_regions: Request list of direct mapping requirements for a device |
152 | * @put_dm_regions: Free list of direct mapping requirements for a device | |
153 | * @domain_window_enable: Configure and enable a particular window for a domain | |
154 | * @domain_window_disable: Disable a particular window for a domain | |
155 | * @domain_set_windows: Set the number of windows for a domain | |
156 | * @domain_get_windows: Return the number of windows for a domain | |
d0f60a44 | 157 | * @of_xlate: add OF master IDs to iommu grouping |
7d3002cc | 158 | * @pgsize_bitmap: bitmap of supported page sizes |
1cd076bf | 159 | * @priv: per-instance data private to the iommu driver |
7d3002cc | 160 | */ |
4a77a6cf | 161 | struct iommu_ops { |
3c0e0ca0 | 162 | bool (*capable)(enum iommu_cap); |
938c4709 JR |
163 | |
164 | /* Domain allocation and freeing by the iommu driver */ | |
8539c7c1 | 165 | struct iommu_domain *(*domain_alloc)(unsigned iommu_domain_type); |
938c4709 JR |
166 | void (*domain_free)(struct iommu_domain *); |
167 | ||
4a77a6cf JR |
168 | int (*attach_dev)(struct iommu_domain *domain, struct device *dev); |
169 | void (*detach_dev)(struct iommu_domain *domain, struct device *dev); | |
67651786 | 170 | int (*map)(struct iommu_domain *domain, unsigned long iova, |
5009065d OBC |
171 | phys_addr_t paddr, size_t size, int prot); |
172 | size_t (*unmap)(struct iommu_domain *domain, unsigned long iova, | |
173 | size_t size); | |
315786eb OH |
174 | size_t (*map_sg)(struct iommu_domain *domain, unsigned long iova, |
175 | struct scatterlist *sg, unsigned int nents, int prot); | |
bb5547ac | 176 | phys_addr_t (*iova_to_phys)(struct iommu_domain *domain, dma_addr_t iova); |
d72e31c9 AW |
177 | int (*add_device)(struct device *dev); |
178 | void (*remove_device)(struct device *dev); | |
46c6b2bc | 179 | struct iommu_group *(*device_group)(struct device *dev); |
0cd76dd1 JR |
180 | int (*domain_get_attr)(struct iommu_domain *domain, |
181 | enum iommu_attr attr, void *data); | |
182 | int (*domain_set_attr)(struct iommu_domain *domain, | |
183 | enum iommu_attr attr, void *data); | |
d7787d57 | 184 | |
a1015c2b JR |
185 | /* Request/Free a list of direct mapping requirements for a device */ |
186 | void (*get_dm_regions)(struct device *dev, struct list_head *list); | |
187 | void (*put_dm_regions)(struct device *dev, struct list_head *list); | |
188 | ||
d7787d57 JR |
189 | /* Window handling functions */ |
190 | int (*domain_window_enable)(struct iommu_domain *domain, u32 wnd_nr, | |
80f97f0f | 191 | phys_addr_t paddr, u64 size, int prot); |
d7787d57 | 192 | void (*domain_window_disable)(struct iommu_domain *domain, u32 wnd_nr); |
0d9bacb6 | 193 | /* Set the number of windows per domain */ |
69356712 | 194 | int (*domain_set_windows)(struct iommu_domain *domain, u32 w_count); |
0d9bacb6 | 195 | /* Get the number of windows per domain */ |
69356712 | 196 | u32 (*domain_get_windows)(struct iommu_domain *domain); |
d7787d57 | 197 | |
d0f60a44 WD |
198 | #ifdef CONFIG_OF_IOMMU |
199 | int (*of_xlate)(struct device *dev, struct of_phandle_args *args); | |
200 | #endif | |
201 | ||
7d3002cc | 202 | unsigned long pgsize_bitmap; |
1cd076bf | 203 | void *priv; |
4a77a6cf JR |
204 | }; |
205 | ||
d72e31c9 AW |
206 | #define IOMMU_GROUP_NOTIFY_ADD_DEVICE 1 /* Device added */ |
207 | #define IOMMU_GROUP_NOTIFY_DEL_DEVICE 2 /* Pre Device removed */ | |
208 | #define IOMMU_GROUP_NOTIFY_BIND_DRIVER 3 /* Pre Driver bind */ | |
209 | #define IOMMU_GROUP_NOTIFY_BOUND_DRIVER 4 /* Post Driver bind */ | |
210 | #define IOMMU_GROUP_NOTIFY_UNBIND_DRIVER 5 /* Pre Driver unbind */ | |
211 | #define IOMMU_GROUP_NOTIFY_UNBOUND_DRIVER 6 /* Post Driver unbind */ | |
212 | ||
b22f6434 | 213 | extern int bus_set_iommu(struct bus_type *bus, const struct iommu_ops *ops); |
a1b60c1c | 214 | extern bool iommu_present(struct bus_type *bus); |
3c0e0ca0 | 215 | extern bool iommu_capable(struct bus_type *bus, enum iommu_cap cap); |
905d66c1 | 216 | extern struct iommu_domain *iommu_domain_alloc(struct bus_type *bus); |
aa16bea9 | 217 | extern struct iommu_group *iommu_group_get_by_id(int id); |
4a77a6cf JR |
218 | extern void iommu_domain_free(struct iommu_domain *domain); |
219 | extern int iommu_attach_device(struct iommu_domain *domain, | |
220 | struct device *dev); | |
221 | extern void iommu_detach_device(struct iommu_domain *domain, | |
222 | struct device *dev); | |
2c1296d9 | 223 | extern struct iommu_domain *iommu_get_domain_for_dev(struct device *dev); |
cefc53c7 | 224 | extern int iommu_map(struct iommu_domain *domain, unsigned long iova, |
7d3002cc OBC |
225 | phys_addr_t paddr, size_t size, int prot); |
226 | extern size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova, | |
227 | size_t size); | |
315786eb OH |
228 | extern size_t default_iommu_map_sg(struct iommu_domain *domain, unsigned long iova, |
229 | struct scatterlist *sg,unsigned int nents, | |
230 | int prot); | |
bb5547ac | 231 | extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova); |
4f3f8d9d | 232 | extern void iommu_set_fault_handler(struct iommu_domain *domain, |
77ca2332 | 233 | iommu_fault_handler_t handler, void *token); |
d72e31c9 | 234 | |
a1015c2b JR |
235 | extern void iommu_get_dm_regions(struct device *dev, struct list_head *list); |
236 | extern void iommu_put_dm_regions(struct device *dev, struct list_head *list); | |
d290f1e7 | 237 | extern int iommu_request_dm_for_dev(struct device *dev); |
a1015c2b | 238 | |
d72e31c9 AW |
239 | extern int iommu_attach_group(struct iommu_domain *domain, |
240 | struct iommu_group *group); | |
241 | extern void iommu_detach_group(struct iommu_domain *domain, | |
242 | struct iommu_group *group); | |
243 | extern struct iommu_group *iommu_group_alloc(void); | |
244 | extern void *iommu_group_get_iommudata(struct iommu_group *group); | |
245 | extern void iommu_group_set_iommudata(struct iommu_group *group, | |
246 | void *iommu_data, | |
247 | void (*release)(void *iommu_data)); | |
248 | extern int iommu_group_set_name(struct iommu_group *group, const char *name); | |
249 | extern int iommu_group_add_device(struct iommu_group *group, | |
250 | struct device *dev); | |
251 | extern void iommu_group_remove_device(struct device *dev); | |
252 | extern int iommu_group_for_each_dev(struct iommu_group *group, void *data, | |
253 | int (*fn)(struct device *, void *)); | |
254 | extern struct iommu_group *iommu_group_get(struct device *dev); | |
255 | extern void iommu_group_put(struct iommu_group *group); | |
256 | extern int iommu_group_register_notifier(struct iommu_group *group, | |
257 | struct notifier_block *nb); | |
258 | extern int iommu_group_unregister_notifier(struct iommu_group *group, | |
259 | struct notifier_block *nb); | |
260 | extern int iommu_group_id(struct iommu_group *group); | |
104a1c13 | 261 | extern struct iommu_group *iommu_group_get_for_dev(struct device *dev); |
6827ca83 | 262 | extern struct iommu_domain *iommu_group_default_domain(struct iommu_group *); |
4f3f8d9d | 263 | |
0cd76dd1 JR |
264 | extern int iommu_domain_get_attr(struct iommu_domain *domain, enum iommu_attr, |
265 | void *data); | |
266 | extern int iommu_domain_set_attr(struct iommu_domain *domain, enum iommu_attr, | |
267 | void *data); | |
c61959ec AW |
268 | struct device *iommu_device_create(struct device *parent, void *drvdata, |
269 | const struct attribute_group **groups, | |
8db14860 | 270 | const char *fmt, ...) __printf(4, 5); |
c61959ec AW |
271 | void iommu_device_destroy(struct device *dev); |
272 | int iommu_device_link(struct device *dev, struct device *link); | |
273 | void iommu_device_unlink(struct device *dev, struct device *link); | |
4f3f8d9d | 274 | |
d7787d57 JR |
275 | /* Window handling function prototypes */ |
276 | extern int iommu_domain_window_enable(struct iommu_domain *domain, u32 wnd_nr, | |
80f97f0f VS |
277 | phys_addr_t offset, u64 size, |
278 | int prot); | |
d7787d57 | 279 | extern void iommu_domain_window_disable(struct iommu_domain *domain, u32 wnd_nr); |
4f3f8d9d OBC |
280 | /** |
281 | * report_iommu_fault() - report about an IOMMU fault to the IOMMU framework | |
282 | * @domain: the iommu domain where the fault has happened | |
283 | * @dev: the device where the fault has happened | |
284 | * @iova: the faulting address | |
285 | * @flags: mmu fault flags (e.g. IOMMU_FAULT_READ/IOMMU_FAULT_WRITE/...) | |
286 | * | |
287 | * This function should be called by the low-level IOMMU implementations | |
288 | * whenever IOMMU faults happen, to allow high-level users, that are | |
289 | * interested in such events, to know about them. | |
290 | * | |
291 | * This event may be useful for several possible use cases: | |
292 | * - mere logging of the event | |
293 | * - dynamic TLB/PTE loading | |
294 | * - if restarting of the faulting device is required | |
295 | * | |
296 | * Returns 0 on success and an appropriate error code otherwise (if dynamic | |
297 | * PTE/TLB loading will one day be supported, implementations will be able | |
298 | * to tell whether it succeeded or not according to this return value). | |
0ed6d2d2 OBC |
299 | * |
300 | * Specifically, -ENOSYS is returned if a fault handler isn't installed | |
301 | * (though fault handlers can also return -ENOSYS, in case they want to | |
302 | * elicit the default behavior of the IOMMU drivers). | |
4f3f8d9d OBC |
303 | */ |
304 | static inline int report_iommu_fault(struct iommu_domain *domain, | |
305 | struct device *dev, unsigned long iova, int flags) | |
306 | { | |
0ed6d2d2 | 307 | int ret = -ENOSYS; |
4a77a6cf | 308 | |
4f3f8d9d OBC |
309 | /* |
310 | * if upper layers showed interest and installed a fault handler, | |
311 | * invoke it. | |
312 | */ | |
313 | if (domain->handler) | |
77ca2332 OBC |
314 | ret = domain->handler(domain, dev, iova, flags, |
315 | domain->handler_token); | |
4a77a6cf | 316 | |
56fa4849 | 317 | trace_io_page_fault(dev, iova, flags); |
4f3f8d9d | 318 | return ret; |
4a77a6cf JR |
319 | } |
320 | ||
315786eb OH |
321 | static inline size_t iommu_map_sg(struct iommu_domain *domain, |
322 | unsigned long iova, struct scatterlist *sg, | |
323 | unsigned int nents, int prot) | |
324 | { | |
325 | return domain->ops->map_sg(domain, iova, sg, nents, prot); | |
326 | } | |
327 | ||
5e62292b JR |
328 | /* PCI device grouping function */ |
329 | extern struct iommu_group *pci_device_group(struct device *dev); | |
6eab556a JR |
330 | /* Generic device grouping function */ |
331 | extern struct iommu_group *generic_device_group(struct device *dev); | |
5e62292b | 332 | |
4a77a6cf JR |
333 | #else /* CONFIG_IOMMU_API */ |
334 | ||
39d4ebb9 | 335 | struct iommu_ops {}; |
d72e31c9 | 336 | struct iommu_group {}; |
4a77a6cf | 337 | |
a1b60c1c | 338 | static inline bool iommu_present(struct bus_type *bus) |
4a77a6cf JR |
339 | { |
340 | return false; | |
341 | } | |
342 | ||
3c0e0ca0 JR |
343 | static inline bool iommu_capable(struct bus_type *bus, enum iommu_cap cap) |
344 | { | |
345 | return false; | |
346 | } | |
347 | ||
905d66c1 | 348 | static inline struct iommu_domain *iommu_domain_alloc(struct bus_type *bus) |
4a77a6cf JR |
349 | { |
350 | return NULL; | |
351 | } | |
352 | ||
b62dfd29 AK |
353 | static inline struct iommu_group *iommu_group_get_by_id(int id) |
354 | { | |
355 | return NULL; | |
356 | } | |
357 | ||
4a77a6cf JR |
358 | static inline void iommu_domain_free(struct iommu_domain *domain) |
359 | { | |
360 | } | |
361 | ||
362 | static inline int iommu_attach_device(struct iommu_domain *domain, | |
363 | struct device *dev) | |
364 | { | |
365 | return -ENODEV; | |
366 | } | |
367 | ||
368 | static inline void iommu_detach_device(struct iommu_domain *domain, | |
369 | struct device *dev) | |
370 | { | |
371 | } | |
372 | ||
2c1296d9 JR |
373 | static inline struct iommu_domain *iommu_get_domain_for_dev(struct device *dev) |
374 | { | |
375 | return NULL; | |
376 | } | |
377 | ||
cefc53c7 JR |
378 | static inline int iommu_map(struct iommu_domain *domain, unsigned long iova, |
379 | phys_addr_t paddr, int gfp_order, int prot) | |
380 | { | |
381 | return -ENODEV; | |
382 | } | |
383 | ||
384 | static inline int iommu_unmap(struct iommu_domain *domain, unsigned long iova, | |
385 | int gfp_order) | |
386 | { | |
387 | return -ENODEV; | |
388 | } | |
389 | ||
315786eb OH |
390 | static inline size_t iommu_map_sg(struct iommu_domain *domain, |
391 | unsigned long iova, struct scatterlist *sg, | |
392 | unsigned int nents, int prot) | |
393 | { | |
394 | return -ENODEV; | |
395 | } | |
396 | ||
d7787d57 JR |
397 | static inline int iommu_domain_window_enable(struct iommu_domain *domain, |
398 | u32 wnd_nr, phys_addr_t paddr, | |
80f97f0f | 399 | u64 size, int prot) |
d7787d57 JR |
400 | { |
401 | return -ENODEV; | |
402 | } | |
403 | ||
404 | static inline void iommu_domain_window_disable(struct iommu_domain *domain, | |
405 | u32 wnd_nr) | |
406 | { | |
407 | } | |
408 | ||
bb5547ac | 409 | static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova) |
4a77a6cf JR |
410 | { |
411 | return 0; | |
412 | } | |
413 | ||
4f3f8d9d | 414 | static inline void iommu_set_fault_handler(struct iommu_domain *domain, |
77ca2332 | 415 | iommu_fault_handler_t handler, void *token) |
4f3f8d9d OBC |
416 | { |
417 | } | |
418 | ||
a1015c2b JR |
419 | static inline void iommu_get_dm_regions(struct device *dev, |
420 | struct list_head *list) | |
421 | { | |
422 | } | |
423 | ||
424 | static inline void iommu_put_dm_regions(struct device *dev, | |
425 | struct list_head *list) | |
426 | { | |
427 | } | |
428 | ||
d290f1e7 JR |
429 | static inline int iommu_request_dm_for_dev(struct device *dev) |
430 | { | |
431 | return -ENODEV; | |
432 | } | |
433 | ||
bef83de5 AW |
434 | static inline int iommu_attach_group(struct iommu_domain *domain, |
435 | struct iommu_group *group) | |
d72e31c9 AW |
436 | { |
437 | return -ENODEV; | |
438 | } | |
439 | ||
bef83de5 AW |
440 | static inline void iommu_detach_group(struct iommu_domain *domain, |
441 | struct iommu_group *group) | |
d72e31c9 AW |
442 | { |
443 | } | |
444 | ||
bef83de5 | 445 | static inline struct iommu_group *iommu_group_alloc(void) |
d72e31c9 AW |
446 | { |
447 | return ERR_PTR(-ENODEV); | |
448 | } | |
449 | ||
bef83de5 | 450 | static inline void *iommu_group_get_iommudata(struct iommu_group *group) |
d72e31c9 AW |
451 | { |
452 | return NULL; | |
453 | } | |
454 | ||
bef83de5 AW |
455 | static inline void iommu_group_set_iommudata(struct iommu_group *group, |
456 | void *iommu_data, | |
457 | void (*release)(void *iommu_data)) | |
d72e31c9 AW |
458 | { |
459 | } | |
460 | ||
bef83de5 AW |
461 | static inline int iommu_group_set_name(struct iommu_group *group, |
462 | const char *name) | |
d72e31c9 AW |
463 | { |
464 | return -ENODEV; | |
465 | } | |
466 | ||
bef83de5 AW |
467 | static inline int iommu_group_add_device(struct iommu_group *group, |
468 | struct device *dev) | |
d72e31c9 AW |
469 | { |
470 | return -ENODEV; | |
471 | } | |
472 | ||
bef83de5 | 473 | static inline void iommu_group_remove_device(struct device *dev) |
d72e31c9 AW |
474 | { |
475 | } | |
476 | ||
bef83de5 AW |
477 | static inline int iommu_group_for_each_dev(struct iommu_group *group, |
478 | void *data, | |
479 | int (*fn)(struct device *, void *)) | |
d72e31c9 AW |
480 | { |
481 | return -ENODEV; | |
482 | } | |
483 | ||
bef83de5 | 484 | static inline struct iommu_group *iommu_group_get(struct device *dev) |
d72e31c9 AW |
485 | { |
486 | return NULL; | |
487 | } | |
488 | ||
bef83de5 | 489 | static inline void iommu_group_put(struct iommu_group *group) |
d72e31c9 AW |
490 | { |
491 | } | |
492 | ||
bef83de5 AW |
493 | static inline int iommu_group_register_notifier(struct iommu_group *group, |
494 | struct notifier_block *nb) | |
1460432c AW |
495 | { |
496 | return -ENODEV; | |
497 | } | |
498 | ||
bef83de5 AW |
499 | static inline int iommu_group_unregister_notifier(struct iommu_group *group, |
500 | struct notifier_block *nb) | |
d72e31c9 AW |
501 | { |
502 | return 0; | |
503 | } | |
504 | ||
bef83de5 | 505 | static inline int iommu_group_id(struct iommu_group *group) |
d72e31c9 AW |
506 | { |
507 | return -ENODEV; | |
508 | } | |
1460432c | 509 | |
0cd76dd1 JR |
510 | static inline int iommu_domain_get_attr(struct iommu_domain *domain, |
511 | enum iommu_attr attr, void *data) | |
512 | { | |
513 | return -EINVAL; | |
514 | } | |
515 | ||
516 | static inline int iommu_domain_set_attr(struct iommu_domain *domain, | |
517 | enum iommu_attr attr, void *data) | |
518 | { | |
519 | return -EINVAL; | |
520 | } | |
521 | ||
e09f8ea5 AW |
522 | static inline struct device *iommu_device_create(struct device *parent, |
523 | void *drvdata, | |
524 | const struct attribute_group **groups, | |
525 | const char *fmt, ...) | |
c61959ec AW |
526 | { |
527 | return ERR_PTR(-ENODEV); | |
528 | } | |
529 | ||
e09f8ea5 | 530 | static inline void iommu_device_destroy(struct device *dev) |
c61959ec AW |
531 | { |
532 | } | |
533 | ||
e09f8ea5 | 534 | static inline int iommu_device_link(struct device *dev, struct device *link) |
c61959ec AW |
535 | { |
536 | return -EINVAL; | |
537 | } | |
538 | ||
e09f8ea5 | 539 | static inline void iommu_device_unlink(struct device *dev, struct device *link) |
c61959ec AW |
540 | { |
541 | } | |
542 | ||
4a77a6cf JR |
543 | #endif /* CONFIG_IOMMU_API */ |
544 | ||
545 | #endif /* __LINUX_IOMMU_H */ |