Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
[linux-2.6-block.git] / include / linux / iommu.h
CommitLineData
45051539 1/* SPDX-License-Identifier: GPL-2.0-only */
4a77a6cf
JR
2/*
3 * Copyright (C) 2007-2008 Advanced Micro Devices, Inc.
4 * Author: Joerg Roedel <joerg.roedel@amd.com>
4a77a6cf
JR
5 */
6
7#ifndef __LINUX_IOMMU_H
8#define __LINUX_IOMMU_H
9
e8245c1b
JR
10#include <linux/scatterlist.h>
11#include <linux/device.h>
12#include <linux/types.h>
74315ccc 13#include <linux/errno.h>
9a08d376 14#include <linux/err.h>
d0f60a44 15#include <linux/of.h>
4e32348b 16#include <uapi/linux/iommu.h>
74315ccc 17
ca13bb3d
WD
18#define IOMMU_READ (1 << 0)
19#define IOMMU_WRITE (1 << 1)
20#define IOMMU_CACHE (1 << 2) /* DMA cache coherency */
a720b41c 21#define IOMMU_NOEXEC (1 << 3)
31e6850e 22#define IOMMU_MMIO (1 << 4) /* e.g. things like MSI doorbells */
579b2a65 23/*
adf5e516
RM
24 * Where the bus hardware includes a privilege level as part of its access type
25 * markings, and certain devices are capable of issuing transactions marked as
26 * either 'supervisor' or 'user', the IOMMU_PRIV flag requests that the other
27 * given permission flags only apply to accesses at the higher privilege level,
28 * and that unprivileged transactions should have as little access as possible.
29 * This would usually imply the same permissions as kernel mappings on the CPU,
30 * if the IOMMU page table format is equivalent.
579b2a65
MH
31 */
32#define IOMMU_PRIV (1 << 5)
90ec7a76
VG
33/*
34 * Non-coherent masters on few Qualcomm SoCs can use this page protection flag
35 * to set correct cacheability attributes to use an outer level of cache -
36 * last level cache, aka system cache.
37 */
38#define IOMMU_QCOM_SYS_CACHE (1 << 6)
4a77a6cf 39
905d66c1 40struct iommu_ops;
d72e31c9 41struct iommu_group;
ff21776d 42struct bus_type;
4a77a6cf 43struct device;
4f3f8d9d 44struct iommu_domain;
ba1eabfa 45struct notifier_block;
26b25a2b 46struct iommu_sva;
4e32348b 47struct iommu_fault_event;
4f3f8d9d
OBC
48
49/* iommu fault flags */
50#define IOMMU_FAULT_READ 0x0
51#define IOMMU_FAULT_WRITE 0x1
52
53typedef int (*iommu_fault_handler_t)(struct iommu_domain *,
77ca2332 54 struct device *, unsigned long, int, void *);
26b25a2b
JPB
55typedef int (*iommu_mm_exit_handler_t)(struct device *dev, struct iommu_sva *,
56 void *);
4e32348b 57typedef int (*iommu_dev_fault_handler_t)(struct iommu_fault *, void *);
4a77a6cf 58
0ff64f80
JR
59struct iommu_domain_geometry {
60 dma_addr_t aperture_start; /* First address that can be mapped */
61 dma_addr_t aperture_end; /* Last address that can be mapped */
62 bool force_aperture; /* DMA only allowed in mappable range? */
63};
64
8539c7c1
JR
65/* Domain feature flags */
66#define __IOMMU_DOMAIN_PAGING (1U << 0) /* Support for iommu_map/unmap */
67#define __IOMMU_DOMAIN_DMA_API (1U << 1) /* Domain for use in DMA-API
68 implementation */
69#define __IOMMU_DOMAIN_PT (1U << 2) /* Domain is identity mapped */
70
71/*
72 * This are the possible domain-types
73 *
74 * IOMMU_DOMAIN_BLOCKED - All DMA is blocked, can be used to isolate
75 * devices
76 * IOMMU_DOMAIN_IDENTITY - DMA addresses are system physical addresses
77 * IOMMU_DOMAIN_UNMANAGED - DMA mappings managed by IOMMU-API user, used
78 * for VMs
79 * IOMMU_DOMAIN_DMA - Internally used for DMA-API implementations.
80 * This flag allows IOMMU drivers to implement
81 * certain optimizations for these domains
82 */
83#define IOMMU_DOMAIN_BLOCKED (0U)
84#define IOMMU_DOMAIN_IDENTITY (__IOMMU_DOMAIN_PT)
85#define IOMMU_DOMAIN_UNMANAGED (__IOMMU_DOMAIN_PAGING)
86#define IOMMU_DOMAIN_DMA (__IOMMU_DOMAIN_PAGING | \
87 __IOMMU_DOMAIN_DMA_API)
88
4a77a6cf 89struct iommu_domain {
8539c7c1 90 unsigned type;
b22f6434 91 const struct iommu_ops *ops;
d16e0faa 92 unsigned long pgsize_bitmap; /* Bitmap of page sizes in use */
4f3f8d9d 93 iommu_fault_handler_t handler;
77ca2332 94 void *handler_token;
0ff64f80 95 struct iommu_domain_geometry geometry;
0db2e5d1 96 void *iova_cookie;
4a77a6cf
JR
97};
98
1aed0748
JR
99enum iommu_cap {
100 IOMMU_CAP_CACHE_COHERENCY, /* IOMMU can enforce cache coherent DMA
101 transactions */
102 IOMMU_CAP_INTR_REMAP, /* IOMMU supports interrupt isolation */
c4986649 103 IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */
1aed0748 104};
dbb9fd86 105
7cabf491
VS
106/*
107 * Following constraints are specifc to FSL_PAMUV1:
108 * -aperture must be power of 2, and naturally aligned
109 * -number of windows must be power of 2, and address space size
110 * of each window is determined by aperture size / # of windows
111 * -the actual size of the mapped region of a window must be power
112 * of 2 starting with 4KB and physical address must be naturally
113 * aligned.
114 * DOMAIN_ATTR_FSL_PAMUV1 corresponds to the above mentioned contraints.
115 * The caller can invoke iommu_domain_get_attr to check if the underlying
116 * iommu implementation supports these constraints.
117 */
118
0cd76dd1 119enum iommu_attr {
0ff64f80 120 DOMAIN_ATTR_GEOMETRY,
d2e12160 121 DOMAIN_ATTR_PAGING,
69356712 122 DOMAIN_ATTR_WINDOWS,
7cabf491
VS
123 DOMAIN_ATTR_FSL_PAMU_STASH,
124 DOMAIN_ATTR_FSL_PAMU_ENABLE,
125 DOMAIN_ATTR_FSL_PAMUV1,
c02607aa 126 DOMAIN_ATTR_NESTING, /* two stages of translation */
2da274cd 127 DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE,
a8b8a88a 128 DOMAIN_ATTR_MAX,
0cd76dd1
JR
129};
130
d30ddcaa 131/* These are the possible reserved region types */
9d3a4de4
RM
132enum iommu_resv_type {
133 /* Memory regions which must be mapped 1:1 at all times */
134 IOMMU_RESV_DIRECT,
adfd3738
EA
135 /*
136 * Memory regions which are advertised to be 1:1 but are
137 * commonly considered relaxable in some conditions,
138 * for instance in device assignment use case (USB, Graphics)
139 */
140 IOMMU_RESV_DIRECT_RELAXABLE,
9d3a4de4
RM
141 /* Arbitrary "never map this or give it to a device" address ranges */
142 IOMMU_RESV_RESERVED,
143 /* Hardware MSI region (untranslated) */
144 IOMMU_RESV_MSI,
145 /* Software-managed MSI translation window */
146 IOMMU_RESV_SW_MSI,
147};
d30ddcaa 148
a1015c2b 149/**
e5b5234a 150 * struct iommu_resv_region - descriptor for a reserved memory region
a1015c2b
JR
151 * @list: Linked list pointers
152 * @start: System physical start address of the region
153 * @length: Length of the region in bytes
154 * @prot: IOMMU Protection flags (READ/WRITE/...)
d30ddcaa 155 * @type: Type of the reserved region
a1015c2b 156 */
e5b5234a 157struct iommu_resv_region {
a1015c2b
JR
158 struct list_head list;
159 phys_addr_t start;
160 size_t length;
161 int prot;
9d3a4de4 162 enum iommu_resv_type type;
a1015c2b
JR
163};
164
a3a19592
LB
165/* Per device IOMMU features */
166enum iommu_dev_features {
167 IOMMU_DEV_FEAT_AUX, /* Aux-domain feature */
26b25a2b
JPB
168 IOMMU_DEV_FEAT_SVA, /* Shared Virtual Addresses */
169};
170
171#define IOMMU_PASID_INVALID (-1U)
172
173/**
174 * struct iommu_sva_ops - device driver callbacks for an SVA context
175 *
176 * @mm_exit: called when the mm is about to be torn down by exit_mmap. After
177 * @mm_exit returns, the device must not issue any more transaction
178 * with the PASID given as argument.
179 *
180 * The @mm_exit handler is allowed to sleep. Be careful about the
181 * locks taken in @mm_exit, because they might lead to deadlocks if
182 * they are also held when dropping references to the mm. Consider the
183 * following call chain:
184 * mutex_lock(A); mmput(mm) -> exit_mm() -> @mm_exit() -> mutex_lock(A)
185 * Using mmput_async() prevents this scenario.
186 *
187 */
188struct iommu_sva_ops {
189 iommu_mm_exit_handler_t mm_exit;
a3a19592
LB
190};
191
39d4ebb9
JR
192#ifdef CONFIG_IOMMU_API
193
7d3002cc
OBC
194/**
195 * struct iommu_ops - iommu ops and capabilities
0d9bacb6
MD
196 * @capable: check capability
197 * @domain_alloc: allocate iommu domain
198 * @domain_free: free iommu domain
7d3002cc
OBC
199 * @attach_dev: attach device to an iommu domain
200 * @detach_dev: detach device from an iommu domain
201 * @map: map a physically contiguous memory region to an iommu domain
202 * @unmap: unmap a physically contiguous memory region from an iommu domain
db04d4a3 203 * @flush_iotlb_all: Synchronously flush all hardware TLBs for this domain
51eb7809 204 * @iotlb_range_add: Add a given iova range to the flush queue for this domain
2405bc16 205 * @iotlb_sync_map: Sync mappings created recently using @map to the hardware
51eb7809 206 * @iotlb_sync: Flush all queued ranges from the hardware TLBs and empty flush
add02cfd 207 * queue
7d3002cc 208 * @iova_to_phys: translate iova to physical address
d72e31c9
AW
209 * @add_device: add device to iommu grouping
210 * @remove_device: remove device from iommu grouping
0d9bacb6 211 * @device_group: find iommu group for a particular device
0cd76dd1
JR
212 * @domain_get_attr: Query domain attributes
213 * @domain_set_attr: Change domain attributes
e5b5234a
EA
214 * @get_resv_regions: Request list of reserved regions for a device
215 * @put_resv_regions: Free list of reserved regions for a device
216 * @apply_resv_region: Temporary helper call-back for iova reserved ranges
0d9bacb6
MD
217 * @domain_window_enable: Configure and enable a particular window for a domain
218 * @domain_window_disable: Disable a particular window for a domain
d0f60a44 219 * @of_xlate: add OF master IDs to iommu grouping
a7055d57
GU
220 * @is_attach_deferred: Check if domain attach should be deferred from iommu
221 * driver init to device driver init (default no)
a3a19592
LB
222 * @dev_has/enable/disable_feat: per device entries to check/enable/disable
223 * iommu specific features.
224 * @dev_feat_enabled: check enabled feature
225 * @aux_attach/detach_dev: aux-domain specific attach/detach entries.
226 * @aux_get_pasid: get the pasid given an aux-domain
26b25a2b
JPB
227 * @sva_bind: Bind process address space to device
228 * @sva_unbind: Unbind process address space from device
229 * @sva_get_pasid: Get PASID associated to a SVA handle
bf3255b3 230 * @page_response: handle page request response
d16e0faa 231 * @pgsize_bitmap: bitmap of all possible supported page sizes
7d3002cc 232 */
4a77a6cf 233struct iommu_ops {
3c0e0ca0 234 bool (*capable)(enum iommu_cap);
938c4709
JR
235
236 /* Domain allocation and freeing by the iommu driver */
8539c7c1 237 struct iommu_domain *(*domain_alloc)(unsigned iommu_domain_type);
938c4709
JR
238 void (*domain_free)(struct iommu_domain *);
239
4a77a6cf
JR
240 int (*attach_dev)(struct iommu_domain *domain, struct device *dev);
241 void (*detach_dev)(struct iommu_domain *domain, struct device *dev);
67651786 242 int (*map)(struct iommu_domain *domain, unsigned long iova,
5009065d
OBC
243 phys_addr_t paddr, size_t size, int prot);
244 size_t (*unmap)(struct iommu_domain *domain, unsigned long iova,
245 size_t size);
add02cfd
JR
246 void (*flush_iotlb_all)(struct iommu_domain *domain);
247 void (*iotlb_range_add)(struct iommu_domain *domain,
248 unsigned long iova, size_t size);
1d7ae53b 249 void (*iotlb_sync_map)(struct iommu_domain *domain);
add02cfd 250 void (*iotlb_sync)(struct iommu_domain *domain);
bb5547ac 251 phys_addr_t (*iova_to_phys)(struct iommu_domain *domain, dma_addr_t iova);
d72e31c9
AW
252 int (*add_device)(struct device *dev);
253 void (*remove_device)(struct device *dev);
46c6b2bc 254 struct iommu_group *(*device_group)(struct device *dev);
0cd76dd1
JR
255 int (*domain_get_attr)(struct iommu_domain *domain,
256 enum iommu_attr attr, void *data);
257 int (*domain_set_attr)(struct iommu_domain *domain,
258 enum iommu_attr attr, void *data);
d7787d57 259
e5b5234a
EA
260 /* Request/Free a list of reserved regions for a device */
261 void (*get_resv_regions)(struct device *dev, struct list_head *list);
262 void (*put_resv_regions)(struct device *dev, struct list_head *list);
263 void (*apply_resv_region)(struct device *dev,
264 struct iommu_domain *domain,
265 struct iommu_resv_region *region);
a1015c2b 266
d7787d57
JR
267 /* Window handling functions */
268 int (*domain_window_enable)(struct iommu_domain *domain, u32 wnd_nr,
80f97f0f 269 phys_addr_t paddr, u64 size, int prot);
d7787d57
JR
270 void (*domain_window_disable)(struct iommu_domain *domain, u32 wnd_nr);
271
d0f60a44 272 int (*of_xlate)(struct device *dev, struct of_phandle_args *args);
e01d1913 273 bool (*is_attach_deferred)(struct iommu_domain *domain, struct device *dev);
d0f60a44 274
a3a19592
LB
275 /* Per device IOMMU features */
276 bool (*dev_has_feat)(struct device *dev, enum iommu_dev_features f);
277 bool (*dev_feat_enabled)(struct device *dev, enum iommu_dev_features f);
278 int (*dev_enable_feat)(struct device *dev, enum iommu_dev_features f);
279 int (*dev_disable_feat)(struct device *dev, enum iommu_dev_features f);
280
281 /* Aux-domain specific attach/detach entries */
282 int (*aux_attach_dev)(struct iommu_domain *domain, struct device *dev);
283 void (*aux_detach_dev)(struct iommu_domain *domain, struct device *dev);
284 int (*aux_get_pasid)(struct iommu_domain *domain, struct device *dev);
285
26b25a2b
JPB
286 struct iommu_sva *(*sva_bind)(struct device *dev, struct mm_struct *mm,
287 void *drvdata);
288 void (*sva_unbind)(struct iommu_sva *handle);
289 int (*sva_get_pasid)(struct iommu_sva *handle);
290
bf3255b3
JPB
291 int (*page_response)(struct device *dev,
292 struct iommu_fault_event *evt,
293 struct iommu_page_response *msg);
294
7d3002cc 295 unsigned long pgsize_bitmap;
4a77a6cf
JR
296};
297
b0119e87
JR
298/**
299 * struct iommu_device - IOMMU core representation of one IOMMU hardware
300 * instance
301 * @list: Used by the iommu-core to keep a list of registered iommus
302 * @ops: iommu-ops for talking to this iommu
39ab9555 303 * @dev: struct device for sysfs handling
b0119e87
JR
304 */
305struct iommu_device {
306 struct list_head list;
307 const struct iommu_ops *ops;
c73e1ac8 308 struct fwnode_handle *fwnode;
2926a2aa 309 struct device *dev;
b0119e87
JR
310};
311
4e32348b
JP
312/**
313 * struct iommu_fault_event - Generic fault event
314 *
315 * Can represent recoverable faults such as a page requests or
316 * unrecoverable faults such as DMA or IRQ remapping faults.
317 *
318 * @fault: fault descriptor
bf3255b3 319 * @list: pending fault event list, used for tracking responses
4e32348b
JP
320 */
321struct iommu_fault_event {
322 struct iommu_fault fault;
bf3255b3 323 struct list_head list;
4e32348b
JP
324};
325
326/**
327 * struct iommu_fault_param - per-device IOMMU fault data
328 * @handler: Callback function to handle IOMMU faults at device level
329 * @data: handler private data
bf3255b3
JPB
330 * @faults: holds the pending faults which needs response
331 * @lock: protect pending faults list
4e32348b
JP
332 */
333struct iommu_fault_param {
334 iommu_dev_fault_handler_t handler;
335 void *data;
bf3255b3
JPB
336 struct list_head faults;
337 struct mutex lock;
4e32348b
JP
338};
339
340/**
341 * struct iommu_param - collection of per-device IOMMU data
342 *
343 * @fault_param: IOMMU detected device fault reporting data
344 *
345 * TODO: migrate other per device data pointers under iommu_dev_data, e.g.
346 * struct iommu_group *iommu_group;
347 * struct iommu_fwspec *iommu_fwspec;
348 */
349struct iommu_param {
0c830e6b 350 struct mutex lock;
4e32348b
JP
351 struct iommu_fault_param *fault_param;
352};
353
b0119e87
JR
354int iommu_device_register(struct iommu_device *iommu);
355void iommu_device_unregister(struct iommu_device *iommu);
39ab9555
JR
356int iommu_device_sysfs_add(struct iommu_device *iommu,
357 struct device *parent,
358 const struct attribute_group **groups,
359 const char *fmt, ...) __printf(4, 5);
360void iommu_device_sysfs_remove(struct iommu_device *iommu);
e3d10af1
JR
361int iommu_device_link(struct iommu_device *iommu, struct device *link);
362void iommu_device_unlink(struct iommu_device *iommu, struct device *link);
b0119e87
JR
363
364static inline void iommu_device_set_ops(struct iommu_device *iommu,
365 const struct iommu_ops *ops)
366{
367 iommu->ops = ops;
368}
369
c73e1ac8
JR
370static inline void iommu_device_set_fwnode(struct iommu_device *iommu,
371 struct fwnode_handle *fwnode)
372{
373 iommu->fwnode = fwnode;
374}
375
2926a2aa
JR
376static inline struct iommu_device *dev_to_iommu_device(struct device *dev)
377{
378 return (struct iommu_device *)dev_get_drvdata(dev);
379}
380
d72e31c9
AW
381#define IOMMU_GROUP_NOTIFY_ADD_DEVICE 1 /* Device added */
382#define IOMMU_GROUP_NOTIFY_DEL_DEVICE 2 /* Pre Device removed */
383#define IOMMU_GROUP_NOTIFY_BIND_DRIVER 3 /* Pre Driver bind */
384#define IOMMU_GROUP_NOTIFY_BOUND_DRIVER 4 /* Post Driver bind */
385#define IOMMU_GROUP_NOTIFY_UNBIND_DRIVER 5 /* Pre Driver unbind */
386#define IOMMU_GROUP_NOTIFY_UNBOUND_DRIVER 6 /* Post Driver unbind */
387
b22f6434 388extern int bus_set_iommu(struct bus_type *bus, const struct iommu_ops *ops);
a1b60c1c 389extern bool iommu_present(struct bus_type *bus);
3c0e0ca0 390extern bool iommu_capable(struct bus_type *bus, enum iommu_cap cap);
905d66c1 391extern struct iommu_domain *iommu_domain_alloc(struct bus_type *bus);
aa16bea9 392extern struct iommu_group *iommu_group_get_by_id(int id);
4a77a6cf
JR
393extern void iommu_domain_free(struct iommu_domain *domain);
394extern int iommu_attach_device(struct iommu_domain *domain,
395 struct device *dev);
396extern void iommu_detach_device(struct iommu_domain *domain,
397 struct device *dev);
2c1296d9 398extern struct iommu_domain *iommu_get_domain_for_dev(struct device *dev);
6af588fe 399extern struct iommu_domain *iommu_get_dma_domain(struct device *dev);
cefc53c7 400extern int iommu_map(struct iommu_domain *domain, unsigned long iova,
7d3002cc
OBC
401 phys_addr_t paddr, size_t size, int prot);
402extern size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova,
add02cfd
JR
403 size_t size);
404extern size_t iommu_unmap_fast(struct iommu_domain *domain,
405 unsigned long iova, size_t size);
d88e61fa
CH
406extern size_t iommu_map_sg(struct iommu_domain *domain, unsigned long iova,
407 struct scatterlist *sg,unsigned int nents, int prot);
bb5547ac 408extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova);
4f3f8d9d 409extern void iommu_set_fault_handler(struct iommu_domain *domain,
77ca2332 410 iommu_fault_handler_t handler, void *token);
d72e31c9 411
e5b5234a
EA
412extern void iommu_get_resv_regions(struct device *dev, struct list_head *list);
413extern void iommu_put_resv_regions(struct device *dev, struct list_head *list);
d290f1e7 414extern int iommu_request_dm_for_dev(struct device *dev);
7423e017 415extern int iommu_request_dma_domain_for_dev(struct device *dev);
2b20cbba 416extern struct iommu_resv_region *
9d3a4de4
RM
417iommu_alloc_resv_region(phys_addr_t start, size_t length, int prot,
418 enum iommu_resv_type type);
6c65fb31
EA
419extern int iommu_get_group_resv_regions(struct iommu_group *group,
420 struct list_head *head);
a1015c2b 421
d72e31c9
AW
422extern int iommu_attach_group(struct iommu_domain *domain,
423 struct iommu_group *group);
424extern void iommu_detach_group(struct iommu_domain *domain,
425 struct iommu_group *group);
426extern struct iommu_group *iommu_group_alloc(void);
427extern void *iommu_group_get_iommudata(struct iommu_group *group);
428extern void iommu_group_set_iommudata(struct iommu_group *group,
429 void *iommu_data,
430 void (*release)(void *iommu_data));
431extern int iommu_group_set_name(struct iommu_group *group, const char *name);
432extern int iommu_group_add_device(struct iommu_group *group,
433 struct device *dev);
434extern void iommu_group_remove_device(struct device *dev);
435extern int iommu_group_for_each_dev(struct iommu_group *group, void *data,
436 int (*fn)(struct device *, void *));
437extern struct iommu_group *iommu_group_get(struct device *dev);
13f59a78 438extern struct iommu_group *iommu_group_ref_get(struct iommu_group *group);
d72e31c9
AW
439extern void iommu_group_put(struct iommu_group *group);
440extern int iommu_group_register_notifier(struct iommu_group *group,
441 struct notifier_block *nb);
442extern int iommu_group_unregister_notifier(struct iommu_group *group,
443 struct notifier_block *nb);
0c830e6b
JP
444extern int iommu_register_device_fault_handler(struct device *dev,
445 iommu_dev_fault_handler_t handler,
446 void *data);
447
448extern int iommu_unregister_device_fault_handler(struct device *dev);
449
450extern int iommu_report_device_fault(struct device *dev,
451 struct iommu_fault_event *evt);
bf3255b3
JPB
452extern int iommu_page_response(struct device *dev,
453 struct iommu_page_response *msg);
0c830e6b 454
d72e31c9 455extern int iommu_group_id(struct iommu_group *group);
104a1c13 456extern struct iommu_group *iommu_group_get_for_dev(struct device *dev);
6827ca83 457extern struct iommu_domain *iommu_group_default_domain(struct iommu_group *);
4f3f8d9d 458
0cd76dd1
JR
459extern int iommu_domain_get_attr(struct iommu_domain *domain, enum iommu_attr,
460 void *data);
461extern int iommu_domain_set_attr(struct iommu_domain *domain, enum iommu_attr,
462 void *data);
4f3f8d9d 463
d7787d57
JR
464/* Window handling function prototypes */
465extern int iommu_domain_window_enable(struct iommu_domain *domain, u32 wnd_nr,
80f97f0f
VS
466 phys_addr_t offset, u64 size,
467 int prot);
d7787d57 468extern void iommu_domain_window_disable(struct iommu_domain *domain, u32 wnd_nr);
207c6e36
JR
469
470extern int report_iommu_fault(struct iommu_domain *domain, struct device *dev,
471 unsigned long iova, int flags);
4a77a6cf 472
add02cfd
JR
473static inline void iommu_flush_tlb_all(struct iommu_domain *domain)
474{
475 if (domain->ops->flush_iotlb_all)
476 domain->ops->flush_iotlb_all(domain);
477}
478
479static inline void iommu_tlb_range_add(struct iommu_domain *domain,
480 unsigned long iova, size_t size)
481{
482 if (domain->ops->iotlb_range_add)
483 domain->ops->iotlb_range_add(domain, iova, size);
484}
485
486static inline void iommu_tlb_sync(struct iommu_domain *domain)
487{
488 if (domain->ops->iotlb_sync)
489 domain->ops->iotlb_sync(domain);
490}
491
5e62292b
JR
492/* PCI device grouping function */
493extern struct iommu_group *pci_device_group(struct device *dev);
6eab556a
JR
494/* Generic device grouping function */
495extern struct iommu_group *generic_device_group(struct device *dev);
eab03e2a
NG
496/* FSL-MC device grouping function */
497struct iommu_group *fsl_mc_device_group(struct device *dev);
5e62292b 498
57f98d2f
RM
499/**
500 * struct iommu_fwspec - per-device IOMMU instance data
501 * @ops: ops for this device's IOMMU
502 * @iommu_fwnode: firmware handle for this device's IOMMU
503 * @iommu_priv: IOMMU driver private data for this device
504 * @num_ids: number of associated device IDs
505 * @ids: IDs which this device may present to the IOMMU
506 */
507struct iommu_fwspec {
508 const struct iommu_ops *ops;
509 struct fwnode_handle *iommu_fwnode;
510 void *iommu_priv;
5702ee24 511 u32 flags;
57f98d2f
RM
512 unsigned int num_ids;
513 u32 ids[1];
514};
515
5702ee24
JPB
516/* ATS is supported */
517#define IOMMU_FWSPEC_PCI_RC_ATS (1 << 0)
518
26b25a2b
JPB
519/**
520 * struct iommu_sva - handle to a device-mm bond
521 */
522struct iommu_sva {
523 struct device *dev;
524 const struct iommu_sva_ops *ops;
525};
526
57f98d2f
RM
527int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode,
528 const struct iommu_ops *ops);
529void iommu_fwspec_free(struct device *dev);
530int iommu_fwspec_add_ids(struct device *dev, u32 *ids, int num_ids);
534766df 531const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode);
57f98d2f 532
b4ef725e
JR
533static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev)
534{
535 return dev->iommu_fwspec;
536}
537
538static inline void dev_iommu_fwspec_set(struct device *dev,
539 struct iommu_fwspec *fwspec)
540{
541 dev->iommu_fwspec = fwspec;
542}
543
cc5aed44
JR
544int iommu_probe_device(struct device *dev);
545void iommu_release_device(struct device *dev);
546
a3a19592
LB
547bool iommu_dev_has_feature(struct device *dev, enum iommu_dev_features f);
548int iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features f);
549int iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features f);
550bool iommu_dev_feature_enabled(struct device *dev, enum iommu_dev_features f);
551int iommu_aux_attach_device(struct iommu_domain *domain, struct device *dev);
552void iommu_aux_detach_device(struct iommu_domain *domain, struct device *dev);
553int iommu_aux_get_pasid(struct iommu_domain *domain, struct device *dev);
554
26b25a2b
JPB
555struct iommu_sva *iommu_sva_bind_device(struct device *dev,
556 struct mm_struct *mm,
557 void *drvdata);
558void iommu_sva_unbind_device(struct iommu_sva *handle);
559int iommu_sva_set_ops(struct iommu_sva *handle,
560 const struct iommu_sva_ops *ops);
561int iommu_sva_get_pasid(struct iommu_sva *handle);
562
4a77a6cf
JR
563#else /* CONFIG_IOMMU_API */
564
39d4ebb9 565struct iommu_ops {};
d72e31c9 566struct iommu_group {};
57f98d2f 567struct iommu_fwspec {};
b0119e87 568struct iommu_device {};
4e32348b 569struct iommu_fault_param {};
4a77a6cf 570
a1b60c1c 571static inline bool iommu_present(struct bus_type *bus)
4a77a6cf
JR
572{
573 return false;
574}
575
3c0e0ca0
JR
576static inline bool iommu_capable(struct bus_type *bus, enum iommu_cap cap)
577{
578 return false;
579}
580
905d66c1 581static inline struct iommu_domain *iommu_domain_alloc(struct bus_type *bus)
4a77a6cf
JR
582{
583 return NULL;
584}
585
b62dfd29
AK
586static inline struct iommu_group *iommu_group_get_by_id(int id)
587{
588 return NULL;
589}
590
4a77a6cf
JR
591static inline void iommu_domain_free(struct iommu_domain *domain)
592{
593}
594
595static inline int iommu_attach_device(struct iommu_domain *domain,
596 struct device *dev)
597{
598 return -ENODEV;
599}
600
601static inline void iommu_detach_device(struct iommu_domain *domain,
602 struct device *dev)
603{
604}
605
2c1296d9
JR
606static inline struct iommu_domain *iommu_get_domain_for_dev(struct device *dev)
607{
608 return NULL;
609}
610
cefc53c7 611static inline int iommu_map(struct iommu_domain *domain, unsigned long iova,
ebae3e83 612 phys_addr_t paddr, size_t size, int prot)
cefc53c7
JR
613{
614 return -ENODEV;
615}
616
c5611a87
SS
617static inline size_t iommu_unmap(struct iommu_domain *domain,
618 unsigned long iova, size_t size)
cefc53c7 619{
c5611a87 620 return 0;
cefc53c7
JR
621}
622
c5611a87
SS
623static inline size_t iommu_unmap_fast(struct iommu_domain *domain,
624 unsigned long iova, int gfp_order)
cefc53c7 625{
c5611a87 626 return 0;
cefc53c7
JR
627}
628
315786eb
OH
629static inline size_t iommu_map_sg(struct iommu_domain *domain,
630 unsigned long iova, struct scatterlist *sg,
631 unsigned int nents, int prot)
632{
c5611a87 633 return 0;
315786eb
OH
634}
635
add02cfd
JR
636static inline void iommu_flush_tlb_all(struct iommu_domain *domain)
637{
638}
639
640static inline void iommu_tlb_range_add(struct iommu_domain *domain,
641 unsigned long iova, size_t size)
642{
643}
644
645static inline void iommu_tlb_sync(struct iommu_domain *domain)
646{
647}
648
d7787d57
JR
649static inline int iommu_domain_window_enable(struct iommu_domain *domain,
650 u32 wnd_nr, phys_addr_t paddr,
80f97f0f 651 u64 size, int prot)
d7787d57
JR
652{
653 return -ENODEV;
654}
655
656static inline void iommu_domain_window_disable(struct iommu_domain *domain,
657 u32 wnd_nr)
658{
659}
660
bb5547ac 661static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova)
4a77a6cf
JR
662{
663 return 0;
664}
665
4f3f8d9d 666static inline void iommu_set_fault_handler(struct iommu_domain *domain,
77ca2332 667 iommu_fault_handler_t handler, void *token)
4f3f8d9d
OBC
668{
669}
670
e5b5234a 671static inline void iommu_get_resv_regions(struct device *dev,
a1015c2b
JR
672 struct list_head *list)
673{
674}
675
e5b5234a 676static inline void iommu_put_resv_regions(struct device *dev,
a1015c2b
JR
677 struct list_head *list)
678{
679}
680
6c65fb31
EA
681static inline int iommu_get_group_resv_regions(struct iommu_group *group,
682 struct list_head *head)
683{
684 return -ENODEV;
685}
686
d290f1e7
JR
687static inline int iommu_request_dm_for_dev(struct device *dev)
688{
689 return -ENODEV;
690}
691
7423e017
LB
692static inline int iommu_request_dma_domain_for_dev(struct device *dev)
693{
694 return -ENODEV;
695}
696
bef83de5
AW
697static inline int iommu_attach_group(struct iommu_domain *domain,
698 struct iommu_group *group)
d72e31c9
AW
699{
700 return -ENODEV;
701}
702
bef83de5
AW
703static inline void iommu_detach_group(struct iommu_domain *domain,
704 struct iommu_group *group)
d72e31c9
AW
705{
706}
707
bef83de5 708static inline struct iommu_group *iommu_group_alloc(void)
d72e31c9
AW
709{
710 return ERR_PTR(-ENODEV);
711}
712
bef83de5 713static inline void *iommu_group_get_iommudata(struct iommu_group *group)
d72e31c9
AW
714{
715 return NULL;
716}
717
bef83de5
AW
718static inline void iommu_group_set_iommudata(struct iommu_group *group,
719 void *iommu_data,
720 void (*release)(void *iommu_data))
d72e31c9
AW
721{
722}
723
bef83de5
AW
724static inline int iommu_group_set_name(struct iommu_group *group,
725 const char *name)
d72e31c9
AW
726{
727 return -ENODEV;
728}
729
bef83de5
AW
730static inline int iommu_group_add_device(struct iommu_group *group,
731 struct device *dev)
d72e31c9
AW
732{
733 return -ENODEV;
734}
735
bef83de5 736static inline void iommu_group_remove_device(struct device *dev)
d72e31c9
AW
737{
738}
739
bef83de5
AW
740static inline int iommu_group_for_each_dev(struct iommu_group *group,
741 void *data,
742 int (*fn)(struct device *, void *))
d72e31c9
AW
743{
744 return -ENODEV;
745}
746
bef83de5 747static inline struct iommu_group *iommu_group_get(struct device *dev)
d72e31c9
AW
748{
749 return NULL;
750}
751
bef83de5 752static inline void iommu_group_put(struct iommu_group *group)
d72e31c9
AW
753{
754}
755
bef83de5
AW
756static inline int iommu_group_register_notifier(struct iommu_group *group,
757 struct notifier_block *nb)
1460432c
AW
758{
759 return -ENODEV;
760}
761
bef83de5
AW
762static inline int iommu_group_unregister_notifier(struct iommu_group *group,
763 struct notifier_block *nb)
d72e31c9
AW
764{
765 return 0;
766}
767
0c830e6b
JP
768static inline
769int iommu_register_device_fault_handler(struct device *dev,
770 iommu_dev_fault_handler_t handler,
771 void *data)
772{
773 return -ENODEV;
774}
775
776static inline int iommu_unregister_device_fault_handler(struct device *dev)
777{
778 return 0;
779}
780
781static inline
782int iommu_report_device_fault(struct device *dev, struct iommu_fault_event *evt)
783{
784 return -ENODEV;
785}
786
bf3255b3
JPB
787static inline int iommu_page_response(struct device *dev,
788 struct iommu_page_response *msg)
789{
790 return -ENODEV;
791}
792
bef83de5 793static inline int iommu_group_id(struct iommu_group *group)
d72e31c9
AW
794{
795 return -ENODEV;
796}
1460432c 797
0cd76dd1
JR
798static inline int iommu_domain_get_attr(struct iommu_domain *domain,
799 enum iommu_attr attr, void *data)
800{
801 return -EINVAL;
802}
803
804static inline int iommu_domain_set_attr(struct iommu_domain *domain,
805 enum iommu_attr attr, void *data)
806{
807 return -EINVAL;
808}
809
39ab9555 810static inline int iommu_device_register(struct iommu_device *iommu)
c61959ec 811{
39ab9555 812 return -ENODEV;
c61959ec
AW
813}
814
39ab9555
JR
815static inline void iommu_device_set_ops(struct iommu_device *iommu,
816 const struct iommu_ops *ops)
c61959ec 817{
c61959ec
AW
818}
819
c73e1ac8
JR
820static inline void iommu_device_set_fwnode(struct iommu_device *iommu,
821 struct fwnode_handle *fwnode)
c61959ec 822{
c61959ec
AW
823}
824
2926a2aa
JR
825static inline struct iommu_device *dev_to_iommu_device(struct device *dev)
826{
827 return NULL;
828}
829
39ab9555 830static inline void iommu_device_unregister(struct iommu_device *iommu)
c61959ec 831{
c61959ec
AW
832}
833
39ab9555
JR
834static inline int iommu_device_sysfs_add(struct iommu_device *iommu,
835 struct device *parent,
836 const struct attribute_group **groups,
837 const char *fmt, ...)
b0119e87 838{
39ab9555 839 return -ENODEV;
b0119e87
JR
840}
841
39ab9555 842static inline void iommu_device_sysfs_remove(struct iommu_device *iommu)
c61959ec
AW
843{
844}
845
e09f8ea5 846static inline int iommu_device_link(struct device *dev, struct device *link)
c61959ec
AW
847{
848 return -EINVAL;
849}
850
e09f8ea5 851static inline void iommu_device_unlink(struct device *dev, struct device *link)
c61959ec
AW
852{
853}
854
57f98d2f
RM
855static inline int iommu_fwspec_init(struct device *dev,
856 struct fwnode_handle *iommu_fwnode,
857 const struct iommu_ops *ops)
858{
859 return -ENODEV;
860}
861
862static inline void iommu_fwspec_free(struct device *dev)
863{
864}
865
866static inline int iommu_fwspec_add_ids(struct device *dev, u32 *ids,
867 int num_ids)
868{
869 return -ENODEV;
870}
871
e4f10ffe 872static inline
534766df 873const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode)
e4f10ffe
LP
874{
875 return NULL;
876}
877
a3a19592
LB
878static inline bool
879iommu_dev_has_feature(struct device *dev, enum iommu_dev_features feat)
880{
881 return false;
882}
883
884static inline bool
885iommu_dev_feature_enabled(struct device *dev, enum iommu_dev_features feat)
886{
887 return false;
888}
889
890static inline int
891iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features feat)
892{
893 return -ENODEV;
894}
895
896static inline int
897iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features feat)
898{
899 return -ENODEV;
900}
901
902static inline int
903iommu_aux_attach_device(struct iommu_domain *domain, struct device *dev)
904{
905 return -ENODEV;
906}
907
908static inline void
909iommu_aux_detach_device(struct iommu_domain *domain, struct device *dev)
910{
911}
912
913static inline int
914iommu_aux_get_pasid(struct iommu_domain *domain, struct device *dev)
915{
916 return -ENODEV;
917}
918
26b25a2b
JPB
919static inline struct iommu_sva *
920iommu_sva_bind_device(struct device *dev, struct mm_struct *mm, void *drvdata)
921{
922 return NULL;
923}
924
925static inline void iommu_sva_unbind_device(struct iommu_sva *handle)
926{
927}
928
929static inline int iommu_sva_set_ops(struct iommu_sva *handle,
930 const struct iommu_sva_ops *ops)
931{
932 return -EINVAL;
933}
934
935static inline int iommu_sva_get_pasid(struct iommu_sva *handle)
936{
937 return IOMMU_PASID_INVALID;
938}
939
4a77a6cf
JR
940#endif /* CONFIG_IOMMU_API */
941
bad614b2
GH
942#ifdef CONFIG_IOMMU_DEBUGFS
943extern struct dentry *iommu_debugfs_dir;
944void iommu_debugfs_setup(void);
945#else
946static inline void iommu_debugfs_setup(void) {}
947#endif
948
4a77a6cf 949#endif /* __LINUX_IOMMU_H */