Commit | Line | Data |
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4a77a6cf JR |
1 | /* |
2 | * Copyright (C) 2007-2008 Advanced Micro Devices, Inc. | |
3 | * Author: Joerg Roedel <joerg.roedel@amd.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of the GNU General Public License version 2 as published | |
7 | * by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
17 | */ | |
18 | ||
19 | #ifndef __LINUX_IOMMU_H | |
20 | #define __LINUX_IOMMU_H | |
21 | ||
74315ccc | 22 | #include <linux/errno.h> |
9a08d376 | 23 | #include <linux/err.h> |
d0f60a44 | 24 | #include <linux/of.h> |
76582d0a | 25 | #include <linux/types.h> |
315786eb | 26 | #include <linux/scatterlist.h> |
56fa4849 | 27 | #include <trace/events/iommu.h> |
74315ccc | 28 | |
ca13bb3d WD |
29 | #define IOMMU_READ (1 << 0) |
30 | #define IOMMU_WRITE (1 << 1) | |
31 | #define IOMMU_CACHE (1 << 2) /* DMA cache coherency */ | |
a720b41c | 32 | #define IOMMU_NOEXEC (1 << 3) |
31e6850e | 33 | #define IOMMU_MMIO (1 << 4) /* e.g. things like MSI doorbells */ |
4a77a6cf | 34 | |
905d66c1 | 35 | struct iommu_ops; |
d72e31c9 | 36 | struct iommu_group; |
ff21776d | 37 | struct bus_type; |
4a77a6cf | 38 | struct device; |
4f3f8d9d | 39 | struct iommu_domain; |
ba1eabfa | 40 | struct notifier_block; |
4f3f8d9d OBC |
41 | |
42 | /* iommu fault flags */ | |
43 | #define IOMMU_FAULT_READ 0x0 | |
44 | #define IOMMU_FAULT_WRITE 0x1 | |
45 | ||
46 | typedef int (*iommu_fault_handler_t)(struct iommu_domain *, | |
77ca2332 | 47 | struct device *, unsigned long, int, void *); |
4a77a6cf | 48 | |
0ff64f80 JR |
49 | struct iommu_domain_geometry { |
50 | dma_addr_t aperture_start; /* First address that can be mapped */ | |
51 | dma_addr_t aperture_end; /* Last address that can be mapped */ | |
52 | bool force_aperture; /* DMA only allowed in mappable range? */ | |
53 | }; | |
54 | ||
8539c7c1 JR |
55 | /* Domain feature flags */ |
56 | #define __IOMMU_DOMAIN_PAGING (1U << 0) /* Support for iommu_map/unmap */ | |
57 | #define __IOMMU_DOMAIN_DMA_API (1U << 1) /* Domain for use in DMA-API | |
58 | implementation */ | |
59 | #define __IOMMU_DOMAIN_PT (1U << 2) /* Domain is identity mapped */ | |
60 | ||
61 | /* | |
62 | * This are the possible domain-types | |
63 | * | |
64 | * IOMMU_DOMAIN_BLOCKED - All DMA is blocked, can be used to isolate | |
65 | * devices | |
66 | * IOMMU_DOMAIN_IDENTITY - DMA addresses are system physical addresses | |
67 | * IOMMU_DOMAIN_UNMANAGED - DMA mappings managed by IOMMU-API user, used | |
68 | * for VMs | |
69 | * IOMMU_DOMAIN_DMA - Internally used for DMA-API implementations. | |
70 | * This flag allows IOMMU drivers to implement | |
71 | * certain optimizations for these domains | |
72 | */ | |
73 | #define IOMMU_DOMAIN_BLOCKED (0U) | |
74 | #define IOMMU_DOMAIN_IDENTITY (__IOMMU_DOMAIN_PT) | |
75 | #define IOMMU_DOMAIN_UNMANAGED (__IOMMU_DOMAIN_PAGING) | |
76 | #define IOMMU_DOMAIN_DMA (__IOMMU_DOMAIN_PAGING | \ | |
77 | __IOMMU_DOMAIN_DMA_API) | |
78 | ||
4a77a6cf | 79 | struct iommu_domain { |
8539c7c1 | 80 | unsigned type; |
b22f6434 | 81 | const struct iommu_ops *ops; |
d16e0faa | 82 | unsigned long pgsize_bitmap; /* Bitmap of page sizes in use */ |
4f3f8d9d | 83 | iommu_fault_handler_t handler; |
77ca2332 | 84 | void *handler_token; |
0ff64f80 | 85 | struct iommu_domain_geometry geometry; |
0db2e5d1 | 86 | void *iova_cookie; |
4a77a6cf JR |
87 | }; |
88 | ||
1aed0748 JR |
89 | enum iommu_cap { |
90 | IOMMU_CAP_CACHE_COHERENCY, /* IOMMU can enforce cache coherent DMA | |
91 | transactions */ | |
92 | IOMMU_CAP_INTR_REMAP, /* IOMMU supports interrupt isolation */ | |
c4986649 | 93 | IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */ |
1aed0748 | 94 | }; |
dbb9fd86 | 95 | |
7cabf491 VS |
96 | /* |
97 | * Following constraints are specifc to FSL_PAMUV1: | |
98 | * -aperture must be power of 2, and naturally aligned | |
99 | * -number of windows must be power of 2, and address space size | |
100 | * of each window is determined by aperture size / # of windows | |
101 | * -the actual size of the mapped region of a window must be power | |
102 | * of 2 starting with 4KB and physical address must be naturally | |
103 | * aligned. | |
104 | * DOMAIN_ATTR_FSL_PAMUV1 corresponds to the above mentioned contraints. | |
105 | * The caller can invoke iommu_domain_get_attr to check if the underlying | |
106 | * iommu implementation supports these constraints. | |
107 | */ | |
108 | ||
0cd76dd1 | 109 | enum iommu_attr { |
0ff64f80 | 110 | DOMAIN_ATTR_GEOMETRY, |
d2e12160 | 111 | DOMAIN_ATTR_PAGING, |
69356712 | 112 | DOMAIN_ATTR_WINDOWS, |
7cabf491 VS |
113 | DOMAIN_ATTR_FSL_PAMU_STASH, |
114 | DOMAIN_ATTR_FSL_PAMU_ENABLE, | |
115 | DOMAIN_ATTR_FSL_PAMUV1, | |
c02607aa | 116 | DOMAIN_ATTR_NESTING, /* two stages of translation */ |
a8b8a88a | 117 | DOMAIN_ATTR_MAX, |
0cd76dd1 JR |
118 | }; |
119 | ||
a1015c2b JR |
120 | /** |
121 | * struct iommu_dm_region - descriptor for a direct mapped memory region | |
122 | * @list: Linked list pointers | |
123 | * @start: System physical start address of the region | |
124 | * @length: Length of the region in bytes | |
125 | * @prot: IOMMU Protection flags (READ/WRITE/...) | |
126 | */ | |
127 | struct iommu_dm_region { | |
128 | struct list_head list; | |
129 | phys_addr_t start; | |
130 | size_t length; | |
131 | int prot; | |
132 | }; | |
133 | ||
39d4ebb9 JR |
134 | #ifdef CONFIG_IOMMU_API |
135 | ||
7d3002cc OBC |
136 | /** |
137 | * struct iommu_ops - iommu ops and capabilities | |
0d9bacb6 MD |
138 | * @capable: check capability |
139 | * @domain_alloc: allocate iommu domain | |
140 | * @domain_free: free iommu domain | |
7d3002cc OBC |
141 | * @attach_dev: attach device to an iommu domain |
142 | * @detach_dev: detach device from an iommu domain | |
143 | * @map: map a physically contiguous memory region to an iommu domain | |
144 | * @unmap: unmap a physically contiguous memory region from an iommu domain | |
315786eb OH |
145 | * @map_sg: map a scatter-gather list of physically contiguous memory chunks |
146 | * to an iommu domain | |
7d3002cc | 147 | * @iova_to_phys: translate iova to physical address |
d72e31c9 AW |
148 | * @add_device: add device to iommu grouping |
149 | * @remove_device: remove device from iommu grouping | |
0d9bacb6 | 150 | * @device_group: find iommu group for a particular device |
0cd76dd1 JR |
151 | * @domain_get_attr: Query domain attributes |
152 | * @domain_set_attr: Change domain attributes | |
0d9bacb6 MD |
153 | * @get_dm_regions: Request list of direct mapping requirements for a device |
154 | * @put_dm_regions: Free list of direct mapping requirements for a device | |
33b21a6b | 155 | * @apply_dm_region: Temporary helper call-back for iova reserved ranges |
0d9bacb6 MD |
156 | * @domain_window_enable: Configure and enable a particular window for a domain |
157 | * @domain_window_disable: Disable a particular window for a domain | |
158 | * @domain_set_windows: Set the number of windows for a domain | |
159 | * @domain_get_windows: Return the number of windows for a domain | |
d0f60a44 | 160 | * @of_xlate: add OF master IDs to iommu grouping |
d16e0faa | 161 | * @pgsize_bitmap: bitmap of all possible supported page sizes |
7d3002cc | 162 | */ |
4a77a6cf | 163 | struct iommu_ops { |
3c0e0ca0 | 164 | bool (*capable)(enum iommu_cap); |
938c4709 JR |
165 | |
166 | /* Domain allocation and freeing by the iommu driver */ | |
8539c7c1 | 167 | struct iommu_domain *(*domain_alloc)(unsigned iommu_domain_type); |
938c4709 JR |
168 | void (*domain_free)(struct iommu_domain *); |
169 | ||
4a77a6cf JR |
170 | int (*attach_dev)(struct iommu_domain *domain, struct device *dev); |
171 | void (*detach_dev)(struct iommu_domain *domain, struct device *dev); | |
67651786 | 172 | int (*map)(struct iommu_domain *domain, unsigned long iova, |
5009065d OBC |
173 | phys_addr_t paddr, size_t size, int prot); |
174 | size_t (*unmap)(struct iommu_domain *domain, unsigned long iova, | |
175 | size_t size); | |
315786eb OH |
176 | size_t (*map_sg)(struct iommu_domain *domain, unsigned long iova, |
177 | struct scatterlist *sg, unsigned int nents, int prot); | |
bb5547ac | 178 | phys_addr_t (*iova_to_phys)(struct iommu_domain *domain, dma_addr_t iova); |
d72e31c9 AW |
179 | int (*add_device)(struct device *dev); |
180 | void (*remove_device)(struct device *dev); | |
46c6b2bc | 181 | struct iommu_group *(*device_group)(struct device *dev); |
0cd76dd1 JR |
182 | int (*domain_get_attr)(struct iommu_domain *domain, |
183 | enum iommu_attr attr, void *data); | |
184 | int (*domain_set_attr)(struct iommu_domain *domain, | |
185 | enum iommu_attr attr, void *data); | |
d7787d57 | 186 | |
a1015c2b JR |
187 | /* Request/Free a list of direct mapping requirements for a device */ |
188 | void (*get_dm_regions)(struct device *dev, struct list_head *list); | |
189 | void (*put_dm_regions)(struct device *dev, struct list_head *list); | |
33b21a6b JR |
190 | void (*apply_dm_region)(struct device *dev, struct iommu_domain *domain, |
191 | struct iommu_dm_region *region); | |
a1015c2b | 192 | |
d7787d57 JR |
193 | /* Window handling functions */ |
194 | int (*domain_window_enable)(struct iommu_domain *domain, u32 wnd_nr, | |
80f97f0f | 195 | phys_addr_t paddr, u64 size, int prot); |
d7787d57 | 196 | void (*domain_window_disable)(struct iommu_domain *domain, u32 wnd_nr); |
0d9bacb6 | 197 | /* Set the number of windows per domain */ |
69356712 | 198 | int (*domain_set_windows)(struct iommu_domain *domain, u32 w_count); |
0d9bacb6 | 199 | /* Get the number of windows per domain */ |
69356712 | 200 | u32 (*domain_get_windows)(struct iommu_domain *domain); |
d7787d57 | 201 | |
d0f60a44 | 202 | int (*of_xlate)(struct device *dev, struct of_phandle_args *args); |
d0f60a44 | 203 | |
7d3002cc | 204 | unsigned long pgsize_bitmap; |
4a77a6cf JR |
205 | }; |
206 | ||
d72e31c9 AW |
207 | #define IOMMU_GROUP_NOTIFY_ADD_DEVICE 1 /* Device added */ |
208 | #define IOMMU_GROUP_NOTIFY_DEL_DEVICE 2 /* Pre Device removed */ | |
209 | #define IOMMU_GROUP_NOTIFY_BIND_DRIVER 3 /* Pre Driver bind */ | |
210 | #define IOMMU_GROUP_NOTIFY_BOUND_DRIVER 4 /* Post Driver bind */ | |
211 | #define IOMMU_GROUP_NOTIFY_UNBIND_DRIVER 5 /* Pre Driver unbind */ | |
212 | #define IOMMU_GROUP_NOTIFY_UNBOUND_DRIVER 6 /* Post Driver unbind */ | |
213 | ||
b22f6434 | 214 | extern int bus_set_iommu(struct bus_type *bus, const struct iommu_ops *ops); |
a1b60c1c | 215 | extern bool iommu_present(struct bus_type *bus); |
3c0e0ca0 | 216 | extern bool iommu_capable(struct bus_type *bus, enum iommu_cap cap); |
905d66c1 | 217 | extern struct iommu_domain *iommu_domain_alloc(struct bus_type *bus); |
aa16bea9 | 218 | extern struct iommu_group *iommu_group_get_by_id(int id); |
4a77a6cf JR |
219 | extern void iommu_domain_free(struct iommu_domain *domain); |
220 | extern int iommu_attach_device(struct iommu_domain *domain, | |
221 | struct device *dev); | |
222 | extern void iommu_detach_device(struct iommu_domain *domain, | |
223 | struct device *dev); | |
2c1296d9 | 224 | extern struct iommu_domain *iommu_get_domain_for_dev(struct device *dev); |
cefc53c7 | 225 | extern int iommu_map(struct iommu_domain *domain, unsigned long iova, |
7d3002cc OBC |
226 | phys_addr_t paddr, size_t size, int prot); |
227 | extern size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova, | |
228 | size_t size); | |
315786eb OH |
229 | extern size_t default_iommu_map_sg(struct iommu_domain *domain, unsigned long iova, |
230 | struct scatterlist *sg,unsigned int nents, | |
231 | int prot); | |
bb5547ac | 232 | extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova); |
4f3f8d9d | 233 | extern void iommu_set_fault_handler(struct iommu_domain *domain, |
77ca2332 | 234 | iommu_fault_handler_t handler, void *token); |
d72e31c9 | 235 | |
a1015c2b JR |
236 | extern void iommu_get_dm_regions(struct device *dev, struct list_head *list); |
237 | extern void iommu_put_dm_regions(struct device *dev, struct list_head *list); | |
d290f1e7 | 238 | extern int iommu_request_dm_for_dev(struct device *dev); |
a1015c2b | 239 | |
d72e31c9 AW |
240 | extern int iommu_attach_group(struct iommu_domain *domain, |
241 | struct iommu_group *group); | |
242 | extern void iommu_detach_group(struct iommu_domain *domain, | |
243 | struct iommu_group *group); | |
244 | extern struct iommu_group *iommu_group_alloc(void); | |
245 | extern void *iommu_group_get_iommudata(struct iommu_group *group); | |
246 | extern void iommu_group_set_iommudata(struct iommu_group *group, | |
247 | void *iommu_data, | |
248 | void (*release)(void *iommu_data)); | |
249 | extern int iommu_group_set_name(struct iommu_group *group, const char *name); | |
250 | extern int iommu_group_add_device(struct iommu_group *group, | |
251 | struct device *dev); | |
252 | extern void iommu_group_remove_device(struct device *dev); | |
253 | extern int iommu_group_for_each_dev(struct iommu_group *group, void *data, | |
254 | int (*fn)(struct device *, void *)); | |
255 | extern struct iommu_group *iommu_group_get(struct device *dev); | |
256 | extern void iommu_group_put(struct iommu_group *group); | |
257 | extern int iommu_group_register_notifier(struct iommu_group *group, | |
258 | struct notifier_block *nb); | |
259 | extern int iommu_group_unregister_notifier(struct iommu_group *group, | |
260 | struct notifier_block *nb); | |
261 | extern int iommu_group_id(struct iommu_group *group); | |
104a1c13 | 262 | extern struct iommu_group *iommu_group_get_for_dev(struct device *dev); |
6827ca83 | 263 | extern struct iommu_domain *iommu_group_default_domain(struct iommu_group *); |
4f3f8d9d | 264 | |
0cd76dd1 JR |
265 | extern int iommu_domain_get_attr(struct iommu_domain *domain, enum iommu_attr, |
266 | void *data); | |
267 | extern int iommu_domain_set_attr(struct iommu_domain *domain, enum iommu_attr, | |
268 | void *data); | |
c61959ec AW |
269 | struct device *iommu_device_create(struct device *parent, void *drvdata, |
270 | const struct attribute_group **groups, | |
8db14860 | 271 | const char *fmt, ...) __printf(4, 5); |
c61959ec AW |
272 | void iommu_device_destroy(struct device *dev); |
273 | int iommu_device_link(struct device *dev, struct device *link); | |
274 | void iommu_device_unlink(struct device *dev, struct device *link); | |
4f3f8d9d | 275 | |
d7787d57 JR |
276 | /* Window handling function prototypes */ |
277 | extern int iommu_domain_window_enable(struct iommu_domain *domain, u32 wnd_nr, | |
80f97f0f VS |
278 | phys_addr_t offset, u64 size, |
279 | int prot); | |
d7787d57 | 280 | extern void iommu_domain_window_disable(struct iommu_domain *domain, u32 wnd_nr); |
4f3f8d9d OBC |
281 | /** |
282 | * report_iommu_fault() - report about an IOMMU fault to the IOMMU framework | |
283 | * @domain: the iommu domain where the fault has happened | |
284 | * @dev: the device where the fault has happened | |
285 | * @iova: the faulting address | |
286 | * @flags: mmu fault flags (e.g. IOMMU_FAULT_READ/IOMMU_FAULT_WRITE/...) | |
287 | * | |
288 | * This function should be called by the low-level IOMMU implementations | |
289 | * whenever IOMMU faults happen, to allow high-level users, that are | |
290 | * interested in such events, to know about them. | |
291 | * | |
292 | * This event may be useful for several possible use cases: | |
293 | * - mere logging of the event | |
294 | * - dynamic TLB/PTE loading | |
295 | * - if restarting of the faulting device is required | |
296 | * | |
297 | * Returns 0 on success and an appropriate error code otherwise (if dynamic | |
298 | * PTE/TLB loading will one day be supported, implementations will be able | |
299 | * to tell whether it succeeded or not according to this return value). | |
0ed6d2d2 OBC |
300 | * |
301 | * Specifically, -ENOSYS is returned if a fault handler isn't installed | |
302 | * (though fault handlers can also return -ENOSYS, in case they want to | |
303 | * elicit the default behavior of the IOMMU drivers). | |
4f3f8d9d OBC |
304 | */ |
305 | static inline int report_iommu_fault(struct iommu_domain *domain, | |
306 | struct device *dev, unsigned long iova, int flags) | |
307 | { | |
0ed6d2d2 | 308 | int ret = -ENOSYS; |
4a77a6cf | 309 | |
4f3f8d9d OBC |
310 | /* |
311 | * if upper layers showed interest and installed a fault handler, | |
312 | * invoke it. | |
313 | */ | |
314 | if (domain->handler) | |
77ca2332 OBC |
315 | ret = domain->handler(domain, dev, iova, flags, |
316 | domain->handler_token); | |
4a77a6cf | 317 | |
56fa4849 | 318 | trace_io_page_fault(dev, iova, flags); |
4f3f8d9d | 319 | return ret; |
4a77a6cf JR |
320 | } |
321 | ||
315786eb OH |
322 | static inline size_t iommu_map_sg(struct iommu_domain *domain, |
323 | unsigned long iova, struct scatterlist *sg, | |
324 | unsigned int nents, int prot) | |
325 | { | |
326 | return domain->ops->map_sg(domain, iova, sg, nents, prot); | |
327 | } | |
328 | ||
5e62292b JR |
329 | /* PCI device grouping function */ |
330 | extern struct iommu_group *pci_device_group(struct device *dev); | |
6eab556a JR |
331 | /* Generic device grouping function */ |
332 | extern struct iommu_group *generic_device_group(struct device *dev); | |
5e62292b | 333 | |
4a77a6cf JR |
334 | #else /* CONFIG_IOMMU_API */ |
335 | ||
39d4ebb9 | 336 | struct iommu_ops {}; |
d72e31c9 | 337 | struct iommu_group {}; |
4a77a6cf | 338 | |
a1b60c1c | 339 | static inline bool iommu_present(struct bus_type *bus) |
4a77a6cf JR |
340 | { |
341 | return false; | |
342 | } | |
343 | ||
3c0e0ca0 JR |
344 | static inline bool iommu_capable(struct bus_type *bus, enum iommu_cap cap) |
345 | { | |
346 | return false; | |
347 | } | |
348 | ||
905d66c1 | 349 | static inline struct iommu_domain *iommu_domain_alloc(struct bus_type *bus) |
4a77a6cf JR |
350 | { |
351 | return NULL; | |
352 | } | |
353 | ||
b62dfd29 AK |
354 | static inline struct iommu_group *iommu_group_get_by_id(int id) |
355 | { | |
356 | return NULL; | |
357 | } | |
358 | ||
4a77a6cf JR |
359 | static inline void iommu_domain_free(struct iommu_domain *domain) |
360 | { | |
361 | } | |
362 | ||
363 | static inline int iommu_attach_device(struct iommu_domain *domain, | |
364 | struct device *dev) | |
365 | { | |
366 | return -ENODEV; | |
367 | } | |
368 | ||
369 | static inline void iommu_detach_device(struct iommu_domain *domain, | |
370 | struct device *dev) | |
371 | { | |
372 | } | |
373 | ||
2c1296d9 JR |
374 | static inline struct iommu_domain *iommu_get_domain_for_dev(struct device *dev) |
375 | { | |
376 | return NULL; | |
377 | } | |
378 | ||
cefc53c7 JR |
379 | static inline int iommu_map(struct iommu_domain *domain, unsigned long iova, |
380 | phys_addr_t paddr, int gfp_order, int prot) | |
381 | { | |
382 | return -ENODEV; | |
383 | } | |
384 | ||
385 | static inline int iommu_unmap(struct iommu_domain *domain, unsigned long iova, | |
386 | int gfp_order) | |
387 | { | |
388 | return -ENODEV; | |
389 | } | |
390 | ||
315786eb OH |
391 | static inline size_t iommu_map_sg(struct iommu_domain *domain, |
392 | unsigned long iova, struct scatterlist *sg, | |
393 | unsigned int nents, int prot) | |
394 | { | |
395 | return -ENODEV; | |
396 | } | |
397 | ||
d7787d57 JR |
398 | static inline int iommu_domain_window_enable(struct iommu_domain *domain, |
399 | u32 wnd_nr, phys_addr_t paddr, | |
80f97f0f | 400 | u64 size, int prot) |
d7787d57 JR |
401 | { |
402 | return -ENODEV; | |
403 | } | |
404 | ||
405 | static inline void iommu_domain_window_disable(struct iommu_domain *domain, | |
406 | u32 wnd_nr) | |
407 | { | |
408 | } | |
409 | ||
bb5547ac | 410 | static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova) |
4a77a6cf JR |
411 | { |
412 | return 0; | |
413 | } | |
414 | ||
4f3f8d9d | 415 | static inline void iommu_set_fault_handler(struct iommu_domain *domain, |
77ca2332 | 416 | iommu_fault_handler_t handler, void *token) |
4f3f8d9d OBC |
417 | { |
418 | } | |
419 | ||
a1015c2b JR |
420 | static inline void iommu_get_dm_regions(struct device *dev, |
421 | struct list_head *list) | |
422 | { | |
423 | } | |
424 | ||
425 | static inline void iommu_put_dm_regions(struct device *dev, | |
426 | struct list_head *list) | |
427 | { | |
428 | } | |
429 | ||
d290f1e7 JR |
430 | static inline int iommu_request_dm_for_dev(struct device *dev) |
431 | { | |
432 | return -ENODEV; | |
433 | } | |
434 | ||
bef83de5 AW |
435 | static inline int iommu_attach_group(struct iommu_domain *domain, |
436 | struct iommu_group *group) | |
d72e31c9 AW |
437 | { |
438 | return -ENODEV; | |
439 | } | |
440 | ||
bef83de5 AW |
441 | static inline void iommu_detach_group(struct iommu_domain *domain, |
442 | struct iommu_group *group) | |
d72e31c9 AW |
443 | { |
444 | } | |
445 | ||
bef83de5 | 446 | static inline struct iommu_group *iommu_group_alloc(void) |
d72e31c9 AW |
447 | { |
448 | return ERR_PTR(-ENODEV); | |
449 | } | |
450 | ||
bef83de5 | 451 | static inline void *iommu_group_get_iommudata(struct iommu_group *group) |
d72e31c9 AW |
452 | { |
453 | return NULL; | |
454 | } | |
455 | ||
bef83de5 AW |
456 | static inline void iommu_group_set_iommudata(struct iommu_group *group, |
457 | void *iommu_data, | |
458 | void (*release)(void *iommu_data)) | |
d72e31c9 AW |
459 | { |
460 | } | |
461 | ||
bef83de5 AW |
462 | static inline int iommu_group_set_name(struct iommu_group *group, |
463 | const char *name) | |
d72e31c9 AW |
464 | { |
465 | return -ENODEV; | |
466 | } | |
467 | ||
bef83de5 AW |
468 | static inline int iommu_group_add_device(struct iommu_group *group, |
469 | struct device *dev) | |
d72e31c9 AW |
470 | { |
471 | return -ENODEV; | |
472 | } | |
473 | ||
bef83de5 | 474 | static inline void iommu_group_remove_device(struct device *dev) |
d72e31c9 AW |
475 | { |
476 | } | |
477 | ||
bef83de5 AW |
478 | static inline int iommu_group_for_each_dev(struct iommu_group *group, |
479 | void *data, | |
480 | int (*fn)(struct device *, void *)) | |
d72e31c9 AW |
481 | { |
482 | return -ENODEV; | |
483 | } | |
484 | ||
bef83de5 | 485 | static inline struct iommu_group *iommu_group_get(struct device *dev) |
d72e31c9 AW |
486 | { |
487 | return NULL; | |
488 | } | |
489 | ||
bef83de5 | 490 | static inline void iommu_group_put(struct iommu_group *group) |
d72e31c9 AW |
491 | { |
492 | } | |
493 | ||
bef83de5 AW |
494 | static inline int iommu_group_register_notifier(struct iommu_group *group, |
495 | struct notifier_block *nb) | |
1460432c AW |
496 | { |
497 | return -ENODEV; | |
498 | } | |
499 | ||
bef83de5 AW |
500 | static inline int iommu_group_unregister_notifier(struct iommu_group *group, |
501 | struct notifier_block *nb) | |
d72e31c9 AW |
502 | { |
503 | return 0; | |
504 | } | |
505 | ||
bef83de5 | 506 | static inline int iommu_group_id(struct iommu_group *group) |
d72e31c9 AW |
507 | { |
508 | return -ENODEV; | |
509 | } | |
1460432c | 510 | |
0cd76dd1 JR |
511 | static inline int iommu_domain_get_attr(struct iommu_domain *domain, |
512 | enum iommu_attr attr, void *data) | |
513 | { | |
514 | return -EINVAL; | |
515 | } | |
516 | ||
517 | static inline int iommu_domain_set_attr(struct iommu_domain *domain, | |
518 | enum iommu_attr attr, void *data) | |
519 | { | |
520 | return -EINVAL; | |
521 | } | |
522 | ||
e09f8ea5 AW |
523 | static inline struct device *iommu_device_create(struct device *parent, |
524 | void *drvdata, | |
525 | const struct attribute_group **groups, | |
526 | const char *fmt, ...) | |
c61959ec AW |
527 | { |
528 | return ERR_PTR(-ENODEV); | |
529 | } | |
530 | ||
e09f8ea5 | 531 | static inline void iommu_device_destroy(struct device *dev) |
c61959ec AW |
532 | { |
533 | } | |
534 | ||
e09f8ea5 | 535 | static inline int iommu_device_link(struct device *dev, struct device *link) |
c61959ec AW |
536 | { |
537 | return -EINVAL; | |
538 | } | |
539 | ||
e09f8ea5 | 540 | static inline void iommu_device_unlink(struct device *dev, struct device *link) |
c61959ec AW |
541 | { |
542 | } | |
543 | ||
4a77a6cf JR |
544 | #endif /* CONFIG_IOMMU_API */ |
545 | ||
546 | #endif /* __LINUX_IOMMU_H */ |