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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1da177e4 LT |
2 | /* interrupt.h */ |
3 | #ifndef _LINUX_INTERRUPT_H | |
4 | #define _LINUX_INTERRUPT_H | |
5 | ||
1da177e4 | 6 | #include <linux/kernel.h> |
1da177e4 | 7 | #include <linux/bitops.h> |
c7649476 | 8 | #include <linux/cleanup.h> |
908dcecd | 9 | #include <linux/irqreturn.h> |
dd3a1db9 | 10 | #include <linux/irqnr.h> |
1da177e4 | 11 | #include <linux/hardirq.h> |
de30a2b3 | 12 | #include <linux/irqflags.h> |
9ba5f005 | 13 | #include <linux/hrtimer.h> |
cd7eab44 | 14 | #include <linux/kref.h> |
e1b6705b | 15 | #include <linux/cpumask_types.h> |
cd7eab44 | 16 | #include <linux/workqueue.h> |
91cc470e | 17 | #include <linux/jump_label.h> |
0ebb26e7 | 18 | |
60063497 | 19 | #include <linux/atomic.h> |
1da177e4 | 20 | #include <asm/ptrace.h> |
7d65f4a6 | 21 | #include <asm/irq.h> |
229a7186 | 22 | #include <asm/sections.h> |
1da177e4 | 23 | |
6e213616 TG |
24 | /* |
25 | * These correspond to the IORESOURCE_IRQ_* defines in | |
26 | * linux/ioport.h to select the interrupt line behaviour. When | |
27 | * requesting an interrupt without specifying a IRQF_TRIGGER, the | |
28 | * setting should be assumed to be "as already configured", which | |
29 | * may be as per machine or firmware initialisation. | |
30 | */ | |
31 | #define IRQF_TRIGGER_NONE 0x00000000 | |
32 | #define IRQF_TRIGGER_RISING 0x00000001 | |
33 | #define IRQF_TRIGGER_FALLING 0x00000002 | |
34 | #define IRQF_TRIGGER_HIGH 0x00000004 | |
35 | #define IRQF_TRIGGER_LOW 0x00000008 | |
36 | #define IRQF_TRIGGER_MASK (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW | \ | |
37 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING) | |
38 | #define IRQF_TRIGGER_PROBE 0x00000010 | |
39 | ||
40 | /* | |
41 | * These flags used only by the kernel as part of the | |
42 | * irq handling routines. | |
43 | * | |
6e213616 TG |
44 | * IRQF_SHARED - allow sharing the irq among several devices |
45 | * IRQF_PROBE_SHARED - set by callers when they expect sharing mismatches to occur | |
46 | * IRQF_TIMER - Flag to mark this interrupt as timer interrupt | |
950f4427 TG |
47 | * IRQF_PERCPU - Interrupt is per cpu |
48 | * IRQF_NOBALANCING - Flag to exclude this interrupt from irq balancing | |
d85a60d8 | 49 | * IRQF_IRQPOLL - Interrupt is used for polling (only the interrupt that is |
b8d62f33 | 50 | * registered first in a shared interrupt is considered for |
d85a60d8 | 51 | * performance reasons) |
b25c340c TG |
52 | * IRQF_ONESHOT - Interrupt is not reenabled after the hardirq handler finished. |
53 | * Used by threaded interrupts which need to keep the | |
54 | * irq line disabled until the threaded handler has been run. | |
737eb030 MR |
55 | * IRQF_NO_SUSPEND - Do not disable this IRQ during suspend. Does not guarantee |
56 | * that this interrupt will wake the system from a suspended | |
151f4e2b | 57 | * state. See Documentation/power/suspend-and-interrupts.rst |
dc5f219e | 58 | * IRQF_FORCE_RESUME - Force enable it on resume even if IRQF_NO_SUSPEND is set |
0c4602ff | 59 | * IRQF_NO_THREAD - Interrupt cannot be threaded |
9bab0b7f IC |
60 | * IRQF_EARLY_RESUME - Resume IRQ early during syscore instead of at device |
61 | * resume time. | |
17f48034 RW |
62 | * IRQF_COND_SUSPEND - If the IRQ is shared with a NO_SUSPEND user, execute this |
63 | * interrupt handler after suspending interrupts. For system | |
64 | * wakeup devices users need to implement wakeup detection in | |
65 | * their interrupt handlers. | |
cbe16f35 BS |
66 | * IRQF_NO_AUTOEN - Don't enable IRQ or NMI automatically when users request it. |
67 | * Users will enable it explicitly by enable_irq() or enable_nmi() | |
68 | * later. | |
c2b1063e TG |
69 | * IRQF_NO_DEBUG - Exclude from runnaway detection for IPI and similar handlers, |
70 | * depends on IRQF_PERCPU. | |
c2ddeb29 RW |
71 | * IRQF_COND_ONESHOT - Agree to do IRQF_ONESHOT if already set for a shared |
72 | * interrupt. | |
6e213616 | 73 | */ |
6e213616 TG |
74 | #define IRQF_SHARED 0x00000080 |
75 | #define IRQF_PROBE_SHARED 0x00000100 | |
685fd0b4 | 76 | #define __IRQF_TIMER 0x00000200 |
284c6680 | 77 | #define IRQF_PERCPU 0x00000400 |
950f4427 | 78 | #define IRQF_NOBALANCING 0x00000800 |
d85a60d8 | 79 | #define IRQF_IRQPOLL 0x00001000 |
b25c340c | 80 | #define IRQF_ONESHOT 0x00002000 |
685fd0b4 | 81 | #define IRQF_NO_SUSPEND 0x00004000 |
dc5f219e | 82 | #define IRQF_FORCE_RESUME 0x00008000 |
0c4602ff | 83 | #define IRQF_NO_THREAD 0x00010000 |
9bab0b7f | 84 | #define IRQF_EARLY_RESUME 0x00020000 |
17f48034 | 85 | #define IRQF_COND_SUSPEND 0x00040000 |
cbe16f35 | 86 | #define IRQF_NO_AUTOEN 0x00080000 |
c2b1063e | 87 | #define IRQF_NO_DEBUG 0x00100000 |
c2ddeb29 | 88 | #define IRQF_COND_ONESHOT 0x00200000 |
685fd0b4 | 89 | |
0c4602ff | 90 | #define IRQF_TIMER (__IRQF_TIMER | IRQF_NO_SUSPEND | IRQF_NO_THREAD) |
3aa551c9 | 91 | |
b4e6b097 | 92 | /* |
ae731f8d MZ |
93 | * These values can be returned by request_any_context_irq() and |
94 | * describe the context the interrupt will be run in. | |
95 | * | |
96 | * IRQC_IS_HARDIRQ - interrupt runs in hardirq context | |
97 | * IRQC_IS_NESTED - interrupt runs in a nested threaded context | |
98 | */ | |
99 | enum { | |
100 | IRQC_IS_HARDIRQ = 0, | |
101 | IRQC_IS_NESTED, | |
102 | }; | |
103 | ||
7d12e780 | 104 | typedef irqreturn_t (*irq_handler_t)(int, void *); |
da482792 | 105 | |
a9d0a1a3 TG |
106 | /** |
107 | * struct irqaction - per interrupt action descriptor | |
108 | * @handler: interrupt handler function | |
a9d0a1a3 TG |
109 | * @name: name of the device |
110 | * @dev_id: cookie to identify the device | |
31d9d9b6 | 111 | * @percpu_dev_id: cookie to identify the device |
a9d0a1a3 TG |
112 | * @next: pointer to the next irqaction for shared interrupts |
113 | * @irq: interrupt number | |
c0ecaa06 | 114 | * @flags: flags (see IRQF_* above) |
25985edc | 115 | * @thread_fn: interrupt handler function for threaded interrupts |
3aa551c9 | 116 | * @thread: thread pointer for threaded interrupts |
2a1d3ab8 | 117 | * @secondary: pointer to secondary irqaction (force threading) |
3aa551c9 | 118 | * @thread_flags: flags related to @thread |
b5faba21 | 119 | * @thread_mask: bitmask for keeping track of @thread activity |
c0ecaa06 | 120 | * @dir: pointer to the proc/irq/NN/name entry |
a9d0a1a3 | 121 | */ |
1da177e4 | 122 | struct irqaction { |
31d9d9b6 | 123 | irq_handler_t handler; |
31d9d9b6 MZ |
124 | void *dev_id; |
125 | void __percpu *percpu_dev_id; | |
126 | struct irqaction *next; | |
31d9d9b6 MZ |
127 | irq_handler_t thread_fn; |
128 | struct task_struct *thread; | |
2a1d3ab8 | 129 | struct irqaction *secondary; |
c0ecaa06 TG |
130 | unsigned int irq; |
131 | unsigned int flags; | |
31d9d9b6 MZ |
132 | unsigned long thread_flags; |
133 | unsigned long thread_mask; | |
134 | const char *name; | |
135 | struct proc_dir_entry *dir; | |
f6cd2477 | 136 | } ____cacheline_internodealigned_in_smp; |
1da177e4 | 137 | |
7d12e780 | 138 | extern irqreturn_t no_action(int cpl, void *dev_id); |
3aa551c9 | 139 | |
e237a551 CF |
140 | /* |
141 | * If a (PCI) device interrupt is not connected we set dev->irq to | |
142 | * IRQ_NOTCONNECTED. This causes request_irq() to fail with -ENOTCONN, so we | |
0128816c | 143 | * can distinguish that case from other error returns. |
e237a551 CF |
144 | * |
145 | * 0x80000000 is guaranteed to be outside the available range of interrupts | |
146 | * and easy to distinguish from other possible incorrect values. | |
147 | */ | |
148 | #define IRQ_NOTCONNECTED (1U << 31) | |
149 | ||
3aa551c9 TG |
150 | extern int __must_check |
151 | request_threaded_irq(unsigned int irq, irq_handler_t handler, | |
152 | irq_handler_t thread_fn, | |
153 | unsigned long flags, const char *name, void *dev); | |
154 | ||
5ca470a0 JC |
155 | /** |
156 | * request_irq - Add a handler for an interrupt line | |
157 | * @irq: The interrupt line to allocate | |
158 | * @handler: Function to be called when the IRQ occurs. | |
159 | * Primary handler for threaded interrupts | |
160 | * If NULL, the default primary handler is installed | |
161 | * @flags: Handling flags | |
162 | * @name: Name of the device generating this interrupt | |
163 | * @dev: A cookie passed to the handler function | |
164 | * | |
165 | * This call allocates an interrupt and establishes a handler; see | |
166 | * the documentation for request_threaded_irq() for details. | |
167 | */ | |
3aa551c9 TG |
168 | static inline int __must_check |
169 | request_irq(unsigned int irq, irq_handler_t handler, unsigned long flags, | |
170 | const char *name, void *dev) | |
171 | { | |
c37927a2 | 172 | return request_threaded_irq(irq, handler, NULL, flags | IRQF_COND_ONESHOT, name, dev); |
3aa551c9 TG |
173 | } |
174 | ||
ae731f8d MZ |
175 | extern int __must_check |
176 | request_any_context_irq(unsigned int irq, irq_handler_t handler, | |
177 | unsigned long flags, const char *name, void *dev_id); | |
178 | ||
31d9d9b6 | 179 | extern int __must_check |
c80081b9 DL |
180 | __request_percpu_irq(unsigned int irq, irq_handler_t handler, |
181 | unsigned long flags, const char *devname, | |
182 | void __percpu *percpu_dev_id); | |
183 | ||
b525903c JT |
184 | extern int __must_check |
185 | request_nmi(unsigned int irq, irq_handler_t handler, unsigned long flags, | |
186 | const char *name, void *dev); | |
187 | ||
c80081b9 | 188 | static inline int __must_check |
31d9d9b6 | 189 | request_percpu_irq(unsigned int irq, irq_handler_t handler, |
c80081b9 DL |
190 | const char *devname, void __percpu *percpu_dev_id) |
191 | { | |
192 | return __request_percpu_irq(irq, handler, 0, | |
193 | devname, percpu_dev_id); | |
194 | } | |
3aa551c9 | 195 | |
4b078c3f JT |
196 | extern int __must_check |
197 | request_percpu_nmi(unsigned int irq, irq_handler_t handler, | |
198 | const char *devname, void __percpu *dev); | |
199 | ||
25ce4be7 | 200 | extern const void *free_irq(unsigned int, void *); |
31d9d9b6 | 201 | extern void free_percpu_irq(unsigned int, void __percpu *); |
1da177e4 | 202 | |
b525903c | 203 | extern const void *free_nmi(unsigned int irq, void *dev_id); |
4b078c3f | 204 | extern void free_percpu_nmi(unsigned int irq, void __percpu *percpu_dev_id); |
b525903c | 205 | |
0af3678f AV |
206 | struct device; |
207 | ||
935bd5b9 AV |
208 | extern int __must_check |
209 | devm_request_threaded_irq(struct device *dev, unsigned int irq, | |
210 | irq_handler_t handler, irq_handler_t thread_fn, | |
211 | unsigned long irqflags, const char *devname, | |
212 | void *dev_id); | |
213 | ||
214 | static inline int __must_check | |
215 | devm_request_irq(struct device *dev, unsigned int irq, irq_handler_t handler, | |
216 | unsigned long irqflags, const char *devname, void *dev_id) | |
217 | { | |
218 | return devm_request_threaded_irq(dev, irq, handler, NULL, irqflags, | |
219 | devname, dev_id); | |
220 | } | |
221 | ||
0668d306 SB |
222 | extern int __must_check |
223 | devm_request_any_context_irq(struct device *dev, unsigned int irq, | |
224 | irq_handler_t handler, unsigned long irqflags, | |
225 | const char *devname, void *dev_id); | |
226 | ||
9ac7849e TH |
227 | extern void devm_free_irq(struct device *dev, unsigned int irq, void *dev_id); |
228 | ||
a313357e | 229 | bool irq_has_action(unsigned int irq); |
1da177e4 | 230 | extern void disable_irq_nosync(unsigned int irq); |
02cea395 | 231 | extern bool disable_hardirq(unsigned int irq); |
1da177e4 | 232 | extern void disable_irq(unsigned int irq); |
31d9d9b6 | 233 | extern void disable_percpu_irq(unsigned int irq); |
1da177e4 | 234 | extern void enable_irq(unsigned int irq); |
1e7c5fd2 | 235 | extern void enable_percpu_irq(unsigned int irq, unsigned int type); |
f0cb3220 | 236 | extern bool irq_percpu_is_enabled(unsigned int irq); |
a92444c6 | 237 | extern void irq_wake_thread(unsigned int irq, void *dev_id); |
ba9a2331 | 238 | |
c7649476 DT |
239 | DEFINE_LOCK_GUARD_1(disable_irq, int, |
240 | disable_irq(*_T->lock), enable_irq(*_T->lock)) | |
241 | ||
b525903c | 242 | extern void disable_nmi_nosync(unsigned int irq); |
4b078c3f | 243 | extern void disable_percpu_nmi(unsigned int irq); |
b525903c | 244 | extern void enable_nmi(unsigned int irq); |
4b078c3f JT |
245 | extern void enable_percpu_nmi(unsigned int irq, unsigned int type); |
246 | extern int prepare_percpu_nmi(unsigned int irq); | |
247 | extern void teardown_percpu_nmi(unsigned int irq); | |
b525903c | 248 | |
acd26bcf TG |
249 | extern int irq_inject_interrupt(unsigned int irq); |
250 | ||
0a0c5168 RW |
251 | /* The following three functions are for the core kernel use only. */ |
252 | extern void suspend_device_irqs(void); | |
253 | extern void resume_device_irqs(void); | |
3a79bc63 | 254 | extern void rearm_wake_irq(unsigned int irq); |
0a0c5168 | 255 | |
f0ba3d05 EP |
256 | /** |
257 | * struct irq_affinity_notify - context for notification of IRQ affinity changes | |
258 | * @irq: Interrupt to which notification applies | |
259 | * @kref: Reference count, for internal use | |
260 | * @work: Work item, for internal use | |
261 | * @notify: Function to be called on change. This will be | |
262 | * called in process context. | |
263 | * @release: Function to be called on release. This will be | |
264 | * called in process context. Once registered, the | |
265 | * structure must only be freed when this function is | |
266 | * called or later. | |
267 | */ | |
268 | struct irq_affinity_notify { | |
269 | unsigned int irq; | |
270 | struct kref kref; | |
271 | struct work_struct work; | |
272 | void (*notify)(struct irq_affinity_notify *, const cpumask_t *mask); | |
273 | void (*release)(struct kref *ref); | |
274 | }; | |
275 | ||
9cfef55b ML |
276 | #define IRQ_AFFINITY_MAX_SETS 4 |
277 | ||
20e407e1 | 278 | /** |
17e28a9a | 279 | * struct irq_affinity - Description for automatic irq affinity assignments |
20e407e1 CH |
280 | * @pre_vectors: Don't apply affinity to @pre_vectors at beginning of |
281 | * the MSI(-X) vector space | |
282 | * @post_vectors: Don't apply affinity to @post_vectors at end of | |
283 | * the MSI(-X) vector space | |
9cfef55b ML |
284 | * @nr_sets: The number of interrupt sets for which affinity |
285 | * spreading is required | |
286 | * @set_size: Array holding the size of each interrupt set | |
c66d4bd1 ML |
287 | * @calc_sets: Callback for calculating the number and size |
288 | * of interrupt sets | |
289 | * @priv: Private data for usage by @calc_sets, usually a | |
290 | * pointer to driver/device specific data. | |
20e407e1 CH |
291 | */ |
292 | struct irq_affinity { | |
0145c30e TG |
293 | unsigned int pre_vectors; |
294 | unsigned int post_vectors; | |
295 | unsigned int nr_sets; | |
9cfef55b | 296 | unsigned int set_size[IRQ_AFFINITY_MAX_SETS]; |
c66d4bd1 ML |
297 | void (*calc_sets)(struct irq_affinity *, unsigned int nvecs); |
298 | void *priv; | |
20e407e1 CH |
299 | }; |
300 | ||
bec04037 DL |
301 | /** |
302 | * struct irq_affinity_desc - Interrupt affinity descriptor | |
303 | * @mask: cpumask to hold the affinity assignment | |
70921ae2 | 304 | * @is_managed: 1 if the interrupt is managed internally |
bec04037 DL |
305 | */ |
306 | struct irq_affinity_desc { | |
307 | struct cpumask mask; | |
c410abbb | 308 | unsigned int is_managed : 1; |
bec04037 DL |
309 | }; |
310 | ||
0244ad00 | 311 | #if defined(CONFIG_SMP) |
d7b90689 | 312 | |
d036e67b | 313 | extern cpumask_var_t irq_default_affinity; |
18404756 | 314 | |
4d80d6ca TG |
315 | extern int irq_set_affinity(unsigned int irq, const struct cpumask *cpumask); |
316 | extern int irq_force_affinity(unsigned int irq, const struct cpumask *cpumask); | |
01f8fa4f | 317 | |
d7b90689 | 318 | extern int irq_can_set_affinity(unsigned int irq); |
18404756 | 319 | extern int irq_select_affinity(unsigned int irq); |
d7b90689 | 320 | |
65c7cded TG |
321 | extern int __irq_apply_affinity_hint(unsigned int irq, const struct cpumask *m, |
322 | bool setaffinity); | |
323 | ||
324 | /** | |
325 | * irq_update_affinity_hint - Update the affinity hint | |
326 | * @irq: Interrupt to update | |
327 | * @m: cpumask pointer (NULL to clear the hint) | |
328 | * | |
329 | * Updates the affinity hint, but does not change the affinity of the interrupt. | |
330 | */ | |
331 | static inline int | |
332 | irq_update_affinity_hint(unsigned int irq, const struct cpumask *m) | |
333 | { | |
334 | return __irq_apply_affinity_hint(irq, m, false); | |
335 | } | |
336 | ||
337 | /** | |
338 | * irq_set_affinity_and_hint - Update the affinity hint and apply the provided | |
339 | * cpumask to the interrupt | |
340 | * @irq: Interrupt to update | |
341 | * @m: cpumask pointer (NULL to clear the hint) | |
342 | * | |
343 | * Updates the affinity hint and if @m is not NULL it applies it as the | |
344 | * affinity of that interrupt. | |
345 | */ | |
346 | static inline int | |
347 | irq_set_affinity_and_hint(unsigned int irq, const struct cpumask *m) | |
348 | { | |
349 | return __irq_apply_affinity_hint(irq, m, true); | |
350 | } | |
351 | ||
352 | /* | |
353 | * Deprecated. Use irq_update_affinity_hint() or irq_set_affinity_and_hint() | |
354 | * instead. | |
355 | */ | |
356 | static inline int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m) | |
357 | { | |
358 | return irq_set_affinity_and_hint(irq, m); | |
359 | } | |
360 | ||
1d3aec89 JG |
361 | extern int irq_update_affinity_desc(unsigned int irq, |
362 | struct irq_affinity_desc *affinity); | |
cd7eab44 | 363 | |
cd7eab44 BH |
364 | extern int |
365 | irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify); | |
366 | ||
bec04037 | 367 | struct irq_affinity_desc * |
c66d4bd1 | 368 | irq_create_affinity_masks(unsigned int nvec, struct irq_affinity *affd); |
bec04037 | 369 | |
0145c30e TG |
370 | unsigned int irq_calc_affinity_vectors(unsigned int minvec, unsigned int maxvec, |
371 | const struct irq_affinity *affd); | |
5e385a6e | 372 | |
d7b90689 RK |
373 | #else /* CONFIG_SMP */ |
374 | ||
0de26520 | 375 | static inline int irq_set_affinity(unsigned int irq, const struct cpumask *m) |
d7b90689 RK |
376 | { |
377 | return -EINVAL; | |
378 | } | |
379 | ||
4c88d7f9 AB |
380 | static inline int irq_force_affinity(unsigned int irq, const struct cpumask *cpumask) |
381 | { | |
382 | return 0; | |
383 | } | |
384 | ||
d7b90689 RK |
385 | static inline int irq_can_set_affinity(unsigned int irq) |
386 | { | |
387 | return 0; | |
388 | } | |
389 | ||
18404756 MK |
390 | static inline int irq_select_affinity(unsigned int irq) { return 0; } |
391 | ||
65c7cded TG |
392 | static inline int irq_update_affinity_hint(unsigned int irq, |
393 | const struct cpumask *m) | |
394 | { | |
395 | return -EINVAL; | |
396 | } | |
397 | ||
398 | static inline int irq_set_affinity_and_hint(unsigned int irq, | |
399 | const struct cpumask *m) | |
400 | { | |
401 | return -EINVAL; | |
402 | } | |
403 | ||
e7a297b0 | 404 | static inline int irq_set_affinity_hint(unsigned int irq, |
cd7eab44 | 405 | const struct cpumask *m) |
e7a297b0 PWJ |
406 | { |
407 | return -EINVAL; | |
408 | } | |
f0ba3d05 | 409 | |
1d3aec89 JG |
410 | static inline int irq_update_affinity_desc(unsigned int irq, |
411 | struct irq_affinity_desc *affinity) | |
412 | { | |
413 | return -EINVAL; | |
414 | } | |
415 | ||
f0ba3d05 EP |
416 | static inline int |
417 | irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify) | |
418 | { | |
419 | return 0; | |
420 | } | |
5e385a6e | 421 | |
bec04037 | 422 | static inline struct irq_affinity_desc * |
c66d4bd1 | 423 | irq_create_affinity_masks(unsigned int nvec, struct irq_affinity *affd) |
34c3d981 TG |
424 | { |
425 | return NULL; | |
426 | } | |
427 | ||
0145c30e TG |
428 | static inline unsigned int |
429 | irq_calc_affinity_vectors(unsigned int minvec, unsigned int maxvec, | |
430 | const struct irq_affinity *affd) | |
34c3d981 TG |
431 | { |
432 | return maxvec; | |
433 | } | |
434 | ||
0244ad00 | 435 | #endif /* CONFIG_SMP */ |
d7b90689 | 436 | |
c01d403b IM |
437 | /* |
438 | * Special lockdep variants of irq disabling/enabling. | |
439 | * These should be used for locking constructs that | |
440 | * know that a particular irq context which is disabled, | |
441 | * and which is the only irq-context user of a lock, | |
442 | * that it's safe to take the lock in the irq-disabled | |
443 | * section without disabling hardirqs. | |
444 | * | |
445 | * On !CONFIG_LOCKDEP they are equivalent to the normal | |
446 | * irq disable/enable methods. | |
447 | */ | |
448 | static inline void disable_irq_nosync_lockdep(unsigned int irq) | |
449 | { | |
450 | disable_irq_nosync(irq); | |
87886b32 | 451 | #if defined(CONFIG_LOCKDEP) && !defined(CONFIG_PREEMPT_RT) |
c01d403b IM |
452 | local_irq_disable(); |
453 | #endif | |
454 | } | |
455 | ||
e8106b94 AV |
456 | static inline void disable_irq_nosync_lockdep_irqsave(unsigned int irq, unsigned long *flags) |
457 | { | |
458 | disable_irq_nosync(irq); | |
87886b32 | 459 | #if defined(CONFIG_LOCKDEP) && !defined(CONFIG_PREEMPT_RT) |
e8106b94 AV |
460 | local_irq_save(*flags); |
461 | #endif | |
462 | } | |
463 | ||
c01d403b IM |
464 | static inline void enable_irq_lockdep(unsigned int irq) |
465 | { | |
87886b32 | 466 | #if defined(CONFIG_LOCKDEP) && !defined(CONFIG_PREEMPT_RT) |
c01d403b IM |
467 | local_irq_enable(); |
468 | #endif | |
469 | enable_irq(irq); | |
470 | } | |
471 | ||
e8106b94 AV |
472 | static inline void enable_irq_lockdep_irqrestore(unsigned int irq, unsigned long *flags) |
473 | { | |
87886b32 | 474 | #if defined(CONFIG_LOCKDEP) && !defined(CONFIG_PREEMPT_RT) |
e8106b94 AV |
475 | local_irq_restore(*flags); |
476 | #endif | |
477 | enable_irq(irq); | |
478 | } | |
479 | ||
ba9a2331 | 480 | /* IRQ wakeup (PM) control: */ |
a0cd9ca2 TG |
481 | extern int irq_set_irq_wake(unsigned int irq, unsigned int on); |
482 | ||
ba9a2331 TG |
483 | static inline int enable_irq_wake(unsigned int irq) |
484 | { | |
a0cd9ca2 | 485 | return irq_set_irq_wake(irq, 1); |
ba9a2331 TG |
486 | } |
487 | ||
488 | static inline int disable_irq_wake(unsigned int irq) | |
489 | { | |
a0cd9ca2 | 490 | return irq_set_irq_wake(irq, 0); |
ba9a2331 TG |
491 | } |
492 | ||
1b7047ed MZ |
493 | /* |
494 | * irq_get_irqchip_state/irq_set_irqchip_state specific flags | |
495 | */ | |
496 | enum irqchip_irq_state { | |
497 | IRQCHIP_STATE_PENDING, /* Is interrupt pending? */ | |
498 | IRQCHIP_STATE_ACTIVE, /* Is interrupt in progress? */ | |
499 | IRQCHIP_STATE_MASKED, /* Is interrupt masked? */ | |
500 | IRQCHIP_STATE_LINE_LEVEL, /* Is IRQ line high? */ | |
501 | }; | |
502 | ||
503 | extern int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which, | |
504 | bool *state); | |
505 | extern int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which, | |
506 | bool state); | |
8d32a307 TG |
507 | |
508 | #ifdef CONFIG_IRQ_FORCED_THREADING | |
b6a32bbd | 509 | # ifdef CONFIG_PREEMPT_RT |
91cc470e | 510 | # define force_irqthreads() (true) |
b6a32bbd | 511 | # else |
91cc470e TL |
512 | DECLARE_STATIC_KEY_FALSE(force_irqthreads_key); |
513 | # define force_irqthreads() (static_branch_unlikely(&force_irqthreads_key)) | |
b6a32bbd | 514 | # endif |
8d32a307 | 515 | #else |
91cc470e | 516 | #define force_irqthreads() (false) |
8d32a307 TG |
517 | #endif |
518 | ||
0fd7d862 FW |
519 | #ifndef local_softirq_pending |
520 | ||
521 | #ifndef local_softirq_pending_ref | |
522 | #define local_softirq_pending_ref irq_stat.__softirq_pending | |
523 | #endif | |
524 | ||
525 | #define local_softirq_pending() (__this_cpu_read(local_softirq_pending_ref)) | |
526 | #define set_softirq_pending(x) (__this_cpu_write(local_softirq_pending_ref, (x))) | |
527 | #define or_softirq_pending(x) (__this_cpu_or(local_softirq_pending_ref, (x))) | |
528 | ||
0fd7d862 FW |
529 | #endif /* local_softirq_pending */ |
530 | ||
2d3fbbb3 BH |
531 | /* Some architectures might implement lazy enabling/disabling of |
532 | * interrupts. In some cases, such as stop_machine, we might want | |
533 | * to ensure that after a local_irq_disable(), interrupts have | |
534 | * really been disabled in hardware. Such architectures need to | |
535 | * implement the following hook. | |
536 | */ | |
537 | #ifndef hard_irq_disable | |
538 | #define hard_irq_disable() do { } while(0) | |
539 | #endif | |
540 | ||
1da177e4 LT |
541 | /* PLEASE, avoid to allocate new softirqs, if you need not _really_ high |
542 | frequency threaded job scheduling. For almost all the purposes | |
543 | tasklets are more than enough. F.e. all serial device BHs et | |
544 | al. should be converted to tasklets, not to softirqs. | |
545 | */ | |
546 | ||
547 | enum | |
548 | { | |
549 | HI_SOFTIRQ=0, | |
550 | TIMER_SOFTIRQ, | |
551 | NET_TX_SOFTIRQ, | |
552 | NET_RX_SOFTIRQ, | |
ff856bad | 553 | BLOCK_SOFTIRQ, |
511cbce2 | 554 | IRQ_POLL_SOFTIRQ, |
c9819f45 CL |
555 | TASKLET_SOFTIRQ, |
556 | SCHED_SOFTIRQ, | |
3bbc53f4 | 557 | HRTIMER_SOFTIRQ, |
09223371 | 558 | RCU_SOFTIRQ, /* Preferable RCU should always be the last softirq */ |
978b0116 AD |
559 | |
560 | NR_SOFTIRQS | |
1da177e4 LT |
561 | }; |
562 | ||
0345691b | 563 | /* |
f96272a9 FW |
564 | * The following vectors can be safely ignored after ksoftirqd is parked: |
565 | * | |
566 | * _ RCU: | |
567 | * 1) rcutree_migrate_callbacks() migrates the queue. | |
448e9f34 | 568 | * 2) rcutree_report_cpu_dead() reports the final quiescent states. |
f96272a9 FW |
569 | * |
570 | * _ IRQ_POLL: irq_poll_cpu_dead() migrates the queue | |
1a6a4647 FW |
571 | * |
572 | * _ (HR)TIMER_SOFTIRQ: (hr)timers_dead_cpu() migrates the queue | |
0345691b | 573 | */ |
1a6a4647 FW |
574 | #define SOFTIRQ_HOTPLUG_SAFE_MASK (BIT(TIMER_SOFTIRQ) | BIT(IRQ_POLL_SOFTIRQ) |\ |
575 | BIT(HRTIMER_SOFTIRQ) | BIT(RCU_SOFTIRQ)) | |
576 | ||
803b0eba | 577 | |
5d592b44 JB |
578 | /* map softirq index to softirq name. update 'softirq_to_name' in |
579 | * kernel/softirq.c when adding a new softirq. | |
580 | */ | |
ce85b4f2 | 581 | extern const char * const softirq_to_name[NR_SOFTIRQS]; |
5d592b44 | 582 | |
1da177e4 LT |
583 | /* softirq mask and active fields moved to irq_cpustat_t in |
584 | * asm/hardirq.h to get better cache usage. KAO | |
585 | */ | |
586 | ||
587 | struct softirq_action | |
588 | { | |
e68ac2b4 | 589 | void (*action)(void); |
1da177e4 LT |
590 | }; |
591 | ||
592 | asmlinkage void do_softirq(void); | |
eb0f1c44 | 593 | asmlinkage void __do_softirq(void); |
7d65f4a6 | 594 | |
1a90bfd2 SAS |
595 | #ifdef CONFIG_PREEMPT_RT |
596 | extern void do_softirq_post_smp_call_flush(unsigned int was_pending); | |
597 | #else | |
598 | static inline void do_softirq_post_smp_call_flush(unsigned int unused) | |
599 | { | |
600 | do_softirq(); | |
601 | } | |
602 | #endif | |
603 | ||
e68ac2b4 | 604 | extern void open_softirq(int nr, void (*action)(void)); |
1da177e4 | 605 | extern void softirq_init(void); |
f069686e | 606 | extern void __raise_softirq_irqoff(unsigned int nr); |
2bf2160d | 607 | |
b3c97528 HH |
608 | extern void raise_softirq_irqoff(unsigned int nr); |
609 | extern void raise_softirq(unsigned int nr); | |
1da177e4 | 610 | |
49a17639 SAS |
611 | /* |
612 | * With forced-threaded interrupts enabled a raised softirq is deferred to | |
613 | * ksoftirqd unless it can be handled within the threaded interrupt. This | |
614 | * affects timer_list timers and hrtimers which are explicitly marked with | |
615 | * HRTIMER_MODE_SOFT. | |
616 | * With PREEMPT_RT enabled more hrtimers are moved to softirq for processing | |
617 | * which includes all timers which are not explicitly marked HRTIMER_MODE_HARD. | |
618 | * Userspace controlled timers (like the clock_nanosleep() interface) is divided | |
619 | * into two categories: Tasks with elevated scheduling policy including | |
620 | * SCHED_{FIFO|RR|DL} and the remaining scheduling policy. The tasks with the | |
621 | * elevated scheduling policy are woken up directly from the HARDIRQ while all | |
622 | * other wake ups are delayed to softirq and so to ksoftirqd. | |
623 | * | |
624 | * The ksoftirqd runs at SCHED_OTHER policy at which it should remain since it | |
625 | * handles the softirq in an overloaded situation (not handled everything | |
626 | * within its last run). | |
627 | * If the timers are handled at SCHED_OTHER priority then they competes with all | |
628 | * other SCHED_OTHER tasks for CPU resources are possibly delayed. | |
629 | * Moving timers softirqs to a low priority SCHED_FIFO thread instead ensures | |
630 | * that timer are performed before scheduling any SCHED_OTHER thread. | |
631 | */ | |
632 | DECLARE_PER_CPU(struct task_struct *, ktimerd); | |
633 | DECLARE_PER_CPU(unsigned long, pending_timer_softirq); | |
634 | void raise_ktimers_thread(unsigned int nr); | |
635 | ||
636 | static inline unsigned int local_timers_pending_force_th(void) | |
637 | { | |
638 | return __this_cpu_read(pending_timer_softirq); | |
639 | } | |
640 | ||
641 | static inline void raise_timer_softirq(unsigned int nr) | |
642 | { | |
643 | lockdep_assert_in_irq(); | |
644 | if (force_irqthreads()) | |
645 | raise_ktimers_thread(nr); | |
646 | else | |
647 | __raise_softirq_irqoff(nr); | |
648 | } | |
649 | ||
650 | static inline unsigned int local_timers_pending(void) | |
651 | { | |
652 | if (force_irqthreads()) | |
653 | return local_timers_pending_force_th(); | |
654 | else | |
655 | return local_softirq_pending(); | |
656 | } | |
657 | ||
4dd53d89 VP |
658 | DECLARE_PER_CPU(struct task_struct *, ksoftirqd); |
659 | ||
660 | static inline struct task_struct *this_cpu_ksoftirqd(void) | |
661 | { | |
662 | return this_cpu_read(ksoftirqd); | |
663 | } | |
664 | ||
1da177e4 LT |
665 | /* Tasklets --- multithreaded analogue of BHs. |
666 | ||
12cc923f RP |
667 | This API is deprecated. Please consider using threaded IRQs instead: |
668 | https://lore.kernel.org/lkml/20200716081538.2sivhkj4hcyrusem@linutronix.de | |
669 | ||
1da177e4 LT |
670 | Main feature differing them of generic softirqs: tasklet |
671 | is running only on one CPU simultaneously. | |
672 | ||
673 | Main feature differing them of BHs: different tasklets | |
674 | may be run simultaneously on different CPUs. | |
675 | ||
676 | Properties: | |
677 | * If tasklet_schedule() is called, then tasklet is guaranteed | |
678 | to be executed on some cpu at least once after this. | |
25985edc | 679 | * If the tasklet is already scheduled, but its execution is still not |
1da177e4 LT |
680 | started, it will be executed only once. |
681 | * If this tasklet is already running on another CPU (or schedule is called | |
682 | from tasklet itself), it is rescheduled for later. | |
683 | * Tasklet is strictly serialized wrt itself, but not | |
684 | wrt another tasklets. If client needs some intertask synchronization, | |
685 | he makes it with spinlocks. | |
686 | */ | |
687 | ||
688 | struct tasklet_struct | |
689 | { | |
690 | struct tasklet_struct *next; | |
691 | unsigned long state; | |
692 | atomic_t count; | |
12cc923f RP |
693 | bool use_callback; |
694 | union { | |
695 | void (*func)(unsigned long data); | |
696 | void (*callback)(struct tasklet_struct *t); | |
697 | }; | |
1da177e4 LT |
698 | unsigned long data; |
699 | }; | |
700 | ||
12cc923f RP |
701 | #define DECLARE_TASKLET(name, _callback) \ |
702 | struct tasklet_struct name = { \ | |
703 | .count = ATOMIC_INIT(0), \ | |
704 | .callback = _callback, \ | |
705 | .use_callback = true, \ | |
706 | } | |
707 | ||
708 | #define DECLARE_TASKLET_DISABLED(name, _callback) \ | |
709 | struct tasklet_struct name = { \ | |
710 | .count = ATOMIC_INIT(1), \ | |
711 | .callback = _callback, \ | |
712 | .use_callback = true, \ | |
713 | } | |
714 | ||
715 | #define from_tasklet(var, callback_tasklet, tasklet_fieldname) \ | |
716 | container_of(callback_tasklet, typeof(*var), tasklet_fieldname) | |
717 | ||
b13fecb1 KC |
718 | #define DECLARE_TASKLET_OLD(name, _func) \ |
719 | struct tasklet_struct name = { \ | |
720 | .count = ATOMIC_INIT(0), \ | |
721 | .func = _func, \ | |
722 | } | |
1da177e4 | 723 | |
b13fecb1 KC |
724 | #define DECLARE_TASKLET_DISABLED_OLD(name, _func) \ |
725 | struct tasklet_struct name = { \ | |
726 | .count = ATOMIC_INIT(1), \ | |
727 | .func = _func, \ | |
728 | } | |
1da177e4 LT |
729 | |
730 | enum | |
731 | { | |
732 | TASKLET_STATE_SCHED, /* Tasklet is scheduled for execution */ | |
733 | TASKLET_STATE_RUN /* Tasklet is running (SMP only) */ | |
734 | }; | |
735 | ||
eb2dafbb | 736 | #if defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT) |
1da177e4 LT |
737 | static inline int tasklet_trylock(struct tasklet_struct *t) |
738 | { | |
739 | return !test_and_set_bit(TASKLET_STATE_RUN, &(t)->state); | |
740 | } | |
741 | ||
da044747 PZ |
742 | void tasklet_unlock(struct tasklet_struct *t); |
743 | void tasklet_unlock_wait(struct tasklet_struct *t); | |
eb2dafbb | 744 | void tasklet_unlock_spin_wait(struct tasklet_struct *t); |
ca5f6251 | 745 | |
1da177e4 | 746 | #else |
6951547a TG |
747 | static inline int tasklet_trylock(struct tasklet_struct *t) { return 1; } |
748 | static inline void tasklet_unlock(struct tasklet_struct *t) { } | |
749 | static inline void tasklet_unlock_wait(struct tasklet_struct *t) { } | |
ca5f6251 | 750 | static inline void tasklet_unlock_spin_wait(struct tasklet_struct *t) { } |
1da177e4 LT |
751 | #endif |
752 | ||
b3c97528 | 753 | extern void __tasklet_schedule(struct tasklet_struct *t); |
1da177e4 LT |
754 | |
755 | static inline void tasklet_schedule(struct tasklet_struct *t) | |
756 | { | |
757 | if (!test_and_set_bit(TASKLET_STATE_SCHED, &t->state)) | |
758 | __tasklet_schedule(t); | |
759 | } | |
760 | ||
b3c97528 | 761 | extern void __tasklet_hi_schedule(struct tasklet_struct *t); |
1da177e4 LT |
762 | |
763 | static inline void tasklet_hi_schedule(struct tasklet_struct *t) | |
764 | { | |
765 | if (!test_and_set_bit(TASKLET_STATE_SCHED, &t->state)) | |
766 | __tasklet_hi_schedule(t); | |
767 | } | |
768 | ||
1da177e4 LT |
769 | static inline void tasklet_disable_nosync(struct tasklet_struct *t) |
770 | { | |
771 | atomic_inc(&t->count); | |
4e857c58 | 772 | smp_mb__after_atomic(); |
1da177e4 LT |
773 | } |
774 | ||
ca5f6251 TG |
775 | /* |
776 | * Do not use in new code. Disabling tasklets from atomic contexts is | |
777 | * error prone and should be avoided. | |
778 | */ | |
779 | static inline void tasklet_disable_in_atomic(struct tasklet_struct *t) | |
780 | { | |
781 | tasklet_disable_nosync(t); | |
782 | tasklet_unlock_spin_wait(t); | |
783 | smp_mb(); | |
784 | } | |
785 | ||
1da177e4 LT |
786 | static inline void tasklet_disable(struct tasklet_struct *t) |
787 | { | |
788 | tasklet_disable_nosync(t); | |
6fd4e861 | 789 | tasklet_unlock_wait(t); |
1da177e4 LT |
790 | smp_mb(); |
791 | } | |
792 | ||
793 | static inline void tasklet_enable(struct tasklet_struct *t) | |
794 | { | |
4e857c58 | 795 | smp_mb__before_atomic(); |
1da177e4 LT |
796 | atomic_dec(&t->count); |
797 | } | |
798 | ||
1da177e4 | 799 | extern void tasklet_kill(struct tasklet_struct *t); |
1da177e4 LT |
800 | extern void tasklet_init(struct tasklet_struct *t, |
801 | void (*func)(unsigned long), unsigned long data); | |
12cc923f RP |
802 | extern void tasklet_setup(struct tasklet_struct *t, |
803 | void (*callback)(struct tasklet_struct *)); | |
1da177e4 LT |
804 | |
805 | /* | |
806 | * Autoprobing for irqs: | |
807 | * | |
808 | * probe_irq_on() and probe_irq_off() provide robust primitives | |
809 | * for accurate IRQ probing during kernel initialization. They are | |
810 | * reasonably simple to use, are not "fooled" by spurious interrupts, | |
811 | * and, unlike other attempts at IRQ probing, they do not get hung on | |
812 | * stuck interrupts (such as unused PS2 mouse interfaces on ASUS boards). | |
813 | * | |
814 | * For reasonably foolproof probing, use them as follows: | |
815 | * | |
816 | * 1. clear and/or mask the device's internal interrupt. | |
817 | * 2. sti(); | |
818 | * 3. irqs = probe_irq_on(); // "take over" all unassigned idle IRQs | |
819 | * 4. enable the device and cause it to trigger an interrupt. | |
820 | * 5. wait for the device to interrupt, using non-intrusive polling or a delay. | |
821 | * 6. irq = probe_irq_off(irqs); // get IRQ number, 0=none, negative=multiple | |
822 | * 7. service the device to clear its pending interrupt. | |
823 | * 8. loop again if paranoia is required. | |
824 | * | |
825 | * probe_irq_on() returns a mask of allocated irq's. | |
826 | * | |
827 | * probe_irq_off() takes the mask as a parameter, | |
828 | * and returns the irq number which occurred, | |
829 | * or zero if none occurred, or a negative irq number | |
830 | * if more than one irq occurred. | |
831 | */ | |
832 | ||
0244ad00 | 833 | #if !defined(CONFIG_GENERIC_IRQ_PROBE) |
1da177e4 LT |
834 | static inline unsigned long probe_irq_on(void) |
835 | { | |
836 | return 0; | |
837 | } | |
838 | static inline int probe_irq_off(unsigned long val) | |
839 | { | |
840 | return 0; | |
841 | } | |
842 | static inline unsigned int probe_irq_mask(unsigned long val) | |
843 | { | |
844 | return 0; | |
845 | } | |
846 | #else | |
847 | extern unsigned long probe_irq_on(void); /* returns 0 on failure */ | |
848 | extern int probe_irq_off(unsigned long); /* returns 0 or negative on failure */ | |
849 | extern unsigned int probe_irq_mask(unsigned long); /* returns mask of ISA interrupts */ | |
850 | #endif | |
851 | ||
6168a702 AM |
852 | #ifdef CONFIG_PROC_FS |
853 | /* Initialize /proc/irq/ */ | |
854 | extern void init_irq_proc(void); | |
855 | #else | |
856 | static inline void init_irq_proc(void) | |
857 | { | |
858 | } | |
859 | #endif | |
860 | ||
b2d3d61a DL |
861 | #ifdef CONFIG_IRQ_TIMINGS |
862 | void irq_timings_enable(void); | |
863 | void irq_timings_disable(void); | |
e1c92149 | 864 | u64 irq_timings_next_event(u64 now); |
b2d3d61a DL |
865 | #endif |
866 | ||
d43c36dc | 867 | struct seq_file; |
f74596d0 | 868 | int show_interrupts(struct seq_file *p, void *v); |
c78b9b65 | 869 | int arch_show_interrupts(struct seq_file *p, int prec); |
f74596d0 | 870 | |
43a25632 | 871 | extern int early_irq_init(void); |
4a046d17 | 872 | extern int arch_probe_nr_irqs(void); |
43a25632 | 873 | extern int arch_early_irq_init(void); |
43a25632 | 874 | |
be7635e7 AP |
875 | /* |
876 | * We want to know which function is an entrypoint of a hardirq or a softirq. | |
877 | */ | |
f0178fc0 | 878 | #ifndef __irq_entry |
33def849 | 879 | # define __irq_entry __section(".irqentry.text") |
f0178fc0 TG |
880 | #endif |
881 | ||
33def849 | 882 | #define __softirq_entry __section(".softirqentry.text") |
be7635e7 | 883 | |
1da177e4 | 884 | #endif |