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1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* | |
3 | * Data types and headers for RAPL support | |
4 | * | |
5 | * Copyright (C) 2019 Intel Corporation. | |
6 | * | |
7 | * Author: Zhang Rui <rui.zhang@intel.com> | |
8 | */ | |
9 | ||
10 | #ifndef __INTEL_RAPL_H__ | |
11 | #define __INTEL_RAPL_H__ | |
12 | ||
13 | #include <linux/types.h> | |
14 | #include <linux/powercap.h> | |
8da04e05 | 15 | #include <linux/cpuhotplug.h> |
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16 | |
17 | enum rapl_domain_type { | |
18 | RAPL_DOMAIN_PACKAGE, /* entire package/socket */ | |
19 | RAPL_DOMAIN_PP0, /* core power plane */ | |
20 | RAPL_DOMAIN_PP1, /* graphics uncore */ | |
21 | RAPL_DOMAIN_DRAM, /* DRAM control_type */ | |
22 | RAPL_DOMAIN_PLATFORM, /* PSys control_type */ | |
23 | RAPL_DOMAIN_MAX, | |
24 | }; | |
25 | ||
26 | enum rapl_domain_reg_id { | |
27 | RAPL_DOMAIN_REG_LIMIT, | |
28 | RAPL_DOMAIN_REG_STATUS, | |
29 | RAPL_DOMAIN_REG_PERF, | |
30 | RAPL_DOMAIN_REG_POLICY, | |
31 | RAPL_DOMAIN_REG_INFO, | |
8365a898 | 32 | RAPL_DOMAIN_REG_PL4, |
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33 | RAPL_DOMAIN_REG_MAX, |
34 | }; | |
35 | ||
35eb1f50 | 36 | struct rapl_domain; |
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37 | |
38 | enum rapl_primitives { | |
39 | ENERGY_COUNTER, | |
40 | POWER_LIMIT1, | |
41 | POWER_LIMIT2, | |
8365a898 | 42 | POWER_LIMIT4, |
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43 | FW_LOCK, |
44 | ||
45 | PL1_ENABLE, /* power limit 1, aka long term */ | |
46 | PL1_CLAMP, /* allow frequency to go below OS request */ | |
47 | PL2_ENABLE, /* power limit 2, aka short term, instantaneous */ | |
48 | PL2_CLAMP, | |
8365a898 | 49 | PL4_ENABLE, /* power limit 4, aka max peak power */ |
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50 | |
51 | TIME_WINDOW1, /* long term */ | |
52 | TIME_WINDOW2, /* short term */ | |
53 | THERMAL_SPEC_POWER, | |
54 | MAX_POWER, | |
55 | ||
56 | MIN_POWER, | |
57 | MAX_TIME_WINDOW, | |
58 | THROTTLED_TIME, | |
59 | PRIORITY_LEVEL, | |
60 | ||
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61 | PSYS_POWER_LIMIT1, |
62 | PSYS_POWER_LIMIT2, | |
63 | PSYS_PL1_ENABLE, | |
64 | PSYS_PL2_ENABLE, | |
65 | PSYS_TIME_WINDOW1, | |
66 | PSYS_TIME_WINDOW2, | |
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67 | /* below are not raw primitive data */ |
68 | AVERAGE_POWER, | |
69 | NR_RAPL_PRIMITIVES, | |
70 | }; | |
71 | ||
72 | struct rapl_domain_data { | |
73 | u64 primitives[NR_RAPL_PRIMITIVES]; | |
74 | unsigned long timestamp; | |
75 | }; | |
76 | ||
8365a898 | 77 | #define NR_POWER_LIMITS (3) |
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78 | struct rapl_power_limit { |
79 | struct powercap_zone_constraint *constraint; | |
80 | int prim_id; /* primitive ID used to enable */ | |
81 | struct rapl_domain *domain; | |
82 | const char *name; | |
83 | u64 last_power_limit; | |
84 | }; | |
85 | ||
86 | struct rapl_package; | |
87 | ||
f1e8d756 ZR |
88 | #define RAPL_DOMAIN_NAME_LENGTH 16 |
89 | ||
ff956826 | 90 | struct rapl_domain { |
f1e8d756 | 91 | char name[RAPL_DOMAIN_NAME_LENGTH]; |
ff956826 | 92 | enum rapl_domain_type id; |
d978e755 | 93 | u64 regs[RAPL_DOMAIN_REG_MAX]; |
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94 | struct powercap_zone power_zone; |
95 | struct rapl_domain_data rdd; | |
96 | struct rapl_power_limit rpl[NR_POWER_LIMITS]; | |
97 | u64 attr_map; /* track capabilities */ | |
98 | unsigned int state; | |
99 | unsigned int domain_energy_unit; | |
100 | struct rapl_package *rp; | |
101 | }; | |
102 | ||
beea8df8 | 103 | struct reg_action { |
d978e755 | 104 | u64 reg; |
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105 | u64 mask; |
106 | u64 value; | |
107 | int err; | |
108 | }; | |
109 | ||
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110 | /** |
111 | * struct rapl_if_priv: private data for different RAPL interfaces | |
112 | * @control_type: Each RAPL interface must have its own powercap | |
113 | * control type. | |
114 | * @platform_rapl_domain: Optional. Some RAPL interface may have platform | |
115 | * level RAPL control. | |
116 | * @pcap_rapl_online: CPU hotplug state for each RAPL interface. | |
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117 | * @reg_unit: Register for getting energy/power/time unit. |
118 | * @regs: Register sets for different RAPL Domains. | |
0c2ddedd | 119 | * @limits: Number of power limits supported by each domain. |
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120 | * @read_raw: Callback for reading RAPL interface specific |
121 | * registers. | |
122 | * @write_raw: Callback for writing RAPL interface specific | |
123 | * registers. | |
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124 | */ |
125 | struct rapl_if_priv { | |
126 | struct powercap_control_type *control_type; | |
127 | struct rapl_domain *platform_rapl_domain; | |
128 | enum cpuhp_state pcap_rapl_online; | |
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129 | u64 reg_unit; |
130 | u64 regs[RAPL_DOMAIN_MAX][RAPL_DOMAIN_REG_MAX]; | |
0c2ddedd | 131 | int limits[RAPL_DOMAIN_MAX]; |
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132 | int (*read_raw)(int cpu, struct reg_action *ra); |
133 | int (*write_raw)(int cpu, struct reg_action *ra); | |
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134 | }; |
135 | ||
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136 | /* maximum rapl package domain name: package-%d-die-%d */ |
137 | #define PACKAGE_DOMAIN_NAME_LENGTH 30 | |
138 | ||
139 | struct rapl_package { | |
140 | unsigned int id; /* logical die id, equals physical 1-die systems */ | |
141 | unsigned int nr_domains; | |
142 | unsigned long domain_map; /* bit map of active domains */ | |
143 | unsigned int power_unit; | |
144 | unsigned int energy_unit; | |
145 | unsigned int time_unit; | |
146 | struct rapl_domain *domains; /* array of domains, sized at runtime */ | |
147 | struct powercap_zone *power_zone; /* keep track of parent zone */ | |
148 | unsigned long power_limit_irq; /* keep track of package power limit | |
149 | * notify interrupt enable status. | |
150 | */ | |
151 | struct list_head plist; | |
152 | int lead_cpu; /* one active cpu per package for access */ | |
153 | /* Track active cpus */ | |
154 | struct cpumask cpumask; | |
155 | char name[PACKAGE_DOMAIN_NAME_LENGTH]; | |
7ebf8eff | 156 | struct rapl_if_priv *priv; |
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157 | }; |
158 | ||
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159 | struct rapl_package *rapl_find_package_domain(int cpu, struct rapl_if_priv *priv); |
160 | struct rapl_package *rapl_add_package(int cpu, struct rapl_if_priv *priv); | |
161 | void rapl_remove_package(struct rapl_package *rp); | |
162 | ||
ff956826 | 163 | #endif /* __INTEL_RAPL_H__ */ |