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2025cf9e | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2f26e0a9 DW |
2 | /* |
3 | * Copyright © 2015 Intel Corporation. | |
4 | * | |
5 | * Authors: David Woodhouse <David.Woodhouse@intel.com> | |
2f26e0a9 DW |
6 | */ |
7 | ||
8 | #ifndef __INTEL_SVM_H__ | |
9 | #define __INTEL_SVM_H__ | |
10 | ||
48811c44 | 11 | /* Page Request Queue depth */ |
ea661ad6 | 12 | #define PRQ_ORDER 4 |
48811c44 LB |
13 | #define PRQ_RING_MASK ((0x1000 << PRQ_ORDER) - 0x20) |
14 | #define PRQ_DEPTH ((0x1000 << PRQ_ORDER) >> 5) | |
15 | ||
5cec7537 DW |
16 | /* |
17 | * The SVM_FLAG_SUPERVISOR_MODE flag requests a PASID which can be used only | |
18 | * for access to kernel addresses. No IOTLB flushes are automatically done | |
19 | * for kernel mappings; it is valid only for access to the kernel's static | |
20 | * 1:1 mapping of physical memory — not to vmalloc or even module mappings. | |
21 | * A future API addition may permit the use of such ranges, by means of an | |
22 | * explicit IOTLB flush call (akin to the DMA API's unmap method). | |
23 | * | |
24 | * It is unlikely that we will ever hook into flush_tlb_kernel_range() to | |
25 | * do such IOTLB flushes automatically. | |
26 | */ | |
06905ea8 | 27 | #define SVM_FLAG_SUPERVISOR_MODE BIT(0) |
569e4f77 | 28 | |
2f26e0a9 | 29 | #endif /* __INTEL_SVM_H__ */ |